JP4175651B2 - Optical device - Google Patents

Description

  The present invention relates to a solid-state imaging device, a light receiving device used in an optical pickup system, an optical device such as a hologram unit, and a manufacturing method thereof.

  2. Description of the Related Art In recent years, solid-state imaging devices built in video cameras, digital cameras, digital still cameras, and the like have a light-receiving region that is a translucent plate with an imaging element such as a CCD mounted on a casing or base made of an insulating material. It is packaged by covering with and provided as a package body.

  FIG. 8 is a cross-sectional view showing the structure of a conventional solid-state imaging device described in Patent Document 1. As shown in the figure, the conventional solid-state imaging device is configured by arranging an imaging element chip 145 in an internal space 142 surrounded by a box-shaped casing 141 and a seal glass 147.

The housing 141 includes a die pad 143 positioned at the center of the substrate portion 141a, are embedded and lead 144 located below the rib 141b. The image sensor chip 145 disposed at the center of the internal space 142 is bonded to the upper surface of the die pad 143.

  The lead 144 has an internal terminal portion 144a exposed to the internal space 142 on the upper surface of the substrate portion 141a inside the rib 141b, and an external terminal portion 144b exposed from the bottom surface of the substrate portion 141a below the rib 141b. Yes.

And the bonding pads of the internal terminal portion 1 44a and the imaging element chip 1 45 are connected by bonding wires 146 made of a metal wire. A transparent seal glass plate 147 is bonded to the upper end surface of the rib 141b to form a package for protecting the image sensor chip 145. As shown in FIG. 8, the solid-state imaging device is mounted on the circuit board with the sealing glass plate 147 facing upward, and the external terminal portion 144b is connected to the electrode on the circuit board. Used for.

Is not shown, above the sealing glass plate 147, cylinder mirrors imaging optical system is built in, the mutual positional relationship between the light receiving region formed on the image sensor chip 145, wearing instrumentation is adjusted to a predetermined accuracy It is. During the imaging operation, the light from the imaging target is condensed and photoelectrically converted into the light receiving region through the imaging optical system incorporated in the lens barrel.

The solid-state imaging device having such a structure, since it is connected to the electrode on the circuit board by the external terminal section 144 b exposed to the housing bottom surface, the structure using the connection by the outer leads bent downward from the side surface of the housing In comparison, the package height and occupied area are small, and it is suitable for high-density mounting.

In addition, a light receiving device used in an optical pickup system for writing, reading, and rewriting information with a recording medium such as a DVD, CD, MD, etc., a hologram unit in which a plurality of elements in the optical pickup are integrated, etc. The same configuration is basically adopted in the optical device.
JP 2001-77277 A

  However, in the structure of the conventional optical device shown in FIG. 8, the degree of aggregation of the entire system such as a solid-state imaging device and an optical pickup is not sufficient, and there is still room for improvement.

  An object of the present invention is to provide a highly integrated optical device and a method for manufacturing the same by utilizing a space in a housing.

  The optical device of the present invention is molded in such a manner that a semiconductor chip and an optical element chip are sequentially stacked in an internal space of a housing for arranging the optical element chip, and at least a part of the upper surface is exposed. The plurality of wirings are electrically connected to the optical element chip and the semiconductor chip by the first and second connecting members, respectively.

  As a result, the optical element chip and a large-sized semiconductor chip such as a processor can be packaged, and the entire system can be miniaturized and the cost can be reduced by using a highly integrated optical device.

  By providing a plurality of first connection members that connect the same portion (external connection terminal) of the optical element chip and a plurality of wirings, the number of external connection terminals of the optical element chip can be reduced.

  By further providing a third connecting member that electrically connects a part of the optical element chip and a part of the semiconductor chip, the load capacity applied to a part of the optical element chip (external connection terminal) is reduced, and the temperature Since the increase is suppressed, the current consumption can be reduced.

  When the optical element chip is a solid-state imaging element chip, it becomes a heat generation source in the optical element chip by providing the semiconductor chip with a subsequent stage of a charge transfer circuit including at least a current source transistor of the source follower. Since the rear stage portion is arranged on the lower semiconductor chip, the temperature rise of the optical element chip can be suppressed, and thus the image characteristics of the optical device can be improved.

  The rear stage part of the charge transfer circuit of the semiconductor chip includes a drive transistor and a current source transistor of the source follower, so that the temperature rise of the optical element chip can be more effectively suppressed. Source followers.

  Further, it is preferable that the rear stage portion of the charge transfer circuit of the semiconductor chip is provided in a region not located below the optical element chip.

  The substrate part is preferably molded integrally with the cylindrical part.

  The optical device manufacturing method of the present invention forms a common substrate portion having a plurality of optical device formation regions and a common cylindrical portion, and sequentially stacks a semiconductor chip and an optical element chip on the common substrate portion. This is a method of forming a separated body by installing a window member on a common cylindrical portion and cutting the molded body after being installed together.

  By this method, an optical device having a high degree of integration can be obtained in which an optical element chip and a large-sized semiconductor chip such as a processor are packaged.

  In the process of forming the molded body, it is possible to suppress the occurrence of resin flash by performing resin molding by attaching the lead frame to be a wiring to both mold dies while being placed on the sealing tape. it can.

  The common substrate portion and the common cylindrical portion are preferably formed integrally.

  According to the optical device and the manufacturing method thereof of the present invention, a highly integrated optical device in which a large semiconductor chip such as a processor and an optical element chip are packaged is obtained.

(First embodiment)
-Structure of optical device-
FIGS. 1A and 1B are a cross-sectional view and a back view, respectively, taken along line IA-IA of the optical device according to the first embodiment. However, FIG. 1A and FIG. 1B are drawn at different scales. As shown in the figure, the optical device of the present embodiment is surrounded by a casing 10 made of thermosetting or plastic resin such as epoxy resin formed by integral molding and a window member 17 that is a translucent member. A large semiconductor chip 30 on which a DSP (Digital Signal Processor), an integrated circuit, and the like are formed and an optical element chip 15 are arranged in the internal space 14. In the present embodiment, the optical element chip 15 is mounted with a solid-state imaging device such as a CCD, and the optical device is a solid-state imaging device used for a video camera, a digital camera, a digital still camera, or the like.

  However, the optical element chip may be one in which a plurality of light receiving elements are discretely arranged in place of the solid-state imaging element or one in which only the light emitting element is mounted. In this case, the optical device is a DVD, CD, MD. A light receiving device or a light emitting device disposed in an optical pickup used in a system including the above.

  The housing 10 includes a flat substrate portion 12 and a rectangular frame-shaped rib 13 (tubular portion) existing on the substrate portion 12. In the present embodiment, since both are formed of the same material by integral molding, the boundary indicated by the broken line in FIG. 1A does not actually exist, but both may be separated. . In that case, the rib can be attached after the substrate portion and the wiring (lead frame) are molded. The semiconductor chip 30 is fixed to the substrate portion 12 of the housing 10 by the bonding member 31 in the internal space 14, and the optical element chip 15 is fixed to the semiconductor chip 30 by the bonding member 16. .

The window member 17 is made of a translucent material such as glass, for example, and is fixed to the upper end portion of the rib 13 of the housing 10 by a bonding member 18 at the outer peripheral portion thereof. And the space | interval of the window member 17 and the rib 13 is filled with the joining member, and the internal space 14 is sealed, and the package body is comprised. The height of the ribs 13, for example in the range of 0.2 to 1.0 mm, the width of the rib 1 3 is in the range of for example 0.1 to 1.0 mm. The thickness of the whole package body is set to 2 mm or less, for example.

  The size of the semiconductor chip 30 is in the range of 1 to 10 mm in length, 1 to 10 mm in width, and 0.1 to 0.4 mm in thickness, and the size of the optical element chip 15 is 0.5 to 8 mm in length. The width is 0.5 to 8 mm and the thickness is 0.1 to 0.4 mm.

Further, as shown in FIG. 2F to be described later, wiring 19 is embedded in the substrate portion 12 with the external terminal portion 19a exposed from the substrate portion 12, as shown in FIG. Only the external terminal portion 19a appears in the cross section. In this embodiment, since a molding process using a sealing tape is employed, the occurrence of resin flash is suppressed, and the lowermost portion of the external terminal portion 19a protrudes downward from the lower surface of the substrate portion 12. . However, the manufacturing process using the sealing tape is not necessarily performed. At the bottom of the wiring 19, the recess is provided, above the recess below the thin portion of the thin portion (side surface terminal portion) and the wiring 19 (the side surface terminal portions) wraps around the mold resin.

  Each outer surface of the housing 10, that is, the outer peripheral surface of the rib 13 forms a plane that is substantially orthogonal to the lower surface of the substrate portion 12. Each outer surface of the housing 10, that is, the inner peripheral surface of the rib 13 is formed with a taper that opens from the surface of the substrate portion 12 toward the window member 17 in order to facilitate removal of the mold after resin molding. (Not shown).

  FIG. 3 is a perspective view showing a part of an example of the structure disposed in the internal space in a state where the optical element chip 15 is mounted on the semiconductor chip 30. As shown in FIGS. 1A and 3, the pad electrode 15 b (external connection terminal) of the optical element chip 15 and a part of the upper surface of each wiring 19 are a first metal thin wire that is a first connection member. 22a, the pad electrode 30a (external connection terminal) of the semiconductor chip 30 and a part of the upper surface of the wiring 19 are connected by the second metal thin wire 22b as the second connecting member, and the pad of the semiconductor chip 30 The electrode 30a and the pad electrode 15b of the optical element chip 15 are connected to each other by a third thin metal wire 22c that is a third connecting member.

  According to the present embodiment, not only the optical element chip 15 but also a large-sized semiconductor chip 30 such as a DSP is disposed in the internal space 14, and the optical element chip 15 is placed on the semiconductor chip 30 with its main surface 15 a facing upward. Since they are installed so as to face each other, the space of the internal space 14 of the housing 10 can be effectively used, and the optical element chip and the large-sized semiconductor chip 30 such as a processor can be packaged in one package. A high optical device can be obtained. Further, it is possible to reduce the size of the entire system such as a camera or an optical pickup in which the optical device is incorporated and to reduce the manufacturing cost.

  Further, as shown in FIGS. 1A and 3, one pad electrode 15b on the optical element chip 15 and two wirings 19 are connected by two first metal thin wires 22a. Thus, the number of external connection terminals of the optical element chip 15 can be reduced.

  However, in the optical device, even if there is no portion where one pad electrode 15b on the optical element chip 15 and two wirings 19 are connected by the two first metal thin wires 22a, the basic effect of the present invention is achieved. Is obtained.

  Furthermore, since the third metal thin wire 22c that connects the pad electrode 15b of the optical element chip 15 and the pad electrode 30a of the semiconductor chip 30 is provided, the third metal thin wire 22c is shorter than the first metal thin wire 22a. The load capacity applied to the pad electrode 30a to be connected is reduced. Therefore, by applying this structure to the pad electrode 30a through which a large current flows particularly in the optical element chip 15, the amount of heat generated in the optical element chip 15 can be reduced, and power consumption and image characteristics can be improved. Can do.

  However, even if the third thin metal wire 22c is not necessarily provided, the basic effect of the present invention can be obtained.

-Optical device manufacturing process-
2A to 2F are cross-sectional views taken along the line II-II in FIG. 1 illustrating the manufacturing steps of the optical device according to the first embodiment. However, in the steps shown in FIGS. 2A to 2E, only two optical device formation regions are displayed. Generally, in the steps shown in FIGS. The manufacturing process proceeds using a lead frame having the optical device forming region in a grid pattern.

  First, the lead frame 19x on which the wiring pattern is formed is placed on the sealing tape 20 in the step shown in FIG. The lead frame 19x has a structure in which most of the recesses are provided in the lower portion by half-etching or pressing, and only the portion that becomes the external terminal portion 19a protrudes downward from the bottom surface of the recess.

  Next, a molding process is performed in the process shown in FIG. That is, the lead frame 19x attached with the sealing tape 20 is mounted on a mold, and a mold resin such as glass epoxy resin is filled in the die cavity of the mold, and the external terminal portion 19a of the lead frame 19x. The other portion is embedded in the mold resin, and a common substrate portion 12x for many optical devices, and a common rib 13x having a thickness that allows for the width and cutting width of the ribs 13 of the two adjacent optical devices. A formed body 10x, which is a common casing, is formed. Although not shown, each die cavity of the mold has a spatial shape for forming a common substrate portion 12x and a common rib 13x.

Next, in the step shown in FIG. 2 (c), after peeling off the sealing tape 20 from the molded body 10x, the molded body 10x of the inner space 1 4, on the substrate 12, mounting the semiconductor chip 30 Further, the optical element chip 15 is mounted on the semiconductor chip 30 with the light receiving region 15a facing upward. Then, the bonding member 31 to the lower surface of the semiconductor chip 30 of the base plate portion 12, the joining member 16 is interposed respectively between the lower surface of the upper surface and the optical element chip 15 of the semiconductor chip 30. Thereafter, each pad electrode (not shown) of the semiconductor chip 30 and a part of the upper surface of each wiring 19 are connected by the first thin metal wire 22a, and each pad electrode (not shown) of the optical element chip 15 and each of the respective pads 19 are connected. A part of the upper surface of the wiring 19 is connected by the second fine metal wire 22b, and the pad electrodes of the semiconductor chip 30 and the optical element chip 15 are connected by the third fine metal wire 22c (wire bonding process).

  Next, in the step shown in FIG. 2D, a window member 17 made of glass that covers the internal space 14 is placed on the upper surface of the rib 13 of the molded body 10x, and the window member 17 and the rib 13 And the internal space 14 is sealed.

  Next, in the step shown in FIG. 2E, the central portion of the rib 13 serving as a boundary between adjacent optical device forming regions of the molded body 10x is cut by a blade, and individual optical devices ( A separated body). At this time, in the internal space 14 of each optical device, the semiconductor chip 30 and the optical element chip 15 are arranged in a superimposed state. Through the above steps, an optical device in which a semiconductor chip such as a DSP and an optical element are packaged as shown in FIG. 2F is obtained.

According to the manufacturing method of the present embodiment, since the semiconductor chip 30 such as a DSP and the optical element chip 15 are arranged in the inner space 14 in the step shown in FIG. 2C, the semiconductor chip such as a DSP is arranged. And the optical element chip can be made into one package, and by improving the degree of integration of the optical device, the entire system can be reduced in size and cost.

  In the above description, an example has been shown in which the ribs forming the adjacent housings are combined into one, but this embodiment is implemented even when a method of forming the adjacent ribs separately is employed. It is possible to obtain the same effect by applying the manufacturing method of the form.

  In the manufacturing process according to the first embodiment, the molding process is performed in a state where the lead frame is placed on the sealing tape, but the sealing tape is not necessarily used. However, when the sealing tape is used, the upper and lower surfaces of the lead frame are clamped with the upper mold and the lower mold, so that the mold surface and the upper and lower surfaces of the lead frame are stably obtained. be able to. As a result, the occurrence of resin burrs due to molding is effectively suppressed, and a structure in which the external terminal portion protrudes from the sealing resin is obtained, so that soldering when mounting the optical device to the motherboard becomes easy. Implementation can be facilitated and speeded up.

(Second Embodiment)
4A and 4B are a cross-sectional view and a back view, respectively, taken along line IVA-IVA of the optical device according to the second embodiment. However, FIG. 4A and FIG. 4B are drawn at different scales.

  As shown in the figure, the optical device of the present embodiment is surrounded by a housing 10 made of thermosetting or plastic resin such as epoxy resin formed by integral molding and a hologram 35 which is a translucent member. A large semiconductor chip 30 such as a DSP (Digital Signal Processor) and an optical element chip 15 are arranged in the internal space 14. In the present embodiment, the optical element chip 15 is configured by mounting a light emitting element 15c such as a light emitting diode and a light receiving element 15d, and the optical device is used in a system including a DVD, a CD, an MD, and the like. A hologram unit incorporating a plurality of elements in an optical pickup.

The housing 10 includes a flat substrate portion 12 and a rectangular frame-shaped rib 13 (tubular portion) existing on the substrate portion 12. In this embodiment, since both are formed of the same material by integral molding, the boundary indicated by the broken line in FIG. 4A does not actually exist, but the two may be separated. . In that case, the rib can be attached after the substrate portion and the wiring (lead frame) are molded. The semiconductor chip 30 is fixed to the substrate portion 12 of the housing 10 by the bonding member 31 in the internal space 14, and the optical element chip 15 is fixed to the semiconductor chip 30 by the bonding member 16. . The pad electrodes of the semiconductor chip 30, and each electrode pad of the light emitting element 15c and the light receiving element 15d of the optical element chip 15 (not shown), the part of the top surface of each wiring 19, by each metal thin wire 22 Are connected to each other. Further, although not shown, in the metal thin wire 22, the pad electrodes of the semiconductor chip 30, there is one that connects the respective electrode pads of the light emitting element 15c or the light receiving element 15d of the optical element chip 15 to each other Also good.

Hologram 35 has, for example, a body portion 35a made of a translucent material such as an optical resin, a hologram region 35b provided in the upper surface of the main body portion 35 a. The outer peripheral portion of the main body portion 35 a of the hologram 35 is fixed to the upper end portion of the rib 13 of the housing 10 by the joining member 18. Then, the gap between the hologram 35 and the rib 13 is filled by the joining member, and the internal space 14 is sealed, thereby forming a package body. The height of the ribs 13, for example in the range of 0.1 to 2 mm, a width of the rib 1 3 is in the range of for example 0.1 to 0.5 mm. The height of the hologram 35 is, for example, in the range of 1 to 10 mm.

  The size of the semiconductor chip 30 is in the range of 1 to 20 mm in length, 1 to 20 mm in width, and 0.05 to 0.5 mm in thickness, and the size of the optical element chip 15 is in the range of 0.5 to 10 mm in length. The width ranges from 0.5 mm to 10 mm and the thickness ranges from 0.05 mm to 0.5 mm.

Further, as shown in FIG. 2F in the first embodiment, wiring 19 is embedded in the substrate portion 12 with the external terminal portion 19a exposed from the substrate portion 12, and FIG. Only the external terminal portion 19a appears in the cross section shown in a). In this embodiment, since a molding process using a sealing tape is employed, the occurrence of resin flash is suppressed, and the lowermost portion of the external terminal portion 19a protrudes downward from the lower surface of the substrate portion 12. . However, the manufacturing process using the sealing tape is not necessarily performed. At the bottom of the wiring 19, the recess is provided, above the recess below the thin portion of the thin portion (side surface terminal portion) and the wiring 19 (the side surface terminal portions) wraps around the mold resin.

  Each outer surface of the housing 10, that is, the outer peripheral surface of the rib 13 forms a plane that is substantially orthogonal to the lower surface of the substrate portion 12. Each outer surface of the casing 10, that is, the inner peripheral surface of the rib 13 is formed with a taper that opens from the surface of the substrate portion 12 toward the hologram 35 in order to facilitate removal of the mold after resin molding ( (Not shown).

  Also in this embodiment, the formation state of the thin metal wire when the optical element chip 15 is mounted on the semiconductor chip 30 is as shown in FIG. 3 in the first embodiment. The structure of the semiconductor device of this embodiment is formed by basically the same process as the manufacturing process shown in FIGS.

  According to the present embodiment, not only the optical element chip 15 but also a large-sized semiconductor chip 30 such as a DSP is disposed in the internal space 14, and the optical element chip 15 is placed on the semiconductor chip 30 with its main surface 15 a facing upward. Since they are installed so as to face each other, the space of the internal space 14 of the housing 10 can be effectively used, and the optical element chip and the large-sized semiconductor chip 30 such as a processor can be packaged in one package. A high optical device can be obtained. Further, it is possible to reduce the size of the entire system such as a camera in which the optical device is incorporated and to reduce the manufacturing cost.

  In the first and second embodiments, the signal connection of each pad electrode of the semiconductor chip 30 and the optical element chip 15 is performed through a thin metal wire. However, the present invention is applied to the first embodiment. The connection is not limited, and a connection through a bump, a connection through a through hole, or the like can also be used.

(Third embodiment)
The external structure of the optical device according to the present embodiment is as shown in FIGS. 1 to 3 in the first embodiment, and a description thereof will be omitted.

  FIG. 5 is a diagram schematically showing a configuration of a solid-state imaging device straddling an optical element chip and a semiconductor chip in the third embodiment. As shown in the figure, the solid-state imaging device of this embodiment includes a plurality of photoelectric conversion elements (not shown) and color filters R, Gr, and B arranged in a matrix (vertical direction and horizontal direction). An image sensor 51 is provided. Further, the solid-state imaging device includes a vertical transfer stage 52 in which a large number of charge transfer gates V1 to V6 are arranged to transfer charges accumulated in each solid-state image pickup element 51 by photoelectric conversion in a vertical direction, and each vertical transfer stage 52. A horizontal transfer stage 53 in which transfer gates H1 and H2 are alternately arranged to transfer the transferred charges of each solid-state imaging device in the horizontal direction, and an output amplifier for outputting the charges transferred from the horizontal transfer stage 53 to the image processing circuit 54 is provided.

  FIG. 6 is an electric circuit diagram showing a part of the output amplifier 54. As shown in the figure, the output amplifier 54 includes a drive transistor 54A that receives the power supply voltage VDD at the drain and an input signal at the gate, a current source transistor 54B that receives the ground potential VSS at the source, and a constant voltage at the gate. It has. The source of the drive transistor 54A and the drain of the current source transistor 54B are connected to a common output node NOUT, and the output node NOUT is connected to an image processing circuit arranged in the semiconductor chip 30. . FIG. 6 shows only one stage (one pair) of drive transistors 54A and current source transistors 54B, but a plurality of stages (a plurality of pairs) of drive transistors 54A and current source transistors 54B may be provided.

  Since a large current flows through the output amplifier 54, particularly the current source transistor 54B, heat generation is large, and in the conventional optical element chip, the temperature of the solid-state imaging device close to the output amplifier becomes high, and shading is applied to the image. There was a risk of causing the phenomenon.

  On the other hand, in the present embodiment, as will be described in detail later, the rear stage portion of the charge transfer circuit including at least one current source transistor that is a particularly large heat generation source in the solid-state imaging device is separated from the main portion to form a semiconductor chip. Since the heat generated by the current source transistor is quickly released to the base (substrate portion 12 in this embodiment), the temperature rise in the optical element chip 15 can be suppressed.

  7A to 7C are diagrams showing examples in which the arrangement of the source follower circuits in the output amplifier 54 of the optical element chip 15 and the semiconductor chip 30 is changed.

  In the example shown in FIG. 7A, only the current source transistor 54B (the rear stage part of the charge transfer circuit) in the source follower circuit is arranged on the semiconductor chip 30, and the drive transistor 54A and other elements (main parts of the charge transfer circuit). ) Is arranged on the optical element chip 15. That is, in this example, the current source transistor 54B corresponds to the rear stage portion of the charge transfer circuit. The pad electrode 15b connected to the drive transistor 54A of the optical element chip 15 and the pad electrode 30a connected to the current source transistor 54B of the semiconductor chip 30 are connected by the third thin metal wire 22c. When the source follower circuit is provided with a plurality of stages of drive transistors 54A and current source transistors 54B, only the final stage current source transistor 54B needs to be disposed on the semiconductor chip 30.

  In this case, all the current source transistors 54B among the plurality of stages of drive transistors 54A and current source transistors 54B may be arranged on the semiconductor chip 30, and all the drive transistors 54A may be arranged on the optical element chip 15. . For example, all the pad electrodes 30a respectively connected to the current source transistors 54B of the semiconductor chip 30 are connected in series by wiring on the semiconductor chip 30 and connected to the drive transistors 54A of the optical element chip 15, respectively. The pad electrode 15b and the pad electrode 30a connected to each current source transistor 54B of the semiconductor chip 30 only need to be connected by the third thin metal wire 22c, respectively. In this case, all the current source transistors 54B are the rear stage part of the charge transfer circuit, and the part of the charge transfer circuit excluding all the current source transistors 54B is the main part of the charge transfer circuit.

  In the example shown in FIG. 7B, the drive transistor 54 </ b> A and the current source transistor 54 </ b> B of the source follower circuit are arranged on the semiconductor chip 30, and the other elements are arranged on the optical element chip 30. When the source follower circuit is provided with a plurality of stages of drive transistors 54A and current source transistors 54B, only the final stage of drive transistors 54A and current source transistors 54B may be arranged in the semiconductor chip 30 or all of them. The drive transistor 54A and the current source transistor 54B may be arranged on the semiconductor chip 30, or several stages of the drive transistor 54A and the current source transistor 54B may be arranged on the semiconductor chip 30. In this case, the drive transistor 54A and the current source transistor 54B arranged on the semiconductor chip 30 are the rear stage parts of the charge transfer circuit, and the part excluding them in the charge transfer circuit is the main part of the charge transfer circuit.

  In the example shown in FIG. 7C, output amplifiers are provided at two locations, and at least one current source transistor 54B of the source follower circuit of each output amplifier is arranged on the semiconductor chip 30 respectively. The form of this arrangement may be the form shown in FIG. 7A and the description thereof, or the form shown in FIG. 7B and the description thereof. As described above, when output amplifiers are provided at a plurality of locations, at least one current source transistor 54B is arranged at the same number of locations as the number of output amplifiers (the number of source follower circuits) in the semiconductor chip 30. Just do it.

  In the configuration shown in FIGS. 7A to 7C, at least the current source transistor 54B is arranged in a region of the semiconductor chip 30 excluding a region located immediately below the optical element chip 15, The influence of heat on the optical element chip 15 can be avoided more reliably.

  However, even if the current source transistor 54B is disposed in the region located below the optical element chip 15 on the semiconductor chip 30, it does not have to adversely affect the solid-state imaging element in the optical element chip 15. In that case, the optical element chip 15 is preferably disposed at a position where the temperature distribution can be made uniform (for example, the center position) or at a position where the solid-state image sensor of the optical element chip 15 is hardly affected (for example, the peripheral position). . In particular, when the optical element chip 15 and the semiconductor element chip 30 are approximately the same size, and the pad electrodes of the optical element chip 15 and the semiconductor element chip 30 are connected through a through hole instead of a thin metal wire. This configuration can be adopted.

  Further, the structure of the optical device in the third embodiment is not limited to the structure shown in FIG. For example, the housing is composed only of a base having an opening, and the lower part of the opening is closed by a semiconductor chip and an optical element chip, and the upper part of the opening is closed by a translucent member such as a glass window. It may have a structure in which a semiconductor chip is mounted on a metal plate and an optical element chip is mounted thereon. That is, the third embodiment can be applied to all optical devices having a structure in which a solid-state imaging device chip is mounted on a semiconductor chip.

  The optical device according to the present invention can be used for components such as a video camera, a digital camera, a digital still camera, or an optical pickup of a system using a DVD, CD, MD, or the like.

(A), (b) is sectional drawing and the back view in the IA-IA line of the optical device which concerns on 1st Embodiment in order. (A)-(f) is sectional drawing which shows the manufacturing process of the optical device which concerns on 1st Embodiment. It is a perspective view which fractures | ruptures and shows the structure of the optical device which concerns on 1st Embodiment. (A), (b) is sectional drawing and the back view in the IVA-IVA line | wire of the optical device which concerns on 2nd Embodiment in order. It is a figure which shows schematically the structure of the solid-state imaging device ranging over the optical element chip | tip and semiconductor chip in 3rd Embodiment. FIG. 9 is an electric circuit diagram showing a part of an output amplifier in a third embodiment. (A)-(c) is a figure which shows the example which changed the arrangement | positioning form of the source follower circuit in the output amplifier of the optical element chip | tip and semiconductor chip in 3rd Embodiment. It is sectional drawing which shows the structure of the conventional optical device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Housing | casing 12 Board | substrate part 12x (Common) Board | substrate part 13 Rib 13x (Common) rib 14 Internal space 15 Optical element chip | tip 15a Main surface 15b Pad electrode 16 Joining member 17 Window member 18 Seal resin 19 Wiring 19a External terminal part 20 Sealing tape 22 Metal thin wire 22a 1st metal thin wire 22b 2nd metal thin wire 22c 3rd metal thin wire 30 Semiconductor chip 31 Joining member 35 Hologram 35a Body part 35b Hologram area 51 Solid-state image sensor 52 Vertical transfer stage 53 Horizontal transfer stage 54 Output Amplifier 54A Drive Transistor 54B Current Source Transistor

Claims (11)

A housing that surrounds the space and includes a substrate portion and a cylindrical portion;
A translucent member attached to a main surface facing the light incident direction of the cylindrical portion of the housing;
A semiconductor chip installed on the substrate portion of the housing;
An optical element chip placed on the semiconductor chip with the main surface facing the translucent member;
A plurality of wirings molded in a state in which a part of the upper surface, a part of the lower surface, and a part of the side surface are exposed by the substrate portion of the housing;
A first connecting member for electrically connecting one of the plurality of wirings and a part of the optical element chip;
A second connecting member for electrically connecting another one of the plurality of wirings and a part of the semiconductor chip;
The plurality of wirings are
A plurality of internal terminal portions whose upper surfaces are exposed in the space;
A plurality of external terminal portions that are arranged corresponding to the plurality of internal terminal portions and whose lower surfaces are exposed on the bottom surface of the substrate portion of the housing;
An optical device having a plurality of side surface terminal portions, the side surfaces of which are exposed on the side surfaces of the substrate portion of the housing, and the lower surfaces of which are covered with the resin of the substrate portion of the housing. The optical device according to claim 1.
An optical device, further comprising: another first connection member that electrically connects the part of the optical element chip and another wiring. The optical device according to claim 1 or 2,
An optical device further comprising a third connecting member for electrically connecting a part of the optical element chip and a part of the semiconductor chip. The optical device according to claim 3.
The optical element chip is a solid-state imaging element chip having a plurality of pixels and a main part of a charge transfer circuit,
In the semiconductor chip, second part is provided in the charge transfer circuit comprising a current source transistor of the source over the scan follower circuit,
The third connection member is an optical device that connects a main part of the charge transfer circuit on the optical element chip and a rear stage part of the charge transfer circuit on the semiconductor chip. The optical device according to any one of claims 1 to 4,
The optical device, wherein the substrate portion is molded integrally with the cylindrical portion. The optical device according to any one of claims 1 to 3,
The translucent member is a hologram,
The optical element chip is an optical device on which a light receiving element and a light emitting element are mounted. A semiconductor chip fixed to the base;
A plurality of wirings molded in a state in which a part of the upper surface, a part of the lower surface, and a part of the side surface are exposed in the peripheral region of the semiconductor chip mounting region of the base;
A solid-state imaging device chip that is disposed on the semiconductor chip with the main surface facing upward and has a plurality of pixels and a main part of a charge transfer circuit;
Provided in the semiconductor chip, and the second part of the charge transfer circuit comprising a current source transistor of the source over the scan follower circuit,
A connecting member for connecting a main part on the charge transfer circuit of the optical element chip and a rear stage part of the charge transfer circuit of the semiconductor chip;
The plurality of wirings are
A plurality of internal terminal portions whose upper surfaces are exposed on the semiconductor chip mounting side of the base,
A plurality of external terminal portions that are arranged corresponding to the plurality of internal terminal portions, and whose lower surfaces are exposed on the bottom surface of the base;
An optical device having a plurality of side surface terminal portions whose side surfaces are exposed on the side surfaces of the base and whose lower surfaces are covered with the resin of the base. The optical device according to claim 7.
An optical device, wherein a rear stage portion of the charge transfer circuit of the semiconductor chip includes a source follower driving transistor and a current source transistor. The optical device according to claim 7 or 8,
An optical device, wherein a rear stage portion of the charge transfer circuit of the semiconductor chip includes a plurality of source followers. The optical device according to any one of claims 7 to 9,
The semiconductor chip has a larger area than the optical element chip,
An optical device, wherein a rear stage portion of the charge transfer circuit of the semiconductor chip is provided in a region of the semiconductor chip that is not located below the optical element chip. In the optical device according to any one of claims 1 to 10,
The above wiring is a lead frame, an optical device.

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