JP4166044B2 - Pop sound prevention circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a pop noise prevention circuit for preventing noise (pop noise) generated by an inrush current that flows at the time of start and stop in an amplifier using a PWM system.
[0002]
[Prior art]
FIG. 4 is a block diagram showing the configuration of a conventional amplifier. In FIG. 4, C11 is a coupling capacitor, L11 is an inductor constituting a low-pass filter, C12 is a capacitor constituting the low-pass filter, SP is a speaker, 10 is a PWM generating circuit for PWM-modulating and amplifying an input signal, and 20 is PWM It is a power amplifier circuit for amplifying a signal. The PWM generation circuit 10 operates when the voltage ENpwm of the enable terminal 1 becomes H level, and PWM modulates a signal input to an input terminal (not shown). The generated PWM signal is amplified by the power amplifier circuit 20, and then smoothed by being input to a low-pass filter including an inductor L11 and a capacitor C12 via a coupling capacitor C11, and drives the speaker SP.
[0003]
However, the potential difference between both ends of the coupling capacitor C11 is zero before starting, but charging is performed up to the center voltage of the signal at starting. At the time of stopping, discharging is performed until the potential difference between both ends of the coupling capacitor C11 becomes zero. When an inrush current generated at such time flows to the speaker SP, a pop sound is generated.
[0004]
Therefore, in order to reduce this pop noise, conventionally, the transistor SP11 is connected in parallel to the speaker SP, and the transistor Q11 is made to conduct at the time of starting and stopping by the transistor control circuit 50, thereby short-circuiting the speaker SP. Was done.
[0005]
FIG. 5 is a diagram showing the configuration of another conventional amplifier. Reference numeral 70 denotes a PWM output unit that divides the output transistor into a plurality of components, and reference numeral 60 denotes a transistor number control circuit that controls the number of transistors in the PWM output unit 70.
[0006]
In this configuration, the transistor size control circuit 60 gradually increases the total size and the number of output section transistors of the PWM output section 70 from zero to gradually charge the coupling capacitor C11 during startup, and gradually outputs the PWM output when stopped. The coupling capacitor C11 is gradually discharged by gradually reducing the total size and the number of transistors in the unit 70, and the inrush current flowing through the speaker SP is suppressed.
[0007]
[Problems to be solved by the invention]
However, the method shown in FIG. 4 has a problem that the transistor Q11 and the transistor control circuit 50 need to be provided separately, and the mounting area becomes large.
[0008]
Further, the method shown in FIG. 5 needs to finely control the number of transistors of the PWM output unit 70. When the power supply voltage is 3.3V, even if it is controlled by 10 bits, the step is about 3.2mV. . Therefore, if the control is performed at several mV, there is a problem that the scale of the transistor number control circuit 60 becomes large and an increase in chip area and current consumption occurs when an IC is formed. In addition, the wiring of the transistor of the PWM output unit 70 is complicated, and there is a problem that the characteristic is deteriorated due to an increase in wiring capacitance.
[0009]
An object of the present invention is to provide a pop noise prevention circuit that can prevent a pop noise at the time of starting and stopping without increasing the current consumption with a small circuit.
[0010]
[Means for Solving the Problems]
According to the first aspect of the present invention, a PWM generation circuit that PWM modulates an input signal, a coupling capacitor that receives a PWM signal generated by the PWM generation circuit at one end, and one end connected to the other end of the coupling capacitor. A pop noise prevention circuit for preventing a pop noise of an amplifier having a low pass filter and a speaker connected to the other end of the low pass filter, the output side of which is directly connected to the one end of the coupling capacitor An analog switch circuit, and a capacitor and a constant current circuit for controlling the analog switch circuit with a time constant corresponding to a frequency lower than the audible range so that the internal resistance of the analog switch circuit gradually decreases when a control signal is input A PWM control circuit for a predetermined time from power-on. The analog switch circuit receives a clock having the same amplitude as that of the PWM signal inputted to the one end of the coupling capacitor and a cycle shorter than that of the PWM signal, and the gate voltage control circuit The pop noise prevention circuit is characterized by being input when the power is turned on.
[0011]
According to the second aspect of the present invention, a PWM generation circuit that PWM modulates an input signal, a coupling capacitor that receives a PWM signal generated by the PWM generation circuit at one end, and one end connected to the other end of the coupling capacitor. A pop noise prevention circuit for preventing a pop noise of an amplifier having a low pass filter and a speaker connected to the other end of the low pass filter, the output side of which is directly connected to the one end of the coupling capacitor An analog switch circuit, and a capacitor and a constant current circuit for controlling the analog switch circuit with a time constant corresponding to a frequency lower than the audible range so that the internal resistance of the analog switch circuit gradually decreases when a control signal is input A PWM control circuit for a predetermined time from power-on. In addition, a PWM signal whose pulse width gradually increases from the minimum value to the carrier pulse is generated and output to the one end of the coupling capacitor is stopped during the predetermined time, and the analog switch circuit is generated by the PWM generation circuit. The pop signal preventing circuit is characterized in that the PWM signal is input and the gate voltage control circuit inputs the control signal when the power is turned on.
[0012]
According to a third aspect of the present invention, a PWM generation circuit that PWM modulates an input signal, a coupling capacitor that receives a PWM signal generated by the PWM generation circuit at one end, and one end connected to the other end of the coupling capacitor. A pop noise prevention circuit for preventing a pop noise of an amplifier having a low pass filter and a speaker connected to the other end of the low pass filter, the output side of which is directly connected to the one end of the coupling capacitor An analog switch circuit, and a capacitor and a constant current circuit for controlling the analog switch circuit with a time constant corresponding to a frequency lower than the audible range so that the internal resistance of the analog switch circuit gradually decreases when a control signal is input And the analog switch circuit is grounded when the power is cut off. Enter the pressure, the gate voltage control circuit is set to pop sound prevention circuit, characterized in that it entered when said control signal is power-off.
[0013]
DETAILED DESCRIPTION OF THE INVENTION
In order to suppress the pop sound, the current flowing through the speaker is controlled so that the air vibration caused by the speaker is outside the audible range (20 Hz or less, 20 kHz or more), or the audible range (20 Hz to 20 kHz). However, it must be less than the energy that humans can hear. In the former case, even if the frequency component of the current flowing into the speaker is 10 Hz, a harmonic component having a frequency component in the audible range is usually generated, but if the energy is small, the sound is substantially inaudible. . In order to reduce harmonic components, the fundamental wave is about 10 Hz or a lower frequency, and the potential difference between both ends of the coupling capacitor is almost equal to the voltage at the signal midpoint when charging of the coupling capacitor is started. It is effective to reduce the change in the charging current at the time when the battery is charged and to not increase the potential difference between both ends of the speaker.
[0014]
Therefore, in the present invention, control is performed so that the fundamental wave component of the inrush current flowing to the speaker at the time of startup is in a sufficiently low frequency region, thereby preventing the generation of pop noise at the time of startup. Also, prevention of pop noise at the time of stop is realized by floating the terminal of the coupling capacitor to naturally discharge the charge, or by gently connecting the terminal to the ground to discharge the charge. This will be described in detail below.
[0015]
[First Embodiment]
FIG. 1 is a block diagram of an amplifier having a pop sound prevention circuit according to a first embodiment of the present invention. 10 is a PWM generation circuit that PWM modulates and amplifies an analog or digital signal input from an input terminal (not shown), 20 is a power amplifier circuit that amplifies the PWM modulation signal, 30 is an analog switch circuit that includes PMOS and NMOS transistors, Reference numeral 40 denotes a gate voltage control circuit for controlling the gate voltage of the analog switch circuit 30. Further, 1 is an enable terminal for operating the PWM generation circuit 10 when it becomes H level, 2 is an input terminal for inputting a master clock of the PWM generation circuit 10, and 3 is a gate voltage control circuit 40 when it becomes H level. This is an enable terminal to be operated. Further, INV1 is an inverter as a driver that amplifies the amplitude of the pulse signal to a predetermined amplitude, C11 is a coupling capacitor, L11 is an inductor constituting the low-pass filter, C12 is a capacitor constituting the low-pass filter, and SP is a speaker. . Among these, the pop noise prevention circuit is composed of an analog switch circuit 30, a gate voltage control circuit 40, and an inverter INV1.
[0016]
The PWM generation circuit 10 is in a non-operating state when the voltage ENpwm of the enable terminal 1 is at the L level, and operates when the voltage ENpwm is at the H level. During operation, a signal input from an input terminal (not shown) is PWM-modulated and output. However, when there is no input signal, a carrier pulse (50% duty pulse) is output. The average voltage (DC voltage) of the carrier pulse is a bias voltage Vbias that is the center voltage of the signal.
[0017]
A signal input to the input terminal 2 is amplified to a predetermined drive level by the inverter INV 1 and input to the analog switch circuit 30. The gate voltage control circuit 40 gradually changes the control voltage of the analog switch circuit 30 when the control terminal 3 becomes H level, gradually reduces the internal resistance of the analog switch circuit 30, and the analog switch when the predetermined time elapses. Circuit 30 is now shut off. Thereby, the analog switch circuit 30 gradually increases the current flowing between the inverter INV1 and the coupling capacitor C11.
[0018]
FIG. 2 is a specific circuit diagram of the analog switch circuit 30 and the gate voltage control circuit 40 described above. The analog switch circuit 30 includes a parallel connection circuit of a PMOS transistor Q1 and an NMOS transistor Q2. The gate voltage control circuit 40 includes a PMOS transistor Q3, an NMOS transistor Q4, an inverter INV2, capacitors C1 and C2 having the same capacitance value, and constant current source circuits I1 and I2 having the same current value.
[0019]
When the power is turned on, the voltage ENcc of the enable terminal 3 changes from L level to H level at time t1 in FIG. Thereby, in the gate voltage control circuit 40, the transistor Q3 is cut off, and the output of the inverter INV2 changes from H level to L level, so that the transistor Q4 is cut off. Therefore, the capacitor C1 is charged by the current of the constant current source circuit I1, and the voltage Vp gradually decreases, and the capacitor C2 is charged by the current of the constant current source circuit I2, and the voltage Vn gradually increases. For this reason, the internal resistance of the analog switch circuit 30 gradually decreases.
[0020]
On the other hand, a system clock having a cycle sufficiently shorter than the cycle of the PWM signal generated by the PWM generation circuit 10 from time t1 is input to the input terminal 2, and the power amplifier 20 during normal operation is input to the output side of the inverter INV1. A clock having the same amplitude as the output voltage (PWM signal) is output to the analog switch circuit 30.
[0021]
Therefore, when the system clock is output from the analog switch 30, the output level gradually increases, and thereby the coupling capacitor C11 connected to the output terminal 4 is charged.
[0022]
At this time, if the time constants of the gate voltages Vp and Vn for controlling the analog switch circuit 30 are set to about twice of 50 ms corresponding to the low audible range (20 Hz), the charging voltage of the coupling capacitor C11 is 10 Hz. It gradually rises at a frequency change rate of about. Then, the voltage of the coupling capacitor C11 reaches the bias voltage Vbias, and thereafter charging does not proceed.
[0023]
Thereafter, at time t2, the voltage ENcc of the enable terminal 3 is switched to L level, the transistors Q3 and Q4 are turned on, the charges of the capacitors C1 and C2 are discharged, the gate voltage Vp is H level, and Vn is L level. Thus, the analog switch circuit 30 is cut off. Also, the input of the system clock to the input terminal 2 is stopped. Further, the voltage ENpwm of the enable terminal 1 is switched from the L level to the H level, and the operation of the PWM generation circuit 10 is started. Since the output signal of the PWM generation circuit 10 is a pulse having a duty of 50% (average value is Vbias) when there is no input, extreme charging / discharging in the coupling capacitor C11 does not occur.
[0024]
From the above, the voltage Vout of the coupling capacitor C11 changes at a frequency of 10 Hz or less which is sufficiently lower than the audible frequency when the voltage ENcc of the enable terminal 3 is switched from L level to H level as shown in the waveform diagram of FIG. It rises slowly, and slowly settles down to the bias voltage Vbias immediately before the voltage ENcc switches from H level to L level. In addition, the voltage Vsp applied to the speaker SP becomes a voltage that gradually changes when the voltage Vout changes, and no pop sound is generated. Thereafter, the impedance when the analog switch circuit 30 side is viewed from the output terminal 4 connected to the coupling capacitor C11 is high impedance, and the PWM generation circuit 10 does not affect the operation of driving the speaker SP. .
[0025]
Next, when the operation is stopped, the voltage remains in the coupling capacitor C11, but the output of the analog switch circuit 30 is in a high impedance state, and the output side of the power amplifier circuit 20 is also in a high impedance state. Therefore, spontaneous discharge is performed, and the generation of pop sounds can be prevented.
[0026]
[Second Embodiment]
When the operation is stopped, the input terminal 2 is set to H level, the output of the inverter INV1 is set to L level, and the voltage ENcc of the enable terminal 3 is set to H level for a predetermined time. Since the resistance is reduced, the charge of the coupling capacitor C11 can be discharged to the output side of the inverter INV1 with the same time constant as in the above-described charging, and this can also prevent the occurrence of pop noise.
[0027]
[Third Embodiment]
In the above embodiment, the system clock is input to the input terminal 2 during the period from the time t1 to the time t2 when the power is turned on. Instead of this system clock, the PWM signal generated by the PWM generation circuit 10 is input to the input terminal 2. 2 can also be entered.
[0028]
In this case, the PWM generation circuit 10 starts operation by cutting off the input signal from the time of turning on the power, and gradually increases the pulse width so that the minimum pulse width at time t1 and the carrier pulse at the time of non-modulation at time t2. A PWM signal is generated. Further, the power amplifier circuit 20 is stopped only during the period of time t1 to t2 by the voltage ENpwm of the enable terminal 1. After time t2, a signal to be PWM-modulated is input to the PWM signal generation circuit 10 and the power amplifier 20 is also operated. Further, the inverter INV1 is replaced with a driver that does not perform signal inversion.
[0029]
Thereby, even when the PWM signal generated by the PWM generation circuit 10 has an offset (when the Vbias is deviated from 0 to the positive side or the negative side), at the time of switching of the time t2, the output terminal 4 The potential does not change and the generation of pop sounds can be prevented.
[0030]
Since the amplitude of the PWM signal is increased by the driver replaced with the inverter INV1, when the first pulse of the first pulse is charged to the coupling capacitor C11, it acts as an impulse and there is a risk of noise generation. At time t1 when the power is turned on, the internal resistance of the analog switch circuit 30 is large, so there is no fear of that. In this case, the charging of the coupling capacitor C11 is related to the time constant of the pulse width increase change of the PWM signal in addition to the time constant of the change in the internal resistance of the analog switch circuit 30. Setting the time constant is easy.
[0031]
【The invention's effect】
As described above, according to the present invention, low current consumption and a small area can be realized with a simple circuit configuration, and pop noises at the time of start and stop can be prevented.
[Brief description of the drawings]
FIG. 1 is a block diagram of an amplifier including a pop sound prevention circuit according to a first embodiment of the present invention.
FIG. 2 is a specific circuit diagram of a pop sound prevention circuit portion of FIG. 1;
FIG. 3 is a waveform diagram of the operation of the pop sound prevention circuit of FIG. 2;
FIG. 4 is a block diagram of an amplifier including a conventional pop sound prevention circuit.
FIG. 5 is a block diagram of an amplifier including another conventional pop noise prevention circuit controlled by 8 bits.
[Explanation of symbols]
10: PWM generation circuit 20: Power amplification circuit 30: Analog switch circuit 40: Gate voltage control circuit

Claims (3)

PWM generation circuit for PWM-modulating an input signal, a coupling capacitor for inputting a PWM signal generated by the PWM generation circuit to one end, a low-pass filter having one end connected to the other end of the coupling capacitor, and the low-pass filter A pop noise prevention circuit for preventing a pop noise of an amplifier having a speaker connected to the other end of the amplifier,
An analog switch circuit whose output side is directly connected to the one end of the coupling capacitor, and when the control signal is input, the internal resistance of the analog switch circuit corresponds to a frequency lower than the audible range so that the internal resistance gradually decreases. A capacitor for controlling the analog switch circuit with a constant and a gate voltage control circuit including a constant current circuit;
The PWM generation circuit starts to operate after a predetermined time from power-on, and the analog switch circuit receives a clock having the same amplitude as the PWM signal input to the one end of the coupling capacitor and a cycle shorter than that of the PWM signal. The pop noise prevention circuit, wherein the control signal is input to the gate voltage control circuit when the power is turned on. PWM generation circuit for PWM-modulating an input signal, a coupling capacitor for inputting a PWM signal generated by the PWM generation circuit to one end, a low-pass filter having one end connected to the other end of the coupling capacitor, and the low-pass filter A pop noise prevention circuit for preventing a pop noise of an amplifier having a speaker connected to the other end of the amplifier,
An analog switch circuit whose output side is directly connected to the one end of the coupling capacitor, and when the control signal is input, the internal resistance of the analog switch circuit corresponds to a frequency lower than the audible range so that the internal resistance gradually decreases. A capacitor for controlling the analog switch circuit with a constant and a gate voltage control circuit including a constant current circuit;
The PWM generation circuit generates a PWM signal whose pulse width gradually increases from a minimum value to a carrier pulse during a predetermined time from power-on, and stops output to the one end of the coupling capacitor during the predetermined time. The pop signal prevention circuit, wherein the analog switch circuit receives a PWM signal generated by the PWM generation circuit, and the gate voltage control circuit inputs the control signal when the power is turned on. PWM generation circuit for PWM-modulating an input signal, a coupling capacitor for inputting a PWM signal generated by the PWM generation circuit to one end, a low-pass filter having one end connected to the other end of the coupling capacitor, and the low-pass filter A pop noise prevention circuit for preventing a pop noise of an amplifier having a speaker connected to the other end of the amplifier,
An analog switch circuit whose output side is directly connected to the one end of the coupling capacitor, and when the control signal is input, the internal resistance of the analog switch circuit corresponds to a frequency lower than the audible range so that the internal resistance gradually decreases. A capacitor for controlling the analog switch circuit with a constant and a gate voltage control circuit including a constant current circuit;
The pop noise prevention circuit, wherein the analog switch circuit inputs a ground voltage when the power is cut off, and the gate voltage control circuit inputs the control signal when the power is cut off.

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