JP4152298B2 - Digital / analog mixed type semiconductor integrated circuit and signal quality measuring method - Google Patents

Description

  The present invention relates to a digital / analog mixed type semiconductor integrated circuit and a signal quality measuring method, and more specifically, to a digital / analog mixed type semiconductor integrated circuit in which digital and analog used for communication, serial I / F and the like are integrated, and signal quality measurement. Regarding the method.

When a digital circuit and an analog circuit are mixed on the same semiconductor substrate, a large current flows through the power supply line due to the operation of the digital circuit, the power supply voltage fluctuates, or transistor diffusion and junction between the semiconductor substrate When the capacitor is charged / discharged by the transistor operation, noise is generated through the semiconductor substrate to generate substrate noise.
When the digital circuit and the analog circuit are formed on the same substrate, the power supply voltage fluctuation and the substrate noise reach the analog circuit and deteriorate the characteristics of the analog circuit.

FIG. 4 shows an example of a conventional digital / analog mixed semiconductor integrated circuit. The digital system 401 receives DCLK which is a digital system CLK (clock). DCLK has a layout with a circuit in which edges are aligned in a semiconductor integrated circuit by a clock tree design technique, and the digital circuits are switched all at once by the transition of DCLK, thereby generating noise.
In the digital system 401, there is an analog I / F circuit 402 that generates an analog I / F signal, and the control signal is output to the analog system 403 in the same chip for control.

Due to recent miniaturization, high speed, large scale, and low voltage of LSI, the influence of noise tends to become serious, and with the expansion of analog circuit applications, higher precision is required for analog circuits. There is a present situation.
In a large-scale digital circuit having a high-speed clock, a clock tree in which phases are aligned is provided in the integrated circuit for all digital blocks, and all digital circuits generate noise all at once due to clock transitions. .

  According to Patent Document 1, “Analog / Digital Mixed-Type Semiconductor Integrated Circuit and Clock Phase Adjustment Method in Analog / Digital Mixed-Type Semiconductor Integrated Circuit”, digital noise to the analog circuit formed on the same semiconductor substrate together with the digital circuit is disclosed. The problem is to provide an analog / digital mixed semiconductor integrated circuit that can sufficiently avoid the adverse effects of analog circuits, and the solution is to adjust the phase of the clock signal for analog circuits without changing the period with a timing shift circuit. The analog circuit clock signal is input. The analog system clock is determined by examining which timing has little influence on the analog characteristics while changing the phase.

  Further, in "Reduction of digital noise in a signal mixed system" of Patent Document 2, the signal mixed system includes a clock subsystem, which sends a digital clock signal to the digital subsystem, and sends an analog clock signal to the analog subsystem. Send. This clock subsystem removes several clock cycles from the digital clock signal to provide digital signal inactivity before an analog event in the analog subsystem to reduce digital noise.

Further, in “Digital Noise Generation Circuit and Analog Cell Evaluation Method” of Patent Document 3, an evaluation test LSI equipped with only an analog cell is developed as an evaluation method for analog cell development, and the operation as an analog cell alone is performed. In addition, the evaluation and the characteristic evaluation are performed, and the operation and characteristics as an analog cell are guaranteed from the result of the evaluation.
If there is a problem here, until the cause is identified and a countermeasure is found, trial and error are repeated, the circuit inside the LSI and the layout are changed many times, and the LSI is re-created many times. By repeating the work, the method of finally identifying the cause and implementing measures is taken.

In this situation, we provide a digital noise generation circuit that can control the amount of generated noise quantitatively by controlling from the outside, and it is possible to investigate the influence of noise during trial evaluation of analog cells It becomes.
JP 2002-169623 A JP-A-9-135213 JP 2001-264394 A

However, in Patent Document 1, the influence of noise of the digital circuit is reduced by adjusting the phase. However, since the absolute amount of digital noise does not change, there may be cases where there is no effect.
In addition, there is a problem when there is a variation in the phase of an effective analog clock due to variations in the manufacturing of semiconductor devices.

  Further, in Patent Document 2, since the clock of the digital subsystem is thinned out, when the analog circuit is operated, the digital circuit is stopped and the influence of noise is eliminated. However, when the analog circuit needs to constantly move, Therefore, there is a problem that the throughput of the digital circuit is reduced.

Further, in Patent Document 3, it is necessary to make an evaluation semiconductor device for analog cell development, and thus it takes a period of time for commercialization.
Moreover, even if evaluation is performed with a noise generation circuit, there are cases where a problem arises upon commercialization because the noise situation differs from the actual product.

  The present invention has been made in consideration of the above-mentioned circumstances, and when the digital circuit and the analog circuit are mixed on the same semiconductor substrate, the noise of the digital circuit is reduced when the analog circuit is operated. It is an object of the present invention to provide a digital / analog mixed type semiconductor integrated circuit that improves the characteristics of an analog circuit.

  In addition, when prototyping and evaluating a semiconductor device in which a digital circuit and an analog circuit are mixed on the same semiconductor substrate, there is a mode that switches between when the influence of the digital noise is large and when the influence is small, so that the digital noise is included in the characteristics of the analog circuit. Provides a method to compare and evaluate how much it affects, and provides a signal quality measurement method that makes it clear whether the analog circuit itself needs to be improved or the digital noise needs to be reduced if the analog characteristics are not sufficient The purpose is to do.

In order to solve the above problems, a digital / analog mixed type semiconductor integrated circuit according to a first aspect of the present invention is a digital / analog mixed type semiconductor integrated circuit in which an analog circuit and a digital circuit for controlling the same are mounted on the same semiconductor substrate. In addition to the digital circuit, a signal quality measurement circuit for measuring the signal quality of the analog circuit is provided in the same semiconductor integrated circuit, and when the normal operation is performed, the digital circuit and the analog circuit are operated. In the case of measuring signal quality, a mode control circuit for operating the signal quality measuring circuit and the analog circuit and inputting a normal operation mode for performing a normal operation or a measurement mode for measuring signal quality is provided. When the mode control circuit inputs a measurement mode, the clock of the digital circuit is stopped or On which the low power consumption state, wherein the signal quality measuring circuit is operated and to measure the signal quality of the analog circuit.

In digital analog mixed type semiconductor integrated circuit of inventions of claims 2, a digital analog mixed type semiconductor integrated circuit incorporating a digital circuit for controlling the analog circuitry on the same semiconductor substrate, separately from the digital circuit, A signal quality measuring circuit for measuring the signal quality of the analog circuit is provided in the same semiconductor integrated circuit, and when performing normal operation, the digital circuit and the analog circuit are operated and the signal quality is measured. Operates a signal quality measurement circuit and the analog circuit, and further includes a signal quality measurement detection circuit for detecting a signal quality measurement request signal, and a register or a measurement mode signal for setting a measurement mode for measuring the signal quality. An external input pin for inputting, detecting the signal quality measurement request signal, wherein the measurement mode is If input from or the external input pin is set to the register, and the digital circuit to stop or standby state, the signal quality measurement circuit activates, without noise influence of the digital circuit, the analog circuit It is characterized in that signal quality is measured.

The invention according to claim 3, in a digital analog mixed type semiconductor integrated circuit according to claim 1 or 2, wherein the analog circuit outputs a high-speed differential signals, the signal quality of the signal quality measuring circuit in high-speed differential signal It is characterized by measuring.

According to a fourth aspect of the present invention, there is provided a signal quality measuring method for a digital / analog mixed type semiconductor integrated circuit, wherein the analog circuit and the digital circuit for controlling the analog circuit are mounted on the same semiconductor substrate. A signal quality measurement circuit for measuring the signal quality is provided in the same semiconductor integrated circuit as the digital circuit, and the measurement mode for measuring the signal quality is set in the register, or the measurement mode signal is input to the external input pin. And when the signal quality measurement request signal is detected, the digital circuit is stopped or in a standby state, the signal quality measurement circuit is activated, and the signal quality of the analog circuit is measured. Features.

According to a fifth aspect of the present invention, there is provided a digital / analog mixed type semiconductor integrated circuit in which the analog circuit and the digital circuit for controlling the same are mounted on the same semiconductor substrate, from the digital circuit to the analog circuit. A memory for taking in the I / F signal and a normal operation mode for performing a normal operation or a mode control circuit for inputting a measurement mode for measuring signal quality, and the mode control circuit inputs the measurement mode The digital circuit clock is stopped or in a low power consumption state, and the analog I / F signal taken into the memory is supplied to the analog circuit to measure the signal quality of the analog circuit. It is characterized by.

According to a sixth aspect of the present invention, in the digital-analog mixed semiconductor integrated circuit according to the fifth aspect , a signal quality measurement detection circuit for detecting a signal quality measurement request signal and a register for setting a measurement mode for measuring the signal quality Or having an external input pin for inputting a measurement mode signal, detecting the signal quality measurement request signal, and setting the digital circuit when the measurement mode is set in the register or input from the external input pin. The analog I / F signal captured in the memory is supplied to the analog circuit in the stop or standby state, and the signal quality of the analog circuit is measured without the influence of noise of the digital circuit. And

Signal quality measurement method of digital-to-analog hybrid semiconductor IC of the invention of claim 7, the digital analog mixed type semiconductor integrated circuit incorporating a digital circuit for controlling the analog circuitry on the same semiconductor substrate, wherein A memory for capturing an I / F signal from a digital circuit to the analog circuit is provided, and a measurement mode for measuring signal quality is set in a register, or a measurement mode signal is input from an external input pin and signal quality is measured. When the request signal is detected, the clock of the digital circuit is stopped or put into a low power consumption state, and then the analog I / F signal taken into the memory is supplied to the analog circuit, so that the influence of noise on the digital circuit No, the signal quality of the analog circuit is measured.

  According to the present invention, since the signal quality measuring circuit only for measuring the signal quality of the high-speed differential signal is provided in the same semiconductor device, the digital circuit is used when measuring the high-speed differential signal. Evaluation can be performed after stopping, and analog signals can be measured without the influence of noise from the digital circuit, and compared with measurement results of signal quality when the digital circuit is operated.

  In addition, since a test signal corresponding to various evaluation patterns can be generated by having a memory that captures an analog I / F signal from a digital system, a test circuit with a high degree of freedom can be achieved with a small circuit. Can be configured.

DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, exemplary embodiments of a digital / analog mixed semiconductor integrated circuit according to the invention will be described with reference to the drawings.
FIG. 1 shows a digital / analog mixed semiconductor integrated circuit according to an embodiment of the present invention. In the figure, circuits having the same functions as those in FIG. 4 are denoted by the same reference numerals, and only their differences will be described.

In FIG. 1, a mode control circuit 106 has a register (not shown) which can be written from the outside in order to control from the outside, or an input signal from an external input (IO) pin is inputted. To do.
The mode control circuit 106 outputs a signal indicating an analog signal measurement mode to the digital system (digital circuit) 401 according to the set state, and outputs a similar signal to the clock control circuit 107.
The digital system 401 receives D1CLK as a system clock from the clock control circuit 107, and normally operates with this clock.

  The digital subsystem (signal quality measurement circuit) 104 includes an analog I / F circuit 105 that generates an analog I / F signal substantially similar to the analog I / F circuit 402 in the digital system 401. The circuit of the minimum configuration necessary for operating the analog system (analog circuit) 403 is included. The digital subsystem 104 receives D2CLK from the clock control circuit 107 as a system clock.

  When a mode for measuring the analog signal quality is set in the mode control circuit 106, if a command detection for measuring the analog signal quality occurs in the digital system 401, the digital system 401 A signal indicating that the analog signal quality is measured is output to the clock control circuit 107 and the digital subsystem 104.

  In response to the signal, the clock control circuit 107 stops D1CLK or puts it into a low power consumption state, and outputs D2CLK to send a control signal for operating the analog system 403, not from the digital system 401, to the digital subsystem. Control is performed by a multiplexer (MUX) 108 so as to supply from 104.

  With the above circuit configuration and operation sequence, in the normal operation mode, the analog I / F circuit 402 can be operated by the digital system 401 to evaluate the operation of the analog system 403, and the mode setting is changed to the measurement mode. As a result, the clock of the digital system 401 is completely stopped or put into the low power consumption state, the digital system 401 is stopped or put into the standby state, and only the digital subsystem 104 is operated to Without the analog system 403 can be evaluated.

  FIG. 2 shows an embodiment in which a memory and a memory control circuit are used in place of the digital subsystem in the digital / analog mixed semiconductor integrated circuit of FIG. 2, circuits having the same functions as those in FIG. 1 are denoted by the same reference numerals, and only the differences will be described.

The embodiment of FIG. 2 has a memory 204 instead of the digital subsystem 104 of FIG.
When the normal operation mode is set in the mode control circuit 106, the operation of the analog system 403 can be evaluated by operating the analog I / F circuit 402 by the digital system 401.
When the measurement mode is set in the mode control circuit 106, the analog I / F signal of the digital system 401 is taken into the memory 204 in the training mode, and the clock of the digital system 401 is completely stopped or put into a low power consumption state. Then, the digital system 401 is stopped or put into a standby state, and the analog I / F signal sampled in the training mode is output to the analog system 403 to evaluate the analog system 403.
Therefore, a signal having a high degree of freedom can be output with respect to an evaluation I / F signal used in a normal operation, and evaluation can be performed using various I / F signals.

FIG. 3 shows an example in which the digital / analog mixed semiconductor integrated circuit of the present invention is applied to a USB (Universal Serial Bus) communication circuit.
The USB outputs a differential minute amplitude signal of 400 mV at a high speed of 480 MBPS from the driver.
When a USB is mounted on an LSI (semiconductor integrated circuit), it is necessary to accurately measure whether the signal quality of the differential signal meets the standard, but if the quality of the differential signal is poor, the driver There is no design problem with the PHY itself, which is the analog front end circuit 303 including the receiver and the receiver, and the PHY itself has no design problem. Since other circuits are mounted on the same LSI, the noise of the digital block wraps around the PHY. It is necessary to evaluate and judge whether the signal quality is deteriorated.

The SIE (Serial Interface Engine) block in FIG. 3 is a USB LINK layer digital circuit and has a role of generating a signal for controlling the physical layer PHY and transmission / reception data.
The PHY block includes an AFE (Analog Front End) circuit 303 including a USB physical layer driver and receiver, and a digital circuit in the PHY layer.

The PHY block and the LINK block are generally connected by a standard called UTMI (Universal Transmit Macrocell Interface).
In the USB reception operation, the PHY block receives differential serial data, converts it into parallel, and outputs a control signal and data to the SIE block.
In the transmission operation, parallel data is output from the SIE block to the PHY block together with the control signal, and the PHY block converts the designated parallel data into serial data and outputs it as a differential signal to the USB bus.

In the SIE block, an EP (End Pointer memory) 309 is incorporated as a buffer for received data and transmitted data, and other circuits for interpreting received packets as commands and controlling the USB are incorporated. Yes. Since the circuit of the SIE block has a circuit configuration corresponding to the USB device class, the hardware configuration differs depending on applications such as a printer and a camera, not a fixed configuration.
In order to realize the higher-speed USB 2.0 standard, which is the recent USB standard, an SIE block with a scale of several hundred thousand gates is necessary, and the digital noise in the SIE block is very large at present.

When the SIE block and the PHY block equipped with the USB 2.0 standard are mounted on the same semiconductor, jitter or distortion of the differential output signal may occur due to noise in the SIE block.
In such a case, whether there is a problem in the design of the PHY block, or there is no problem in the PHY block itself, and the cause of whether the noise of the SIE block wraps around the PHY block and is causing a problem is determined accurately. It is necessary to implement improvement measures.

The operation when the SIE block is stopped and the USB signal quality is measured will be described with reference to FIG.
A measurement mode is set in a register in the mode control circuit 306. When a test packet command is issued from the host connected to the USB terminal, the signal quality measurement detection circuit 310 in the SIE block decodes the test packet command.

In response to the detection of the TestPacket command and the mode control signal, a signal is output to the clock control circuit 307 and the test packet generation circuit 304. The clock control circuit 307 stops the system clock of the SIE block or sets the power consumption state and generates a test packet. The circuit 304 is operated.
A signal necessary for generating a test packet of the PHY block is generated by the test packet generating circuit 304, and the UTMI multiplexer 308 inputs the UTMI signal of the test packet generating circuit 304 to the PHY block instead of the UTMI signal from the SIE block. Switch.

  Through the above control, the high-speed differential signal output by the PHY block can be measured without the influence of the noise of the SIE block, and if there is a problem in the signal quality, the cause can be identified, so the LSI design can be improved. It is possible to provide an effective function for.

1 is a diagram showing an embodiment of a digital / analog mixed type semiconductor integrated circuit according to the present invention. FIG. 2 is a diagram showing an embodiment in which a memory and a memory control circuit are used as a digital subsystem in the digital / analog mixed semiconductor integrated circuit of FIG. 1. It is a figure which shows the example which applied the digital analog mixed type semiconductor integrated circuit of this invention to the USB communication circuit. It is a figure which shows the example of the conventional digital analog mixed type semiconductor integrated circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 104 ... Digital subsystem (signal quality measurement circuit), 105 ... Analog I / F circuit, 106 ... Mode control circuit, 107 ... Clock control circuit, 108 ... Multiplexer (MUX), 204 ... Memory, 301 ... Digital control circuit, 302 ... Analog I / F circuit, 303 ... USB AFE (Analog Front End circuit), 304 ... Test packet generation circuit, 305 ... Analog I / F circuit, 306 ... Mode control circuit, 307 ... Clock control circuit, 308 ... Multiplexer, 309 ... EP memory 310 ... Signal quality measurement detection circuit 401 ... Digital system 402 ... Analog I / F circuit 403 ... Analog system

Claims (7)

In a digital / analog mixed type semiconductor integrated circuit in which an analog circuit and a digital circuit for controlling the same are mounted on the same semiconductor substrate, separately from the digital circuit, the signal quality of the analog circuit is measured in the same semiconductor integrated circuit. In the case of performing normal operation, the digital circuit and the analog circuit are operated, and when measuring the signal quality, the signal quality measurement circuit and the analog circuit are operated , A mode control circuit for inputting a normal operation mode for performing normal operation or a measurement mode for measuring signal quality, and when the mode control circuit inputs the measurement mode, the clock of the digital circuit is stopped or reduced in consumption In the power state, the signal quality measurement circuit is operated to make the signal quality of the analog circuit Digital analog mixed type semiconductor integrated circuit being characterized in that so as to measure. In a digital / analog mixed type semiconductor integrated circuit in which an analog circuit and a digital circuit for controlling the same are mounted on the same semiconductor substrate, separately from the digital circuit, the signal quality of the analog circuit is measured in the same semiconductor integrated circuit. In the case of performing normal operation, the digital circuit and the analog circuit are operated, and when measuring the signal quality, the signal quality measurement circuit and the analog circuit are operated, A signal quality measurement detection circuit for detecting a signal quality measurement request signal, and a register for setting a measurement mode for measuring the signal quality or an external input pin for inputting a measurement mode signal, and detecting the signal quality measurement request signal When the measurement mode is set in the register or input from the external input pin And said digital circuit to stop or standby state, the signal quality measuring circuit is activated, without noise influence of the digital circuit, a digital analog mixed form characterized in that so as to measure the signal quality of the analog circuit Semiconductor integrated circuit. In digital analog mixed type semiconductor integrated circuit according to claim 1 or 2, wherein the analog circuit outputs a high-speed differential signal, the signal quality measuring circuit, wherein the benzalkonium measuring the signal quality of the high-speed differential signals Digital analog mixed type semiconductor integrated circuit. A signal for measuring the signal quality in the same semiconductor integrated circuit separately from the digital circuit, with respect to the digital / analog mixed semiconductor integrated circuit in which the analog circuit and the digital circuit for controlling the analog circuit are mounted on the same semiconductor substrate. A quality measurement circuit is provided, and the measurement mode for measuring the signal quality is set in the register, or when the measurement mode signal is input from the external input pin and the signal quality measurement request signal is detected, the digital circuit is in the stop or standby state, the signal quality measuring circuit activates, the signal quality measurement method of a digital analog mixed type semiconductor integrated circuit is characterized in that so as to measure the signal quality of the analog circuit. A memory for taking in the I / F signal Oite the analog and digital analog mixed type semiconductor integrated circuit and a digital circuit are mounted on the same semiconductor substrate to control it from the digital circuit to the analog circuit, typically And a mode control circuit for inputting a measurement mode for measuring signal quality, and when the mode control circuit inputs the measurement mode, the clock of the digital circuit is stopped or in a low power consumption state. Then, the analog I / F signal taken into the memory is supplied to the analog circuit, and the signal quality of the analog circuit is measured . 6. The digital / analog mixed type semiconductor integrated circuit according to claim 5, wherein a signal quality measurement detection circuit for detecting a signal quality measurement request signal, a register for setting a measurement mode for measuring the signal quality, or a measurement mode signal is input. Having an external input pin, detecting the signal quality measurement request signal, and when the measurement mode is set in the register or input from the external input pin, the digital circuit is stopped or in a standby state, An analog I / F signal taken into the memory is supplied to the analog circuit to measure the signal quality of the analog circuit without the influence of noise of the digital circuit. Integrated circuit. For a digital / analog mixed type semiconductor integrated circuit in which an analog circuit and a digital circuit for controlling the same are mounted on the same semiconductor substrate, a memory for capturing an I / F signal from the digital circuit to the analog circuit is provided. Set the measurement mode for the measurement in the register, or input the measurement mode signal from the external input pin and stop the clock of the digital circuit or detect low power consumption when the signal quality measurement request signal is detected After that, the analog I / F signal taken into the memory is supplied to the analog circuit, and the signal quality of the analog circuit is measured without the influence of the noise of the digital circuit. A method for measuring signal quality of a digital / analog mixed type semiconductor integrated circuit.

Images