JP4120397B2 - Manufacturing method of field emission electron source - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a field emission electron that emits an electron beam by field emission. Made of source It relates to the manufacturing method.
[0002]
[Prior art]
Conventionally, field emission electron sources 10 ′ and 10 ″ configured as shown in FIGS. 8 and 9 have been proposed as electronic devices using nanocrystalline silicon (nanometer order silicon microcrystals) (for example, Patent Document 1). , See Patent Document 2).
[0003]
The field emission electron source 10 ′ having the configuration shown in FIG. 8 has a strong electric field drift layer 6 made of a porous polycrystalline silicon layer oxidized on the main surface (one surface) side of an n-type silicon substrate 1 as a conductive substrate. A surface electrode 7 made of a metal thin film (for example, a gold thin film) is formed on the strong electric field drift layer 6. An ohmic electrode 2 is formed on the back surface of the n-type silicon substrate 1, and the n-type silicon substrate 1 and the ohmic electrode 2 constitute a lower electrode 12. In the example shown in FIG. 8, a non-doped polycrystalline silicon layer 3 is interposed between the n-type silicon substrate 1 and the strong electric field drift layer 6. Although the electron passage part which an electron passes is comprised, what comprised the electron passage part only by the strong electric field drift layer 6 without interposing the polycrystalline silicon layer 3 is proposed.
[0004]
In order to emit electrons from the field emission electron source 10 ′ having the configuration shown in FIG. 8, for example, a collector electrode 21 disposed to face the surface electrode 7 is provided, and a vacuum is formed between the surface electrode 7 and the collector electrode 21. In this state, the DC voltage Vps is applied between the surface electrode 7 and the lower electrode 12 so that the surface electrode 7 is on the high potential side with respect to the lower electrode 12, and the collector electrode 21 is A DC voltage Vc is applied between the collector electrode 21 and the surface electrode 7 so as to be on the high potential side. If the DC voltage Vps is appropriately set here, the electrons injected from the lower electrode 12 drift through the strong electric field drift layer 6 and are emitted through the surface electrode 7 (the one-dot chain line in FIG. 8 is emitted through the surface electrode 7). Electron e ⁻ Shows the flow). The thickness of the surface electrode 7 is set to about 10 to 15 nm.
[0005]
By the way, in the field emission type electron source 10 ′ having the configuration shown in FIG. 8, the n-type silicon substrate 1 and the ohmic electrode 2 constitute the lower electrode 12. However, as shown in FIG. A field emission electron source 10 ″ in which a lower electrode 12 made of a metal thin film is formed on one surface of a glass substrate 11 is also proposed. Here, the field emission electron source 10 ′ shown in FIG. Similar components are denoted by the same reference numerals, and description thereof is omitted.
[0006]
In order to emit electrons from the field emission type electron source 10 ″ having the configuration shown in FIG. 9, for example, a collector electrode 21 disposed opposite to the surface electrode 7 is provided, and a vacuum is formed between the surface electrode 7 and the collector electrode 21. In this state, the DC voltage Vps is applied between the surface electrode 7 and the lower electrode 12 so that the surface electrode 7 is on the high potential side with respect to the lower electrode 12, and the collector electrode 21 is A DC voltage Vc is applied between the collector electrode 21 and the surface electrode 7 so as to be on the high potential side.If the DC voltage Vps is appropriately set here, the electrons injected from the lower electrode 12 cause a strong electric field drift. Drifts through the layer 6 and is emitted through the surface electrode 7 (the dashed line in FIG. 9 indicates the electrons e emitted through the surface electrode 7). ⁻ Shows the flow). The electrons reaching the surface of the strong electric field drift layer 6 are considered to be hot electrons, and are easily tunneled through the surface electrode 7 and emitted into the vacuum.
[0007]
In each of the field emission electron sources 10 ′ and 10 ″ described above, the current flowing between the surface electrode 7 and the lower electrode 12 is called a diode current Ips, and the current flowing between the collector electrode 21 and the surface electrode 7 is emitted. If referred to as current (emission electron current) Ie (see FIG. 8 and FIG. 9), the electron emission efficiency (= (Ie / Ips) increases as the ratio of the emission current Ie to the diode current Ips (= Ie / Ips) increases. In addition, in the above-described field emission electron sources 10 ′ and 10 ″, the DC voltage Vps applied between the surface electrode 7 and the lower electrode 12 is a low voltage of about 10 to 20V. However, the emission current Ie increases as the DC voltage Vps increases.
[0008]
When manufacturing the field emission electron source 10 ″ having the configuration shown in FIG. 9, for example, after forming the lower electrode 12 on one surface of the glass substrate 11 by sputtering or the like, one surface of the glass substrate 11 is formed. A non-doped polycrystalline silicon layer 3 is formed on the entire surface on the side by a plasma CVD method or the like at a substrate temperature of 400 ° C. or higher (see FIG. 10A), and then the polycrystalline silicon layer 3 is anodized to a predetermined depth. To form a porous polycrystalline silicon layer 4 ′ containing polycrystalline silicon grains and a number of nanometer order silicon microcrystals (see FIG. 10B). The strong electric field drift layer 6 is formed by oxidation by an electrochemical oxidation method (see FIG. 10C), and then the surface electrode 7 is deposited on the strong electric field drift layer 6 by a vapor deposition method. It is formed (see FIG. 10 (d)).
[0009]
In addition, when the field emission electron source 10 ″ shown in FIG. 9 is applied as an electron source of a display, for example, the configuration shown in FIG. 11 may be adopted.
[0010]
In the display shown in FIG. 11, a face plate 30 made of a flat glass substrate is disposed to face the field emission electron source 10, and a transparent conductive material is provided on the face plate 30 facing the field emission electron source 10. A collector electrode (hereinafter referred to as an anode electrode) 21 made of a film (for example, an ITO film) is formed. In addition, on the surface of the anode electrode 21 facing the field emission electron source 10, a fluorescent material formed for each pixel and a black stripe made of a black material formed between the fluorescent materials are provided. Here, the fluorescent material is applied to the surface of the anode electrode 21 facing the field emission electron source 10 and emits visible light by the electron beam emitted from the field emission electron source 10. Note that high-energy electrons emitted from the field emission electron source 10 and accelerated by the voltage applied to the anode electrode 21 collide with the fluorescent material, and the fluorescent materials include R (red), G (Green) and B (Blue) emission colors are used. Further, the face plate 30 is separated from the field emission electron source 10 by a rectangular frame-like frame (not shown), and the airtight space formed between the face plate 30 and the field emission electron source 10 is evacuated. .
[0011]
The field emission electron source 10 shown in FIG. 11 is formed so as to overlap with a glass substrate 11 having an insulating property, a plurality of lower electrodes 12 arranged on one surface of the glass substrate 11, and the lower electrode 12. A plurality of polycrystalline silicon layers 3, a plurality of strong electric field drift layers 6 made of an oxidized porous polycrystalline silicon layer formed so as to overlap the polycrystalline silicon layer 3, and an adjacent strong electric field drift layer 6 A separation layer 16 made of a polycrystalline silicon layer filling the space between adjacent polycrystalline silicon layers 3 and the lower electrode 12 on the strong electric field drift layer 6 and the separation layer 16 and straddling the strong electric field drift layer 6 and the separation layer 16. And a plurality of surface electrodes 7 arranged in a direction intersecting with. Here, in the field emission electron source 10 shown in FIG. 11, the strong electric field drift layer 6, the polycrystalline silicon layer 3, and the separation layer 16 constitute the electron passage portion 5, and as shown in FIG. Electrons pass through a plurality of lower electrodes 12 arranged on one surface of the substrate 11 and a plurality of surface electrodes 7 arranged in a direction orthogonal to the lower electrode 12 in a plane parallel to one surface of the glass substrate 11. The part 5 is sandwiched. It has been proposed that the electron passage portion 5 is constituted by the strong electric field drift layer 6 and the separation layer 16 without interposing the polycrystalline silicon layer 3 between the strong electric field drift layer 6 and the lower electrode 12.
[0012]
In this field emission electron source 10, it corresponds to an intersection of a plurality of lower electrodes 12 arranged on one surface of the glass substrate 11 and a plurality of surface electrodes 7 arranged in a direction intersecting the lower electrode 12. Since a part of the strong electric field drift layer 6 is sandwiched between the parts to be applied, the strong electric field drift layer 6 can be obtained by appropriately selecting a pair of the surface electrode 7 and the lower electrode 12 and applying a voltage between the selected pair. A strong electric field acts on a portion corresponding to the intersection of the surface electrode 7 and the lower electrode 12 selected in step 1, and electrons are emitted. That is, the lower electrode 12, the polycrystalline silicon layer 3 on the lower electrode 12, and the polycrystalline silicon layer are arranged at lattice points of a matrix (lattice) composed of a group of a plurality of surface electrodes 7 and a group of a plurality of lower electrodes 12. 3 corresponds to the arrangement of the electron source element 10a composed of the strong electric field drift layer 6 on the surface 3 and the surface electrode 7 on the strong electric field drift layer 6, and a set of the surface electrode 7 and the lower electrode 12 to which a voltage is applied. By selecting, it becomes possible to emit electrons from the desired electron source element 10a. As can be seen from the above description, the electron source element 10a is provided for each pixel.
[0013]
In the field emission electron source 10 having the configuration shown in FIG. 11, after forming a plurality of lower electrodes 12 on one surface of a glass substrate 11, a plasma CVD method or a low pressure CVD method is applied to the entire surface of the one surface side of the glass substrate 11. The non-doped polycrystalline silicon layer 3 is formed at a substrate temperature of 200 ° C. or higher (for example, 200 ° C. to 600 ° C.) by a catalytic CVD method or the like, and then the portion of the polycrystalline silicon layer 3 that overlaps the lower electrode 12 is formed. A porous polycrystalline silicon layer containing polycrystalline silicon grains and a number of nanometer-order silicon microcrystals is formed by anodizing in an electrolyte containing an aqueous hydrogen fluoride solution, and the porous polycrystalline silicon layer is rapidly heated. The strong electric field drift layer 6 is formed by oxidation by a method or an electrochemical oxidation method. Here, the strong electric field drift layer 6 includes polycrystalline silicon grains, a number of nanometer-order silicon microcrystals, a thin silicon oxide film formed on the surface of each grain, and a silicon oxide formed on the surface of each silicon microcrystal. And a membrane.
[0014]
[Patent Document 1]
Japanese Patent No. 2987140 (pages 4-7, FIGS. 1-3)
[Patent Document 2]
Japanese Patent No. 311456 (pages 10-14, FIG. 1, FIG. 2, FIG. 8, FIG. 9)
[0015]
[Problems to be solved by the invention]
As described above, the field emission electron source 10 having the configuration shown in FIG. 11 is manufactured by forming the patterned lower electrode 12 on the one surface of the glass substrate 11 and then forming the one of the glass substrate 11. A polycrystalline silicon layer 3 is formed on the entire surface, and a portion of the polycrystalline silicon layer 3 that overlaps the lower electrode 12 is made porous by anodization, and further oxidized to form a strong electric field drift layer 6. It is what is formed.
[0016]
Here, in the field emission electron source 10 having the configuration shown in FIG. 11, the glass substrate 11 is formed when the process of forming the polycrystalline silicon layer 3 on the entire surface of the one surface side of the glass substrate 11 is performed. For example, from the other surface side by a heating source such as a substrate heating heater (hereinafter referred to as a substrate heating heater), but the difference in the shape of the pattern of the lower electrode 12 formed on the glass substrate 11 As a result, the temperature changes in the plane of the glass substrate 11, and the film quality of the polycrystalline silicon layer 3 that becomes the base (base) of the electron passage portion 5 varies in the plane. There is a problem that the film quality of the electric field drift layer 6 varies and the electron emission characteristics vary in the plane. Note that such a problem is not limited to the field emission electron source 10 having the configuration shown in FIG. 11, for example, a plurality of MIM type electrons including a lower electrode, an insulating layer, and an upper electrode on one surface side of a glass substrate. This is a problem that may also occur during the manufacture of a field emission electron source having a source element. That is, in a field emission electron source including an electron passage formed including a process that requires heating a glass substrate from the other surface side after forming a patterned lower electrode on one surface side of the glass substrate, It is considered that the above problems occur.
[0017]
The present invention has been made in view of the above-mentioned reasons, and the object thereof is a field emission electron in which in-plane variation in electron emission characteristics is small compared to the conventional case. Made of source It is to provide a manufacturing method.
[0018]
[Means for Solving the Problems]
In order to achieve the above object, the invention of claim 1 provides a glass substrate having insulating properties, a lower electrode patterned in a plane parallel to one surface of the glass substrate, and a lower electrode in the thickness direction of the glass substrate. Opposing surface electrodes and the one surface of the glass substrate Formed on the side A field emission electron having an electron passage part through which electrons injected from the lower electrode pass through the portion sandwiched between the lower electrode and the surface electrode toward the surface electrode A method of manufacturing a source, wherein after forming a lower electrode on the one surface side of the glass substrate, in forming a non-doped polycrystalline silicon layer that is the basis of the electron passage portion, the glass substrate is formed from the other surface side of the glass substrate. The film is heated while being heated by a heating source, and an infrared absorption layer is formed on the entire surface of the one surface side and the other surface side of the glass substrate before the non-doped polycrystalline silicon layer is formed. thing Since the infrared absorbing layer is present when the electron passage part is formed, the film quality of the electron passage part is prevented from varying in the plane due to the shape of the lower electrode. In-plane variation in electron emission characteristics compared to conventional methods It is possible to provide a field emission electron source with small cracks .
[0019]
A second aspect of the present invention is the first aspect of the present invention, wherein the infrared absorption layer is the one surface side of the glass substrate. Because to form The variation in temperature on the one surface side of the glass substrate when forming the electron passage portion can be reduced, compared with the case where the infrared absorption layer is formed on the other surface side of the glass substrate. Since the in-plane variation in the film quality of the electron passage portion can be further reduced, the in-plane variation in the electron emission characteristics can be further reduced.
[0021]
Claim 3 The invention of claim 2 is the invention of claim 2 The infrared The line absorption layer covers the lower electrode and the one surface of the glass substrate on the one surface side of the glass substrate. Because it forms The step on the surface of the one surface side of the glass substrate before forming the electron passage portion is relaxed, and the flatness of the surface of the electron passage portion can be improved.
[0022]
Claim 4 In the invention of claim 1, in the invention of claim 1, the infrared absorption layer is provided on the other surface side of the glass substrate. Because it forms The infrared absorbing layer can be prevented from affecting the shapes of the lower electrode, the electron passage portion, the surface electrode, and the like formed on the one surface side of the glass substrate.
[0023]
Claim 5 The invention of claim 1 to claim 1 4 In the invention, since the material of the infrared absorption layer is made of amorphous silicon, infrared rays can be efficiently absorbed. Further, there is an advantage that the infrared absorbing layer can be easily formed by a general thin film forming method such as a plasma CVD method, a sputtering method, a vapor deposition method, or a catalytic CVD method.
[0024]
Claim 6 The invention of claim 4 In this invention, since the material of the infrared absorbing layer is made of a metal material, the infrared absorbing layer can be easily formed by a general thin film forming method such as sputtering, vapor deposition or CVD.
[0026]
DETAILED DESCRIPTION OF THE INVENTION
(Embodiment 1)
As shown in FIGS. 1 and 2, the field emission electron source 10 of the present embodiment includes an insulating glass substrate 11 and an infrared absorption layer 13 composed of an amorphous silicon layer described later formed on the glass substrate 11. A plurality of lower electrodes 12 arranged on the infrared absorption layer 13, and a plurality of surface electrodes 7 arranged in a direction perpendicular to the lower electrode 12 in a plane parallel to the one surface of the glass 11, The electron passage part 5 provided in the said one surface side of the glass substrate 11 is provided. The lower electrode 12 is patterned in another plane parallel to the one surface of the glass substrate 11.
[0027]
The above-mentioned electron passage portion 5 includes a plurality of non-doped polycrystalline silicon layers 3 formed so as to overlap each lower electrode 12 and a plurality of strong electric field drift layers formed so as to overlap each of the polycrystalline silicon layers 3. 6 and a separation layer 16 made of a polycrystalline silicon layer that fills between the adjacent strong electric field drift layers 6 and between the adjacent polycrystalline silicon layers 3.
[0028]
The lower electrode 12 is a single layer made of a metal material (for example, a single layer made of a metal such as W, Mo, Cr, Ti, Ta, Ni, Al, Cu, Au, Pt, Ag, or an intermetallic compound such as silicide). It is configured by patterning a metal thin film of the above, but it is a multilayer (for example, metal such as W, Mo, Cr, Ti, Ta, Ni, Al, Cu, Au, Pt, Ag, or an intermetallic compound such as silicide) It may be configured by patterning a multi-layered thin film. The thickness of the lower electrode 12 is set to about several hundred nm to several thousand nm.
[0029]
The material of the surface electrode 7 is a material having a small work function (for example, gold), but the material of the surface electrode 7 is not limited to gold, and the surface electrode 7 has a single layer structure. Not limited to this, a multilayer structure may be used. The thickness of the surface electrode 7 should just be the thickness which can tunnel the electron which passed the strong electric field drift layer 6, and should just be set to about 4 nm-15 nm. Each lower electrode 12 and each surface electrode 7 are each formed in a strip shape, and a part of the surface electrode 7 faces the lower electrode 12 in the thickness direction of the glass substrate 11. Pads 28 are formed on both ends of each lower electrode 12 in the longitudinal direction, and pads 27 are formed on both ends of each surface electrode 7 in the longitudinal direction.
[0030]
The field emission electron source 10 of the present embodiment has a plurality of lower electrodes 12 arranged on the one surface side of the glass substrate 11 and a direction intersecting the lower electrode 12 in the same manner as the conventional configuration shown in FIG. Since a part of the strong electric field drift layer 6 is sandwiched at a portion corresponding to the intersection with the plurality of surface electrodes 7 arranged in a row, a combination of the surface electrode 7 and the lower electrode 12 is appropriately selected and selected. By applying a voltage therebetween, a strong electric field acts on a portion corresponding to the intersection of the surface electrode 7 and the lower electrode 12 selected in the strong electric field drift layer 6 to emit electrons. That is, the lower electrode 12, the polycrystalline silicon layer 3 on the lower electrode 12, and the polycrystalline silicon layer are arranged at lattice points of a matrix (lattice) composed of a group of a plurality of surface electrodes 7 and a group of a plurality of lower electrodes 12. 3 corresponds to the arrangement of the electron source element 10a composed of the strong electric field drift layer 6 on the surface 3 and the surface electrode 7 on the strong electric field drift layer 6, and a set of the surface electrode 7 and the lower electrode 12 to which a voltage is applied. By selecting, it becomes possible to emit electrons from the desired electron source element 10a. Therefore, the surface electrode 7 is not necessarily formed in a strip shape, and the surface electrode 7 formed only in a portion corresponding to the electron source element 10a and arranged in a direction orthogonal to the lower electrode 12 is electrically connected by a low resistance bus electrode. May be connected to each other.
[0031]
The strong electric field drift layer 6 is formed by performing a nanocrystallization process and an oxidation process, which will be described later, and as shown in FIG. 3, at least columnar polycrystalline silicon arranged on the surface side of the lower electrode 12. Grains (semiconductor crystals) 51, a thin silicon oxide film 52 formed on the surface of the grains 51, a number of nanometer-order silicon microcrystals (semiconductor microcrystals) 63 interposed between the grains 51, and each silicon microcrystal It is considered that it is composed of a large number of silicon oxide films (insulating films) 64 that are formed on the surface of 63 and have an oxide film thickness smaller than the crystal grain size of the silicon microcrystal 63. Each grain 51 extends in the thickness direction of the lower electrode 12.
[0032]
In the field emission electron source 10 of the present embodiment, it is considered that electron emission occurs in the following model. That is, by applying a DC voltage Vps between the surface electrode 7 and the lower electrode 12 with the surface electrode 7 set to the high potential side, electrons e are transferred from the lower electrode 12 to the strong electric field drift layer 6. ⁻ Is injected. On the other hand, since most of the electric field applied to the strong electric field drift layer 6 is applied to the silicon oxide film 64, the injected electrons e ⁻ Is accelerated by a strong electric field applied to the silicon oxide film 64, and drifts in the region between the grains 51 in the strong electric field drift layer 6 toward the surface in the direction of the arrow in FIG. 3 (upward in FIG. 3). The electrode 7 is tunneled and emitted into a vacuum. Thus, in the strong electric field drift layer 6, electrons injected from the lower electrode 12 are almost scattered by the silicon microcrystal 63, are accelerated by the electric field applied to the silicon oxide film 64, and drift through the surface electrode 7. Since the heat generated in the strong electric field drift layer 6 is dissipated through the grains 51, no popping phenomenon occurs when electrons are emitted, and electrons can be stably emitted. The electrons reaching the surface of the strong electric field drift layer 6 are considered to be hot electrons, and are easily tunneled through the surface electrode 7 and emitted into the vacuum.
[0033]
Hereinafter, a method for manufacturing the field emission electron source 10 of the present embodiment will be briefly described with reference to FIG. However, FIG. 4 shows a cross section of a portion corresponding to one electron source element 10a.
[0034]
First, an infrared absorption layer 13 made of a non-doped amorphous silicon layer is formed on the one surface of the glass substrate 11 by, for example, a plasma CVD method. Next, a predetermined electrode is formed on the infrared absorption layer 13 to form the lower electrode 12. A metal thin film (for example, tungsten film) having a film thickness (for example, 300 nm) is formed by sputtering, and then a photoresist layer is applied and formed on the metal thin film to leave a portion to be the lower electrode 12 in the metal thin film. Then, after patterning the photoresist layer using a photolithography technique, the metal thin film is patterned by a reactive ion etching method using the photoresist layer as a mask to form a plurality of lower electrodes 12 each consisting of a part of the metal thin film. After forming, and subsequently removing the photoresist layer, the one surface of the glass substrate 11 is formed. By performing a process of forming a non-doped polycrystalline silicon layer 3 having a predetermined film thickness (for example, 1.5 μm) on the entire surface of the substrate at a predetermined substrate temperature (for example, 450 ° C.) by, for example, plasma CVD, FIG. The structure shown in a) is obtained. Here, when the polycrystalline silicon layer 3 is formed, as shown in FIG. 5, the surface of the glass substrate 11 on which the lower electrode 12 is not formed (the other surface) is a substrate of a film forming apparatus comprising a plasma CVD apparatus. In a state where the glass substrate 11 is held on the substrate holding table so as to face the substrate heater 40 provided on the holding table, the substrate heater 40 is energized so that the temperature of the glass substrate 11 becomes a preset substrate temperature. By doing this, the glass substrate 11 is heated from the said other surface side. When the glass substrate 11 is heated in this way, even if infrared rays are emitted in the direction indicated by the arrow in FIG. 5 (that is, the direction from the substrate heater 40 toward the glass substrate 11), in this embodiment, the glass substrate is used. 11 is provided with an infrared absorption layer 13 on the one surface, and a patterned lower electrode 12 is provided on the infrared absorption layer 13, so that the in-plane variation of the temperature on the one surface side of the glass substrate 11 is reduced. Thus, it can be made smaller than the case where the infrared absorption layer 13 is not provided, and the in-plane variation in the film quality of the polycrystalline silicon layer 3 can be made smaller than in the prior art. Note that the method for forming the polycrystalline silicon layer 3 is not limited to the plasma CVD method, and any film forming method for forming the glass substrate 11 while heating the glass substrate 11 from the other surface side may be used. Alternatively, a thin film forming method other than the plasma CVD method such as vapor deposition may be adopted.
[0035]
After the non-doped polycrystalline silicon layer 3 is formed, the above-described nanocrystallization process is performed to obtain a large number of polycrystalline silicon grains 51 (see FIG. 3) and a large number of silicon microcrystals 63 (see FIG. 3). By forming the mixed composite nanocrystal layer (hereinafter referred to as the first composite nanocrystal layer) 4 at the site where the strong electric field drift layer 6 is to be formed, the structure shown in FIG. 4B is obtained. Here, in the nanocrystallization process, an electrolytic solution made of a mixed solution in which a 55 wt% hydrogen fluoride aqueous solution and ethanol are mixed at approximately 1: 1 is used, the lower electrode 12 is used as an anode, and polycrystalline silicon is contained in the electrolytic solution. A constant current (for example, between the anode and the cathode from the power source is applied while the cathode made of a platinum electrode is opposed to the layer 3 and the main surface of the polycrystalline silicon layer 3 is irradiated with light by a light source made of a 500 W tungsten lamp. , Current density is 12 mA / cm ² Current) for a predetermined time (for example, 10 seconds), the first composite nanocrystal layer 4 including the polycrystalline silicon grains 51 and the silicon microcrystals 63 overlaps the lower electrode 12 in the polycrystalline silicon layer 3. Form on site.
[0036]
After the nanocrystallization process is completed, the above-described oxidation process is performed to electrochemically oxidize the first composite nanocrystal layer 4 to thereby form a composite nanocrystal layer (hereinafter, referred to as FIG. 3). A strong electric field drift layer 6 made of a second composite nanocrystal layer is formed in a portion overlapping the lower electrode 12 in the polycrystalline silicon layer 3 to obtain the structure shown in FIG. In the oxidation process, an electrolytic solution made of a solution obtained by dissolving 0.04 mol / l potassium nitrate in an organic solvent made of ethylene glycol is used, the lower electrode 12 is used as an anode, and the first composite nanocrystal in the electrolytic solution is used. A cathode made of a platinum electrode is disposed opposite to the layer 4, the lower electrode 12 is used as an anode, and a constant current (for example, a current density of 0.1 mA / cm between the anode and the cathode is supplied from the power source). ² And the first composite nanocrystal layer 4 is electrochemically oxidized until the voltage between the anode and the cathode increases by 20 V, whereby the above-described grain 51, silicon microcrystal 63, and each silicon oxide are oxidized. The strong electric field drift layer 6 made of the second composite nanocrystal layer including the films 52 and 64 is formed. Here, a portion of the polycrystalline silicon layer 3 that fills the space between the adjacent strong electric field drift layers 6 is the above-described separation layer 16. In this embodiment, in the first composite nanocrystal layer 4 formed by performing the above-described nanocrystallization process, the regions other than the grains 51 and the silicon microcrystals 63 are amorphous regions made of amorphous silicon. In the strong electric field drift layer 6, regions other than the grains 51, silicon microcrystals 63, and the silicon oxide films 52 and 64 are amorphous regions 65 made of amorphous silicon or partially oxidized amorphous silicon. Depending on process conditions, the amorphous region 65 becomes a hole, and the first composite nanocrystal layer 4 in such a case can be regarded as having the same configuration as the porous polycrystalline silicon layer 4 ′ (see FIG. 10).
[0037]
After the formation of the strong electric field drift layer 6 and the separation layer 16, the field emission electron source 10 having the structure shown in FIG. 4D is obtained by forming the surface electrode 7 made of a gold thin film by, for example, vapor deposition. It is done.
[0038]
According to the manufacturing method described above, after the lower electrode 12 is formed on the one surface side of the glass substrate 11, the infrared absorption layer 13 is formed, and then the polycrystalline silicon layer 3 deposition process and nanocrystallization process are performed. Since the electron passage portion 5 is formed by performing the oxidation process, the film quality of the non-doped polycrystalline silicon layer 3 (see FIG. 4A) formed by the film formation process and serving as the base of the electron passage portion 5 is improved. It is possible to prevent in-plane variation due to the shape of the lower electrode 12, and as a result, the polycrystalline silicon layer 3 sandwiched between the lower electrode 12 and the surface electrode 7 in the electron passage portion 5 (FIG. 4). (See (d)) and the film quality of each of the strong electric field drift layer 6 and the film quality in the vicinity of the boundary between the strong electric field drift layer 6 and the separation layer 16 can be prevented from varying in the plane due to the shape of the lower electrode 12. Because you can Compared plane variation of electron emission characteristics (emission current Ie, and electron emission efficiency) and can provide a small field emission electron source 10.
[0039]
In other words, the field emission electron source 10 of the present embodiment manufactured by the above-described manufacturing method includes the infrared absorption layer 13 formed on the one surface of the glass substrate 11 before the electron passage portion 5 is formed. In addition, since the infrared absorption layer 13 is present when the electron passage portion 5 is formed, the film quality of the electron passage portion 5 is prevented from varying in the plane due to the shape of the lower electrode 12, so that In comparison, the in-plane variation of the electron emission characteristics can be reduced. In short, it is possible to suppress the variation in electron emission characteristics of a large number of strong electric field drift layers 6 included in the electron passage portion 5, and when the field emission electron source 10 is applied as an electron source of a display, the luminance of the display It is possible to suppress the internal variation.
[0040]
In the present embodiment, since the infrared absorption layer 13 is provided on the one surface side of the glass substrate 11, variation in temperature on the one surface side of the glass substrate 11 when forming the electron passage portion 5 is reduced. In addition, since the in-plane variation of the film quality of the electron passage portion 5 can be reduced as compared with the case where the infrared absorption layer 13 is formed on the other surface side of the glass substrate 11, the in-plane variation of the electron emission characteristics is further reduced. it can. Moreover, since the infrared absorption layer 13 is formed on the one surface of the glass substrate 11 and the lower electrode 12 is formed on the infrared absorption layer 13, the infrared absorption layer 13 is formed on the one surface side of the glass substrate 11. It is possible to prevent the shape of the lower electrode 12, the electron passage part 5, the surface electrode 7 and the like from being affected. In the present embodiment, since the material of the infrared absorption layer 13 is made of amorphous silicon, infrared rays can be efficiently absorbed. For example, the infrared absorption layer 13 is formed by plasma CVD, sputtering, vapor deposition, catalytic CVD, or the like. In general, there is an advantage that it can be easily formed by a thin film forming method. The material of the infrared absorption layer 13 is not limited to an amorphous silicon layer, and may be other amorphous materials as long as the material absorbs infrared rays.
[0041]
(Embodiment 2)
The basic configuration of the field emission electron source 10 of the present embodiment is substantially the same as that of the first embodiment. As shown in FIG. 6, the lower electrode 12 is patterned on the one surface of the glass substrate 11 and is amorphous. The difference is that an infrared absorption layer 13 made of a silicon layer is formed so as to cover the lower electrode 12 and the one surface of the glass substrate 11 on the one surface side of the glass substrate 11. Other configurations and operations are the same as those in the first embodiment.
[0042]
The manufacturing method of the field emission type electron source 10 of the present embodiment is substantially the same as the manufacturing method described in the first embodiment, and the order of the step of forming the infrared absorption layer 13 and the step of forming the lower electrode 12 is the same. The difference is the opposite. That is, in the manufacturing method of the first embodiment, the infrared absorption layer 13, the lower electrode 12, and the polycrystalline silicon layer 3 are formed in this order on the one surface side of the glass substrate 11, whereas the manufacturing method of the present embodiment. Then, after forming the infrared absorption layer 13 after forming the lower electrode 12 on the said one surface of the glass substrate 11, the film-forming process of the polycrystalline silicon layer 3 demonstrated in Embodiment 1, and the nanocrystallization process The electron passage portion 5 is formed by performing an oxidation process.
[0043]
Thus, in the manufacturing method of the present embodiment, as in the first embodiment, the infrared absorption layer 13 is formed before the electron passage portion 5 is formed. It is possible to prevent the film quality of the non-doped polycrystalline silicon layer 3 serving as a base from varying in the plane due to the shape of the lower electrode 12, and as a result, the lower electrode 12 and the surface electrode 7 in the electron passage portion 5. The film quality of each of the polycrystalline silicon layer 3 and the strong electric field drift layer 6 and the film quality near the boundary between the strong electric field drift layer 6 and the separation layer 16 varies in-plane due to the shape of the lower electrode 12. Therefore, it is possible to provide the field emission type electron source 10 in which the in-plane variation of the electron emission characteristics (emission current Ie, electron emission efficiency, etc.) is smaller than that in the prior art.
[0044]
In short, also in the field emission electron source 10 of the present embodiment, since the infrared absorption layer 13 is provided on the one surface side of the glass substrate 11, the one surface of the glass substrate 11 when the electron passage portion 5 is formed. The variation in temperature at the side can be reduced, and the in-plane variation in the film quality of the electron passage portion 5 can be further reduced as compared with the case where the infrared absorption layer 13 is formed on the other surface side of the glass substrate 11. In-plane variation in characteristics can be further reduced. Further, in the field emission electron source 10 of the present embodiment, the step on the surface on the one surface side of the glass substrate 11 before the electron passage portion 5 is formed is relaxed, and the flatness of the surface of the electron passage portion 5 is improved. be able to. In addition, since the electron passage portion 5 formed on the basis of the non-doped polycrystalline silicon layer 3 formed by the film formation process is provided on the infrared absorption layer 13 made of an amorphous silicon layer, the infrared absorption layer 13 The film forming process and the film forming process of the non-doped polycrystalline silicon layer 3 can be continuously performed using the same source gas in the chamber of one film forming apparatus, and the manufacturing period can be shortened. There is.
[0045]
(Embodiment 3)
The basic configuration of the field emission electron source 10 of the present embodiment is substantially the same as that of the first embodiment, and the infrared absorption layer 13 is formed on the other surface side of the glass substrate 11 as shown in FIG. Is different. Here, in the present embodiment, the infrared absorption layer 13 is formed of a metal material (for example, chromium) having a low surface gloss when formed. Other configurations and operations are the same as those in the first embodiment.
[0046]
The manufacturing method of the field emission electron source 10 of the present embodiment is substantially the same as the manufacturing method described in the first embodiment, and the infrared absorption layer 13 is formed on the other surface side of the glass substrate 11 by, for example, sputtering. Then, after forming the lower electrode 12 on the one surface side of the glass substrate 11, the film formation process, the nanocrystallization process, and the oxidation process of the polycrystalline silicon layer 3 described in the first embodiment are performed. A passage portion 5 is formed. Note that the order of the step of forming the infrared absorption layer 13 and the step of forming the lower electrode 12 may be reversed. In this embodiment, since the infrared absorption layer 13 is formed on the other surface side of the glass substrate 11, the infrared absorption layer 13 may be removed after the electron passage portion 5 is formed.
[0047]
Thus, in the manufacturing method of the present embodiment, as in the first embodiment, the infrared absorption layer 13 is formed before the electron passage portion 5 is formed. It is possible to prevent the film quality of the non-doped polycrystalline silicon layer 3 serving as a base from varying in the plane due to the shape of the lower electrode 12, and as a result, the lower electrode 12 and the surface electrode 7 in the electron passage portion 5. The film quality of each of the polycrystalline silicon layer 3 and the strong electric field drift layer 6 and the film quality near the boundary between the strong electric field drift layer 6 and the separation layer 16 varies in-plane due to the shape of the lower electrode 12. Therefore, it is possible to provide the field emission type electron source 10 in which the in-plane variation of the electron emission characteristics (emission current Ie, electron emission efficiency, etc.) is smaller than that in the prior art.
[0048]
In short, in the field emission electron source 10 of the present embodiment, since the infrared absorption layer 13 is provided on the other surface side of the glass substrate 11, the one surface side of the glass substrate 11 when the electron passage portion 5 is formed. Variation in temperature can be reduced, and in-plane variation in electron emission characteristics can be further reduced. Moreover, in the field emission type electron source 10 of this embodiment, since the infrared absorption layer 13 is formed on the other surface side of the glass substrate 11, the infrared absorption layer 13 is formed on the one surface side of the glass substrate 11. It is possible to prevent the shape of the lower electrode 12, the electron passage portion 5, the surface electrode 7 and the like from being affected. Further, since the material of the infrared absorbing layer 13 is made of a metal material, the infrared absorbing layer 13 can be easily formed by a general thin film forming method such as sputtering, vapor deposition, or CVD.
[0049]
By the way, in each said embodiment, the nanocrystallization process is performed with respect to the non-doped polycrystalline silicon layer 3 formed into a film by the said film-forming process, and the strong electric field drift layer 6 is formed by performing an oxidation process after that. However, another semiconductor layer is used instead of the polycrystalline silicon layer 3 It is also possible to do. In this embodiment, the silicon oxide film 64 constitutes an insulating film, and an oxidation process is used to form the insulating film. However, a nitriding process or an oxynitriding process may be used instead of the oxidation process. When the nitriding process is employed, the silicon oxide films 52 and 64 described with reference to FIG. 3 are both silicon nitride films. When the oxynitriding process is employed, the silicon oxide films 52 and 64 are silicon oxynitride. Become a film.
[0050]
【The invention's effect】
The invention of claim 1 includes an insulating glass substrate, a lower electrode patterned in a plane parallel to one surface of the glass substrate, a surface electrode facing the lower electrode in the thickness direction of the glass substrate, and a glass substrate The one surface of Formed on the side A field emission electron having an electron passage part through which electrons injected from the lower electrode pass through the portion sandwiched between the lower electrode and the surface electrode toward the surface electrode A method of manufacturing a source, wherein after forming a lower electrode on the one surface side of the glass substrate, in forming a non-doped polycrystalline silicon layer that is the basis of the electron passage portion, the glass substrate is formed from the other surface side of the glass substrate. The film is heated while being heated by a heating source, and an infrared absorption layer is formed on the entire surface of the one surface side and the other surface side of the glass substrate before the non-doped polycrystalline silicon layer is formed. thing Since the presence of the infrared absorption layer at the time of forming the electron passage portion prevents the film quality of the electron passage portion from varying in the plane due to the shape of the lower electrode, In-plane variation of emission characteristics Can provide a field emission electron source There is an effect that.
[0051]
A second aspect of the present invention is the first aspect of the present invention, wherein the infrared absorption layer is the one surface side of the glass substrate. Because to form The variation in temperature on the one surface side of the glass substrate when forming the electron passage portion can be reduced, compared with the case where the infrared absorption layer is formed on the other surface side of the glass substrate. Since the in-plane variation in the film quality of the electron passage portion can be further reduced, the in-plane variation in the electron emission characteristics can be further reduced.
[0053]
Claim 3 The invention of claim 2 is the invention of claim 2 The infrared The line absorption layer covers the lower electrode and the one surface of the glass substrate on the one surface side of the glass substrate. Because it forms There is an effect that the step on the surface of the one surface side of the glass substrate before forming the electron passage part is relaxed, and the flatness of the surface of the electron passage part can be improved.
[0054]
Claim 4 In the invention of claim 1, in the invention of claim 1, the infrared absorption layer is provided on the other surface side of the glass substrate. Because it forms There is an effect that the infrared absorbing layer can be prevented from affecting the shapes of the lower electrode, the electron passage portion, the surface electrode, and the like formed on the one surface side of the glass substrate.
[0055]
Claim 5 The invention of claim 1 to claim 1 4 In the invention, since the material of the infrared absorption layer is made of amorphous silicon, infrared rays can be efficiently absorbed. Further, there is an advantage that the infrared absorbing layer can be easily formed by a general thin film forming method such as a plasma CVD method, a sputtering method, a vapor deposition method, or a catalytic CVD method.
[0056]
Claim 6 The invention of claim 4 In the invention, since the material of the infrared absorbing layer is made of a metal material, the infrared absorbing layer can be easily formed by a general thin film forming method such as sputtering, vapor deposition, or CVD. is there.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view of a main part of a field emission electron source according to a first embodiment.
FIG. 2 is a schematic perspective view, partly broken, of the field emission electron source of the above.
FIG. 3 is a schematic configuration diagram of a main part of the field emission electron source in the same as above.
FIG. 4 is a cross-sectional view of main processes for explaining the method of manufacturing the field emission electron source according to the above.
FIG. 5 is an explanatory diagram of a manufacturing method of the field emission electron source according to the above.
6 is a schematic cross-sectional view of a main part of a field emission type electron source according to Embodiment 2. FIG.
7 is a schematic cross-sectional view of a main part of a field emission electron source according to Embodiment 3. FIG.
FIG. 8 is an operation explanatory diagram of a field emission electron source showing a conventional example.
FIG. 9 is an operation explanatory diagram of a field emission electron source showing another conventional example.
FIG. 10 is a cross-sectional view of main steps for explaining the manufacturing method of the field emission electron source of the above.
FIG. 11 is a schematic configuration diagram of a display to which the above is applied.
FIG. 12 is a schematic perspective view of a field emission electron source in a display to which the same is applied.
[Explanation of symbols]
3 Polycrystalline silicon layer
5 electron passage
7 Surface electrode
10 Field emission electron source
10a Electron source element
11 Glass substrate
12 Lower electrode
13 Infrared absorbing layer
16 Separation layer

Claims (6)

A glass substrate having an insulating property, a lower electrode is patterned in a plane parallel to the one surface of the glass substrate, and the surface electrode facing the lower electrode in the thickness direction of the glass substrate, formed on the one surface side of a glass substrate A method of manufacturing a field emission electron source comprising: an electron passing portion through which electrons injected from the lower electrode pass through a portion sandwiched between the lower electrode and the surface electrode ; After forming the lower electrode on the one surface side, in forming the non-doped polycrystalline silicon layer that is the basis of the electron passage portion, the glass substrate is heated while being heated from the other surface side of the glass substrate by a heating source. to electrodeposition, characterized by forming one of the entire infrared-absorbing layer of the one surface of the glass substrate to film deposition earlier the non-doped polycrystalline silicon layer and the other surface side Method of manufacturing the emission electron source. 2. The method of manufacturing a field emission electron source according to claim 1, wherein the infrared absorption layer is formed on the one surface side of the glass substrate. The infrared absorbing layer, the production of the field emission electron source according to claim 2, wherein the formed to cover the lower electrode and the one surface of the glass substrate on the one front side of the glass substrate Way . The infrared absorbing layer, a method of manufacturing a field emission electron source according to claim 1, wherein the forming the other surface side of the glass substrate. Method of manufacturing a field emission electron source according to any one of claims 1 to 4 material of the infrared absorbing layer is equal to or made of amorphous silicon. 5. The method of manufacturing a field emission electron source according to claim 4, wherein the material of the infrared absorption layer is made of a metal material .

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