JP4114524B2 - OFDM demodulator and method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an OFDM demodulator and method for demodulating an orthogonal frequency division multiplexing (OFDM) modulation signal.
[0002]
[Prior art]
As a method for transmitting a digital signal, a modulation method called an orthogonal frequency division multiplexing (hereinafter referred to as an OFDM method, OFDM: Orthogonal Frequency Division Multiplexing) is used. In the OFDM method, a large number of orthogonal subcarriers (subcarriers) are provided in the transmission band, and data is allocated to the amplitude and phase of each subcarrier by PSK (Phase Shift Keying) or QAM (Quadrature Amplitude Modulation), and digitally modulated. It is a method to do.
[0003]
Since the OFDM scheme divides the transmission band by a large number of subcarriers, the band per subcarrier wave becomes narrow and the modulation speed becomes slow, but the total transmission speed is the same as the conventional modulation system. is doing. In addition, in the OFDM scheme, since a number of subcarriers are transmitted in parallel, the symbol rate is slow, the time length of the multipath relative to the time length of the symbol can be shortened, and the multipath interference is not easily received. It has the characteristics.
[0004]
In addition, since the OFDM scheme allocates data to a plurality of subcarriers, an IFFT (Inverse Fast Fourier Transform) arithmetic circuit that performs inverse Fourier transform during modulation, and an FFT (Fast Fourier Transform) that performs Fourier transform during demodulation. ) It has a feature that a transmission / reception circuit can be configured by using an arithmetic circuit.
[0005]
From the above characteristics, the OFDM system is often applied to terrestrial digital broadcasting that is strongly affected by multipath interference. As terrestrial digital broadcasting adopting such an OFDM system, there are standards such as DVB-T (Digital Video Broadcasting-Terrestrial) and ISDB-T (Integrated Services Digital Broadcasting-Terrestrial).
[0006]
As shown in FIG. 11, an OFDM transmission symbol (hereinafter referred to as an OFDM symbol) is a copy of an effective symbol that is a signal period during which IFFT is performed at the time of transmission and a waveform in the latter half of the effective symbol. Guard interval. The guard interval is provided in the first half of the OFDM symbol. In the OFDM scheme, by providing such a guard interval, intersymbol interference due to multipath is allowed and multipath tolerance is improved.
[0007]
For example, ISDB-T_SBIn mode 3 of the standard (broadcasting standard for terrestrial digital audio broadcasting adopted in Japan), 512 subcarriers are included in an effective symbol, and the subcarrier interval is 125 / 126≈0.992 kHz. It becomes. This ISDB-T_SBIn the standard mode 3, transmission data is modulated on 433 subcarriers out of 512 subcarriers in an effective symbol. ISDB-T_SBIn the standard mode 3, the guard interval time length is any one of 1/4, 1/8, 1/16, and 1/32 of the effective symbol time length.
[0008]
By the way, when demodulating an OFDM signal, it is necessary to correctly detect an OFDM symbol boundary and perform an FFT operation in synchronization with the boundary position. Generating a synchronization signal by correctly detecting the boundary position of the OFDM symbol is called symbol synchronization processing. One method of performing symbol synchronization processing is to use a guard interval. The method of performing symbol synchronization processing using the guard interval uses the correlation of the signal sequence between the guard interval and the copy source, and the portion having the highest autocorrelation value of the received OFDM signal is the symbol boundary position. It is a method to judge.
[0009]
In general, an OFDM demodulator is provided with a symbol synchronization circuit that calculates a symbol boundary position using guard interval correlation and performs synchronization processing in order to perform symbol synchronization processing using a guard interval.
[0010]
Hereinafter, a circuit configuration example of the symbol synchronization circuit 100 will be described with reference to FIGS.
[0011]
12 and 13 are block configuration diagrams of the symbol synchronization circuit 100. FIG. FIG. 14 shows a timing chart of each signal in the symbol synchronization circuit 100.
[0012]
As shown in FIG. 12, the symbol synchronization circuit 100 includes a guard correlation detection circuit 101 that generates a guard interval correlation signal indicating an autocorrelation of a guard interval, detects a peak position of the guard interval correlation signal, and designates the peak position as a symbol. And a symbol boundary detection circuit 102 that outputs the boundary position.
[0013]
The guard correlation detection circuit 101 includes an effective symbol length delay circuit 111, a complex multiplication circuit 112, and a guard interval length integration circuit 113.
[0014]
The guard correlation detection circuit 101 receives a digital quadrature demodulated signal (r (t)) after digital quadrature demodulation as shown in FIG. The digital quadrature demodulated signal (r (t)) is a complex signal composed of a real component signal (I (t)) and an imaginary component signal (Q (t)). Note that t is a variable indicating time.
[0015]
As shown in FIG. 14B, the effective symbol length delay circuit 111 delays the input digital quadrature demodulated signal by an effective symbol time (Tu). The digital orthogonal demodulated signal (r (t−Tu)) delayed by the effective symbol time by the effective symbol length delay circuit 111 is input to the complex multiplier circuit 112.
[0016]
The complex multiplication circuit 112 performs a complex multiplication operation of the digital quadrature demodulated signal (r (t)) that has not been delayed and the digital quadrature demodulated signal (r (t−Tu)) delayed by the effective symbol period (Tu). Multiply every sample. The multiplication result is input to the guard interval length integration circuit 113.
[0017]
The guard interval length integration circuit 113 performs an integral calculation over the range of the guard interval length by performing a moving sum calculation for the guard interval length on the input signal. The signal output from the guard interval length integration circuit 113 becomes a guard interval correlation signal indicating the correlation between the digital quadrature demodulated signal and the digital quadrature demodulated signal delayed by an effective symbol (Nu sample).
[0018]
The guard interval correlation signal is a complex signal (CI (t) + jCQ (t)) in which the real component is represented by CI (t) and the imaginary component is represented by CQ (t). The guard interval correlation signal is a signal whose level is high at a portion where the correlation value is high and low at a portion where the correlation value is low. Therefore, the guard interval correlation signal is ideally a signal in which a mountain-shaped waveform having a peak at the boundary position of the OFDM symbol is repeated.
[0019]
The guard interval correlation signal is supplied from the guard interval length integration circuit 113 to the symbol boundary detection circuit 102.
[0020]
The symbol boundary detection circuit 102 is a circuit that detects a timing at which the guard interval correlation signal reaches a peak and outputs the timing as a symbol boundary position.
[0021]
As shown in FIG. 13, the symbol boundary detection circuit 102 includes a square circuit 121, a symbol long period counter 122, and a maximum value detection circuit 123.
[0022]
The guard interval correlation signal output from the guard correlation detection circuit 101 is supplied to the squaring circuit 121.
[0023]
The square circuit 121 squares the real number component (CI) and the imaginary number component (CQ) of the guard interval correlation signal, and adds them. As a result of addition, a square signal ({CI indicating the amplitude component of the guard interval correlation signal as shown in FIG. 14C).²+ CQ²} (T)) is generated. The square signal of the guard interval correlation signal is supplied to the maximum value detection circuit 123.
[0024]
The symbol long period counter 122 is a counter that counts the operation clock up to the sampling number (Ns) of one OFDM symbol. The count value N of the symbol long period counter 122 is incremented by 1 from 0 to Ns-1, and circulates to return to 0 when it exceeds Ns-1. That is, as shown in FIG. 14D, the symbol length cycle counter 122 has a count value N of one cycle in terms of the number of OFDM symbol samples (for example, 1088). The count value N of the symbol long period counter 122 is supplied to the maximum value detection circuit 123.
[0025]
The square signal output from the square circuit 121 is input to the maximum value detection circuit 123. In the maximum value detection circuit 123, a maximum value detection range for specifying a maximum value detection section is set. The maximum value detection range is a value that specifies a range for detecting the count value N, and here, 0 to Ns-1 (for example, 1087) is set.
[0026]
The maximum value detection circuit 123 finds the sample point having the highest level of the square signal during the maximum value detection range (that is, between the count value N is 0 to Ns−1). As shown in FIG. 14E, the maximum value detection circuit 123 detects the count value N of the symbol length period counter 122 at the sample timing of the maximum value found. The detected count value N becomes a symbol boundary position that specifies the boundary position of the OFDM symbol. The symbol boundary position is updated every cyclic cycle of the count value N.
[0027]
As described above, the symbol boundary detection circuit 102 searches for the maximum value for the guard interval correlation signal, detects the generation timing of the maximum value, and outputs the timing as the symbol boundary position.
[0028]
[Non-Patent Document 1]
"Receiving equipment standard for terrestrial digital audio broadcasting (preferred specification) ARIB STD-B30 version 1.1", Radio Industry, established on May 31, 2001, revised on March 28, 2002 1.1 , P. 10-14
[0029]
[Problems to be solved by the invention]
By the way, the level of the digital quadrature demodulated signal (r (t)) input to the symbol synchronization circuit 100 fluctuates greatly because it is affected by the state of the transmission path and noise.
[0030]
Therefore, for example, as shown in FIG. 14F, the timing at which the cycle of the symbol length cycle counter 122 is updated (that is, the timing at which the count value becomes 0) and the timing of the maximum value of the square signal are temporal. If the value is close to, a portion having high correlation (that is, a mountain-like portion) that is inherently generated by the guard interval of the previous OFDM symbol is determined to be included in the peak detection processing of the next OFDM symbol period. May end up. In such a case, the count value N at the maximum value of the guard interval correlation signal does not always become a constant value for each OFDM symbol due to various noises and errors, and fluctuates greatly for each OFDM symbol. There is a possibility that the highly correlated part generated by the symbol guard interval is determined to be the boundary position of the next OFDM symbol.
[0031]
In addition, when there is a clock frequency error (an error between the transmission clock of the received OFDM signal and the operation clock), the count value N gradually moves. There is a possibility that a part having high correlation caused by the guard interval is included in the peak detection process of the next OFDM symbol period and is determined.
[0032]
The present invention has been proposed in view of such a conventional situation, and eliminates erroneous detection of symbol boundary positions and improves detection accuracy when performing symbol synchronization processing using correlation of guard intervals. It is an object of the present invention to provide an OFDM demodulation apparatus and method.
[0033]
[Means for Solving the Problems]
The OFDM demodulator according to the present invention is generated by copying an effective symbol generated by time-division-modulating an information sequence into a plurality of subcarriers and a signal waveform of a part of the effective symbol. An OFDM demodulator for demodulating an Orthogonal Frequency Division Multiplex (OFDM) signal using a transmission symbol including a guard interval as a transmission unit, wherein the transmission symbol is a count value incremented in synchronization with a reference clock. Count means for generating a count value that is cyclically repeated at a period corresponding to the time interval, and a detection period that is repeated at the same period as the cyclic period of the count value, and the detection for the cyclic period of the count value is set. Detection period control means for controlling the phase of the period, and the guard of the OFDM signal within the detection period. Symbol boundary detection means for detecting the maximum value of the autocorrelation value in the interval portion and outputting the count value at which the maximum value is generated as a symbol boundary position for each detection period, and the detection period control means comprises the detection The phase of the detection period with respect to the cyclic period of the count value is controlled according to the generation position of the maximum value within the period.
[0034]
The OFDM demodulator according to the present invention is generated by copying an effective symbol generated by time-division-modulating an information sequence into a plurality of subcarriers and a signal waveform of a part of the effective symbol. An OFDM demodulator for demodulating an Orthogonal Frequency Division Multiplex (OFDM) signal using a transmission symbol including a guard interval as a transmission unit, wherein the transmission symbol is a count value incremented in synchronization with a reference clock. Counting means for generating a count value that is cyclically repeated at a period corresponding to the time interval of the above, and a detection period that is repeated at the same period as the cyclic period of the count value are set, and the above-mentioned within the detection period The maximum value of the autocorrelation value detected in the guard interval part of the OFDM signal is detected, and the maximum value is generated. A symbol boundary detection unit is selected from the plurality of symbol boundary detection units that are output at each detection period and the symbol boundary detection unit, and the count value output from the selected symbol boundary detection unit is a symbol. Selection output means for outputting as a boundary position, the plurality of symbol boundary detection means is set to a phase having a different detection period, and the selection output means is set to the selected symbol boundary detection means. One symbol boundary detecting means is selected in accordance with the position where the maximum value is generated within the detection period.
[0035]
The OFDM demodulation method according to the present invention is generated by copying an effective symbol generated by time-division-modulating an information sequence into a plurality of subcarriers and a signal waveform of a part of the effective symbol. An OFDM demodulation method for demodulating an orthogonal frequency division multiplexing (OFDM) signal using a transmission symbol including a guard interval as a transmission unit, wherein the transmission symbol is a count value incremented in synchronization with a reference clock. Generating a count value that is cyclically repeated at a period corresponding to the time interval, setting a detection period that is repeated at the same period as the cyclic period of the count value, and the guard interval of the OFDM signal within the detection period The maximum value of the autocorrelation value of the part is detected, and the count value at which the maximum value is generated is detected for each detection period. Output as Bol boundary position, in response to the occurrence position of the maximum value within the detection period, and controls the phase of the detection period for the search period of the count value.
[0036]
The OFDM demodulation method according to the present invention is generated by copying an effective symbol generated by time-division-modulating an information sequence into a plurality of subcarriers and a signal waveform of a part of the effective symbol. An OFDM demodulation method for demodulating an orthogonal frequency division multiplexing (OFDM) signal using a transmission symbol including a guard interval as a transmission unit, wherein the transmission symbol is a count value incremented in synchronization with a reference clock. Generating a count value that is cyclically repeated at a period corresponding to the time interval, setting a detection period that is repeated at the same period as the cyclic period of the count value, and the guard interval of the OFDM signal within the detection period The maximum value of the autocorrelation value of the part is detected, and the count value at which the maximum value is generated is detected for each detection period. Output as Bol boundary position, in response to the occurrence position of the maximum value within the detection period, and controls the phase of the detection period for the search period of the count value.
[0037]
In the OFDM demodulator and method according to the present invention described above, the symbol boundary position is calculated based on the autocorrelation of the guard interval of the OFDM signal, and the time interval period of the transmission symbol is set when the symbol boundary position is calculated. A detection range is set, the sample timing of the maximum autocorrelation value within the detection range is detected, and the detected timing is output as a symbol boundary position. Further, in the present invention, phase control is performed so that the detection range becomes an optimal position.
[0038]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an OFDM receiving apparatus to which the present invention is applied will be described as an embodiment of the present invention.
[0039]
First embodiment
An OFDM receiving apparatus according to the first embodiment of the present invention will be described.
[0040]
Overall configuration of OFDM receiver
FIG. 1 shows a block diagram of an OFDM receiving apparatus according to the first embodiment of the present invention.
[0041]
As shown in FIG. 1, the OFDM receiver 1 according to the first embodiment of the present invention includes an antenna 2, a tuner 3, a bandpass filter (BPF) 4, an A / D converter circuit 5, and a clock generator. Circuit 6, DC cancellation circuit 7, digital quadrature demodulation circuit 8, carrier frequency error correction circuit 9, FFT operation circuit 10, phase correction circuit 11, guard correlation / symbol boundary detection circuit 12, and timing synchronization circuit 13, a narrow band carrier error calculation circuit 14, a wide band carrier error calculation circuit 15, an addition circuit 16, a numerically controlled oscillation circuit (NCO) 17, a frame synchronization circuit 18, an equalization circuit 19, and a demapping circuit 20, a transmission path decoding circuit 21, and a transmission control information decoding circuit 22.
[0042]
A broadcast wave of a digital broadcast broadcast from a broadcast station is received by the antenna 2 of the OFDM receiver 1 and supplied to the tuner 3 as an RF signal.
[0043]
The RF signal received by the antenna 2 is frequency-converted into an IF signal by a tuner 3 including a multiplier 3a and a local oscillator 3b, and is supplied to the BPF 4. The IF signal output from the tuner 3 is filtered by the BPF 4 and then supplied to the A / D conversion circuit 5.
[0044]
The A / D conversion circuit 5 samples the IF signal with the clock supplied from the clock generation circuit 6 and digitizes the IF signal. The IF signal digitized by the A / D conversion circuit 5 is supplied to the DC cancellation circuit 7, and after the DC component is removed by the DC cancellation circuit 7, it is supplied to the digital quadrature demodulation circuit 8. The digital quadrature demodulation circuit 8 performs quadrature demodulation on the digitized IF signal using a two-phase carrier signal having a predetermined carrier frequency, and outputs a baseband OFDM signal. The OFDM time domain signal output from the digital quadrature demodulation circuit 8 is supplied to the carrier frequency error correction circuit 9.
[0045]
Here, when digital quadrature demodulation is performed by the digital quadrature demodulation circuit 8, a two-phase signal of -Sin component and Cos component is required as a carrier signal. Therefore, in the present apparatus 1, the frequency of the sampling clock given to the A / D conversion circuit 5 is set to the center frequency f of the IF signal._IFAnd a two-phase carrier signal supplied to the digital quadrature demodulation circuit 8 can be generated.
[0046]
4f after digital quadrature demodulation_IFThe number of subcarriers (Nu) is defined as the number of sampling points of effective symbols after digital quadrature demodulation. That is, the clock of the data series after digital quadrature demodulation is set to a frequency that is 1 / subcarrier interval. Alternatively, the down-sampling ratio after the digital quadrature demodulation may be set to 1/2, and the FFT calculation may be performed at twice the normal number of sampling points, and 1/2 down-sampling may be performed after the FFT calculation. In this way, by performing the FFT operation on the normal number of sampling points, the frequency band of the signal that can be extracted by the FFT operation is doubled, and the circuit scale of the low-pass filter circuit at the time of digital orthogonal demodulation can be reduced. it can. When data processing is performed on a data series in which each circuit in the subsequent stage performs oversampling, the number of sampling points (Nu) of effective symbols after digital quadrature demodulation is set to 2 as the number of subcarriers.ⁿIt may be doubled (where n is a natural number).
[0047]
The clock generation circuit 6 supplies a clock having the above frequency to the A / D conversion circuit 5 and also operates the data series operation clock after the digital quadrature demodulation (the clock frequency applied to the A / D conversion circuit 5). On the other hand, a clock divided by a quarter (for example, a clock having a frequency corresponding to one subcarrier interval) is supplied to each circuit in the apparatus 1.
[0048]
The operation clock generated from the clock generation circuit 6 is a free-running clock that is asynchronous with respect to the transmission clock of the received OFDM signal. In other words, the operation clock generated from the clock generation circuit 6 is not synchronized with the transmission clock by a PLL or the like, and operates in a free-running state. The operation clock can be set to the self-running state in this way by detecting a frequency error between the transmission clock of the OFDM signal and the operation clock by the timing synchronization circuit 13 and performing a feedforward process on the subsequent stage based on the frequency error component. This is because the error is removed. In the present OFDM receiver 1, the clock generation circuit 6 is thus an asynchronous free-running clock, but the present invention can also be applied to a device that variably controls the operating clock frequency by feedback control.
[0049]
The baseband OFDM signal output from the digital quadrature demodulation circuit 8 is a so-called time domain signal before the FFT operation. Therefore, hereinafter, the baseband signal before the FFT calculation is referred to as an OFDM time domain signal. As a result of orthogonal demodulation, the OFDM time domain signal becomes a complex signal composed of a real axis component (I channel signal) and an imaginary axis component (Q channel signal).
[0050]
The carrier frequency error correction circuit 9 corrects the carrier frequency error of the OFDM time domain signal by complex multiplication of the carrier frequency error correction signal output from the NCO 17 and the OFDM time domain signal after digital orthogonal demodulation. The OFDM time domain signal whose carrier frequency error has been corrected by the carrier frequency error correction circuit 9 is supplied to the FFT operation circuit 10 and the guard correlation / symbol boundary detection circuit 12.
[0051]
The FFT operation circuit 10 extracts a signal having an effective symbol length from one OFDM symbol, that is, extracts a signal obtained by removing samples of the number of guard interval samples (Ng) from all samples (Ns) of one OFDM symbol. The FFT operation is performed on the data of the number of valid symbol samples (Nu). The FFT calculation circuit 10 is given a start flag (FFT calculation calculation start timing) for specifying the extraction range from the timing synchronization circuit 13, and performs the FFT calculation at the timing of the start flag. The FFT operation circuit 10 extracts the signal component modulated by each subcarrier in the OFDM symbol by extracting the data of the number of samples corresponding to the effective symbol from one OFDM symbol and performing the FFT operation processing. .
[0052]
The signal output from the FFT operation circuit 10 is a so-called frequency domain signal after being subjected to FFT. Therefore, hereinafter, the signal after the FFT calculation is referred to as an OFDM frequency domain signal. Further, the OFDM frequency domain signal output from the FFT operation circuit 10 is a complex signal composed of a real axis component (I channel signal) and an imaginary axis component (Q channel signal), like the OFDM time domain signal. . The OFDM frequency domain signal is supplied to the phase correction circuit 11.
[0053]
The phase correction circuit 11 corrects a phase rotation component caused by a shift between the actual boundary position of the OFDM symbol and the start timing of the FFT operation for the OFDM frequency domain signal. The phase correction circuit 11 corrects the phase of a deviation that occurs with an accuracy of a sampling period or less. Specifically, the phase correction circuit 11 multiplies the OFDM frequency domain signal output from the FFT operation circuit 10 by the phase correction signal (complex signal) supplied from the timing synchronization circuit 13 to perform phase rotation. Make corrections. The OFDM frequency domain signal subjected to the phase rotation correction is supplied to the broadband carrier error calculation circuit 15, the frame synchronization circuit 18, the equalization circuit 19, and the transmission control information decoding circuit 22.
[0054]
An OFDM time domain signal is input to the guard correlation / symbol boundary detection circuit 12. The guard correlation / symbol boundary detection circuit 12 obtains a correlation value between the input OFDM time domain signal and the OFDM time domain signal delayed by an effective symbol. Here, the time length for obtaining the correlation is set to the time length of the guard interval. Therefore, a signal indicating this correlation value (hereinafter referred to as a guard interval correlation signal) is a signal that has a peak at the OFDM symbol boundary position. The guard correlation / symbol boundary detection circuit 12 detects the peak position of the guard interval correlation signal and outputs the timing of the peak position as the symbol boundary timing (Np).
[0055]
The symbol boundary timing Np output from the guard correlation / symbol boundary detection circuit 12 is supplied to the timing synchronization circuit 13, and the phase of the correlation value at the peak timing is supplied to the narrowband carrier frequency error calculation circuit 14.
[0056]
The timing synchronization circuit 13 performs, for example, filtering processing on the symbol boundary timing Np output from the guard correlation / symbol boundary detection circuit 12, and determines the calculation start timing for performing the FFT calculation based on the result. The calculation start timing is supplied to the FFT calculation circuit 10 as a start flag. Based on the start flag, the FFT operation circuit 10 extracts an FFT operation range signal from the input OFDM time domain signal and performs an FFT operation. In addition, the timing synchronization circuit 13 calculates a phase rotation amount that occurs due to a time lag between the boundary position of the filtered OFDM symbol and the calculation start timing for performing the FFT operation, and performs phase correction based on the calculated phase rotation amount. A signal (complex signal) is generated and supplied to the phase correction circuit 11.
[0057]
The narrowband carrier error calculation circuit 14 calculates a narrowband carrier frequency error component indicating a narrowband component of the shift amount of the center frequency during digital orthogonal demodulation based on the phase of the correlation value at the OFDM symbol boundary position. To do. Specifically, the narrowband carrier frequency error component is a shift amount of the center frequency with an accuracy of ± 1/2 or less of the frequency interval of the subcarrier. The narrowband carrier frequency error component obtained by the narrowband carrier error calculation circuit 14 is supplied to the adder circuit 16.
[0058]
Based on the OFDM frequency domain signal output from the phase correction circuit 11, the wide band carrier error calculation circuit 15 calculates a wide band carrier frequency error component indicating a wide band component of the shift amount of the center frequency at the time of digital quadrature demodulation. The broadband carrier frequency error component is a shift amount of the center frequency of the interval accuracy of the subcarrier frequency.
[0059]
The broadband carrier frequency error component obtained by the broadband carrier error calculation circuit 15 is supplied to the addition circuit 16.
[0060]
The adder circuit 16 adds the narrowband carrier error component calculated by the narrowband carrier error detection circuit 14 and the wideband carrier error component calculated by the wideband carrier error calculation circuit 15 and outputs the result from the carrier correction circuit 9. The amount of shift of the total center frequency of the baseband OFDM signal is calculated. The adder circuit 16 outputs the calculated shift amount of the total center frequency as a frequency error value. The frequency error value output from the adder circuit 16 is supplied to the NCO 17.
[0061]
The NCO 17 is a so-called numerically controlled oscillator that generates a carrier frequency error correction signal that increases or decreases in accordance with the frequency error value output from the adder circuit 16. For example, the NCO 17 decreases the oscillation frequency of the carrier frequency error correction signal if the supplied frequency error value is a positive value, and the oscillation frequency of the error correction signal if the supplied carrier frequency error value is a negative value. Control to increase By controlling in this way, the NCO 17 generates a carrier frequency error correction signal that stabilizes the oscillation frequency when the frequency error value becomes zero.
[0062]
The frame synchronization circuit 18 detects a synchronization word inserted at a predetermined position in the OFDM transmission frame, and detects the start timing of the OFDM transmission frame. The frame synchronization circuit 18 specifies the symbol number of each OFDM symbol based on the start timing of the OFDM transmission frame and supplies it to the equalization circuit 19 and the like.
[0063]
The equalization circuit 19 performs so-called equalization processing on the OFDM frequency domain signal. The equalization circuit 19 detects a pilot signal called SP (Scattered Pilots) signal inserted in the OFDM frequency domain signal based on the symbol number supplied from the frame synchronization circuit 18. The OFDM frequency domain signal that has been equalized by the equalization circuit 19 is supplied to the demapping circuit 20.
[0064]
The demapping circuit 20 performs data reassignment processing (demapping processing) corresponding to the modulation scheme (for example, QPSK, 16QAM, or 64QAM) on the equalized OFDM frequency domain signal (complex signal). And restore the transmission data. The transmission data output from the demapping circuit 20 is supplied to the transmission path decoding circuit 21.
[0065]
The transmission path decoding circuit 21 performs transmission path decoding processing corresponding to the broadcast system on the input transmission data. For example, the transmission path decoding circuit 21 performs time deinterleaving processing corresponding to time direction interleaving processing, frequency deinterleaving processing corresponding to frequency direction interleaving, and deinterleaving corresponding to bit interleaving for error dispersion of multilevel symbols. Processing, depuncturing processing corresponding to puncturing processing to reduce transmission bits, Viterbi decoding processing for decoding convolutionally encoded bit sequences, deinterleaving processing in byte units, energy corresponding to energy spreading processing Error correction processing corresponding to despreading processing and RS encoding processing is performed.
[0066]
The transmission data subjected to transmission path decoding in this way is output as, for example, a transport stream defined by MPEG-2 Systems.
[0067]
The transmission control information decoding circuit 22 decodes transmission control information such as TMCC and TPS modulated at a predetermined position of the OFDM transmission frame.
[0068]
Guard correlation / Symbol boundary detection circuit
Next, a detailed configuration of the guard correlation / symbol boundary detection circuit 12 will be described.
[0069]
FIG. 2 shows a block configuration diagram of the guard correlation / symbol boundary detection circuit 12. FIG. 3 shows a block configuration diagram of only the symbol boundary detection circuit in the guard correlation / symbol boundary detection circuit 12. FIG. 4 shows a timing chart of each signal in the guard correlation / symbol boundary detection circuit 12.
[0070]
As shown in FIG. 2, the guard correlation / symbol boundary detection circuit 12 detects a peak position of the guard interval correlation signal by detecting a guard correlation detection circuit 31 that generates a guard interval correlation signal indicating an autocorrelation of the guard interval. And a symbol boundary detection circuit 32 that outputs the peak position as the symbol boundary position.
[0071]
The guard correlation detection circuit 31 includes an effective symbol length delay circuit 33, a complex multiplication circuit 34, and a guard interval length integration circuit 35.
[0072]
In the guard correlation detection circuit 31, an OFDM time domain signal (r (t)) output from the carrier frequency error correction circuit 9, that is, an OFDM signal subjected to digital orthogonal demodulation, as shown in FIG. Entered. The OFDM time domain signal (r (t)) is supplied to the effective symbol length delay circuit 33 and the complex multiplication circuit 34.
[0073]
The effective symbol length delay circuit 33 is a shift register including, for example, Nu register groups, and delays an input OFDM time domain signal by an effective symbol time (Tu) as shown in FIG. . The OFDM time domain signal (r (t−Tu)) delayed by the effective symbol time by the effective symbol length delay circuit 33 is input to the complex multiplication circuit 34.
[0074]
The complex multiplication circuit 34 calculates the complex conjugate of the OFDM time domain signal delayed by the effective symbol period, and the undelayed OFDM time domain signal (r (t)) and the OFDM time domain delayed by the effective symbol period The complex conjugate signal of the signal (r (t-Tu)) is multiplied every sample. The multiplication result is input to the guard interval length integration circuit 35.
[0075]
The guard interval length integration circuit 35 includes, for example, a shift register composed of a group of registers (Ng) samples corresponding to the guard interval, and an adder that calculates the sum of the values stored in each register. A moving sum operation for each Ng samples is performed on the multiplication results sequentially input for each sample. The value output from the guard interval length integration circuit 35 is the correlation between the OFDM time domain signal (r (t)) and the OFDM time domain signal (r (t-Tu)) obtained by delaying samples corresponding to the effective symbols. Is a guard interval correlation signal.
[0076]
The guard interval correlation signal is a signal whose level is high at a portion where the correlation value is high and low at a portion where the correlation value is low. Therefore, the guard interval correlation signal is ideally a signal in which a mountain-shaped waveform having a peak at the boundary position of the OFDM symbol is repeated. The guard interval correlation signal is supplied from the guard interval length integration circuit 35 to the symbol boundary detection circuit 32.
[0077]
As shown in FIG. 3, the symbol boundary detection circuit 32 includes a square circuit 36, a symbol length period counter 37, a maximum value detection circuit 38, and a detection interval control circuit 39.
[0078]
The guard interval correlation signal output from the guard interval length integration circuit 35 is supplied to the squaring circuit 36.
[0079]
The squaring circuit 36 squares the real component (CI) and imaginary component (CQ) of the guard interval correlation signal, and adds them. As a result of the addition, a square signal ({CI indicating the amplitude component of the guard interval correlation signal as shown in FIG. 4C).²+ CQ²} (T)) is generated. The square signal of the guard interval correlation signal is supplied to the maximum value detection circuit 38. The squaring circuit 36 squares the real part and imaginary part of the guard interval correlation signal, adds them, and obtains the square root of the addition result to obtain the amplitude component of the guard interval correlation signal. Also good.
[0080]
The symbol long period counter 37 is a counter that counts the operation clock generated from the clock generation circuit 6. As shown in FIG. 4D, the count value N of the symbol long period counter 37 is incremented by 1 from 0 to Ns-1 every clock of the operation clock, and returns to 0 when exceeding Ns-1. That is, the symbol long period counter 37 is a cyclic counter that is one period in the number of samples (Ns) of the OFDM symbol. For example, here, the number of samples (Ns) in one cycle of the symbol length cycle counter 37 is set to 1088, and the count value N of the symbol length cycle counter 37 is a value that cyclically repeats 0 to 1087. The count value N of the symbol long period counter 37 is supplied to the maximum value detection circuit 38.
[0081]
As shown in FIG. 4E, the maximum value detection circuit 38 detects the timing at which the square signal of the guard interval correlation signal peaks, and detects the count value N at that timing. Specifically, the maximum value detection circuit 38 sets a detection period T that is repeated every certain period, searches the maximum value of the square signal for each detection section T, and at the timing when the maximum value is obtained. The count value N is output.
[0082]
Here, the detection section T is a section set by the detection section control circuit 39 and has the same time width as the cyclic period (0 to Ns-1) of the count value N. As a specific setting method, the detection interval T is designated using the count value N of the symbol long period counter 37. That is, the detection section T is set such as “a section where the count value N is 0 to 1087” or “a section where the count value N is 544 to 543”.
[0083]
The maximum value detection circuit 38 outputs the count value N of the maximum value obtained for each detection section T to the outside as the symbol boundary timing Np. The symbol boundary timing Np calculated in this way indicates the boundary position of the OFDM symbol.
[0084]
That is, since the symbol length period counter 37 counts the operation clock, the count value N is synchronized with the sampling timing of the OFDM time domain signal. Further, the symbol length period counter 37 has one period in terms of the number of samples (Ns) of the OFDM symbol. Therefore, if there is no noise or clock frequency error, the actual OFDM symbol boundary position is generated with the same count value N. Therefore, if the detection interval T as described above is set for the cyclic period of the symbol length cycle counter 37 and the maximum value of the guard interval correlation signal in the set detection interval T is detected, the timing is the OFDM symbol. It becomes the boundary position.
[0085]
By the way, when there is no noise, the symbol boundary timing Np can be accurately output no matter how the detection interval T is set with respect to the actual position of the OFDM symbol boundary position, but there is noise. In this case, it is desirable that the timing at which the guard interval correlation signal peaks (actual OFDM symbol boundary timing) and the detection interval T are adjusted so as to be shifted by about a half cycle. That is, it is desirable that the symbol boundary timing Np to be output is a value near the median value of the detection section T.
[0086]
The reason for the above will be described.
[0087]
The detection interval T of the maximum value detection circuit 38 is the same as the period of one cycle of the symbol length cycle counter 37. The maximum value detection circuit 38 outputs the count value of the timing at which the square value of the guard interval correlation signal is maximum in the detection interval T as the symbol boundary timing Np. Here, if the update timing of the detection section T (that is, the start position or the end position of the detection section T) and the timing when the square value of the guard interval correlation signal is maximum are close in time, originally 1 A portion with high correlation (that is, a mountain-like portion) generated by the guard interval of the previous OFDM symbol is included in the peak detection process of the next OFDM symbol period and is determined. The peak value of the guard interval correlation signal is not necessarily a constant value due to various noises and errors, and may vary from symbol to symbol. In such a case, the peak value of the guard interval was caused by the guard interval of the previous OFDM symbol. There is a possibility that the highly correlated part is determined to be the boundary position of the next OFDM symbol.
[0088]
Therefore, by adjusting the symbol boundary timing Np in advance so as to be the value of the center position of the detection section T, a highly correlated portion (mountain-like shape) generated by the guard interval of the previous OFDM symbol is adjusted. Portion) can be excluded from the determination for the next OFDM symbol, and stable peak position detection can be performed.
[0089]
The above is the reason that the symbol boundary timing Np is preferably a value near the median value of the detection section T.
[0090]
However, since this receiving apparatus is not a system in which the operation clock and the received signal are synchronized, there is a clock frequency error (an error between the transmission clock of the received OFDM signal and the operation clock). Therefore, even if the symbol boundary timing Np is in the vicinity of the median value of the detection section T, the symbol boundary timing Np gradually moves.
[0091]
Therefore, in the symbol boundary detection circuit 32, a detection interval control circuit 39 is provided so that the detection interval T can be adjusted appropriately even in such a case.
[0092]
Hereinafter, the detection section control circuit 39 will be described.
[0093]
The detection interval control circuit 39 determines the positional relationship between the value of the output symbol boundary timing Np and the currently set detection interval T, and based on the determination result, the detection interval T for the cyclic period of the count value N Change the setting.
[0094]
Specifically, the detection interval control circuit 39 determines how far the symbol boundary timing Np is from the median value of the currently set detection interval T.
[0095]
For example, if the currently set detection interval T is “the interval where the count value N is 0 to 1087”, the median value is “544”, and the currently set detection interval T is “count”. If the value N is an interval of 544 to 543, the median value is “0”, and the difference between the median value and the symbol boundary timing Np is obtained.
[0096]
Subsequently, the detection section control circuit 39 determines whether or not the distance between the symbol boundary timing Np and the median is equal to or greater than a predetermined range. That is, it is determined whether or not the symbol boundary timing Np is located near the end of the detection section T.
[0097]
As a result of the determination, if the distance between the symbol boundary timing Np and the median is less than or equal to a predetermined range, the setting of the detection section T is left as it is.
[0098]
As a result of the determination, when the distance between the symbol boundary timing Np and the median is equal to or greater than a predetermined range (when the symbol boundary timing Np is located at the end portion of the detection interval T), the detection interval T is set. To change. Specifically, as shown in FIG. 4F, the setting of the detection interval T is changed so that the symbol boundary timing Np is closer to the median value. That is, the setting of the detection section T is changed so that the symbol boundary timing Np is detected near the center of the detection section T.
[0099]
The detection interval control circuit 39 can set the symbol boundary timing Np to a value near the median value of the detection interval T by performing the control as described above.
[0100]
As described above, the OFDM receiver 1 is provided with the symbol boundary detection circuit 32 that calculates the symbol boundary timing Np of the OFDM symbol based on the autocorrelation signal (guard interval correlation signal) of the guard interval of the OFDM signal. The symbol boundary detection circuit 32 sets a detection range T that is set to be equal to the number of OFDM symbol samples, detects the detection timing of the maximum value of the guard interval correlation signal within the detection range T, and determines the timing. The symbol boundary position Np is output. Further, the symbol boundary detection circuit 32 appropriately controls the phase of the detection range T so that the symbol boundary timing Np is positioned near the center position of the detection range T.
[0101]
For this reason, the OFDM receiving apparatus 1 can eliminate the erroneous detection of the symbol boundary position and perform, for example, the symbol cut-out timing for performing the FFT operation with high accuracy, thereby improving the demodulation accuracy. it can.
[0102]
Note that the detection interval control circuit 39 does not change the setting of the detection interval T every time, for example, the case where the distance between the symbol boundary timing Np and the median is equal to or greater than a predetermined range occurs in a plurality of consecutive detection intervals. Or when the distance between the symbol boundary timing Np and the median is greater than or equal to a predetermined range and the cumulative number becomes greater than or equal to the predetermined number, the detection interval T is changed. You may make it perform. Even in such a case, when the receiving device 1 is reset (when demodulation is started), the detection range is such that the symbol boundary timing Np is immediately positioned near the center position of the detection range T. It is desirable to control the phase of T.
[0103]
In this embodiment, the case where the operation clock is asynchronous with respect to the reception signal has been described as an example. However, the operation clock and the reception signal may be synchronized by a PLL circuit or the like in the present invention. . In such a case, when the reset operation of the receiving apparatus 1 is performed (at the start of demodulation), the detection range T is set so that the symbol boundary timing Np is positioned near the center position of the detection range T only once. What is necessary is just to control a phase.
[0104]
Further, an output latch circuit 40 may be provided for the symbol boundary detection circuit 32 as shown in FIG. FIG. 6 shows a timing chart of each signal in the guard correlation / symbol boundary detection circuit 12 when the output latch circuit 40 is provided. 6A to 6F are the same as the timing when the output latch circuit 40 is not provided, and therefore the description thereof is omitted.
[0105]
As shown in FIG. 6G, the output latch circuit 40 takes in the count value output from the maximum value detection circuit 38 and stores it in the internal register at the timing when the count value N of the symbol length period counter 37 becomes zero. Then, the count value is set to a state that can be output to the outside. The count value stored in the register is output to the subsequent stage.
[0106]
By providing the output latch circuit 40 in this way, the symbol boundary timing Np can be generated outside at constant intervals even if the detection interval T is changed. Therefore, timing control of the entire apparatus can be simplified.
[0107]
Second embodiment
Next, an OFDM receiving apparatus according to the second embodiment of the present invention will be described.
[0108]
The OFDM receiver of the second embodiment of the present invention is a modification of the symbol boundary detection circuit 32 of the OFDM receiver 1 of the first embodiment, and is otherwise the same as the first embodiment. It is. Therefore, for the OFDM receiver of the second embodiment of the present invention, only the symbol boundary calculation circuit will be described, and the same components as those of the first embodiment are denoted by the same reference numerals in the drawings. In addition, the detailed description is omitted.
[0109]
FIG. 7 is a block diagram of the symbol boundary detection circuit 50 in the OFDM receiving apparatus according to the second embodiment. FIG. 8 shows a timing chart of each signal in the guard correlation / symbol boundary detection circuit 12 having the symbol boundary detection circuit 50. 8A to 8D are the same as those in the first embodiment, and the description thereof is omitted.
[0110]
As shown in FIG. 7, the symbol boundary detection circuit 50 includes a squaring circuit 36, a symbol length period counter 37, first to nth maximum value detection circuits 51-1 to 51-n, a selector 52, and a detection. And a section selection circuit 53.
[0111]
The count value N of the symbol long period counter 37 is supplied to each of the first to n-th maximum value detection circuits 51-1 to 51-n.
[0112]
As shown in FIGS. 8D and 8E, the first to n-th maximum value detection circuits 51-1 to 51-n each have a timing at which the square signal of the guard interval correlation signal peaks. And the count value N at that timing is detected. Specifically, the first to n-th maximum value detection circuits 51-1 to 51-n are set with a detection period T that is repeated at regular intervals, and the maximum value of the square signal is set for each detection section T. The search is performed, and the count value N at the timing when the maximum value is obtained is output. FIG. 8 shows an example in the case of n = 2.
[0113]
Here, the detection interval T is a preset interval, and is an interval having the same time width as the cyclic period (0 to Ns-1) of the count value N. As a specific setting method, the detection interval T is designated using the count value N of the symbol long period counter 37. That is, the detection section T is set such as “a section where the count value N is 0 to 1087” or “a section where the count value N is 544 to 543”.
[0114]
Further, the detection sections T set in the first to nth maximum value detection circuits 51-1 to 51-n are shifted in phase from each other.
[0115]
For example, in the first maximum value detection circuit 51-1, the detection interval T is set to "the interval in which the count value N is 0 to Ns", and the second maximum value detection circuit 51-2 has the "count value N is {Ns / (N-1) to [(Ns-1) + (Ns / (n-1)) mod Ns]} ", the detection period T is set, and the nth maximum value detection circuit 51-n is" Count value N is an interval between {((Ns−1) × Ns) / (n−1) to [(Ns−1) + ((n−2) × Ns) / (n−1)) mod Ns]} "Is set to the detection period T.
[0116]
The first to n-th maximum value detection circuits 51-1 to 51-n output the count value N of the maximum value obtained for each detection section T to the selector 52 as the symbol boundary timing Np.
[0117]
The selector 52 selects any one of the n symbol boundary timings Np output from the first to n-th maximum value detection circuits 51-1 to 51-n according to the setting of the detection interval selection circuit 53. And output to the outside.
[0118]
The detection section selection circuit 53 supplies a selection signal for selecting any one of the first to n-th maximum value detection circuits 51-1 to 51-n to the selector 52. .
[0119]
Further, the detection interval selection circuit 53 determines the positional relationship between the value of the symbol boundary timing Np output from the selector 52 and the detection interval T in the currently set maximum value detection circuit 51, and the determination result is Based on this, the setting of the detection interval T for the cyclic period of the count value N is obtained,
A corresponding new maximum value detection circuit 51 is selected.
[0120]
Specifically, the detection interval selection circuit 53 determines how far the symbol boundary timing Np from the selector 52 is from the currently set median value of the detection interval T.
[0121]
For example, if the currently set detection interval T is “the interval where the count value N is 0 to 1087”, the median value is “544”, and the currently set detection interval T is “count”. If the value N is an interval of 544 to 543, the median value is “0”, and the difference between the median value and the symbol boundary timing Np is obtained.
[0122]
Subsequently, the detection section selection circuit 53 determines whether or not the distance between the symbol boundary timing Np and the median is equal to or greater than a predetermined range. That is, it is determined whether or not the symbol boundary timing Np is located near the end of the detection section T.
[0123]
As a result of the determination, if the distance between the symbol boundary timing Np and the median is less than or equal to a predetermined range, the setting of the selected maximum value detection circuit 51 is left as it is.
[0124]
As a result of the determination, when the distance between the symbol boundary timing Np and the median is equal to or greater than a predetermined range (when the symbol boundary timing Np is located at the end portion of the detection interval T), the detection interval T is set. And the maximum value detection circuit 51 is newly selected.
[0125]
Specifically, as shown in FIG. 8G, the maximum value detection circuit 51 having the detection section T is selected such that the symbol boundary timing Np is closer to the median value. That is, the maximum value detection circuit 51 having the detection section T in which the symbol boundary timing Np is detected near the center is selected.
[0126]
The detection section selection circuit 53 can set the symbol boundary timing Np to a value near the median value of the detection section T by performing the selection as described above.
[0127]
As described above, in the OFDM receiving apparatus according to the second embodiment of the present invention, the symbol boundary detection circuit calculates the symbol boundary timing Np of the OFDM symbol based on the autocorrelation signal (guard interval correlation signal) of the guard interval of the OFDM signal. 50 is provided. The symbol boundary detection circuit 50 sets a plurality of detection ranges T that are set to the same number as the number of OFDM symbol samples and have different phases, and detects the detection timing of the maximum value of the guard interval correlation signal within each detection range T. And output as symbol boundary timing Np. Further, the symbol boundary detection circuit 50 selects an optimum detection range from the plurality of detection ranges T so that the symbol boundary timing Np is positioned near the center position.
[0128]
For this reason, in the OFDM receiving apparatus according to the second embodiment of the present invention, it is possible to eliminate the erroneous detection of the symbol boundary position and perform, for example, the symbol extraction timing for performing the FFT operation with high accuracy. Therefore, the demodulation accuracy can be improved.
[0129]
The detection interval selection circuit 53 does not change the setting of the detection interval T every time, and for example, the case where the distance between the symbol boundary timing Np and the median is equal to or greater than a predetermined range occurs in a plurality of consecutive detection intervals. Or when the distance between the symbol boundary timing Np and the median is greater than or equal to a predetermined range and the cumulative number becomes greater than or equal to the predetermined number, the detection interval T is changed. You may make it perform. Even in such a case, when the reset operation of the receiving apparatus 1 is performed (at the start of demodulation), a detection range in which the symbol boundary timing Np is immediately located near the center position of the detection range T. It is desirable to select T.
[0130]
Also in the second embodiment, the operation clock is asynchronous to the received signal as in the first embodiment, but the operation clock and the received signal may be synchronized by a PLL circuit or the like. good. In such a case, when the receiving apparatus 1 is reset (at the start of demodulation), the detection range T is selected only once so that the symbol boundary timing Np is positioned near the center position. good.
[0131]
Further, an output latch circuit 54 may be provided for the symbol boundary detection circuit 50 as shown in FIG. FIG. 10 shows a timing chart of each signal in the guard correlation / symbol boundary detection circuit 50 when the output latch circuit 54 is provided. 10A to 10H are the same as the timing when the output latch circuit 54 is not provided, and thus the description thereof is omitted.
[0132]
As shown in FIG. 10H, the output latch circuit 54 takes in the symbol boundary timing Np output from the selector 52 at the timing when the count value N of the symbol length period counter 37 becomes 0, and stores it in the internal register. The count value is set to a state where it can be output to the outside. The count value stored in the register is output to the subsequent stage.
[0133]
By providing the output latch circuit 54 in this way, the symbol boundary timing Np can be generated outside at regular intervals even if the detection interval T is changed. Therefore, timing control of the entire apparatus can be simplified.
[0134]
【The invention's effect】
In the OFDM demodulating apparatus and method according to the present invention, the symbol boundary position is calculated based on the autocorrelation of the guard interval of the OFDM signal, and the detection range set to the time interval period of the transmission symbol when calculating the symbol boundary position Is detected, the sample timing of the maximum value of the autocorrelation value within the detection range is detected, and the detected timing is output as the symbol boundary position. Further, in the present invention, phase control is performed so that the detection range becomes an optimal position.
[0135]
For this reason, the OFDM demodulator and method according to the present invention can eliminate erroneous detection of symbol boundary positions and improve detection accuracy.
[Brief description of the drawings]
FIG. 1 is a block configuration diagram of an OFDM receiver according to a first embodiment of this invention.
FIG. 2 is a block configuration diagram of a guard correlation / symbol boundary detection circuit of the OFDM receiver according to the first embodiment of this invention.
FIG. 3 is a block configuration diagram of a symbol boundary detection circuit in a guard correlation / symbol boundary detection circuit.
FIG. 4 is a timing chart of each signal in the guard correlation / symbol boundary detection circuit.
5 is a block diagram showing a modification in which an output latch circuit is provided in the symbol boundary detection circuit shown in FIG. 3; FIG.
6 is a timing chart of each signal in the symbol boundary detection circuit shown in FIG.
FIG. 7 is a block configuration diagram of a symbol boundary detection circuit of an OFDM receiver according to a second embodiment of this invention.
FIG. 8 is a timing chart of each signal in the guard correlation / symbol boundary detection circuit according to the second embodiment of the present invention;
9 is a block diagram showing a modification in which an output latch circuit is provided in the symbol boundary detection circuit shown in FIG.
10 is a timing chart of each signal in the symbol boundary detection circuit shown in FIG. 9;
FIG. 11 is a diagram illustrating a symbol configuration of an OFDM signal.
FIG. 12 is a block configuration diagram of a symbol synchronization circuit of a conventional OFDM demodulator.
FIG. 13 is a block configuration diagram of a symbol boundary detection circuit in a symbol synchronization circuit of a conventional OFDM demodulator.
FIG. 14 is a timing chart of each signal in a conventional symbol synchronization circuit.
[Explanation of symbols]
1 OFDM receiver, 2 antenna, 3 tuner, 4 band pass filter, 5 A / D conversion circuit, 6 clock generation circuit, 7 DC cancellation circuit, 8 digital quadrature demodulation circuit, 9 carrier frequency error correction circuit, 10 FFT operation circuit 11 phase correction circuit, 12 guard correlation / symbol boundary detection circuit, 13 timing synchronization circuit, 14 narrowband carrier error calculation circuit, 15 wideband carrier error calculation circuit, 16 addition circuit, 17 numerical control oscillation circuit, 18 frame synchronization circuit, 19 equalization circuit, 20 demapping circuit, 21 transmission path decoding circuit, 22 transmission control information decoding circuit

Claims (20)

A transmission including an effective symbol generated by time-division-modulating an information sequence into a plurality of subcarriers and a guard interval generated by copying a part of the signal waveform of the effective symbol In an OFDM demodulator that demodulates an Orthogonal Frequency Division Multiplex (OFDM) signal with symbols as transmission units,
Count means for generating a count value that is incremented in synchronization with a reference clock and that is cyclically repeated at a period corresponding to the time interval of the transmission symbol;
A detection cycle control means for setting a detection cycle repeated at the same cycle as the cyclic cycle of the count value, and controlling the phase of the detection cycle with respect to the cyclic cycle of the count value;
Symbol boundary detecting means for detecting a maximum value of the autocorrelation value of the guard interval portion of the OFDM signal within the detection period and outputting a count value at which the maximum value is generated as a symbol boundary position for each detection period; Prepared,
The OFDM demodulator according to claim 1, wherein the detection cycle control means controls a phase of the detection cycle with respect to a cyclic cycle of the count value according to a position where the maximum value is generated within the detection cycle. The detection cycle control means moves the maximum value generation position toward the center of the detection cycle when the generation position of the maximum value is not included within a predetermined range from the center position of the detection cycle. The OFDM demodulator according to claim 1, wherein the phase of the detection period is controlled with respect to the cyclic period of the count value. When the state where the maximum value generation position is not included in a predetermined range from the center position of the detection cycle occurs a plurality of times, the detection cycle control means determines that the maximum value generation position is the detection cycle. 3. The OFDM demodulator according to claim 2, wherein a phase of the detection period with respect to a cyclic period of the count value is controlled so as to move in a central direction of the count value. If the state where the maximum value generation position is not included within a predetermined range from the center position of the detection period occurs at the start of the demodulation operation, the detection cycle control means is configured to generate the maximum value generation position. 4. The OFDM demodulator according to claim 3, wherein the phase of the detection period with respect to the cyclic period of the count value is immediately controlled so that the signal moves in the center direction of the detection period. Latch means for latching the symbol boundary position output from the symbol boundary detection means;
2. The OFDM demodulator according to claim 1, wherein the latch means captures the symbol boundary position based on a cyclic period of the count value of the count means. A transmission including an effective symbol generated by time-division-modulating an information sequence into a plurality of subcarriers and a guard interval generated by copying a part of the signal waveform of the effective symbol In an OFDM demodulator that demodulates an Orthogonal Frequency Division Multiplex (OFDM) signal with symbols as transmission units,
Count means for generating a count value that is incremented in synchronization with a reference clock and that is cyclically repeated at a period corresponding to the time interval of the transmission symbol;
A detection cycle that is repeated at the same cycle as the cyclic cycle of the count value is set, and the maximum value of the autocorrelation value of the guard interval portion of the OFDM signal within the detection cycle is detected and the maximum value is generated A plurality of symbol boundary detection means for outputting the counted value for each detection period;
A selection output unit that selects any one of the plurality of symbol boundary detection units and outputs a count value output from the selected symbol boundary detection unit as a symbol boundary position;
In the plurality of symbol boundary detection means, detection periods are set to phases different from each other,
The selection output means selects any one of the symbol boundary detection means according to the position where the maximum value is generated within the detection cycle set in the selected symbol boundary detection means. OFDM demodulator. The detection cycle selection unit determines that the generation position of the maximum value is not included in a predetermined range from the center position of the detection cycle set in the symbol boundary detection unit. 7. The OFDM demodulator according to claim 6, wherein a symbol boundary detecting means having a phase detection period that moves in the center direction of the detection period is selected. The detection cycle selection means, when a state where the generation position of the maximum value is not included within a predetermined range from the center position of the detection period set in the symbol boundary detection means occurs a plurality of times 8. The OFDM demodulator according to claim 7, wherein a symbol boundary detecting means having a phase detection period such that a value generation position moves in a central direction of the detection period is selected. The detection cycle selection unit is configured such that a state where the generation position of the maximum value is not included within a predetermined range from the center position of the detection cycle set in the symbol boundary detection unit occurs at the start of the demodulation operation. 9. The OFDM demodulator according to claim 8, wherein a symbol boundary detection unit having a phase detection period in which the generation position of the maximum value moves toward the center of the detection period is immediately selected. Latch means for latching the symbol boundary position output from the selection output means;
7. The OFDM demodulator according to claim 6, wherein the latch means captures the symbol boundary position based on a cyclic period of the count value of the count means. A transmission including an effective symbol generated by time-division-modulating an information sequence into a plurality of subcarriers and a guard interval generated by copying a part of the signal waveform of the effective symbol In an OFDM demodulation method for demodulating an Orthogonal Frequency Division Multiplex (OFDM) signal with symbols as transmission units,
A count value that is incremented in synchronization with the reference clock and generates a count value that is cyclically repeated at a period corresponding to the time interval of the transmission symbol,
Set a detection cycle that is repeated in the same cycle as the cyclic cycle of the count value,
Detecting the maximum value of the autocorrelation value of the guard interval portion of the OFDM signal within the detection period, and outputting the count value at which the maximum value is generated as a symbol boundary position for each detection period;
An OFDM demodulation method, comprising: controlling a phase of the detection period with respect to a cyclic period of the count value in accordance with a position where the maximum value is generated within the detection period. When the generation position of the maximum value is not included within a predetermined range from the center position of the detection cycle, the count value of the count value is set so that the generation position of the maximum value moves toward the center of the detection cycle. 12. The OFDM demodulation method according to claim 11, wherein the phase of the detection period with respect to the cyclic period is controlled. When a state where the generation position of the maximum value is not included within a predetermined range from the center position of the detection cycle occurs a plurality of times, the generation position of the maximum value moves in the center direction of the detection cycle. 13. The OFDM demodulation method according to claim 12, further comprising controlling a phase of the detection period with respect to a cyclic period of the count value. When a state where the maximum value generation position is not included in a predetermined range from the center position of the detection cycle occurs at the start of the demodulation operation, the maximum value generation position is the center direction of the detection cycle. 14. The OFDM demodulation method according to claim 13, wherein the phase of the detection period with respect to the cyclic period of the count value is immediately controlled so as to move to (1). 12. The OFDM demodulation method according to claim 11, wherein the symbol boundary position is latched based on the cyclic period of the count value, and the latched symbol boundary position is output to the outside. A transmission including an effective symbol generated by time-division-modulating an information sequence into a plurality of subcarriers and a guard interval generated by copying a part of the signal waveform of the effective symbol In an OFDM demodulation method for demodulating an Orthogonal Frequency Division Multiplex (OFDM) signal with symbols as transmission units,
Detecting a count value that is incremented in synchronization with the reference clock and that is cyclically repeated at a period corresponding to the time interval of the transmission symbol, and is repeated at the same period as the cyclic period of the count value The periods are set with different phases, the maximum value of the autocorrelation value of the guard interval part of the OFDM signal within the detection period is detected, and the count value at which the maximum value is generated is detected for each detection period. Select any one of a plurality of symbol boundary detectors to output, and output the count value output from the selected symbol boundary detector as a symbol boundary position,
An OFDM demodulation method, wherein one symbol boundary detector is selected in accordance with a position where the maximum value is generated within a detection period set for a selected symbol boundary detector. If the position where the maximum value is generated is not included within a predetermined range from the center position of the detection cycle set in the symbol boundary detector, the position where the maximum value is generated moves toward the center of the detection period. 17. The OFDM demodulation method according to claim 16, wherein a symbol boundary detector having such a phase detection period is selected. When the maximum value generation position does not fall within a predetermined range from the center position of the detection cycle set in the symbol boundary detector, the maximum value generation position is detected. 18. The OFDM demodulation method according to claim 17, wherein a symbol boundary detector having a phase detection period that moves in the center direction of the period is selected. When the state where the maximum value generation position is not included in the predetermined range from the center position of the detection cycle set in the symbol boundary detector occurs at the start of the demodulation operation, the generation of the maximum value is performed. 19. The OFDM demodulation method according to claim 18, wherein a symbol boundary detector having a phase detection period whose position moves in the center direction of the detection period is immediately selected. 17. The OFDM demodulation method according to claim 16, wherein the symbol boundary position is latched based on the cyclic period of the count value, and the latched symbol boundary position is output to the outside.

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