JP4107570B2 - Control method of self-excited converter - Google Patents

Description

【００２６】
（４）式の正相成分をフェーザ表示すると、ｖ_１＝ｊωＬｉ_１となり、従来変換器の非干渉瞬時電流制御で用いられている変換器電圧・電流関係式となる。即ち、各相の漏れインダクタンスが平衡である時は、連系点電圧と変換器出力電圧の正相分で変換器の正相電流出力が制御できる。これはＲ＝Ｒ_ａ＋Ｒ_ｂ＋Ｒ_ｃとしても同様である。
【００２７】
次に、各相の漏れインダクタンスが不平衡である場合を検討する。変換器用変圧器は中性点電位変動を考慮しなくて済むように、通常変換器側である２次側巻線をΔ結線としている。したがって変圧器巻線にΔ結線を含む場合、零相電流は巻線内で打消されるため変換器は零相電流を出力することができない。なおＹ結線の場合において零相成分を考慮する場合は、（３）式の零相成分を残しておけばよい。
【００２８】
但し、電力回路では一般的にΔ結線を用いるため、以下の議論は零相を省略して行なう。このため、以下では正・逆相成分についてのみ考える。正相・逆相の電圧・電流各成分を回転ベクトルとして考えると、（３）式の正相・逆相成分は（５）式で表される。
【００２９】
【数２】

【００３０】
ここでＥ_１ｄ＝０，Ｅ_１ｑ＝Ｅ_１，Ｅ_２ｄ＝０，Ｅ_２ｑ＝Ｅ_２となるよう（５）式を、正相・逆相成分が各々角速度ω，−ωで回転する回転座標系へｄ−ｑ変換すると、正相・逆相各々の直軸・横軸成分は（６）式となる。
即ち、変換器出力電圧の各成分は、対応する連系点電圧及び相回転が同じ変換器電流の成分と、相回転が異なる変換器電流の成分で表わされることが分かる。ここで抵抗分を考慮しなければ、変換器出力電圧の各成分は、対応する連系点電圧及び相回転は同じであるが軸を異にする変換器電流の成分と、相回転が異なる変換器電流の成分で表される。
【００３１】
【数３】

【００３２】
上記で導出した各式を制御に適用するには、連系点電圧等の正相・逆相各々の直軸・横軸成分と、ｄ−ｑ変換するための回転角を求める必要がある。
ここでは実時間計算を行なうＤＦＴを用いて、交流連系点電圧の正相・逆相各々に対する直軸・横軸成分を求める方法を説明する。
【００３３】
サンプリング間隔がＴ_ｓ（Ｓｅｃ）、交流電圧の基本波１周期がＮサンプルに相当する場合の実時間ＤＦＴ処理において、サンプル点ｋで蓄積している交流電圧のデータサンプルｖ（ｋ），ｖ（ｋ−１）……を離散フーリエ変換して得られる基本波成分のフーリエ係数（ａ（ｋ），ｂ（ｋ））は下記（７）式で示される。
【００３４】
（７）式で示した通常のＤＦＴ計算アルゴリズムでは、計算量が多く高速サンプリング化が困難であるため、下記（８）式のようにフーリエ変換を行うサンプル点ｋに対して乗算値を時変させ、積和計算量の削減を図る再帰的アルゴリズムを適用する。再帰的アルゴリズムでは通常のＤＦＴ計算アルゴリズムに対して積和演算量は１／Ｎとなり、高速サンプリングが要求される制御系への適用が容易となる。但し、再帰的アルゴリズムは数値誤差が蓄積して検出誤差となる欠点があり、蓄積する数値誤差を以下に記述するように定期的にリセットすることにより、制御サンプル毎に加算処理が一回分増えるだけで、計算負荷を殆ど増加させずに検出誤差を解消することができる。
【００３５】
【数４】

【００３６】
ここで数値誤差蓄積のリセット方法について説明する。
再帰的アルゴリズムを適用したＤＦＴでは、前サンプル時点のフーリエ係数に対して、新たにサンプルしたデータと乗数との積と、ｉＮサンプル前に求めた積算結果を各々加減算することにより、現サンプルに対するフーリエ係数の値を得る。加減算を繰り返すことで数値誤差が蓄積するため、適当な間隔でこれをリセットする必要がある。特に固定小数点や仮数部のビット数の少ない浮動小数点のプロセッサを使用する場合、入力信号に重畳されたノイズが大きい場合及び、ＤＦＴ計算を行う交流電圧基本波の周期数ｉが大きい場合には不可欠となる。提案数値誤差蓄積のリセット方法は以下のようになる。
【００３７】
再帰的アルゴリズムを適用したＤＦＴによる位相検出に対し、ＤＦＴ計算の基準点での交流電圧の位相は、検出誤差の発生に対して時間軸上では影響するが、誤差の極値に対しては影響しない。また、周波数を用いた検出位相の誤差補正及び、検出位相を用いた周波数の検出に対しても影響を及ぼさない。従って、検出誤差への影響無しにＤＦＴ計算の基準点として任意の時点を用いることが出来るため、ＤＦＴの動作を基準とした数値誤差蓄積のリセットアルゴリズムを考案した。但し、リセットの周期も任意の値を選ぶことが可能であるが、リセット時には新たなフーリエ係数を用意する必要があり、これを容易にするためＤＦＴの処理サイクルに同期したリセット周期を設定する。
【００３８】
図３は本提案リセットアルゴリズムを組み込んだ、ｉ周期の交流電圧に対する再帰的アルゴリズムによるＤＦＴ処理のフローチャートを示す。図中のｋは、サンプル点を示すサンプリング毎に１増えるカウンタであり、値は０〜iN-1をとる。ｋ＝iN-1となった時、ｉ周期に一回のリセット動作を行う。リセット動作のために、各サンプリング毎にリセット用の位相情報のためのデータＸresに、サンプルデータｖと乗数exp（j２πk／N）の積Ｘnowを加算しており、リセット時にその時点までのＤＦＴ算出結果Ｘ1と入れ替え、Ｘresの方は０クリアする構成となっている。
【００３９】
リセット動作のために各サンプルに対して新たに必要となる処理は、Ｘres＝Ｘres＋Ｘnowの部分だけであり、処理の増加量は非常に少ない。なお、ｋ＝iN-1の条件判断を一方にまとめることは可能であるが、処理の流れを分かりやすくするため両者を分離して表示している。
上記の方法を用いることにより、電圧零クロス点検出等を用いないでも容易に数値誤差蓄積のリセットが可能となる。
【００４０】
図４は、本提案した数値誤差蓄積リセットアルゴリズムを組み込んだ場合に必要となる計算機の処理能力を示す図である。
高速サンプリング化した場合でも、リセット動作に関わる計算増加量は小さく抑えられる。
【００４１】
一方、零クロス点等のタイミングを用いてリセットを行う場合、リセット間隔が一定になる保証が無いため提案手法が使用できない。
従って、リセット時には、iN回の積和計算を行い、その時点の正確な位相を求めなおす必要があるために、ピークの計算機処理能力は通常のＤＦＴ計算アルゴリズムと同等になり、再帰的アルゴリズムを適用する利点が小さくなる。換言すれば、提案リセット方式は、リセットに要する演算を各サンプリング時に均等に配分させる方式であり、零クロス点等のタイミングを用いてリセットを行う方式に比べ、再帰的アルゴリズムによるＤＦＴに適した方式であるといえる。
【００４２】
既に説明したように、本実施の形態では変換器用変圧器２次側巻線をΔ結線としたため、零相分を計算しなくてもよい。又、ＤＦＴの演算量を減ずるようにしているため、３相の各相電圧を（９）式のα−β変換して得られた電圧に対してＤＦＴ処理を行う。ｅ_α，ｅ_βを（８）式でＤＦＴ計算して得られた基本波成分のα，β相電圧ベクトル＊を（１０）式のようにおく。
なお、＊＊は下記を意味する。
記

【００４３】
【数５】

【００４４】
このα，β相電圧ベクトルより正相・逆相電圧は（１１）式になる。
ｄ−ｑ変換では、Ｅ_１ｄ＝０，Ｅ_１ｑ＝Ｅ_１，Ｅ_２ｄ＝０，Ｅ_２ｑ＝Ｅ_２となるようにするため、正相・逆相各々のｄ−ｑ変換に用いる回転角θ_１，θ_２は（１２）式で求められる。変換器電流の正相・逆相分も、電圧と同様にして求めることができる。なお、電流の正相・逆相各々のｄ−ｑ変換に用いる回転角θ_１，θ_２は、電圧ベクトルにより算出されたものを用いる。
【００４５】
【数６】

【００４６】
上記したように、導出した変換器電圧・電流，連系点電圧の関係式である（６）式と、実時間で検出できる連系点電圧，変換器電流の正相・逆相成分及び、ｄ−ｑ変換の回転角を用いて、変換器用変圧器の漏れインピーダンスが不平衡な場合においても、対応できる自励式変換器の出力電流制御系を作成する。なお、基本波のみを対象とした場合で、逆相出力電流を０とする場合には、従来のＰＬＬによる位相を用いてｄ−ｑ変換することも可能である。
【００４７】
先ず、（６）式に示した変換器出力電圧の右辺を、（１３），（１４）式に示すように、左辺の変換器出力電圧の相回転と同じ回転方向となる成分と、回転方向が異なる成分とに分けて考える。
【００４８】
【数７】

【００４９】
ｎ次対称分を実時間ＤＦＴを基にして抽出し、変換器制御に用いる場合を説明する。（１）式より、ｎ次正相分を抽出すると（１５）式のように表される。同様に、ｎ次逆相分を抽出すると（１６）式のように表される。
ここで（１７）式に示すように、ｎ次対称分位相（θ_ｎ１，θ_ｎ２）を用いて、各々のｄ−ｑ座標系へ変換することを考える。
【００５０】
【数８】

【００５１】
（１５），（１６）式より、ｎ次対称分の変換器電圧・電流方程式は（１８）式で表される。対称分の混在する周波数領域では微分項の影響が残っている。しかし、実時間ＤＦＴの解析対象とする周波数成分に対して、正相分・逆相分を異なる周波数成分としてとらえて分離することにより、微分項の影響は消去される。
【００５２】
図５は制御部内にある周波数・対称分領域での変換器制御系の構成例を示し、ここでは周波数・対称分領域での変換電圧・電流方程式と，実時間ＤＦＴで検出できる連系点電圧ｅ_ａ，ｅ_ｂ，ｅ_ｃと変換器電流ｉ_ａ，ｉ_ｂ，ｉ_ｃの各周波数・対応分を用いる。図５において、３１はα-β変換回路，３２は処理部，３３は変換器電流制御系，ＰＷＭ指令値Ｖ_{ａ ｒｅｆ}，Ｖ_{ｂ ｒｅｆ}，Ｖ_{ｃ ｒｅｆ}を示す。零相補償を行う場合は、図５の３１はα−β−０変換とする。また、従来のＰＬＬを用いた自励式変換器制御系の拡張として適用する場合は図５の３２のＤＦＴの部分はＰＬＬとし、ＰＬＬの検出位相を用いて対称座標変換後を行う。
【００５３】
即ち、連系点電圧・変換器電流の各次対称分をＤＦＴ処理により抽出し、各々で電流制御を行った後、出力合成することで指令値が得られる。又、ある周波数・対称分の検出系・電流制御系ブロックを並列（点線）に接続することで、制御対称とする高調波成分の数を増加させることが可能である。なお、ＰＬＬを用いる場合は、対称座標変換した後にローパスフィルタ等を用いた処理により、各次対称分を抽出する。
【００５４】
なお、上記実時間ＤＦＴ処理において、フーリエ変換を行うサンプル点ｋに対して乗数を時変させるために、再帰的アルゴリズムを適用し、積和計算量を削減すると共に、この時生じる数値誤差蓄積を定期的にクリアすることにより、演算量を殆ど増加させずに検出誤差を解消したことは既に説明した通りである。
【００５５】
図６は、図５の変換器電流制御系の構成例である。各次対称成分に対する変換器電圧・電流方程式に基づいた、入力の相回転と同じ相回転の出力に対する制御部となっている。又、変圧器を含む変換器のモデル化や検出系の精度が悪い場合は制御の定常誤差が発生するため、このモデル化誤差を補償するためにＰＩ制御も考慮した。
【００５６】
各次周波数成分毎に＊→１：正相用，＊→２：逆相用とすることで、各周波数・対称分での出力が得られる。（１８）式での制御出力電圧はｄ軸，ｑ軸電圧で出力されるため、逆ｄ−ｑ変換することによりＰＷＭ制御に用いる３相信号波を生成する。インピーダンスが平衡な場合は、図５の電流制御だけで平衡出力を得ることが可能であり、たとえ連系点の電圧が不平衡な場合でも、不平衡電圧を抑制するための不平衡電流を出力することが可能である。インピーダンスが不平衡な場合は、図５の電流制御だけで平衡出力を得ることはできず、連系点の不平衡電圧の抑制もできない。
【００５７】
図７は不平衡インダクタンスに対する補償項を説明する図であり、この場合の補償項は（１４）式に記載されている。なお、（１４）式に関しては変換器出力電圧の正相・逆相成分について各々変換器の逆相・正相電流指令値で補償分を算出するため、一つの相回転系に対して図７に示す制御系を構成する。また、各相回転成分は、逆ｄ−ｑ変換により相座標系に変換し、各相に対する補正用のＰＷＭ信号波を生成する。なお、本補償方式によると不平衡な抵抗成分の補償も可能であるが、簡略化のため図には抵抗成分を記入していない。不平衡な抵抗成分を考慮する場合は、制御系にリアクタンスの他に抵抗値を制御系に付加すればよい。本補償方式は、連系点の電圧が不平衡な場合に、不平衡電圧を抑制するために不平衡電流を出力する場合にも当然有効である。
【００５８】
重複して再度説明すれば（１３），（１４）式を合わせて、ｎ次について一般化したものが（１８）式であり、基本波については後述する図８の上半分に示すような制御ブロックを構成する。制御に用いる連系点電圧，変換器電流の正相・逆相分は、既に説明した実時間ＤＦＴを用いた演算処理により求める。図８の変換器電流制御系（基本波分）において、正相分・逆相分電流制御系（平衡用）は各々図６に示した変換器電流制御系を＊→１：正相用，＊→２：逆相用としたものである。正相・逆相分不平衡補償は各々図７に示した変換器電流制御系不平衡インダクタンス補償ブロックを◎→２，＊→１：正相用，◎→１，＊→２：逆相用としたものである。これから得られる出力を加算することで、変換器出力電圧であるＰＭＷ制御の信号波を合成する。但し、ＰＬＬで検出した位相をｄ−ｑ変換に用いることも可能である。
【００５９】
前項で基本波成分についての不平衡漏れリアクタンスの補償方式について記述したが、基本波成分だけでなくｎ次の高調波成分についても、同様の制御方式を採用することにより、変圧器の漏れリアクタンスが不平衡であっても、その影響を補償し平衡な出力を得ること若しくは高調波を平衡させて零に抑制することが可能である。
【００６０】
図８は他の実施の形態を説明する構成図であり、図８において図５と同一機能部分については同一符号を付してその説明を省略する。図８によって詳しく説明すれば、図８において、α−β変換後のα相，β相の信号を点線で示すようにｎ次成分の制御系の入力とし、ｎ次ＤＦＴによる演算処理を行う以外は基本波成分の場合と同様の制御系を構成し、その出力を別の点線で示すように基本波成分および他の調波成分の制御系の出力に加えることで、変換器出力電圧であるＰＷＭ制御の信号波を合成する。これにより、ｎ次の高調波成分についても、基本波成分と同様の効果を得ることができる。以上の効果は連系点のｎ次高調波電圧が不平衡な場合に、不平衡電圧を抑制したりまたは平衡させて零出力としたりするために不平衡電流を出力する場合にも当然有効である。
【００６１】
上記構成になる不平衡は漏れインダクタンスを持つ変換器用変圧器に対応した変換器制御系について、電磁過渡現象解析プログラムのＡＴＰ（Alternative Transients Program）を用いた計算機シミュレーションにて制御効果の検証を行なった。
【００６２】
図９は計算機シミュレーションでモデル化した回路構成図を示す。自励式変圧器は漏れインダクタンスＬ_ａ，Ｌ_ｂ，Ｌ_ｃを持つ理想変圧器を介して交流系統に連系されている。そして交流系統は、変換器定格に対する短絡容量比（ＳＣＲ）が５となる線路リアクタンスＬ_ｓを介して無限大母線に接続されている。
又、計算機シミュレーションを解析するケースとして以下の４つのケースを考えた。
【００６３】
【表１】

【００６４】
図１０に示したcase１のシミュレーション結果より、変圧器漏れインダクタンスが三相平衡な場合、図１０（ｂ），（ｃ）に示すように正相電流成分の指令値変更に対して、ｄ軸・ｑ軸共に３サイクルでこれに追従し定常誤差も殆んど発生しない。又、図１０（ｄ），（ｅ）に示すように、ｄ軸・ｑ軸各々について正相電流指令値を変化させた時、過渡的に逆相電流も発生するが、定常誤差は発生しない。
【００６５】
一方、不平衡なインピーダンスに対しては、図１１（ｂ），（ｃ）に示すように、正相ｄ軸・ｑ軸の指令変更に対して、同様サイクルで定常値になるが、定常誤差を生じる。同様に図１１（ｄ），（ｅ）に示すように、逆相電流の指令値が０であるのにも関わらず、逆相電流が生じている。これは本ケースでは変換器制御系は正相分の電圧のみ出力させるため、（６）式にも示したように、不平衡インダクタンスの成分により逆相成分の電流が必然的に発生するためである。これにより、不平衡インピーダンスに対してこれを補償することなしには平衡出力を得ることができないことが分る。
【００６６】
本願の制御方式は、変圧器漏れインダクタンスと連系点電圧に基づいたフィード・フォワード制御が主体となっており、制御に用いるモデル及び検出系の精度が悪い場合、制御誤差が発生する恐れがある。ＰＩ制御等によりフィードバック補償を行うことにより、モデル化誤差が補正できるため、不平衡なインダクタンスにより生ずる誤差を、モデル化誤差と同様にＰＩのフィードバック制御により補正しようとしたのが図１２である。
【００６７】
図１２（ｂ），（ｃ）に示すように、ＰＩ制御により正相成分電流は定常誤差を制御することができるが、ベースとなるフィード・フォワード制御に要する３サイクルに加え、ＰＩ制御による追従が必要となるため制御の応答速度が低下し、追従までに６サイクル程度要している。
【００６８】
又、図１１（ｄ）に比べ、図１２（ｄ）は制御指令値に近づいているが、特に正相電流を定格出力させている場合に完全に誤差を補償するには至らず、変圧器の漏れインダクタンスの不平衡成分を、モデル化誤差としてＰＩのフィードバック制御により補償することは現実的に難しいことが分かる。
【００６９】
図１３は本願で示した漏れインダクタンスの不平衡成分の補償ブロックを変換器電流制御系に適用した場合の結果である。図１３（ｂ），（ｃ）に示す正相分の電流はｄ軸・ｑ軸共、漏れインダクタンスが平衡な場合と同時に、指令値変更に対して３サイクルで追従して定常値を得ている。
【００７０】
又、定常値には誤差を生じていない。更に逆相電流についても図１３（ｄ），（ｅ）に示すように、指令値の変更時に過渡的に制御誤差が発生するものの、速やかに収束し、誤差なく指令値の０に追従している。以上のシミュレーション結果で示したように、本願による不平衡インダクタンス成分の補償制御を行うことにより、変圧器の漏れインダクタンスが平衡・不平衡に関らず、同等の制御性能が得られるようになった。
【００７１】
【発明の効果】
以上説明したように、本発明によれば連系点電圧と変換器電圧・電流の関係を導出し、ＤＦＴ（離散フーリエ変換）によって基本波及び各次数の高調波の正相分・逆相分を分離して検出し、夫々を個別に補償するように構成したので、以下に列挙する効果を奏する。
１． 従来の回転座標変換では、ＰＬＬ等より得た位相を用いて回転座標変換していたため、正相・逆相，高調波成分の分離が難しかったが、ＤＦＴを用いて直接回転座標変換を行うので、ＤＦＴにより対称周波数成分の位相と振幅を同時に検出できて、高速な応答が可能である。
２． ＤＦＴの演算回路に再帰的アルゴリズムを採用したので積和演算量を削減でき、高速サンプリングが可能となる。また、ＤＦＴ演算の前に、α−β変換を行うことによりさらに演算量の削減を図っている。なお、再帰的アルゴリズムを使用する場合に発生する数値誤差の蓄積も、本願で示したアルゴリズムを用いることで演算量の増加が殆どなく定期的に解消できる。
３． 基本波及び各次数の高調波の正相分・逆相分を分離して制御するため、逆相分による制御誤差は発生せず、各成分を個別に制御可能である。このため、系統側の不平衡を補償することも可能である。
４． 正相分・逆相分それぞれについて、相回転と同じ方向に回転する座標系によるｄ−ｑ変換を行い、同じ相回転の成分による制御系と逆の相回転の成分による制御系の出力を合成することにより、漏れリアクタンスの不平衡を補償できる。
５． 系統側が不平衡な状態かつ、不平衡なインピーダンスの場合においても、所望の指令値どおりの出力を得ることができる。
６． ＤＦＴを用いない、ＰＬＬによる位相検出を用いた通常の制御系に提案制御方法を適用することも可能である。但しこの場合、正相・逆相，高調波検出にフィルターを適用し、各成分を分離しなければならない。
以上の効果は、各相ごとに任意のインピーダンスを持つ三相変圧器若しくは連系リアクトルなどの装置を介して三相交流電源系統または三相交流負荷系統に連系する自励式変換器一般に及ぶ。適用例としては、発電機の系統連系用インバータへの不平衡高調波補償機能の付加、不平衡補償機能付きアクティブフィルタ、不平衡補償付きSTATCOM、インバータ駆動型のモータ（誘導電動機など）でのトルク変動抑制制御などが考えられる。
【図面の簡単な説明】
【図１】本発明による自励式変換器の制御方式の実施の形態を示す全体構成図
【図２】自励式変換器の等価回路
【図３】本実施の形態で使用するリセットアルゴリズムを組込んだｉ周期の交流電圧に対する再帰的アルゴリズムによるＤＦＴ処理のフローチャート
【図４】本実施の形態で使用する数値誤差蓄積リセットアルゴリズムを組込んだ場合に必要となる計算機処理能力を示す図
【図５】制御部内にある周波数・対称分領域での変換器制御系の構成例図
【図６】図５に示す変換器電流制御系の構成例図
【図７】不平衡インダクタンスに対する補償項を説明する図
【図８】不平衡インピーダンスに対する補償項を含む、制御部内にある周波数・対称分領域での変換器制御系の構成図
【図９】効果を確認するためのシミュレーション回路図
【図１０】ケース１のシミュレーション結果図
【図１１】ケース２のシミュレーション結果図
【図１２】ケース３のシミュレーション結果図
【図１３】ケース４（本発明）のシミュレーション結果図
【符号の説明】
１：電力系統
２：連系点電圧電流検出部
３：連系用変圧器
４：インバータ
５：直流電源
６：インバータ制御部
７：出力電流指令値設定部
８：ＰＷＭ信号生成部[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an impedance imbalance in a self-excited converter linked to a three-phase AC power supply system or a three-phase AC load system via a device such as a three-phase transformer or a connected reactor having an arbitrary impedance for each phase. The present invention relates to a control method for a self-excited converter that takes into account the above.
[0002]
[Prior art]
With the progress of power electronics technology in recent years, the number of self-excited converters linked to the power system has increased. Usually, a self-excited converter is connected to the system via a transformer for transformer, but this transformer increases the leakage inductance to suppress an accident current unlike a normal AC transformer. The three-phase each phase is designed and manufactured to have the same leakage inductance.
[0003]
In order to make the leakage inductance of the transformer three-phase balanced, generally three single-phase transformers with specially designed and adjusted transformer cores and windings are used, or three-phase transformers are used. . That is, the conventional converter control system is designed on the assumption that the leakage inductance of the transformer is three-phase balanced, and the use of a transformer having a leakage inductance that is three-phase unbalanced is not considered. In some cases, an interconnected reactor is used, but even in such a case, it is assumed that the inductance is designed to have a three-phase balanced inductance.
[0004]
In addition, various proposals have been made to suppress harmonics generated on the power system side with self-excited converters. This includes a method of compensating for harmonics other than the fundamental wave collectively and harmonics by order. There is a way to compensate. In addition, a method for compensating for voltage imbalance on the system side in the event of a system failure has also been proposed, which is a voltage compensation method according to the positive and negative phases of the fundamental wave. Conventionally, the following control has been performed when performing harmonic compensation and unbalance compensation.
[0005]
First, a phase locked loop (PLL) is used for phase detection, a low-pass filter is used for separating fundamental waves, and a band-pass filter for each order is used for separating harmonics of each order. In order to separate the normal phase and the reverse phase, after rotating coordinate conversion, the normal phase is detected by a low-pass filter, and the reverse phase is detected by a band-pass filter having a double frequency. Alternatively, after the rotation coordinate conversion of the reverse phase rotation, the reverse phase component is detected by a low pass filter.
[0006]
For the separation of harmonics, for n-th order harmonics, the component is output as a direct current by rotating coordinate conversion that rotates forward and backward at a speed n times that of the fundamental wave, and other components are blocked by a low-pass filter. There is also a way to do it. There is also an example in which DFT is used for phase detection, but it detects only the phase as a simple PLL alternative.
[0007]
[Problems to be solved by the invention]
In the above-described conventional method, in the case of phase detection using a PLL, only the positive phase of the fundamental wave is detected, and the antiphase component and harmonic components cannot be detected without a low-pass filter or a band-pass filter. Also, it may take 2 to 3 cycles to synchronize, and when used in a converter, it may not be able to follow a sudden phase change such as during an accident and may generate an overcurrent.
[0008]
In addition, in a control system using a conventional PLL, even when combined with a low-pass filter or a band-pass filter, the phase of the negative phase is set as a reference phase of the positive phase of the detected fundamental wave, The n-th order harmonic can be handled only as an n-fold phase, and the n-order reversed phase can be handled only as an n-fold reversed sign phase, and the phase of each order normal phase and reversed phase cannot be handled independently.
[0009]
In addition, a band-pass filter or low-pass filter is inserted in the control circuit, and the filter characteristics change depending on the normal phase, reverse phase, and each order, so problems are likely to occur in terms of control responsiveness and stability, and control system design Becomes difficult.
[0010]
Further, since the reverse phase is detected based on the positive phase, the phase reference of the negative phase must match the positive phase. That is, it is impossible to set the negative phase output current to an arbitrary dq axis value other than 0 in order to handle the negative phase as the negative sign phase of the fundamental wave phase because the phase reference is different.
[0011]
Also, when considering the unbalanced impedance compensation by the conventional anti-phase voltage compensation circuit, anti-phase output is possible only when the interconnection point voltage has anti-phase component. Cannot compensate for unbalanced leakage inductance. In addition, since the leakage inductance of the interconnection transformer is assumed to be balanced, there is a great deal of cost for transformer production, such as special design and adjustment of the iron core and windings to accurately balance the leakage inductance. costly.
[0012]
Further, it is not possible to compensate for leakage inductance imbalance due to manufacturing errors and aging degradation, and leakage inductance imbalance allowed for cost reduction, and errors are also generated when compensating for harmonics.
[0013]
The present invention has been made in view of the above circumstances, and is a self-excited converter capable of being linked by an unbalanced impedance, including being linked by a transformer for transformer having an unbalanced leakage inductance. The purpose is to provide a control method.
[0014]
  The control method of the self-excited converter according to claim 1 of the present invention is:Connected to power systemIn the control method of the self-excited converter,The interconnection with the electric power system is a three-phase AC power supply system or a three-phase AC load system via a device such as an interconnection transformer or an interconnection reactor in which the self-excited converter has an arbitrary impedance for each phase. Having a configuration linked toAt the connection pointEach phaseInterconnection point voltage / current detection means for detecting voltage / currentDetection output fromAnd output current command value settingPartOutput fromButinputAnd an inverter control unit that performs each of the following calculations, and a PWM waveform generation unit that outputs the calculation result as an inverter control signalIt is characterized by comprising.
                                 Record
  SaidInterconnection point voltage current detection meansDetection output fromAnd output current command value settingPartOutput fromTheAs input, α-β conversionA first operation to
  About each converted value by the first calculationDFT (Discrete Fourier Transform) processingAnd thatFundamental wave and vectors of each orderamountCalculated asA second operation to
  By the second calculationCalculated fundamental and each order vectoramountSymmetric coordinate transformation based onAnd thatFundamental wave and positive phase of each order・Reversed phaseMinEachrotationSeparation calculated as vectorA third operation to
  Calculated by the third operationFundamental wave and positive phase of each order・Reversed phaseA fourth operation for separately detecting the minutes and outputting each to compensate individually as a leakage reactance imbalance compensation amount of the interconnection transformer.
[0015]
  The control method of the self-excited converter according to claim 2 of the present invention is as follows.SaidThe calculation algorithm by DFT employs a recursive algorithm having a method of periodically clearing accumulated numerical errors.
[0016]
  The control method of the self-excited converter according to claim 3 of the present invention is as follows.The control amount by the fourth calculation is calculated by the third calculation.Calculated fundamental wave and positive phase of each order・Reversed phaseMinDq transform by coordinate system rotating in the same direction of phase rotation for each, fundamental wave and positive phase of each order・Reversed phaseMinD-axis q-axiseachFor ingredients,ThatFundamental wave and positive phase of each order・Reversed phaseMinControl system with the same phase rotation component and control system output with the opposite phase rotation componentWhenThe synthesisByInterconnecting transformerOutput as leakage reactance imbalance compensation amountIt is characterized by that.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is an overall configuration diagram showing an embodiment of a control system for a self-excited converter according to the invention. In FIG. 1, reference numeral 1 denotes an electric power system or a load system, to which an interconnection transformer or an interconnection reactor 3 is connected via an interconnection point voltage / current detector 2, and the interconnection transformer or the interconnection reactor is It is connected to the inverter 4. Reference numeral 5 denotes a DC circuit such as a DC power supply, another terminal converter, or a DC capacitor.
[0019]
An inverter control unit 6 is provided for the system, to which a voltage / current detection value from the connection point voltage / current detection unit 2 and an output from the output current command value setting unit 7 are input, which will be described later. A predetermined calculation is performed and the output is input to the PWM signal generation unit 8. The resulting inverter control signal is input to the inverter 4 and SW processing is performed according to the control signal.
[0020]
The above is the outline of the overall configuration and a series of control processes. The control method aimed at by the present invention is performed by the inverter control unit 6.
In the above configuration, even if the voltage at the interconnection point is three-phase balanced, if the transformer leakage inductance is unbalanced, a balanced output cannot be obtained unless the converter output voltage is unbalanced. Become.
[0021]
For this purpose, first, a relational expression between the interconnection point voltage and the converter voltage / current is derived. Real-time DFT (Discrete Fourier Transform), which can easily calculate the positive and negative phase components, is applied to the control system of the converter, and the transformer has an unbalanced leakage inductance based on the derived relational expression. We also propose a converter control system that supports this. Finally, it is confirmed by computer simulation that the proposed control method works with the transformer leakage inductance which is unbalanced according to theory. Also, it is shown that the control using the conventional PLL can be compensated for only the fundamental wave component.
[0022]
FIG. 2 is an equivalent circuit of a self-excited converter, and the reference numerals in FIG. 2 correspond to those in FIG. In FIG. 2, an arbitrary leakage inductance (L_a, L_b, L_c) And resistance (R_a, R_b, R_cA method of deriving a relational expression of voltage / current of the converter when the self-excited converter is interconnected using a three-phase transformer having) and applying it to the converter control will be described.
[0023]
Here, the connection point voltage and the converter voltage / current relational expression are derived. The output voltage (v of the converter shown in FIG._a, V_b, V_c), Output current (i_a, I_b, I_c) And interconnection voltage (e_a, E_b, E_c), The circuit equation (1) is established for each phase according to Kirchhoff's voltage law.
[0024]
When the symmetric coordinate transformation represented by the equation (2) is applied to the circuit equation at the phase coordinates represented by the equation (1), the equation (3) is obtained.
Here, when the leakage inductance of each phase is balanced and the resistance can be ignored (L_a= L_b= L_c= L, R_a= R_b= R_c= 0) is simplified as shown in equation (4).
[0025]
[Expression 1]

[0026]
When the positive phase component of equation (4) is displayed in phaser, v₁= JωLi₁Thus, the converter voltage / current relational expression used in the conventional non-interfering instantaneous current control of the converter is obtained. That is, when the leakage inductance of each phase is balanced, the positive phase current output of the converter can be controlled by the positive phase component of the interconnection point voltage and the converter output voltage. This is R = R_a+ R_b+ R_cIt is the same.
[0027]
Next, consider the case where the leakage inductance of each phase is unbalanced. In order to avoid the need to consider the neutral point potential fluctuation, the converter transformer normally has a secondary winding on the converter side as a Δ connection. Therefore, when the transformer winding includes a Δ connection, the converter cannot output the zero-phase current because the zero-phase current is canceled in the winding. When considering the zero phase component in the case of Y connection, the zero phase component of the equation (3) may be left.
[0028]
However, since the power circuit generally uses Δ connection, the following discussion will be omitted with the zero phase omitted. Therefore, only the positive / negative phase components will be considered below. Considering the positive and negative phase voltage and current components as rotation vectors, the positive and negative phase components of equation (3) are expressed by equation (5).
[0029]
[Expression 2]

[0030]
Where E_1d= 0, E_1q= E₁, E_2d= 0, E_2q= E₂When the equation (5) is d-q converted to a rotating coordinate system in which the normal phase and reverse phase components rotate at angular velocities ω and −ω, respectively, the direct axis and horizontal axis components of the normal phase and reverse phase are ( 6)
That is, it can be seen that each component of the converter output voltage is represented by a corresponding interconnect current voltage and a component of the converter current having the same phase rotation and a component of the converter current having a different phase rotation. If the resistance component is not taken into consideration, each component of the converter output voltage is the same as the corresponding interconnection point voltage and phase rotation, but the conversion current component having a different axis and the phase rotation is different. It is represented by the component of the vessel current.
[0031]
[Equation 3]

[0032]
In order to apply the equations derived above to the control, it is necessary to obtain the direct-axis and horizontal-axis components of the positive phase and the reverse phase such as the interconnection point voltage and the rotation angle for dq conversion.
Here, a description will be given of a method for obtaining a direct axis / horizontal axis component for each of a positive phase and a negative phase of an AC interconnection point voltage using a DFT that performs real-time calculation.
[0033]
Sampling interval is T_s(Sec), AC voltage data samples v (k), v (k−1) accumulated at the sampling point k in the real-time DFT processing when one period of the fundamental wave of the AC voltage corresponds to N samples. The Fourier coefficients (a (k), b (k)) of the fundamental wave components obtained by discrete Fourier transform of... Are expressed by the following equation (7).
[0034]
In the normal DFT calculation algorithm expressed by equation (7), the amount of calculation is large and it is difficult to perform high-speed sampling. Therefore, the multiplication value is time-varying with respect to the sampling point k on which Fourier transform is performed as in the following equation (8). And apply a recursive algorithm to reduce the product-sum calculation amount. In the recursive algorithm, the product-sum operation amount is 1 / N compared to a normal DFT calculation algorithm, and it is easy to apply to a control system that requires high-speed sampling. However, the recursive algorithm has the disadvantage that numerical errors accumulate and become detection errors. By periodically resetting the accumulated numerical errors as described below, the addition process is increased by one for each control sample. Thus, the detection error can be eliminated with almost no increase in calculation load.
[0035]
[Expression 4]

[0036]
Here, a method for resetting numerical error accumulation will be described.
In the DFT to which the recursive algorithm is applied, the Fourier coefficient for the current sample is obtained by adding / subtracting the product of the newly sampled data and the multiplier to the Fourier coefficient at the previous sample time and the integration result obtained before iN samples. Get the value of the coefficient. Since numerical errors accumulate by repeating addition and subtraction, it is necessary to reset them at appropriate intervals. It is indispensable especially when using a floating-point processor with a small number of fixed-point or mantissa bits, when there is a large amount of noise superimposed on the input signal, and when the period number i of the AC voltage fundamental wave for performing DFT calculation is large. It becomes. The proposed numerical error accumulation reset method is as follows.
[0037]
In contrast to DFT phase detection using a recursive algorithm, the phase of the AC voltage at the reference point of the DFT calculation affects the occurrence of detection errors on the time axis, but does not affect the extreme value of the error. do not do. In addition, the detection phase error correction using the frequency and the frequency detection using the detection phase are not affected. Accordingly, since any time point can be used as a reference point for DFT calculation without affecting the detection error, a numerical error accumulation reset algorithm based on the DFT operation has been devised. However, any value can be selected as the reset period, but a new Fourier coefficient must be prepared at the time of reset. To facilitate this, a reset period synchronized with the DFT processing cycle is set.
[0038]
FIG. 3 shows a flowchart of DFT processing by a recursive algorithm for an i-cycle AC voltage incorporating the proposed reset algorithm. In the figure, k is a counter that increases by 1 for every sampling indicating a sample point, and takes a value from 0 to iN-1. When k = iN-1, the reset operation is performed once every i cycles. For the reset operation, the product Xnow of the sample data v and the multiplier exp (j2πk / N) is added to the data Xres for phase information for reset for each sampling, and the DFT calculation up to that point at the time of resetting The result X1 is replaced and Xres is cleared to zero.
[0039]
The only new processing required for each sample for the reset operation is Xres = Xres + Xnow, and the amount of increase in processing is very small. It should be noted that although it is possible to combine the condition judgments of k = iN−1 into one, the two are separated and displayed for easy understanding of the flow of processing.
By using the above method, it is possible to easily reset numerical error accumulation without using voltage zero cross point detection or the like.
[0040]
FIG. 4 is a diagram showing the processing capacity of a computer required when the proposed numerical error accumulation reset algorithm is incorporated.
Even when high-speed sampling is performed, the amount of calculation increase related to the reset operation can be kept small.
[0041]
On the other hand, when reset is performed using timing such as a zero cross point, the proposed method cannot be used because there is no guarantee that the reset interval is constant.
Therefore, when resetting, it is necessary to perform iN product-sum calculations and recalculate the exact phase at that time, so the peak computer processing capacity is equivalent to the normal DFT calculation algorithm, and a recursive algorithm is applied. The advantage to be reduced. In other words, the proposed reset method is a method in which operations required for reset are evenly distributed at the time of each sampling, and is a method suitable for DFT using a recursive algorithm, compared to a method of performing reset using timing such as a zero cross point. You can say that.
[0042]
As already described, since the transformer transformer secondary winding is Δ-connected in the present embodiment, the zero-phase component need not be calculated. Further, since the calculation amount of DFT is reduced, DFT processing is performed on the voltage obtained by performing α-β conversion of each phase voltage of the three phases of equation (9). e_α, E_βThe α and β-phase voltage vectors * of the fundamental wave components obtained by DFT calculation using Eq. (8) are set as shown in Eq. (10).
In addition, ** means the following.
Record

[0043]
[Equation 5]

[0044]
From the α and β phase voltage vectors, the normal phase / reverse phase voltage is expressed by equation (11).
For dq conversion, E_1d= 0, E_1q= E₁, E_2d= 0, E_2q= E₂Rotation angle θ used for dq conversion in each of normal phase and reverse phase₁, Θ₂Is obtained by equation (12). The normal phase and reverse phase components of the converter current can be obtained in the same manner as the voltage. Note that the rotation angle θ used for the dq conversion of each of the positive and negative phases of the current₁, Θ₂Is calculated using a voltage vector.
[0045]
[Formula 6]

[0046]
As described above, the relational expression of the derived converter voltage / current and connection point voltage (6), the connection point voltage that can be detected in real time, the positive / negative phase components of the converter current, and Using the rotation angle of the dq conversion, an output current control system of a self-excited converter that can cope with the case where the leakage impedance of the converter transformer is unbalanced is created. In the case where only the fundamental wave is targeted and the negative phase output current is set to 0, it is possible to perform dq conversion using the phase by the conventional PLL.
[0047]
First, as shown in equations (13) and (14), the right side of the converter output voltage shown in equation (6) is the same rotation direction as the phase rotation of the converter output voltage on the left side, and the rotation direction. Think of it as a separate component.
[0048]
[Expression 7]

[0049]
The case where the n-th order symmetric part is extracted based on the real-time DFT and used for converter control will be described. When the n-th order positive phase component is extracted from the expression (1), it is expressed as the expression (15). Similarly, when the nth-order reversed phase component is extracted, it is expressed as the following equation (16).
Here, as shown in the equation (17), the n-th order symmetrical phase (θ_n1, Θ_n2) To convert to each dq coordinate system.
[0050]
[Equation 8]

[0051]
From equations (15) and (16), the converter voltage / current equation for the nth order symmetry is expressed by equation (18). The influence of the differential term remains in the frequency domain where the symmetry is mixed. However, the influence of the differential term is eliminated by treating the normal phase component and the reverse phase component as different frequency components and separating them from the frequency component to be analyzed by the real time DFT.
[0052]
FIG. 5 shows an example of the configuration of the converter control system in the frequency / symmetrical domain in the control unit. Here, the conversion voltage / current equation in the frequency / symmetrical domain and the connection point voltage that can be detected by real-time DFT are shown. e_a, E_b, E_cAnd converter current i_a, I_b, I_cEach frequency / corresponding part is used. In FIG. 5, 31 is an α-β conversion circuit, 32 is a processing unit, 33 is a converter current control system, PWM command value V_{a ref}, V_{b ref}, V_{c ref}Indicates. When zero phase compensation is performed, reference numeral 31 in FIG. 5 is an α-β-0 conversion. In addition, when applied as an extension of a self-excited converter control system using a conventional PLL, the DFT portion 32 in FIG. 5 is a PLL, and after the coordinate transformation is performed using the detected phase of the PLL.
[0053]
In other words, each order symmetry of the interconnection point voltage / converter current is extracted by DFT processing, and after current control is performed for each, a command value is obtained by combining the outputs. Further, the number of harmonic components having control symmetry can be increased by connecting the detection system / current control system blocks for a certain frequency and symmetry in parallel (dotted line). In the case of using the PLL, each symmetric part is extracted by a process using a low-pass filter or the like after the symmetric coordinate conversion.
[0054]
In the real-time DFT processing, a recursive algorithm is applied to time-variate the multiplier for the sampling point k to be subjected to Fourier transform, thereby reducing the product-sum calculation amount and the numerical error accumulation that occurs at this time. As described above, the detection error is eliminated by increasing the calculation amount almost without increasing the calculation amount periodically.
[0055]
FIG. 6 is a configuration example of the converter current control system of FIG. It is a control unit for the output of the same phase rotation as the input phase rotation based on the converter voltage / current equation for each order symmetrical component. Further, when the modeling of the converter including the transformer and the accuracy of the detection system are poor, a steady-state error of control occurs. Therefore, PI control is also considered in order to compensate for this modeling error.
[0056]
By using * → 1: for the positive phase and * → 2: for the negative phase for each frequency component, an output at each frequency and symmetry can be obtained. Since the control output voltage in the equation (18) is output as a d-axis and q-axis voltage, a three-phase signal wave used for PWM control is generated by inverse dq conversion. When the impedance is balanced, it is possible to obtain a balanced output only by the current control of FIG. 5, and output an unbalanced current for suppressing the unbalanced voltage even when the voltage at the interconnection point is unbalanced. Is possible. When the impedance is unbalanced, the balanced output cannot be obtained only by the current control of FIG. 5, and the unbalanced voltage at the interconnection point cannot be suppressed.
[0057]
FIG. 7 is a diagram for explaining a compensation term for the unbalanced inductance, and the compensation term in this case is described in the equation (14). As for the equation (14), in order to calculate the compensation for the normal phase / reverse phase components of the converter output voltage with the reverse phase / normal phase current command values of the converter, FIG. The control system shown in FIG. Each phase rotation component is converted into a phase coordinate system by inverse dq conversion, and a correction PWM signal wave for each phase is generated. Note that although this compensation method can compensate for an unbalanced resistance component, the resistance component is not shown in the figure for simplification. When considering an unbalanced resistance component, a resistance value may be added to the control system in addition to reactance. This compensation method is naturally effective when an unbalanced current is output to suppress the unbalanced voltage when the voltage at the interconnection point is unbalanced.
[0058]
If the description is repeated, the equations (13) and (14) are combined and generalized for the nth order is the equation (18), and the fundamental wave is controlled as shown in the upper half of FIG. Configure the block. The normal phase / reverse phase components of the interconnection point voltage and the converter current used for control are obtained by the arithmetic processing using the real-time DFT already described. In the converter current control system (fundamental wave component) of FIG. 8, the current control system for the positive phase and the current component for the reverse phase (for balancing) is the converter current control system shown in FIG. * → 2: Used for reverse phase. For the positive and negative phase unbalance compensation, the converter current control system unbalanced inductance compensation block shown in Fig. 7 is used for ◎ → 2, * → 1: For positive phase, ◎ → 1, * → 2: For reverse phase It is what. By adding the outputs obtained from this, a signal wave of PMW control which is a converter output voltage is synthesized. However, the phase detected by the PLL can also be used for the dq conversion.
[0059]
In the previous section, the compensation method for the unbalanced leakage reactance for the fundamental wave component was described. However, by adopting the same control method not only for the fundamental wave component but also for the n-th harmonic component, the leakage reactance of the transformer can be reduced. Even if it is unbalanced, it is possible to compensate for the effect and obtain a balanced output, or to balance harmonics and suppress them to zero.
[0060]
FIG. 8 is a block diagram for explaining another embodiment. In FIG. 8, the same functional parts as those in FIG. Describing in detail with reference to FIG. 8, in FIG. 8, the α-phase and β-phase signals after α-β conversion are input to the control system of the n-order component as indicated by the dotted line, and the arithmetic processing by the n-order DFT is performed. Constitutes the same control system as in the case of the fundamental wave component, and its output is the converter output voltage by adding the output to the output of the control system of the fundamental wave component and other harmonic components as indicated by another dotted line. A PWM control signal wave is synthesized. As a result, the same effect as that of the fundamental wave component can be obtained for the nth-order harmonic component. The above effect is naturally effective even when an unbalanced current is output in order to suppress the unbalanced voltage or balance it to zero output when the n-th harmonic voltage at the interconnection point is unbalanced. is there.
[0061]
For the transformer control system corresponding to the transformer for transformers with leakage inductance, the control effect was verified by computer simulation using the electromagnetic transient analysis program ATP (Alternative Transients Program). .
[0062]
FIG. 9 is a circuit configuration diagram modeled by computer simulation. Self-excited transformer has leakage inductance L_a, L_b, L_cIt is connected to the AC system through an ideal transformer. The AC system has a line reactance L with a short-circuit capacity ratio (SCR) of 5 with respect to the converter rating._sConnected to an infinite bus.
In addition, the following four cases were considered as cases for analyzing the computer simulation.
[0063]
[Table 1]

[0064]
From the simulation result of case 1 shown in FIG. 10, when the transformer leakage inductance is three-phase balanced, as shown in FIGS. The q-axis follows this in 3 cycles and almost no steady-state error occurs. As shown in FIGS. 10D and 10E, when the normal phase current command value is changed for each of the d axis and the q axis, a negative phase current is transiently generated but no steady-state error is generated. .
[0065]
On the other hand, for unbalanced impedance, as shown in FIGS. 11 (b) and 11 (c), when the command change of the positive phase d-axis and q-axis becomes a steady value in the same cycle, the steady-state error Produce. Similarly, as shown in FIGS. 11D and 11E, the negative phase current is generated even though the command value of the negative phase current is zero. In this case, since the converter control system outputs only the voltage for the positive phase, the current of the negative phase component is inevitably generated by the component of the unbalanced inductance as shown in the equation (6). is there. This shows that a balanced output cannot be obtained without compensating for the unbalanced impedance.
[0066]
The control method of the present application is mainly feed-forward control based on transformer leakage inductance and interconnection point voltage. If the model used for control and the accuracy of the detection system are poor, a control error may occur. . Since modeling error can be corrected by performing feedback compensation by PI control or the like, FIG. 12 shows an attempt to correct an error caused by unbalanced inductance by PI feedback control in the same manner as the modeling error.
[0067]
As shown in FIGS. 12B and 12C, the steady-state error of the positive phase component current can be controlled by PI control. However, in addition to the three cycles required for the feed-forward control as a base, tracking by PI control is performed. Therefore, the response speed of the control is reduced, and it takes about 6 cycles to follow.
[0068]
Also, compared with FIG. 11 (d), FIG. 12 (d) is close to the control command value. However, the error cannot be completely compensated particularly when the positive phase current is output at rated power, and the transformer It can be seen that it is practically difficult to compensate for the unbalanced component of the leakage inductance by PI feedback control as a modeling error.
[0069]
FIG. 13 shows the result when the compensation block for the unbalanced component of the leakage inductance shown in the present application is applied to the converter current control system. The current for the positive phase shown in FIGS. 13 (b) and 13 (c) is obtained when the leakage inductance is balanced for both the d-axis and the q-axis, and at the same time, a steady value is obtained by following the command value change in three cycles. Yes.
[0070]
In addition, no error occurs in the steady value. Further, as shown in FIGS. 13 (d) and 13 (e), although the control error occurs transiently when the command value is changed, the reverse phase current converges quickly and follows the command value 0 without error. Yes. As shown in the above simulation results, by performing compensation control of the unbalanced inductance component according to the present application, the same control performance can be obtained regardless of whether the leakage inductance of the transformer is balanced or unbalanced. .
[0071]
【The invention's effect】
As described above, according to the present invention, the relationship between the interconnection point voltage and the converter voltage / current is derived, and the fundamental phase component and the harmonic components of each order by the DFT (Discrete Fourier Transform). Since these are separately detected and individually compensated, the following effects can be obtained.
1. In the conventional rotational coordinate transformation, the rotational coordinate transformation was performed using the phase obtained from the PLL or the like, so it was difficult to separate the normal phase, the reverse phase, and the harmonic component, but the direct rotational coordinate transformation is performed using DFT. The phase and amplitude of the symmetric frequency component can be detected simultaneously by DFT, and a high-speed response is possible.
2. Since a recursive algorithm is employed in the DFT operation circuit, the product-sum operation amount can be reduced, and high-speed sampling is possible. Further, the amount of calculation is further reduced by performing α-β conversion before the DFT calculation. It should be noted that the accumulation of numerical errors that occur when using a recursive algorithm can be eliminated periodically by using the algorithm shown in this application with almost no increase in the amount of calculation.
3. Since the positive phase component and the negative phase component of the fundamental wave and the harmonics of each order are controlled separately, control errors due to the negative phase component do not occur, and each component can be controlled individually. For this reason, it is also possible to compensate for the unbalance on the system side.
4). For each of the positive phase component and the reverse phase component, the dq conversion is performed by the coordinate system rotating in the same direction as the phase rotation, and the output of the control system by the component of the same phase rotation and the component of the reverse phase rotation is synthesized. By doing so, the leakage reactance imbalance can be compensated.
5. Even when the system side is in an unbalanced state and has an unbalanced impedance, an output according to a desired command value can be obtained.
6). It is also possible to apply the proposed control method to a normal control system using phase detection by PLL without using DFT. However, in this case, it is necessary to apply a filter to normal phase / reverse phase detection and harmonic detection to separate each component.
The above-described effects extend to a self-excited converter generally connected to a three-phase AC power supply system or a three-phase AC load system via a device such as a three-phase transformer or a connected reactor having an arbitrary impedance for each phase. Examples of applications include adding an unbalanced harmonic compensation function to the generator grid connection inverter, an active filter with an unbalance compensation function, STATCOM with an unbalance compensation, and an inverter-driven motor (such as an induction motor). Torque fluctuation suppression control can be considered.
[Brief description of the drawings]
FIG. 1 is an overall configuration diagram showing an embodiment of a control system for a self-excited converter according to the present invention.
FIG. 2 is an equivalent circuit of a self-excited converter.
FIG. 3 is a flowchart of DFT processing by a recursive algorithm for an i-cycle AC voltage incorporating a reset algorithm used in the present embodiment.
FIG. 4 is a diagram showing a computer processing capacity required when a numerical error accumulation reset algorithm used in this embodiment is incorporated.
FIG. 5 is a diagram showing an example of the configuration of a converter control system in a frequency / symmetrical domain in a control unit.
6 is a configuration example diagram of the converter current control system shown in FIG.
FIG. 7 is a diagram for explaining a compensation term for an unbalanced inductance.
FIG. 8 is a configuration diagram of a converter control system in a frequency / symmetrical domain in a control unit including a compensation term for an unbalanced impedance.
FIG. 9 is a simulation circuit diagram for confirming the effect.
FIG. 10 is a simulation result diagram of case 1;
FIG. 11 shows a simulation result of case 2
FIG. 12 shows a simulation result of case 3
FIG. 13 is a simulation result diagram of case 4 (present invention).
[Explanation of symbols]
1: Power system
2: Linkage point voltage / current detector
3: Transformer for interconnection
4: Inverter
5: DC power supply
6: Inverter control unit
7: Output current command value setting section
8: PWM signal generator

Claims (3)

In the control method of the self-excited converter linked to the electric power system, the interconnection with the electric power system includes an interconnection transformer or an interconnection reactor in which the self-excited converter has an arbitrary impedance for each phase. From a connection point voltage / current detection means for detecting each phase voltage / current at the connection point . An inverter control unit that receives the detection output and an output from the output current command value setting unit and performs the following calculations, and a PWM waveform generation unit that outputs the calculation result as an inverter control signal. A control method for a self-excited converter.
Record
A first calculation for inputting the detection output from the interconnection point voltage current detection means and the output from the output current command value setting unit and performing α-β conversion thereof;
A second operation for performing a DFT (Discrete Fourier Transform) process on each converted value by the first operation to calculate the fundamental wave and a vector quantity of each order ;
The second and respectively symmetrical coordinate transformation fundamental and calculated on the basis of the vector quantity of each order by the calculation, the calculated separation of positive-phase and negative phase of the fundamental wave and the respective orders as each rotation vector 3 operations and
The fundamental wave calculated by the third operation and the normal phase and reverse phase components of each order are separately detected and output so as to individually compensate each as the leakage reactance unbalance compensation amount of the interconnection transformer. And a fourth operation. 2. The self-excited converter control system according to claim 1, wherein the DFT calculation algorithm employs a recursive algorithm having a method of periodically clearing accumulated numerical errors. Control method. In the control system of the self-commutated converter of claim 1, wherein the control amount by the fourth operation, the third fundamental wave calculated in operation and the next number of the positive phase and negative phase of each to converts d-q by a coordinate system that rotates in the same direction of phase rotation Te, the fundamental wave and the d-axis q-axis components of each positive phase and negative phase of each order, the fundamental and positive of each order for each phase, reversed phase, and a control system according to components of the same phase rotation, by combining the output of the control system according to component reverse phase rotation, as the leakage reactance imbalance compensation amount of the interconnection transformer A self-excited converter control system characterized by output .

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