JP4100315B2 - Manufacturing method of electro-optical device - Google Patents

Manufacturing method of electro-optical device Download PDF

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JP4100315B2
JP4100315B2 JP2003337820A JP2003337820A JP4100315B2 JP 4100315 B2 JP4100315 B2 JP 4100315B2 JP 2003337820 A JP2003337820 A JP 2003337820A JP 2003337820 A JP2003337820 A JP 2003337820A JP 4100315 B2 JP4100315 B2 JP 4100315B2
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conductive particles
substrate
semiconductor device
electro
bumps
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JP2005108992A5 (en
JP2005108992A (en
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敏一 佐藤
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Seiko Epson Corp
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Seiko Epson Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

Description

本発明は、半導体装置を基板側の電極と導通接続するための実装方法に関する。また、これを用いた電気光学装置の製造方法及び電気光学装置、電子機器に関する。   The present invention relates to a mounting method for electrically connecting a semiconductor device to an electrode on a substrate side. The present invention also relates to a method of manufacturing an electro-optical device using the same, an electro-optical device, and an electronic apparatus.

従来、半導体装置を基板に実装する方法として、図１０に示すようにＡＣＦ（Anisotropic Conductive Film：異方性導電膜）１０７を間に挟んで半導体装置１０２の半導体装置側端子（電極端子）１０３を基板１０１の基板側端子（電極端子）１０６へ軽く押しつけて仮装着し、さらに熱圧着処理、すなわち加熱下で加圧するという方法が知られている。半導体装置側端子１０３は、Ａｌ（アルミニウム）等によって形成されたパッド１０４の上にＡｕ（金）等によって形成されたバンプ１０５を付着することによって形成されるのが一般的である。   Conventionally, as a method of mounting a semiconductor device on a substrate, as shown in FIG. 10, a semiconductor device side terminal (electrode terminal) 103 of the semiconductor device 102 is sandwiched with an ACF (Anisotropic Conductive Film) 107 interposed therebetween. A method of lightly pressing and temporarily mounting the substrate 101 on the substrate-side terminal (electrode terminal) 106 of the substrate 101 and further pressurizing under heating, that is, heating is known. The semiconductor device side terminal 103 is generally formed by attaching a bump 105 made of Au (gold) or the like on a pad 104 made of Al (aluminum) or the like.

ＡＣＦ１０７は、一対の端子間を異方性を持たせて電気的に一括接続するとともに、２つの部材間を機械的に接続するために用いられる導電性のある高分子フィルムであって、例えば紫外線硬化性、熱可塑性または熱硬化性の樹脂フィルム１０８の中に多数の導電粒子１０９を分散させることによって形成される。このＡＣＦ１０７を挟んで基板１０１と半導体装置１０２とを加熱しながらまたは紫外線照射しながら圧着することにより、図１１に示すように半導体装置側端子１０３と基板側端子１０６との間において電気的接続を実現する。   The ACF 107 is a conductive polymer film used to electrically connect a pair of terminals with anisotropy and collectively connect two members. The conductive film 109 is formed by dispersing a large number of conductive particles 109 in a curable, thermoplastic, or thermosetting resin film 108. By pressing the substrate 101 and the semiconductor device 102 while heating or irradiating them with ultraviolet light across the ACF 107, electrical connection is established between the semiconductor device side terminal 103 and the substrate side terminal 106 as shown in FIG. Realize.

特開２００１−１５６１０８号公報JP 2001-156108 A

しかしながら、近年の産業界の要求は電子製品を小型化する方向にあり、これを実現するためは半導体装置の導電接続の対象である端子の間隔、すなわちピッチを狭くする必要がある。しかしながら、従来の実装方法において、単に端子の間隔すなわちピッチを狭くした場合には、隣り合う端子間に存在する導電粒子によって当該一対の端子がショートして接続信頼性が低下するという問題がある。   However, in recent years, there has been a demand from the industry to reduce the size of electronic products, and in order to realize this, it is necessary to reduce the distance between terminals, that is, the pitch, which is the object of conductive connection of a semiconductor device. However, in the conventional mounting method, when the interval between terminals, that is, the pitch is simply narrowed, there is a problem in that the pair of terminals are short-circuited by the conductive particles existing between adjacent terminals and connection reliability is lowered.

そこで、隣り合う端子間をショートさせない方法として導電粒子の表面に接着剤層が形成され、この接着剤層により導電粒子を電極端子表面に接着させて電極端子の表面にのみ導電粒子を載置する方法が提案されている（例えば特許文献１参照）。しかしながら、この方法では導電粒子はその表面の接着材層のみで電極端子表面に接着されるため、接着力が弱く、実装工程中に電極端子表面から剥がれ落ち、十分な導通面積が得られない可能性があるという問題がある。   Therefore, an adhesive layer is formed on the surface of the conductive particles so as not to short-circuit between adjacent terminals, and the conductive particles are adhered to the electrode terminal surface by this adhesive layer, and the conductive particles are placed only on the surface of the electrode terminal. A method has been proposed (see, for example, Patent Document 1). However, in this method, since the conductive particles are adhered to the electrode terminal surface only by the adhesive layer on the surface, the adhesive force is weak, and it may be peeled off from the electrode terminal surface during the mounting process, and a sufficient conduction area may not be obtained. There is a problem of having sex.

本発明は、上記に鑑みてなされたものであって、端子間ピッチの狭い半導体装置においても、端子間のショートを防止しながら確実に半導体装置と基板との電気的接続を実現する半導体装置の実装方法を提供することを目的とする。また、これを用いた電気光学装置の製造方法及び電気光学装置、電子機器を提供することを目的とする。   The present invention has been made in view of the above, and in a semiconductor device having a narrow pitch between terminals, a semiconductor device that reliably realizes electrical connection between the semiconductor device and the substrate while preventing a short circuit between the terminals. The purpose is to provide an implementation method. It is another object of the present invention to provide an electro-optical device manufacturing method, an electro-optical device, and an electronic apparatus using the same.

上述した課題を解決し、目的を達成するために、本発明は、第１の基板と、該第１の基板にシール材を介して対向配置される第２の基板とを備え、前記第１の基板が前記第２の基板から張り出した張り出し部分に設けられる実装領域に、前記シール材の内側から外側に導電パターンが引き出されてなる複数の第１の配線部分と、フレキシブル配線基板と電気的に接続する複数の第２の配線部分とが形成されており、前記第１及び第２の配線部分と半導体装置の複数の第１及び第２の電極端子とをそれぞれ導通させて実装する電気光学装置の製造方法であって、弾性を有する樹脂ボールの表面を導電材料で被覆し、該導電材料を覆うように樹脂層を形成し導電性粒子を形成する工程と、前記複数の第１及び第２の電極端子のバンプ上に前記導電性粒子を散布して前記導電性粒子を前記バンプの表面に埋め込む工程と、前記バンプ間に散布された前記導電性粒子を除去する工程と、前記実装領域に接着材を配置する工程と、前記半導体装置のバンプと前記接着材とを対向させた状態で前記半導体装置と前記第１の基板とを位置合わせして加熱または紫外線照射しながら圧接し、前記半導体装置を前記第１の基板に接着する工程とを有し、前記接着する工程において、前記半導体装置を前記第１の基板に圧接することにより、前記導電性粒子を弾性変形させ、前記樹脂層から前記導電材料を露出させることにより、前記複数の第１の配線部分と前記複数の第１の電極端子とをそれぞれ導通させると共に、前記複数の第２の配線部分と前記複数の第２の電極端子とをそれぞれ導通させることを特徴とする。
また、前記接着材には導電性粒子が含有されていないことを特徴とする。
また、前記接着する工程において、前記半導体装置の前記第１の基板と対向する面及び前記半導体装置の側面の一部が、前記接着材に覆われることを特徴とする。
In order to solve the above-described problems and achieve the object, the present invention includes a first substrate and a second substrate disposed opposite to the first substrate with a sealant interposed therebetween. A plurality of first wiring portions in which a conductive pattern is drawn from the inside to the outside of the sealing material in a mounting region provided in the protruding portion where the substrate extends from the second substrate; A plurality of second wiring portions connected to the first and second wiring portions, and the first and second wiring portions and the plurality of first and second electrode terminals of the semiconductor device are electrically connected and mounted. a method of manufacturing a device, the surface of the resin ball having a resilient and coated with a conductive material, and forming the formed conductive particle of the resin layer to cover the conductive material, the first and second of said plurality said conductive on the second electrode terminals bumps Removing the step of spraying the particles embedding the conductive particles on the surface of the bump, the conductive particles sprayed between the bump, a step of arranging a bonding material on the mounting region, the semiconductor The semiconductor device and the first substrate are aligned and pressed while being heated or irradiated with ultraviolet rays in a state where the bumps of the device and the adhesive are opposed to each other, and the semiconductor device is bonded to the first substrate . In the bonding step, the semiconductor device is pressed against the first substrate, the conductive particles are elastically deformed, and the conductive material is exposed from the resin layer. a plurality of first wiring portion and the plurality of first and electrode terminals together to conduct each of the plurality of the second wiring portion and the plurality of second and an electrode terminal be respectively conducted And features.
Further, the adhesive material does not contain conductive particles.
In the bonding step, the surface of the semiconductor device facing the first substrate and a part of the side surface of the semiconductor device are covered with the adhesive.

以上のような本発明にかかる半導体装置の実装方法によれば、バンプ上に導電性粒子を散布して埋め込んだ後、バンプ間に散布された導電性粒子を除去する。これにより半導体装置の第１の電極のバンプ表面にのみ導電性粒子が確実に配置され、該第１の電極同士の間には導電性粒子が配置されない。また、導電性粒子はバンプに埋め込まれるため、半導体装置の実装工程中にバンプから剥がれ落ちることがなく、十分な導通面積を確保することができる。   According to the semiconductor device mounting method according to the present invention as described above, after conductive particles are dispersed and embedded on the bumps, the conductive particles dispersed between the bumps are removed. As a result, the conductive particles are reliably arranged only on the bump surface of the first electrode of the semiconductor device, and no conductive particles are arranged between the first electrodes. Further, since the conductive particles are embedded in the bumps, the conductive particles are not peeled off during the mounting process of the semiconductor device, and a sufficient conduction area can be ensured.

そしてこの状態で半導体装置を前記基板に接着する。これにより、半導体装置の第１および第２の電極間のピッチが狭くなった場合においても、隣り合う一対の電極が導電性粒子によってショートすること、すなわち横導通が生じることを防止することができる。したがって本発明によれば、端子間のショートが防止された信頼性の高い半導体装置の実装方法を提供することができる。なお、本発明においては、上記の第２の電極には、基板に配され第１の電極が接続される配線を含むものである。   In this state, the semiconductor device is bonded to the substrate. As a result, even when the pitch between the first and second electrodes of the semiconductor device is narrowed, it is possible to prevent a pair of adjacent electrodes from being short-circuited by the conductive particles, that is, to cause lateral conduction. . Therefore, according to the present invention, it is possible to provide a highly reliable mounting method of a semiconductor device in which a short circuit between terminals is prevented. In the present invention, the second electrode includes a wiring disposed on the substrate and connected to the first electrode.

また、本発明の好ましい態様によれば、バンプを金（Ａｕ）により構成することが好ましい。軟らかい材料である金によりバンプを構成することにより、確実に導電性粒子をバンプ表面に埋め込むことができ、バンプ表面に確実に導電性粒子を配置することができる。   According to a preferred aspect of the present invention, it is preferable that the bump is made of gold (Au). By configuring the bump with gold, which is a soft material, the conductive particles can be reliably embedded in the bump surface, and the conductive particles can be reliably disposed on the bump surface.

また、本発明の好ましい態様によれば、接着材が導電性粒子を含有することができる。バンプ上に導電性粒子を散布して埋め込んだ状態で導電性粒子を含有させた接着材により半導体装置を基板に接着することで、第１の電極と第２の電極とを電気的に接続する導電性粒子の量を多く確保することができる。したがって、より確実に第１の電極と第２の電極とを電気的に接続して半導体装置を基板に実装することができる。ただし、この場合には、接着材に含有させた導電性粒子により電極間のショートが生じない範囲で接着材に導電性粒子を含有させることが重要である。   Moreover, according to the preferable aspect of this invention, an adhesive agent can contain electroconductive particle. The first electrode and the second electrode are electrically connected by adhering the semiconductor device to the substrate with an adhesive containing conductive particles in a state where conductive particles are dispersed and embedded on the bumps. A large amount of conductive particles can be secured. Therefore, the semiconductor device can be mounted on the substrate by electrically connecting the first electrode and the second electrode more reliably. However, in this case, it is important that the conductive material contains conductive particles within a range in which short-circuiting between electrodes does not occur due to the conductive particles contained in the adhesive.

また、本発明の好ましい態様によれば、バンプ上の導電性粒子を押圧して前記バンプ内に押し込む工程を有することが好ましい。金（Ａｕ）などの軟らかいバンプ上に導電性粒子を散布することにより導電性粒子はバンプ表面に埋め込まれるが、上記の工程を実施することにより、バンプ表面における埋没状態が浅い導電性粒子や単にバンプ表面に載置された導電性粒子がある場合には、これらの導電性粒子を確実にバンプ表面に埋め込むことができる。したがって、より確実にバンプ表面に導電性粒子を配置することができ、十分な導通面積を確保して、より確実に第１の電極と第２の電極とを電気的に接続して半導体装置を基板に実装することができる。   Moreover, according to the preferable aspect of this invention, it is preferable to have the process of pressing the electroconductive particle on a bump and pushing in in the said bump. By spreading conductive particles on soft bumps such as gold (Au), the conductive particles are embedded in the bump surface. However, by performing the above process, conductive particles having a shallow buried state on the bump surface or simply When there are conductive particles placed on the bump surface, these conductive particles can be reliably embedded in the bump surface. Therefore, the conductive particles can be more reliably disposed on the bump surface, a sufficient conduction area is ensured, and the first electrode and the second electrode are more reliably electrically connected to each other. Can be mounted on a substrate.

また、上述した課題を解決し、目的を達成するために、本件の参考発明は、複数の第１の電極を備える半導体装置を第２の電極を備えた電気光学装置用基板に前記第１の電極と第２の電極とを導通させて実装する電気光学装置の製造方法であって、前記第１の電極上にバンプを形成する工程と、前記バンプ上に導電性粒子を散布して前記導電性粒子を前記バンプの表面に埋め込む工程と、前記バンプ間に散布された導電性粒子を除去する工程と、前記電気光学装置用基板における前記半導体装置の実装位置に接着材を配置する工程と、前記半導体装置のバンプと前記接着材とを対向させた状態で前記半導体装置と電気光学装置用基板とを位置合わせして加熱または紫外線照射しながら圧接し、前記半導体装置を前記電気光学装置用基板に接着する工程と、を有することを特徴とする。
In order to solve the above-described problem and achieve the object, the reference invention of the present application is configured such that a semiconductor device including a plurality of first electrodes is applied to an electro-optical device substrate including a second electrode. A method for manufacturing an electro-optical device in which an electrode and a second electrode are electrically connected to each other, wherein a bump is formed on the first electrode, and conductive particles are dispersed on the bump to conduct the conductive operation. A step of embedding the conductive particles in the surface of the bump, a step of removing the conductive particles dispersed between the bumps, a step of arranging an adhesive at the mounting position of the semiconductor device on the electro-optical device substrate, The semiconductor device and the electro-optical device substrate are aligned and pressed while being heated or irradiated with ultraviolet rays in a state in which the bumps of the semiconductor device and the adhesive are opposed to each other, and the semiconductor device is then pressed into the electro-optical device substrate Glued to And having a that step.

以上のような本件の参考発明にかかる電気光学装置の製造方法によれば、バンプ上に導電性粒子を散布して埋め込んだ後、バンプ間に散布された導電性粒子を除去する。これにより半導体装置の第１の電極のバンプ表面にのみ導電性粒子が確実に配置され、該第１の電極同士の間には導電性粒子が配置されない。また、導電性粒子はバンプに埋め込まれるため、半導体装置の実装工程中にバンプから剥がれ落ちることがなく、十分な導通面積を確保することができる。
According to the method of manufacturing the electro-optical device according to the present invention as described above, the conductive particles dispersed between the bumps are removed after the conductive particles are dispersed and embedded on the bumps. As a result, the conductive particles are reliably arranged only on the bump surface of the first electrode of the semiconductor device, and no conductive particles are arranged between the first electrodes. Further, since the conductive particles are embedded in the bumps, the conductive particles are not peeled off during the mounting process of the semiconductor device, and a sufficient conduction area can be ensured.

そしてこの状態で半導体装置を前記電気光学装置用基板に接着する。これにより、半導体装置の第１および第２の電極間のピッチが狭くなった場合においても、隣り合う一対の電極が導電性粒子によってショートすること、すなわち横導通が生じることを防止することができる。したがって本発明によれば、端子間のショートが防止された信頼性の高い電気光学装置の製造方法を提供することができる。なお、本発明においては、上記の第２の電極には、電気光学装置用基板に配され第１の電極が接続される配線を含むものである。   In this state, the semiconductor device is bonded to the electro-optical device substrate. As a result, even when the pitch between the first and second electrodes of the semiconductor device is narrowed, it is possible to prevent a pair of adjacent electrodes from being short-circuited by the conductive particles, that is, to cause lateral conduction. . Therefore, according to the present invention, it is possible to provide a method for manufacturing a highly reliable electro-optical device in which a short circuit between terminals is prevented. In the present invention, the second electrode includes a wiring disposed on the electro-optical device substrate and connected to the first electrode.

また、この電気光学装置の製造方法における好ましい態様によれば、バンプを金（Ａｕ）により構成することが好ましい。軟らかい材料である金によりバンプを構成することにより、確実に導電性粒子をバンプ表面に埋め込むことができ、バンプ表面に確実に導電性粒子を配置することができる。   Further, according to a preferable aspect of the method for manufacturing the electro-optical device, it is preferable that the bump is made of gold (Au). By configuring the bump with gold, which is a soft material, the conductive particles can be reliably embedded in the bump surface, and the conductive particles can be reliably disposed on the bump surface.

また、この電気光学装置の製造方法における好ましい態様によれば、接着材が導電性粒子を含有することができる。バンプ上に導電性粒子を散布して埋め込んだ状態で導電性粒子を含有させた接着材により半導体装置を電気光学装置用基板に接着することで、第１の電極と第２の電極とを電気的に接続する導電性粒子の量を多く確保することができる。したがって、より確実に第１の電極と第２の電極とを電気的に接続して半導体装置を電気光学装置用基板に実装することができる。ただし、この場合には、接着材に含有させた導電性粒子により電極間のショートが生じない範囲で接着材に導電性粒子を含有させることが重要である。   Further, according to a preferred aspect of the method for manufacturing the electro-optical device, the adhesive can contain conductive particles. The first electrode and the second electrode are electrically connected to each other by adhering the semiconductor device to the electro-optical device substrate with an adhesive containing conductive particles in a state where conductive particles are dispersed and embedded on the bumps. Therefore, it is possible to ensure a large amount of conductive particles to be connected. Therefore, the semiconductor device can be mounted on the electro-optical device substrate by electrically connecting the first electrode and the second electrode more reliably. However, in this case, it is important that the conductive material contains conductive particles within a range in which short-circuiting between electrodes does not occur due to the conductive particles contained in the adhesive.

また、この電気光学装置の製造方法における好ましい態様によれば、バンプ上の導電性粒子を押圧して前記バンプ内に押し込む工程を有することが好ましい。金（Ａｕ）などの軟らかいバンプ上に導電性粒子を散布することにより導電性粒子はバンプ表面に埋め込まれるが、上記の工程を実施することにより、バンプ表面における埋没状態が浅い導電性粒子や単にバンプ表面に載置された導電性粒子がある場合には、これらの導電性粒子を確実にバンプ表面に埋め込むことができる。したがって、より確実にバンプ表面に導電性粒子を配置することができ、十分な導通面積を確保して、より確実に第１の電極と第２の電極とを電気的に接続して半導体装置を電気光学装置用基板に実装することができる。   Further, according to a preferable aspect of the method for manufacturing the electro-optical device, it is preferable to include a step of pressing the conductive particles on the bumps and pressing them into the bumps. By spreading conductive particles on soft bumps such as gold (Au), the conductive particles are embedded in the bump surface. However, by performing the above process, conductive particles having a shallow buried state on the bump surface or simply When there are conductive particles placed on the bump surface, these conductive particles can be reliably embedded in the bump surface. Therefore, the conductive particles can be more reliably disposed on the bump surface, a sufficient conduction area is ensured, and the first electrode and the second electrode are more reliably electrically connected to each other. It can be mounted on a substrate for an electro-optical device.

また、上述した課題を解決し、目的を達成するために、本件の参考発明は、複数の第１の電極を備える半導体装置と第２の電極を備えた電気光学装置用基板とを備え、第１の電極上に設けられたバンプと第２の電極とが接着材により接着されるとともに、バンプ上にのみ埋め込まれた導電性粒子を介して第１の電極と第２の電極とが導通した状態で半導体装置が電気光学装置用基板に実装されてなることを特徴とする。
In order to solve the above-described problems and achieve the object, the reference invention includes a semiconductor device including a plurality of first electrodes and a substrate for an electro-optical device including second electrodes. The bump provided on the first electrode and the second electrode are adhered by an adhesive, and the first electrode and the second electrode are electrically connected through the conductive particles embedded only on the bump. In this state, the semiconductor device is mounted on an electro-optical device substrate.

以上のように構成された本件の参考発明にかかる電気光学装置においては、第１の電極上に設けられたバンプ表面にのみ導電性粒子が配置され、該導電性粒子によって第１の電極と第２の電極とが導通している。これにより、半導体装置の第１および第２の電極間のピッチが狭い場合においても、隣り合う一対の電極が導電性粒子によってショートすること、すなわち横導通が生じることを防止されている。したがって本発明によれば、端子間のショートが防止された信頼性の高い電気光学装置を提供することができる。
In the electro-optical device according to the reference invention of the present invention configured as described above, the conductive particles are arranged only on the bump surface provided on the first electrode, and the first electrode and the first electrode are formed by the conductive particles. The two electrodes are electrically connected. Thereby, even when the pitch between the first and second electrodes of the semiconductor device is narrow, it is possible to prevent a pair of adjacent electrodes from being short-circuited by the conductive particles, that is, to cause lateral conduction. Therefore, according to the present invention, it is possible to provide a highly reliable electro-optical device in which a short circuit between terminals is prevented.

また、本件の参考発明の好ましい態様によれば、バンプを金（Ａｕ）により構成することが好ましい。軟らかい材料である金によりバンプを構成することにより確実に導電性粒子がバンプ表面に埋め込まれる。これによりバンプ表面に確実に導電性粒子が配置され、第１の電極と第２の電極とがより確実に電気的に接続された信頼性の高い電気光学装置を提供することができる。
Moreover, according to the preferable aspect of the reference invention of the present case, it is preferable that the bump is made of gold (Au). By forming the bump with gold which is a soft material, the conductive particles are surely embedded in the bump surface. Accordingly, it is possible to provide a highly reliable electro-optical device in which the conductive particles are reliably arranged on the bump surface and the first electrode and the second electrode are more reliably electrically connected.

また、本件の参考発明の好ましい態様によれば、接着材が導電性粒子を含有することができる。導電性粒子を含有させた接着材により半導体装置を電気光学装置用基板に接着することで、第１の電極と第２の電極とを電気的に接続する導電性粒子の量を多く確保することができる。したがって、第１の電極と第２の電極とがより確実に電気的に接続された信頼性の高い電気光学装置を提供することができる。ただし、この場合には、接着材に含有させた導電性粒子により電極間のショートが生じない範囲で接着材に導電性粒子を含有させることが重要である。
Moreover, according to the preferable aspect of this reference invention , an adhesive agent can contain electroconductive particle. A large amount of conductive particles for electrically connecting the first electrode and the second electrode is secured by bonding the semiconductor device to the electro-optical device substrate with an adhesive containing conductive particles. Can do. Therefore, a highly reliable electro-optical device in which the first electrode and the second electrode are more reliably electrically connected can be provided. However, in this case, it is important that the conductive material contains conductive particles within a range in which short-circuiting between electrodes does not occur due to the conductive particles contained in the adhesive.

また、本件の参考発明によれば、上述の電気光学装置を有する電子機器を提供する。これにより、簡略な構成を有し、より高品質な電子機器を安価に実現することができる。

Further, according to the reference invention of the present case, an electronic apparatus having the above-described electro-optical device is provided. Thereby, it is possible to realize a high-quality electronic device at a low cost with a simple configuration.

以下に、本発明に係る半導体装置の実装方法、電気光学装置及びその製造方法、電子機器の実施例を図面に基づいて詳細に説明する。なお、本発明は以下の記述に限定されるものではなく、本発明の要旨を逸脱しない範囲において適宜変更可能である。   Hereinafter, embodiments of a semiconductor device mounting method, an electro-optical device and a manufacturing method thereof, and an electronic apparatus according to the present invention will be described in detail with reference to the drawings. In addition, this invention is not limited to the following description, In the range which does not deviate from the summary of this invention, it can change suitably.

図１は本発明にかかる電気光学装置の一例である液晶表示装置１を分解した様子を模式的に示す斜視図である。図２は図１の液晶表示装置１を駆動するためのドライバＩＣ（半導体装置）が液晶パネルに実装された状態を示す液晶表示装置１の縦断面図である。本実施例においては、液晶表示装置１は液晶パネル１０及びバックライトユニット１５を含んで構成されている。   FIG. 1 is a perspective view schematically showing an exploded state of a liquid crystal display device 1 which is an example of an electro-optical device according to the present invention. FIG. 2 is a longitudinal sectional view of the liquid crystal display device 1 showing a state in which a driver IC (semiconductor device) for driving the liquid crystal display device 1 of FIG. 1 is mounted on the liquid crystal panel. In this embodiment, the liquid crystal display device 1 includes a liquid crystal panel 10 and a backlight unit 15.

図１および図２に示すように、単純マトリクス型の液晶パネル１０では、一対のガラス、石英あるいはプラスチックなどで形成された略矩形状の第１の透明基板５と第２の透明基板２とが、シール材６を挟んで所定の間隙を隔てて接着固定されている。第１の透明基板５は第１の面５ａ及び第２の面５ｂを有し、第２の透明基板２は第１の面２ａ及び第２の面２ｂを有しており、第１の透明基板５と第２の透明基板２とは、それぞれの第２の面５ｂ及び２ｂが対向するように配置されている。シール材６には、液晶を注入する際の液晶注入口６ａとしての途切れ部分が形成され、この液晶注入口６ａは液晶注入後に紫外線硬化樹脂からなる図示しない封止材で封止されている。第１の透明基板５と第２の透明基板２との間のうち、シール材６により区画形成された液晶封入領域内（シール材６により囲われた内側の領域）には液晶２５が封入されている。   As shown in FIGS. 1 and 2, the simple matrix type liquid crystal panel 10 includes a first transparent substrate 5 and a second transparent substrate 2 each having a substantially rectangular shape formed of a pair of glass, quartz, plastic, or the like. The adhesive is fixed with a predetermined gap across the sealing material 6. The first transparent substrate 5 has a first surface 5a and a second surface 5b, and the second transparent substrate 2 has a first surface 2a and a second surface 2b, and the first transparent substrate The substrate 5 and the second transparent substrate 2 are arranged so that the second surfaces 5b and 2b face each other. The sealing material 6 is formed with a discontinuous portion as a liquid crystal injection port 6a when liquid crystal is injected. The liquid crystal injection port 6a is sealed with a sealing material (not shown) made of an ultraviolet curable resin after the liquid crystal is injected. Between the first transparent substrate 5 and the second transparent substrate 2, the liquid crystal 25 is sealed in the liquid crystal sealing region (the inner region surrounded by the sealing material 6) partitioned by the sealing material 6. ing.

また、第１の透明基板５の第１の面５ａには、該第１の面５ａに当接して矩形状の第１偏光板１６が配置される。一方、第２の透明基板２の第１の面２ａには、該第１の面２ａに当接して矩形状の第２偏光板７が配置されている。さらに、第１の透明基板５と偏光板１６の間、および第２の透明基板２と偏光板７との間には、液晶層において生じた着色を解消するための光学部材としての位相差板を必要に応じて介在させる。   In addition, a rectangular first polarizing plate 16 is disposed on the first surface 5a of the first transparent substrate 5 in contact with the first surface 5a. On the other hand, a rectangular second polarizing plate 7 is disposed on the first surface 2a of the second transparent substrate 2 in contact with the first surface 2a. Further, between the first transparent substrate 5 and the polarizing plate 16 and between the second transparent substrate 2 and the polarizing plate 7, a retardation plate as an optical member for eliminating the coloration generated in the liquid crystal layer. Is interposed as necessary.

第１偏光板１６における第１の透明基板５と隣り合う面と反対側の面には、第１偏光板１６と隣り合うようにバックライトユニット１５が配置されている。液晶パネル１０とバックライトユニット１５とは、バックライトユニット１５と第１偏光板１６とが両面接着性の遮光膜としての遮光テープ２０により接着固定されることにより固定されている。このバックライトユニット１５は、液晶表示装置が完成した際に実際に表示に関与する領域である有効表示領域３０に対応した導光板８、及びこの導光板８の端部に配置された光源としてのＬＥＤ（Ｌｉｇｈｔ Ｅｍｉｔｔｉｎｇ Ｄｉｏｄｅ）９を含んで構成される。   A backlight unit 15 is disposed on the surface of the first polarizing plate 16 opposite to the surface adjacent to the first transparent substrate 5 so as to be adjacent to the first polarizing plate 16. The liquid crystal panel 10 and the backlight unit 15 are fixed by bonding and fixing the backlight unit 15 and the first polarizing plate 16 with a light shielding tape 20 as a double-sided adhesive light shielding film. The backlight unit 15 includes a light guide plate 8 corresponding to an effective display area 30 that is an area actually involved in display when the liquid crystal display device is completed, and a light source disposed at an end of the light guide plate 8. An LED (Light Emitting Diode) 9 is included.

第１の透明基板５及び第２の透明基板２には、互いに直交する方向に駆動用の導電パターン３、４が透明なＩＴＯ（Ｉｎｄｉｕｍ Ｔｉｎ Ｏｘｉｄｅ）膜などによってストライプ状に形成されている。これらの導電パターンには、各画素の液晶を駆動するための駆動信号が印加される。また、第１の透明基板５及び第２の透明基板２の第２の面５ｂ、２ｂには、導電パターン３及び導電パターン４を覆うように、図示しない配向膜が形成されており、表示モードとしてはＳＴＮ（Ｓｕｐｅｒ Ｔｗｉｓｔｅｄ Ｎｅｍａｔｉｃ）型などの各種の液晶モードを用いることができる。   On the first transparent substrate 5 and the second transparent substrate 2, driving conductive patterns 3 and 4 are formed in stripes by transparent ITO (Indium Tin Oxide) films or the like in directions orthogonal to each other. A driving signal for driving the liquid crystal of each pixel is applied to these conductive patterns. An alignment film (not shown) is formed on the second surfaces 5b and 2b of the first transparent substrate 5 and the second transparent substrate 2 so as to cover the conductive patterns 3 and 4, and the display mode For example, various liquid crystal modes such as an STN (Super Twisted Nematic) type can be used.

画像表示を行う際の画素は、導電パターン３、４の交差部分に対応する液晶によって構成される。図１および図２に示した本実施例にかかる液晶表示装置１は単純マトリクス型液晶表示装置であるので、導電パターン３、４の一方が走査信号が印加される走査電極、他方がオン電圧やオフ電圧の画像信号が印加される信号電極として機能する。   A pixel at the time of image display is constituted by a liquid crystal corresponding to the intersection of the conductive patterns 3 and 4. Since the liquid crystal display device 1 according to this embodiment shown in FIGS. 1 and 2 is a simple matrix type liquid crystal display device, one of the conductive patterns 3 and 4 is a scan electrode to which a scan signal is applied, and the other is an on-voltage or It functions as a signal electrode to which an off-voltage image signal is applied.

液晶表示装置１において第１の透明基板５は第２の透明基板２よりも大きく形成され、図２に示すように第１の透明基板５はその一辺において第２の透明基板２の一辺から張り出した形態とされている。そして、第１の透明基板５はこの張り出した部分の第２の面５ｂに半導体装置（以下、ＩＣ）実装領域４０を有している。このＩＣ実装領域４０は、第１の透明基板５の張り出し部分４５に形成されている。ＩＣ実装領域４０は、導電パターン３、４に駆動信号を出力する半導体装置としてのドライバＩＣ１２を実装するための領域である。   In the liquid crystal display device 1, the first transparent substrate 5 is formed larger than the second transparent substrate 2, and the first transparent substrate 5 projects from one side of the second transparent substrate 2 at one side as shown in FIG. 2. It is assumed that it is a form. The first transparent substrate 5 has a semiconductor device (hereinafter, IC) mounting area 40 on the second surface 5b of the protruding portion. The IC mounting area 40 is formed in the protruding portion 45 of the first transparent substrate 5. The IC mounting area 40 is an area for mounting a driver IC 12 as a semiconductor device that outputs a drive signal to the conductive patterns 3 and 4.

ドライバＩＣ１２は接着材である両面接着シート３２で第１の透明基板５に接着されることにより固定されている。そしてドライバＩＣ１２は、第１電極端子（出力電極）１３ａと第２電極端子（入力電極）１３ｂを有しており、ドライバＩＣ１２の第１電極端子１３ａは、基板側の電極を兼ねた導電パターン３の第１配線部分３ａと導電性粒子３１を介して電気的に接続されている。また、ドライバＩＣ１２の第２電極端子１３ｂは、第１の透明基板５上に基板側の電極を兼ねた導電パターン３の第２配線部分３ｂと導電性粒子３１を介して電気的に接続されている。更に、第２配線部分３ｂには導電性粒子３１を介して図示しないフレキシブル配線基板が電気的に接続されており、フレキシブル配線基板からドライバＩＣ１２に対して各種の信号や電源が供給される。なお、第１電極端子（出力電極）１３ａおよび第２電極端子（入力電極）１３ｂは、それぞれドライバＩＣ１２の長手方向に複数個、所定の間隔をおいて配置されている。   The driver IC 12 is fixed by being bonded to the first transparent substrate 5 with a double-sided adhesive sheet 32 that is an adhesive. The driver IC 12 includes a first electrode terminal (output electrode) 13a and a second electrode terminal (input electrode) 13b. The first electrode terminal 13a of the driver IC 12 is a conductive pattern 3 that also serves as an electrode on the substrate side. The first wiring portion 3 a is electrically connected through the conductive particles 31. The second electrode terminal 13 b of the driver IC 12 is electrically connected to the second wiring portion 3 b of the conductive pattern 3 that also serves as the substrate-side electrode on the first transparent substrate 5 via the conductive particles 31. Yes. Further, a flexible wiring board (not shown) is electrically connected to the second wiring portion 3b via the conductive particles 31, and various signals and power are supplied from the flexible wiring board to the driver IC 12. Note that a plurality of first electrode terminals (output electrodes) 13a and second electrode terminals (input electrodes) 13b are arranged at predetermined intervals in the longitudinal direction of the driver IC 12.

第１電極端子（出力電極）１３ａと第２電極端子（入力電極）１３ｂとは、ドライバＩＣ１２に設けられた電極パッド（図示せず）上に金（Ａｕ）によってバンプ５０を形成することにより構成されている。そして、バンプ５０の表面に埋め込まれた導電性粒子３１を介してそれぞれ導電パターン３の第１配線部分３ａおよび導電パターン３の第２配線部分３ｂと導通している。ここで、導電性粒子３１はバンプ５０の表面にのみ配置されており、隣り合うバンプ間には導電性粒子が配置されていない構成とされている。これにより、ドライバＩＣ１２の第１電極端子１３ａ同士の電極端子間ピッチが狭い場合においても、隣り合う一対の第１電極端子１３ａが導電性粒子３１によってショートすること、すなわち横導通が生じることが防止されている。また同様に、ドライバＩＣ１２の第２電極端子１３ｂ同士の電極端子間ピッチが狭い場合においても、隣り合う一対の第２電極端子１３ｂが導電性粒子３１によってショートすること、すなわち横導通が生じることが防止されている。したがって、このドライバＩＣ１２は、電極端子間のピッチが狭い場合においても、隣り合う一対の電極端子が導電性粒子３１によってショートすることが防止されてＩＣ実装領域４０に実装されている。   The first electrode terminal (output electrode) 13a and the second electrode terminal (input electrode) 13b are configured by forming bumps 50 of gold (Au) on electrode pads (not shown) provided in the driver IC 12. Has been. And it is electrically connected with the 1st wiring part 3a of the conductive pattern 3 and the 2nd wiring part 3b of the conductive pattern 3 through the conductive particle 31 embedded in the surface of the bump 50, respectively. Here, the conductive particles 31 are arranged only on the surface of the bump 50, and no conductive particles are arranged between adjacent bumps. Accordingly, even when the pitch between the electrode terminals of the first electrode terminals 13a of the driver IC 12 is narrow, the pair of adjacent first electrode terminals 13a is prevented from being short-circuited by the conductive particles 31, that is, lateral conduction is prevented. Has been. Similarly, even when the pitch between the electrode terminals of the second electrode terminals 13b of the driver IC 12 is narrow, a pair of adjacent second electrode terminals 13b may be short-circuited by the conductive particles 31, that is, lateral conduction may occur. It is prevented. Therefore, even when the pitch between the electrode terminals is narrow, the driver IC 12 is mounted in the IC mounting area 40 while preventing a pair of adjacent electrode terminals from being short-circuited by the conductive particles 31.

次に、上述したドライバＩＣ１２の実装方法について説明する。上記のように隣り合う一対の電極端子が導電性粒子３１によってショートすることを防止しながらドライバＩＣ１２をＩＣ実装領域４０に実装するには、まずドライバＩＣ１２において電極パッド上にバンプ５０を形成して複数の第１電極端子１３ａを構成し、また電極パッド上にバンプ５０を形成して複数の第２電極端子１３ｂを構成する。   Next, a method for mounting the above-described driver IC 12 will be described. In order to mount the driver IC 12 in the IC mounting region 40 while preventing a pair of adjacent electrode terminals from being short-circuited by the conductive particles 31 as described above, first, bumps 50 are formed on the electrode pads in the driver IC 12. A plurality of first electrode terminals 13a are configured, and bumps 50 are formed on the electrode pads to configure a plurality of second electrode terminals 13b.

ここで、バンプ５０は例えば金（Ａｕ）などの軟らかい材料により構成することが好ましい。このように軟らかい材料である金によりバンプを構成することにより、後述するように導電性粒子３１を散布した際に該導電性粒子をバンプ表面に確実に埋め込むことができ、バンプ表面に確実に導電性粒子を配置することができる。   Here, the bumps 50 are preferably made of a soft material such as gold (Au). By configuring the bumps with gold, which is a soft material in this way, the conductive particles 31 can be reliably embedded in the bump surface when the conductive particles 31 are dispersed, as will be described later, and the bump surface is reliably conductive. Sex particles can be arranged.

次に図３に示すように第１電極端子１３ａおよび第２電極端子１３ｂのバンプ５０上に導電性粒子３１を散布して該導電性粒子３１をバンプ５０の表面に埋め込む。バンプ５０は金（Ａｕ）等の軟らかい材料により構成されているため、バンプ５０を散布することにより導電性粒子３１はバンプ５０の表面に適当な深さで埋め込まれる。   Next, as shown in FIG. 3, the conductive particles 31 are scattered on the bumps 50 of the first electrode terminal 13 a and the second electrode terminal 13 b to embed the conductive particles 31 in the surface of the bump 50. Since the bump 50 is made of a soft material such as gold (Au), the conductive particles 31 are embedded in the surface of the bump 50 at an appropriate depth by spreading the bump 50.

導電性粒子３１は、例えば、図４の断面構成図に示すように、弾性を備えた絶縁性の樹脂ボール３１ａの表面にＮｉ（ニッケル）層３１ｂを被膜形成し、そのＮｉ層３１ｂの上にさらに樹脂層３１ｃを被膜形成することによって作製することができる。Ｎｉ層３１ｂは例えばメッキによって形成できる。導電性粒子３１は、芯材として樹脂ボール３１ａを用いて構成されているため全体としても弾性を有している。そして、所定の圧力が加えられると樹脂層３１ｃが壊れてＮｉ（ニッケル）層３１ｂが露出して導通材料として機能する。このような導電性粒子３１の粒径は特に限定されるものではなくバンプの表面積等の諸条件により適宜変更可能であるが、例えば直径４μｍ程度のものを用いることができる。   For example, as shown in the cross-sectional configuration diagram of FIG. 4, the conductive particles 31 are formed by forming a Ni (nickel) layer 31 b on the surface of an insulating resin ball 31 a having elasticity, and on the Ni layer 31 b. Further, the resin layer 31c can be produced by forming a film. The Ni layer 31b can be formed by plating, for example. Since the conductive particles 31 are formed by using the resin balls 31a as the core material, the conductive particles 31 also have elasticity as a whole. When a predetermined pressure is applied, the resin layer 31c is broken and the Ni (nickel) layer 31b is exposed to function as a conductive material. The particle size of the conductive particles 31 is not particularly limited and can be appropriately changed according to various conditions such as the surface area of the bump. For example, particles having a diameter of about 4 μm can be used.

そして、図５に示すように導電性粒子３１を散布した後に隣り合うバンプ間のバンプ間領域５２に散布された不要な導電性粒子３１を除去する。本発明においては、バンプ５０の表面にのみ導電性粒子３１を配置するため、バンプ間領域５２に散布された不要な導電性粒子３１は除去する。このバンプ間領域５２の導電性粒子３１を除去する方法は特に限定されず、バンプ５０の表面に導電性粒子３１を残した状態でバンプ間領域５２の導電性粒子３１のみを除去できれば良く、例えばブローにより除去することができる。   Then, as shown in FIG. 5, unnecessary conductive particles 31 dispersed in the inter-bump region 52 between adjacent bumps after the conductive particles 31 are dispersed are removed. In the present invention, since the conductive particles 31 are disposed only on the surface of the bump 50, unnecessary conductive particles 31 dispersed in the inter-bump region 52 are removed. The method for removing the conductive particles 31 in the inter-bump region 52 is not particularly limited, and it is sufficient that only the conductive particles 31 in the inter-bump region 52 can be removed with the conductive particles 31 left on the surface of the bump 50. It can be removed by blowing.

次いで、図６および図７に示すように第１の透明基板５の第２の面５ｂに設けられたＩＣ実装領域４０に両面接着シート３２を配置する。この両面接着シート３２としては、例えば紫外線硬化性または熱硬化性の樹脂フィルムなどを用いることができる。なお、図６はこの工程の液晶表示装置１を表側、すなわち第２の透明基板２側から見た平面図であり、図７は同断面図である。   Next, as shown in FIGS. 6 and 7, the double-sided adhesive sheet 32 is disposed in the IC mounting region 40 provided on the second surface 5 b of the first transparent substrate 5. As this double-sided adhesive sheet 32, for example, an ultraviolet curable or thermosetting resin film can be used. FIG. 6 is a plan view of the liquid crystal display device 1 in this process as viewed from the front side, that is, the second transparent substrate 2 side, and FIG. 7 is a sectional view of the same.

次に図８に示すようにドライバＩＣ１２とＩＣ実装領域４０との位置合わせを行う。ドライバＩＣ１２とＩＣ実装領域４０との位置合わせは、ドライバＩＣ１２の第１電極端子１３ａとＩＣ実装領域４０に設けられた導電パターン３の第１配線部分３ａとが対応し、また、ドライバＩＣ１２の第２電極端子１３ｂとＩＣ実装領域４０に設けられた導電パターン３の第２配線部分３ｂとが対応するように行う。そして、位置合わせの後にドライバＩＣ１２をＩＣ実装領域４０上に載置する。   Next, the driver IC 12 and the IC mounting area 40 are aligned as shown in FIG. The alignment of the driver IC 12 and the IC mounting area 40 corresponds to the first electrode terminal 13a of the driver IC 12 and the first wiring portion 3a of the conductive pattern 3 provided in the IC mounting area 40. This is performed so that the two-electrode terminal 13b and the second wiring portion 3b of the conductive pattern 3 provided in the IC mounting region 40 correspond to each other. Then, the driver IC 12 is placed on the IC mounting area 40 after the alignment.

そして、ＩＣ実装領域４０とドライバＩＣ１２とを加熱しながらまたは紫外線照射しながらＩＣ実装領域４０とドライバＩＣ１２とを圧接してドライバＩＣ１２を第１の透明基板５のＩＣ実装領域４０に接着する。このとき、導電性粒子３１の樹脂層３１ｃはバンプ５０に埋まった状態でＩＣ実装領域４０にドライバＩＣ１２が圧接した際に導電性粒子３１が弾性変形し、樹脂層３１ｃが壊れてＮｉ（ニッケル）層３１ｂが露出し、該Ｎｉ（ニッケル）層３１ｂによって導通が実現される。すなわち、第１電極端子１３ａと導電パターン３の第１配線部分３ａとが導通接続され、また、第２電極端子１３ｂと導電パターン３の第２配線部分３ｂとが導通接続される。   Then, the IC mounting area 40 and the driver IC 12 are pressed against each other while the IC mounting area 40 and the driver IC 12 are heated or irradiated with ultraviolet rays, and the driver IC 12 is bonded to the IC mounting area 40 of the first transparent substrate 5. At this time, when the driver IC 12 is pressed against the IC mounting region 40 with the resin layer 31c of the conductive particles 31 buried in the bumps 50, the conductive particles 31 are elastically deformed, and the resin layer 31c is broken and Ni (nickel) is broken. The layer 31b is exposed, and conduction is realized by the Ni (nickel) layer 31b. That is, the first electrode terminal 13a and the first wiring portion 3a of the conductive pattern 3 are conductively connected, and the second electrode terminal 13b and the second wiring portion 3b of the conductive pattern 3 are conductively connected.

ここで、導電性粒子３１はバンプ５０の表面にのみ配置されているため、導電性粒子３１により隣り合う一対の端子がショートすること、すなわち横導通が生じることがない。これにより、第１電極端子１３ａ間のピッチが狭くなった場合においても隣り合う一対の第１電極端子１３ａが導電性粒子３１によりショートすることを防止してドライバＩＣ１２を実装することができる。同様に第２電極端子１３ｂ間のピッチが狭くなった場合においても隣り合う一対の第２電極端子１３ｂが導電性粒子３１によりショートすることを防止してドライバＩＣ１２を実装することができる。したがって上述したドライバＩＣ１２の実装方法によれば、電極端子間のショートが防止された信頼性の高い半導体装置の実装が可能である。   Here, since the conductive particles 31 are disposed only on the surface of the bump 50, a pair of adjacent terminals are not short-circuited by the conductive particles 31, that is, lateral conduction does not occur. Thereby, even when the pitch between the first electrode terminals 13a is narrowed, the pair of adjacent first electrode terminals 13a can be prevented from being short-circuited by the conductive particles 31, and the driver IC 12 can be mounted. Similarly, even when the pitch between the second electrode terminals 13b is narrowed, the pair of adjacent second electrode terminals 13b can be prevented from being short-circuited by the conductive particles 31, and the driver IC 12 can be mounted. Therefore, according to the mounting method of the driver IC 12 described above, it is possible to mount a highly reliable semiconductor device in which a short circuit between electrode terminals is prevented.

また、上記の方法においては導電性粒子３１はバンプ５０に埋め込まれるため、ドライバＩＣ１２の実装工程中に導電性粒子３１がバンプ５０から剥がれ落ちることがなく、十分な導通面積を確保することができる。そして、上記の方法においては、バンプ５０上に導電性粒子３１を散布した後にバンプ間の不要な導電性粒子３１を除去する工程を含んでいるため、導電性粒子３１の散布量を必要なだけ多くしてバンプ５０の表面に必要十分な量の導電性粒子３１を配置することが可能である。これにより、バンプ５０の表面において十分な導通面積を確保することができ、確実にドライバＩＣ１２と第１の透明基板５とを導通させることができる。   In the above method, since the conductive particles 31 are embedded in the bumps 50, the conductive particles 31 are not peeled off from the bumps 50 during the mounting process of the driver IC 12, and a sufficient conduction area can be secured. . And in said method, since the process of removing the unnecessary electroconductive particle 31 between bumps after spraying the electroconductive particle 31 on the bump 50 is included, only the application amount of the electroconductive particle 31 is required. It is possible to dispose a necessary and sufficient amount of the conductive particles 31 on the surface of the bump 50. Thereby, a sufficient conduction area can be secured on the surface of the bump 50, and the driver IC 12 and the first transparent substrate 5 can be reliably conducted.

また、本発明においては、上記の両面接着シート３２に導電性粒子を含有させることもできる。バンプ５０上に導電性粒子３１を散布して埋め込んだ状態で導電性粒子３１を含有させた両面接着シート３２によりドライバＩＣ１２を第１の透明基板５に接着することで、第１電極端子１３ａと第１配線部分３ａ、および第２電極端子１３ｂと第２配線部分３ｂとを電気的に接続する導電性粒子３１の量を多く確保することができる。これにより、より確実にドライバＩＣ１２と第１の透明基板５とを電気的に接続してドライバＩＣ１２を第１の透明基板５に実装することができる。ただし、この場合には、両面接着シート３２に含有させた導電性粒子により電極間のショートが生じない範囲で両面接着シート３２に導電性粒子を含有させることが重要である。   Moreover, in this invention, electroconductive particle can also be contained in said double-sided adhesive sheet 32. FIG. By bonding the driver IC 12 to the first transparent substrate 5 with the double-sided adhesive sheet 32 containing the conductive particles 31 in a state where the conductive particles 31 are dispersed and embedded on the bumps 50, the first electrode terminals 13a and A large amount of the conductive particles 31 that electrically connect the first wiring portion 3a and the second electrode terminal 13b to the second wiring portion 3b can be secured. As a result, the driver IC 12 and the first transparent substrate 5 can be electrically connected to each other and the driver IC 12 can be mounted on the first transparent substrate 5 more reliably. However, in this case, it is important that the conductive particles contained in the double-sided adhesive sheet 32 contain the conductive particles in the double-sided adhesive sheet 32 as long as no short circuit occurs between the electrodes.

実施例２では、上述したドライバＩＣ１２の実装方法の変形例について説明する。まず実施例１と同様に例えば金（Ａｕ）などの軟らかい材料によりドライバＩＣ１２の電極パッド上にバンプ５０を形成して複数の第１電極端子１３ａを構成し、また電極パッド上にバンプ５０を形成して複数の第２電極端子１３ｂを構成する。   In the second embodiment, a modified example of the mounting method of the driver IC 12 described above will be described. First, as in the first embodiment, bumps 50 are formed on the electrode pads of the driver IC 12 by using a soft material such as gold (Au) to form a plurality of first electrode terminals 13a, and the bumps 50 are formed on the electrode pads. Thus, a plurality of second electrode terminals 13b are configured.

次に図３に示すように第１電極端子１３ａおよび第２電極端子１３ｂのバンプ５０上に導電性粒子３１を散布して該導電性粒子３１をバンプ５０の表面に埋め込む。   Next, as shown in FIG. 3, the conductive particles 31 are scattered on the bumps 50 of the first electrode terminal 13 a and the second electrode terminal 13 b to embed the conductive particles 31 in the surface of the bump 50.

そして、導電性粒子３１を散布した後にバンプ５０上の導電性粒子３１を押圧してバンプ５０内に押し込む工程を実施する。金（Ａｕ）などの軟らかいバンプ５０上に導電性粒子３１を散布することにより導電性粒子３１はバンプ５０表面に埋め込まれるが、上記の工程を実施することにより、バンプ５０の表面における埋没状態が浅い導電性粒子３１や単にバンプ表面に載置された状態となっている導電性粒子３１を確実にバンプ５０表面に埋め込むことができる。したがって、この工程を実施することにより確実にバンプ５０表面に導電性粒子３１を配置することができる。   Then, after the conductive particles 31 are dispersed, the step of pressing the conductive particles 31 on the bumps 50 and pushing them into the bumps 50 is performed. By spreading the conductive particles 31 on the soft bumps 50 such as gold (Au), the conductive particles 31 are embedded in the surface of the bumps 50. However, by performing the above steps, the embedded state on the surface of the bumps 50 is improved. The shallow conductive particles 31 or the conductive particles 31 simply placed on the bump surface can be reliably embedded in the bump 50 surface. Therefore, the conductive particles 31 can be reliably arranged on the surface of the bump 50 by performing this step.

そして、図５に示すように導電性粒子３１を散布した後に隣り合うバンプ間のバンプ間領域５２間に散布された不要な導電性粒子３１を除去する。本発明においては、バンプ５０の表面にのみ導電性粒子３１を配置するため、バンプ間領域５２に散布された不要な導電性粒子３１は除去する。このバンプ間領域５２の導電性粒子３１を除去する方法は特に限定されず、バンプ５０の表面に導電性粒子３１を残した状態でバンプ間領域５２の導電性粒子３１のみを除去できれば良く、例えばブローにより除去することができる。   Then, as shown in FIG. 5, after the conductive particles 31 are dispersed, unnecessary conductive particles 31 dispersed between the inter-bump regions 52 between adjacent bumps are removed. In the present invention, since the conductive particles 31 are disposed only on the surface of the bump 50, unnecessary conductive particles 31 dispersed in the inter-bump region 52 are removed. The method for removing the conductive particles 31 in the inter-bump region 52 is not particularly limited, and it is sufficient that only the conductive particles 31 in the inter-bump region 52 can be removed with the conductive particles 31 left on the surface of the bump 50. It can be removed by blowing.

次いで、図６および図７に示すように第１の透明基板５の第２の面５ｂに設けられたＩＣ実装領域４０に両面接着シート３２を配置する。この両面接着シート３２としては、例えば紫外線硬化性または熱硬化性の樹脂フィルムなどを用いることができる。そして、図８に示すようにドライバＩＣ１２とＩＣ実装領域４０との位置合わせを行う。ドライバＩＣ１２とＩＣ実装領域４０との位置合わせは、ドライバＩＣ１２の第１電極端子１３ａとＩＣ実装領域４０に設けられた導電パターン３の第１配線部分３ａとが対応し、また、ドライバＩＣ１２の第２電極端子１３ｂとＩＣ実装領域４０に設けられた導電パターン３の第２配線部分３ｂとが対応するように行う。そして、位置合わせの後にドライバＩＣ１２をＩＣ実装領域４０上に載置する。   Next, as shown in FIGS. 6 and 7, the double-sided adhesive sheet 32 is disposed in the IC mounting region 40 provided on the second surface 5 b of the first transparent substrate 5. As this double-sided adhesive sheet 32, for example, an ultraviolet curable or thermosetting resin film can be used. Then, the driver IC 12 and the IC mounting area 40 are aligned as shown in FIG. The alignment of the driver IC 12 and the IC mounting area 40 corresponds to the first electrode terminal 13a of the driver IC 12 and the first wiring portion 3a of the conductive pattern 3 provided in the IC mounting area 40. This is performed so that the two-electrode terminal 13b and the second wiring portion 3b of the conductive pattern 3 provided in the IC mounting region 40 correspond to each other. Then, the driver IC 12 is placed on the IC mounting area 40 after the alignment.

そして、ＩＣ実装領域４０とドライバＩＣ１２とを加熱しながらまたは紫外線照射しながらＩＣ実装領域４０とドライバＩＣ１２とを圧接してドライバＩＣ１２を第１の透明基板５のＩＣ実装領域４０に接着する。このとき、導電性粒子３１の樹脂層３１ｃはバンプ５０に埋まった状態でＩＣ実装領域４０にドライバＩＣ１２が圧接した際に導電性粒子３１が弾性変形し、樹脂層３１ｃが壊れてＮｉ（ニッケル）層３１ｂが露出し、該Ｎｉ（ニッケル）層３１ｂによって導通が実現される。すなわち、第１電極端子１３ａと導電パターン３の第１配線部分３ａとが導通接続され、また、第２電極端子１３ｂと導電パターン３の第２配線部分３ｂとが導通接続される。   Then, the IC mounting area 40 and the driver IC 12 are pressed against each other while the IC mounting area 40 and the driver IC 12 are heated or irradiated with ultraviolet rays, and the driver IC 12 is bonded to the IC mounting area 40 of the first transparent substrate 5. At this time, when the driver IC 12 is pressed against the IC mounting region 40 with the resin layer 31c of the conductive particles 31 buried in the bumps 50, the conductive particles 31 are elastically deformed, and the resin layer 31c is broken and Ni (nickel) is broken. The layer 31b is exposed, and conduction is realized by the Ni (nickel) layer 31b. That is, the first electrode terminal 13a and the first wiring portion 3a of the conductive pattern 3 are conductively connected, and the second electrode terminal 13b and the second wiring portion 3b of the conductive pattern 3 are conductively connected.

ここで、導電性粒子３１はバンプ５０の表面にのみ配置されているため、導電性粒子３１により隣り合う一対の端子がショートすること、すなわち横導通が生じることがない。これにより、第１電極端子１３ａ間のピッチが狭くなった場合においても隣り合う一対の第１電極端子１３ａが導電性粒子３１によりショートすることを防止してドライバＩＣ１２を実装することができる。同様に第２電極端子１３ｂ間のピッチが狭くなった場合においても隣り合う一対の第２電極端子１３ｂが導電性粒子３１によりショートすることを防止してドライバＩＣ１２を実装することができる。したがって上述したドライバＩＣ１２の実装方法によれば、電極端子間のショートが防止された信頼性の高い半導体装置の実装が可能である。   Here, since the conductive particles 31 are disposed only on the surface of the bump 50, a pair of adjacent terminals are not short-circuited by the conductive particles 31, that is, lateral conduction does not occur. Thereby, even when the pitch between the first electrode terminals 13a is narrowed, the pair of adjacent first electrode terminals 13a can be prevented from being short-circuited by the conductive particles 31, and the driver IC 12 can be mounted. Similarly, even when the pitch between the second electrode terminals 13b is narrowed, the pair of adjacent second electrode terminals 13b can be prevented from being short-circuited by the conductive particles 31, and the driver IC 12 can be mounted. Therefore, according to the mounting method of the driver IC 12 described above, it is possible to mount a highly reliable semiconductor device in which a short circuit between electrode terminals is prevented.

また、上記の方法では導電性粒子３１を散布した後にバンプ５０上の導電性粒子３１を押圧してバンプ５０内に押し込む工程を実施するため、バンプ５０の表面における埋没状態が浅い導電性粒子３１や単にバンプ表面に載置された状態となっている導電性粒子３１を確実にバンプ５０表面に埋め込むことができ、より確実にバンプ５０表面に導電性粒子３１を配置して十分な導通面積を確保することができる。したがって、より確実に第１電極端子１３ａと導電パターン３の第１配線部分３ａ、および第２電極端子１３ｂと導電パターン３の第２配線部分３ｂとを導通接続されてドライバＩＣ１２を実装することができる。   Further, in the above method, since the conductive particles 31 are sprayed and then the conductive particles 31 on the bumps 50 are pressed and pushed into the bumps 50, the conductive particles 31 having a shallow buried state on the surface of the bumps 50 are implemented. Alternatively, the conductive particles 31 that are simply placed on the bump surface can be reliably embedded in the surface of the bump 50, and the conductive particles 31 are more reliably arranged on the surface of the bump 50 to provide a sufficient conduction area. Can be secured. Therefore, it is possible to more securely connect the first electrode terminal 13a and the first wiring portion 3a of the conductive pattern 3 and the second electrode terminal 13b and the second wiring portion 3b of the conductive pattern 3 to mount the driver IC 12. it can.

なお、上記の説明においては、半導体装置としての液晶駆動用ＩＣを液晶装置の基板に実装する場合を例に説明したが、本発明はこの組み合わせに限定されるものではなく、電極パッド上にバンプが形成された第１の電極端子を複数備える半導体装置を第２の電極端子を備えた基板に、第１の電極端子と第２の電極端子とを導通させて実装する場合であれば広く適用することができる。   In the above description, the case where a liquid crystal driving IC as a semiconductor device is mounted on the substrate of the liquid crystal device has been described as an example. However, the present invention is not limited to this combination, and bumps are formed on the electrode pads. Widely applicable to a case where a semiconductor device including a plurality of first electrode terminals formed with a substrate is mounted on a substrate including a second electrode terminal while the first electrode terminal and the second electrode terminal are electrically connected. can do.

図９−１、図９−２及び図９−３は、それぞれ、本発明にかかる電気光学装置を搭載する電子機器の例である。図９−１は、携帯電話の例を示す斜視図である。６０は携帯電話本体を示し、そのうち６１は本発明にかかる電気光学装置を適用した液晶表示部である。図９−２は腕時計型電子機器の例を示す斜視図である。７０は時計本体を示し、７１が本発明にかかる電気光学装置を適用した液晶表示部である。また、図９−３はワープロ、パソコン等の携帯型情報処理装置の例を示す斜視図である。図中８０は情報処理装置を示し、８２はキーボード等の入力部、８４は情報処理装置本体、８６は本発明にかかる電気光学装置を適用した液晶表示部である。   FIGS. 9A, 9B, and 9C are examples of electronic apparatuses that each include the electro-optical device according to the invention. FIG. 9A is a perspective view illustrating an example of a mobile phone. Reference numeral 60 denotes a mobile phone body, and 61 of them is a liquid crystal display unit to which the electro-optical device according to the present invention is applied. FIG. 9-2 is a perspective view illustrating an example of a wristwatch type electronic apparatus. Reference numeral 70 denotes a watch body, and reference numeral 71 denotes a liquid crystal display unit to which the electro-optical device according to the invention is applied. FIG. 9C is a perspective view illustrating an example of a portable information processing apparatus such as a word processor or a personal computer. In the figure, reference numeral 80 denotes an information processing apparatus, 82 denotes an input unit such as a keyboard, 84 denotes an information processing apparatus body, and 86 denotes a liquid crystal display unit to which the electro-optical device according to the invention is applied.

これらの電子機器に本発明にかかる電気光学装置を使用すれば、簡略な構成を有し、高品質な電子機器を安価に実現することができる。なお、電子機器は、電気光学装置を搭載可能であれば、これらに限らない。   If the electro-optical device according to the present invention is used for these electronic devices, a high-quality electronic device having a simple configuration can be realized at low cost. Note that the electronic apparatus is not limited to these as long as the electro-optical device can be mounted.

また、上記各実施例に示す電気光学装置はいずれも液晶パネルを有する液晶表示装置であるが、この液晶パネルの代わりに、無機エレクトロルミネッセンス装置、有機エレクトロルミネッセンス装置、プラズマディスプレイ装置、ＦＥＤ（フィールドエミッションディスプレイ）装置などの各種電気光学装置用基板を有するものも用いることができる。   Each of the electro-optical devices shown in the above embodiments is a liquid crystal display device having a liquid crystal panel. Instead of the liquid crystal panel, an inorganic electroluminescence device, an organic electroluminescence device, a plasma display device, an FED (field emission) is used. Those having various electro-optical device substrates such as a display device can also be used.

以上のように、本発明に係る半導体装置の実装方法は、半導体装置を用いた電子機器の製造に有用であり、特に小型化が要求される携帯電話等の携帯電子機器の製造に適している。   As described above, the method for mounting a semiconductor device according to the present invention is useful for manufacturing an electronic device using the semiconductor device, and is particularly suitable for manufacturing a portable electronic device such as a mobile phone that is required to be downsized. .

液晶表示装置の分解斜視図である。It is a disassembled perspective view of a liquid crystal display device. 液晶表示装置の要部断面図である。It is principal part sectional drawing of a liquid crystal display device. ドライバＩＣの実装工程を示す断面図である。It is sectional drawing which shows the mounting process of driver IC. 導電性粒子の断面図である。It is sectional drawing of electroconductive particle. ドライバＩＣの実装工程を示す断面図である。It is sectional drawing which shows the mounting process of driver IC. ドライバＩＣの実装工程を示す平面図である。It is a top view which shows the mounting process of driver IC. ドライバＩＣの実装工程を示す断面図である。It is sectional drawing which shows the mounting process of driver IC. ドライバＩＣの実装工程を示す断面図である。It is sectional drawing which shows the mounting process of driver IC. 携帯電話の例を示す斜視図である。It is a perspective view which shows the example of a mobile telephone. 腕時計型電子機器の例を示す斜視図である。It is a perspective view which shows the example of a wristwatch type electronic device. 携帯型情報処理装置の例を示す斜視図である。It is a perspective view which shows the example of a portable information processing apparatus. 従来の半導体装置の実装工程を示す断面図である。It is sectional drawing which shows the mounting process of the conventional semiconductor device. 従来の半導体装置の実装工程を示す断面図である。It is sectional drawing which shows the mounting process of the conventional semiconductor device.

符号の説明Explanation of symbols

１ 液晶表示装置、２ 第２の透明基板、２ａ 第１の面、２ｂ 第２の面、３ 導電パターン、４ 導電パターン、５ 第１の透明基板、５ａ 第１の面、５ｂ 第２の面、６ シール材、６ａ 液晶注入口、７ 第２偏光板、８ 導光板、９ ＬＥＤ、１０ 液晶パネル、１２ ドライバＩＣ、１５ バックライトユニット、１６ 第１偏光板、２０ 遮光テープ、２５ 液晶、３１ 導電性粒子、３２ 両面接着シート、４０ ＩＣ実装領域、５０ バンプ、５２ バンプ間領域 DESCRIPTION OF SYMBOLS 1 Liquid crystal display device, 2 2nd transparent substrate, 2a 1st surface, 2b 2nd surface, 3 Conductive pattern, 4 Conductive pattern, 5 1st transparent substrate, 5a 1st surface, 5b 2nd surface , 6 Sealing material, 6a Liquid crystal inlet, 7 Second polarizing plate, 8 Light guide plate, 9 LED, 10 Liquid crystal panel, 12 Driver IC, 15 Backlight unit, 16 First polarizing plate, 20 Light shielding tape, 25 Liquid crystal, 31 Conductive particles, 32 double-sided adhesive sheet, 40 IC mounting area, 50 bumps, 52 area between bumps

Claims (5)

第１の基板と、該第１の基板にシール材を介して対向配置される第２の基板とを備え、前記第１の基板が前記第２の基板から張り出した張り出し部分に設けられる実装領域に、前記シール材の内側から外側に導電パターンが引き出されてなる複数の第１の配線部分と、フレキシブル配線基板と電気的に接続する複数の第２の配線部分とが形成されており、前記第１及び第２の配線部分と半導体装置の複数の第１及び第２の電極端子とをそれぞれ導通させて実装する電気光学装置の製造方法であって、
弾性を有する樹脂ボールの表面を導電材料で被覆し、該導電材料を覆うように樹脂層を形成し導電性粒子を形成する工程と、
前記複数の第１及び第２の電極端子のバンプ上に前記導電性粒子を散布して前記導電性粒子を前記バンプの表面に埋め込む工程と、
前記バンプ間に散布された前記導電性粒子を除去する工程と、
前記実装領域に接着材を配置する工程と、
前記半導体装置のバンプと前記接着材とを対向させた状態で前記半導体装置と前記第１の基板とを位置合わせして加熱または紫外線照射しながら圧接し、前記半導体装置を前記第１の基板に接着する工程とを有し、
前記接着する工程において、前記半導体装置を前記第１の基板に圧接することにより、前記導電性粒子を弾性変形させ、前記樹脂層から前記導電材料を露出させることにより、前記複数の第１の配線部分と前記複数の第１の電極端子とをそれぞれ導通させると共に、前記複数の第２の配線部分と前記複数の第２の電極端子とをそれぞれ導通させることを特徴とする電気光学装置の製造方法。 A mounting region that includes a first substrate and a second substrate that is disposed opposite to the first substrate with a sealant interposed therebetween, and the first substrate is provided in a projecting portion that projects from the second substrate. In addition, a plurality of first wiring portions formed by drawing a conductive pattern from the inside to the outside of the sealing material, and a plurality of second wiring portions electrically connected to the flexible wiring board are formed, A method for manufacturing an electro-optical device in which first and second wiring portions and a plurality of first and second electrode terminals of a semiconductor device are mounted in a conductive manner , respectively .
Coating the surface of a resin ball having elasticity with a conductive material, forming a resin layer so as to cover the conductive material, and forming conductive particles;
Burying the conductive particles to the surface of the bump by spraying the conductive particles on the bumps of the plurality of first and second electrode terminals,
Removing the conductive particles sprayed between the bumps,
Arranging an adhesive in the mounting area ;
With the bumps of the semiconductor device and the adhesive facing each other, the semiconductor device and the first substrate are aligned and pressed while being heated or irradiated with ultraviolet rays, and the semiconductor device is attached to the first substrate . and a step of bonding,
In the bonding step, the plurality of first wirings are formed by pressing the semiconductor device against the first substrate to elastically deform the conductive particles and expose the conductive material from the resin layer. A method of manufacturing an electro-optical device, wherein the portion and the plurality of first electrode terminals are electrically connected to each other, and the plurality of second wiring portions and the plurality of second electrode terminals are electrically connected to each other. . 前記接着材には導電性粒子が含有されていないことを特徴とする請求項１に記載の電気光学装置の製造方法。The method of manufacturing an electro-optical device according to claim 1, wherein the adhesive does not contain conductive particles. 前記接着する工程において、前記半導体装置の前記第１の基板と対向する面及び前記半導体装置の側面の一部が、前記接着材に覆われることを特徴とする請求項１に記載の電気光学装置の製造方法。2. The electro-optical device according to claim 1, wherein in the bonding step, a surface of the semiconductor device facing the first substrate and a part of a side surface of the semiconductor device are covered with the adhesive. Manufacturing method. 前記バンプを金（Ａｕ）により構成することを特徴とする請求項１〜３のいずれかに記載の電気光学装置の製造方法。 The method of manufacturing an electro-optical device according to claim 1, wherein the bump is made of gold (Au). 前記バンプ上の導電性粒子を押圧して前記バンプ内に押し込む工程を有することを特徴とする請求項１〜３のいずれかに記載の電気光学装置の製造方法。 The method of manufacturing an electro-optical device according to claim 1, further comprising a step of pressing the conductive particles on the bumps into the bumps.
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