JP4099600B2 - Signal processing system, signal processing apparatus and signal processing method, encoding apparatus and encoding method, and decoding apparatus and decoding method - Google Patents

Description

  The present invention relates to a signal processing system, a signal processing device and a signal processing method, an encoding device and an encoding method, and a decoding device and a decoding method. Specifically, according to the present invention, by performing an encoding process that increases degradation of the encoded digital signal due to the influence of analog distortion on the digital signal, the decoded digital signal is not encoded in the second encoding or decoding. The present invention relates to a signal processing apparatus or the like that can be satisfactorily deteriorated and that can properly prevent illegal copying using an analog signal obtained by decoding an encoded digital signal and further performing digital-analog conversion.

  FIG. 12 shows a configuration example of a conventionally known image display system 200. The image display system 200 includes a playback device 210 that outputs an analog image signal Van, and a display 220 that displays an image based on the analog image signal Van output from the playback device 210.

  In the playback device 210, an encoded digital image signal reproduced from a recording medium such as an optical disk (not shown) is decoded by a decoding unit 211, and a digital image signal obtained by further decoding is decoded by a digital-to-digital (D / A). An analog image signal Van is obtained by conversion to an analog signal by an analog converter 212. The display 220 is, for example, a CRT (Cathode-Ray Tube) display, an LCD (Liquid Crystal Display), or the like.

  By the way, there is a possibility that unauthorized copying is performed using the analog image signal Van output from the reproducing device 210 of the image display system 200.

  That is, the analog image signal Van is converted into a digital image signal Vdg by an A / D (Analog-to-Digital) converter 231 and supplied to the encoding unit 232. In the encoding unit 232, the digital image signal Vdg is encoded to obtain an encoded digital image signal Vcd. The encoded digital image signal Vcd is supplied to the recording unit 233 and recorded on a recording medium such as an optical disk.

  Conventionally, in order to prevent illegal copying using such an analog image signal Van, when copyright protection is performed, the analog image signal Van is scrambled and output, or the analog image signal Van Prohibiting output has been proposed (see, for example, Patent Document 1).

  Further, conventionally, a noise information generating unit is provided in either or both of the playback side compression decoding unit and the recording side compression decoding unit, and noise information of a level that cannot be discriminated at the time of image playback by one processing is applied to the digital video data. Copying is possible by embedding, but a digital video apparatus has been proposed in which an image deteriorates remarkably when it is repeated a plurality of times, thereby substantially limiting the number of copies (see, for example, Patent Document 2).

  Conventionally, encoding using orthogonal transform such as Discrete Cosine Transform (DCT) is known (for example, see Patent Document 3). FIG. 13 shows a configuration example of an encoding apparatus 300 that uses DCT as orthogonal transform.

  The digital image signal Va input to the input terminal 301 is supplied to the blocking circuit 302. In the blocking circuit 302, the image signal Va of the effective screen is divided into blocks having a size of (4 × 4) pixels, for example.

  Data of each block obtained by the blocking circuit 302 is supplied to the DCT circuit 303. The DCT circuit 303 performs DCT on the pixel data of each block for each block to obtain coefficient data as a conversion coefficient. The coefficient data is supplied to the quantization circuit 304.

  In the quantization circuit 304, the coefficient data of each block is quantized using a quantization table (not shown), and the quantized coefficient data of each block is sequentially obtained. The quantized coefficient data of each block is supplied to the entropy coding circuit 305. In the encoding circuit 305, for example, Huffman encoding is performed on the quantized coefficient data of each block. The Huffman encoded signal of each block output from the encoding circuit 305 is output to the output terminal 306 as an encoded digital image signal Vb.

  FIG. 14 illustrates a configuration example of a decoding device 320 corresponding to the above-described encoding device 300.

  The encoded digital image signal Vb input to the input terminal 321 is supplied to the entropy decoding circuit 322. The image signal Vb is an entropy encoded signal, for example, a Huffman encoded signal. In the decoding circuit 322, the image signal Vb is decoded, and quantized coefficient data of each block is obtained.

  The quantization coefficient data of each block is supplied to the inverse quantization circuit 323. The inverse quantization circuit 323 performs inverse quantization on the quantized coefficient data of each block to obtain coefficient data of each block. The coefficient data of each block is supplied to the inverse DCT circuit 324. The inverse DCT circuit 324 performs inverse DCT on the coefficient data of each block for each block to obtain pixel data of each block.

  Thus, the pixel data of each block obtained by the inverse DCT circuit 324 is supplied to the block decomposition circuit 325. In the block decomposition circuit 325, the data order is returned to the raster scan order. As a result, a decoded digital image signal Va ′ is obtained from the block decomposition circuit 325, and this image signal Va ′ is output to the output terminal 326.

JP 2001-245270 A Japanese Patent Laid-Open No. 10-289522 Japanese Patent Laid-Open No. 07-123271

  Unauthorized copying can be prevented by scrambled and outputting the analog image signal Van as in Patent Document 1 described above, or prohibiting the output of the analog image signal Van, but a normal image is displayed on the display 220. The problem of disappearing occurs.

  In addition, in the case where noise information is embedded in a reproduction-side compression decoding unit or recording-side compression encoding unit as in Patent Document 2 described above, a noise information generation unit and a circuit for embedding the noise information are required, and the circuit scale is increased. There is a problem that increases.

  Further, when performing encoding and decoding using orthogonal transform as in Patent Document 3 described above, image data is degraded because it undergoes quantization and inverse quantization. However, in this case, in the second and subsequent encodings and decodings, the decoded digital image signal does not deteriorate significantly, and unauthorized copying using the analog image signal Van described above cannot be prevented.

  The object of the present invention is to prevent image data from being displayed, increase the circuit scale, etc., and to cause image data to deteriorate significantly in the second and subsequent encodings and decoding, and to use fraud using analog signals. It is to prevent copying.

  The signal processing system according to the present invention includes a decoding unit that performs a decoding process on an encoded digital signal to obtain a decoded digital signal, and an analog distortion associated with the decoded digital signal obtained by the decoding unit. Digital / analog conversion means for obtaining an analog signal by performing digital / analog conversion processing; and analog / digital conversion means for obtaining a digital signal by performing analog / digital conversion processing on the analog signal obtained by the digital / analog conversion means; And an encoding means for obtaining an encoded digital signal by performing an encoding process on the digital signal obtained by the analog / digital conversion means, the encoding means for the digital signal obtained by the analog / digital conversion means Block with shuffling of a predetermined pattern that lowers the correlation between data at adjacent positions. And blocking means for performing reduction, it is those having a block coding means for obtaining encoded digital signal by performing block encoding on data of each block obtained by the blocking means.

  The signal processing apparatus according to the present invention also includes a decoding unit that performs a decoding process on an encoded digital signal to obtain a decoded digital signal, and an analog distortion for the decoded digital signal obtained by the decoding unit. Digital-to-analog conversion means for obtaining an analog signal by performing digital-to-analog conversion processing accompanied with analog and analog-to-digital conversion for obtaining a digital signal by performing analog-to-digital conversion processing on the analog signal obtained by the digital-to-analog conversion means And an encoding means for obtaining an encoded digital signal by performing an encoding process on the digital signal obtained by the analog / digital conversion means, and the encoding means is a digital signal obtained by the analog / digital conversion means Block with shuffling of a predetermined pattern that lowers the correlation between data at adjacent positions. And blocking means for performing click of those having the block encoding means for obtaining encoded digital signal by performing block encoding on data of each block obtained by the blocking means.

  In addition, the signal processing method according to the present invention includes a decoding step of performing decoding processing on an encoded digital signal to obtain a decoded digital signal, and analog distortion on the decoded digital signal obtained in the decoding step. Digital-to-analog conversion process to obtain an analog signal by performing digital-analog conversion processing accompanied with analog and analog-to-digital conversion to obtain a digital signal by performing analog-to-digital conversion processing on the analog signal obtained in the digital-to-analog conversion process A digital signal obtained in the analog / digital conversion step, and an encoding step of performing an encoding process on the digital signal obtained in the analog / digital conversion step to obtain an encoded digital signal. Block with shuffling of a predetermined pattern that lowers the correlation between data at adjacent positions. A blocking step of performing click of those having a block coding step of obtaining a coded digital signal by performing block encoding on data of each block obtained by the blocking step.

  Also, the encoding device according to the present invention is an input means for inputting an analog signal obtained by sequentially performing an encoding process, a decoding process, and a digital / analog conversion process causing analog distortion on the first digital signal. Analog / digital conversion means for performing analog / digital conversion processing on the analog signal input from the input means and outputting a second digital signal; and second digital signal output from the analog / digital conversion means Coding means for obtaining a coded digital signal by performing coding processing on the first digital signal, and the coding means has a predetermined pattern such that the correlation between data at adjacent positions with respect to the second digital signal is low. Blocking means for performing blocking with shuffling, and block coding for each block data obtained by the blocking means Those having a block coding means for obtaining No. of digital signals.

An encoding method according to the present invention includes an input step of inputting an analog signal obtained by sequentially performing an encoding process, a decoding process, and a digital / analog conversion process that generates analog distortion on the first digital signal. An analog-to-digital conversion process for performing an analog-to-digital conversion process on the analog signal input in the input process and outputting a second digital signal;
And an encoding step of obtaining an encoded digital signal by performing an encoding process on the second digital signal output in the analog-digital conversion step, and the encoding step is adjacent to the second digital signal Blocking process that performs blocking with shuffling of a predetermined pattern so that the correlation between the position data is low, and the block-encoded data obtained by performing block coding on the data of each block obtained in the blocking process And a block encoding step for obtaining

In addition, the decoding device according to the present invention provides a block code in which data of each block obtained by subjecting a digital signal to blocking with shuffling in a predetermined pattern so that the correlation between adjacent data is low An apparatus for decoding an encoded digital signal obtained by encoding, block decoding means for performing block decoding processing on the encoded digital signal, and data of each block obtained by the block decoding means Deblocking means that deblocks and deblocks based on a predetermined pattern, and digital / analog that outputs the analog signal by performing digital-to-analog conversion processing with analog distortion on the digital signal obtained by the deblocking means Conversion means .

Also, the decoding method according to the present invention is such that the data of each block obtained by performing blocking with shuffling in a predetermined pattern such that the correlation between adjacent data is low with respect to the digital signal is block code. A block decoding step of performing block decoding processing on the encoded digital signal, and data of each block obtained in the block decoding step Digital / analog that outputs the analog signal by performing the digital / analog conversion processing with analog distortion on the digital signal obtained by the deblocking means and the deblocking process that deblocks and deblocks based on the predetermined pattern A conversion step .

  In the present invention, an analog signal with analog distortion is converted into a digital signal, and the digital signal is subjected to encoding processing to obtain an encoded digital signal. For example, analog distortion is distortion caused by removing a high frequency component during digital / analog conversion, distortion caused by a phase shift of a signal during digital / analog conversion, and the like. Here, the encoding process increases deterioration of the encoded digital signal due to the influence of analog distortion on the digital signal.

  In this case, with regard to encoding and decoding for the second and subsequent times, the above-described encoding processing is always performed on the digital signal corresponding to the analog signal with analog distortion, and the deterioration of the encoded digital signal becomes large. . Therefore, unauthorized copying using an analog signal can be prevented.

  For example, the encoding is block encoding. In this case, the digital signal corresponding to the analog signal is blocked, and block coding is performed on the data of each block. In this case, the blocking is, for example, blocking with a predetermined pattern of shuffling so that the correlation between data at adjacent positions included in each block is low. As a result, with respect to the second and subsequent encodings and decodings described above, information lost in the encoding process, for example, high frequency components can be increased, and the degradation of the decoded digital signal is further increased.

  According to the present invention, the encoding process that increases the deterioration of the encoded digital signal due to the influence of the analog distortion on the digital signal is performed, and the decoded digital signal is not encoded in the second encoding and decoding. It is possible to satisfactorily prevent illegal copying using an analog signal obtained by remarkably deteriorating, decoding an encoded digital signal, and further performing digital-analog conversion.

  In addition, according to the present invention, block encoding is performed, and blocking with shuffling of a predetermined pattern is performed so that the correlation between data at adjacent positions included in the block is low. Degradation of the decoded digital signal in subsequent encoding and decoding can be further increased.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a configuration of an image display system 100 as an embodiment.

  The image display system 100 includes a playback device 110 that outputs an analog image signal Van1 and a display 120 that displays an image based on the analog image signal Van1 output from the playback device 110.

  In the reproduction device 110, a coded digital image signal reproduced from a recording medium such as an optical disk (not shown) is decoded by the decoding unit 111, and the decoded digital image signal Vdg0 obtained by further decoding is decoded by a D / A converter. By converting into an analog signal at 112, an analog image signal Van1 is obtained. The display 120 is a CRT display, LCD, or the like, for example.

  In this case, the analog image signal Van1 is accompanied by analog distortion. This analog distortion includes distortion caused by removing high-frequency components when the analog signal is converted by the D / A converter 112, and the phase of the signal is shifted when the analog signal is converted by the D / A converter 112. The distortion etc. which arise by this are included. Note that methods for evaluating image degradation due to analog distortion include S / N (Signal-to-Noise) evaluation, visual evaluation (visual deterioration evaluation), and the like. This analog distortion may occur naturally or intentionally.

  The image display system 100 further includes an encoding device 130 that performs an encoding process again using the analog image signal Van1 and records the encoded digital image signal Vcd on a recording medium such as an optical disk.

  The encoding device 130 encodes the A / D converter 134 that converts the analog image signal Van1 output from the playback device 110 into a digital signal, and the digital image signal Vdg1 output from the A / D converter 134. And an encoding unit 135. In the encoding unit 135, encoding similar to the encoded digital image signal obtained by reproducing from the recording medium such as an optical disk by the reproducing apparatus 110 described above is performed.

  FIG. 2 shows a configuration of the encoding unit 135. The encoding unit 135 includes an input terminal 141 for inputting the digital image signal Vdg1, a blocking circuit 142 for dividing the image data Vdg1 input to the input terminal 141 into blocks (DCT blocks), and the blocking circuit 142. And a shuffling circuit 143 for performing block reconfiguration by performing shuffling on the pixel data of each block obtained in (1).

  In this case, the blocking circuit 142 and the shuffling circuit 143 constitute blocking means. In this blocking means, a shuffling of a predetermined pattern is performed so that the correlation between pixel data at adjacent positions included in each block is low. Blocking with rings is performed.

  That is, in the blocking circuit 142, the image signal Vdg1 of the effective screen is divided into blocks BL having a size of (4 × 4) pixels, for example, as shown in FIG. In addition, in the shuffling circuit 143, as shown in FIG. 4, a macroblock MB is composed of 16 (= 4 × 4) blocks BL, and one each of the 16 blocks constituting the macroblock MB is provided. By extracting the pixel data, one block is reconstructed, and as a result, 16 new blocks BL1 to BL16 are reconstructed from the macroblock MB. In FIG. 4, “◯” indicates pixel data constituting the block.

  Also, the encoding unit 135 performs DCT as orthogonal transform on the pixel data of each block obtained by the shuffling circuit 143 for each block, and calculates coefficient data as transform coefficients, and a DCT circuit 144 that calculates coefficient data as transform coefficients, A quantization circuit 145 that quantizes the coefficient data of each block from the DCT circuit 144 using a quantization table (not shown).

  Also, the encoding unit 135 performs entropy encoding, for example, Huffman encoding, on the coefficient data of each block quantized by the quantization circuit 145 to obtain an encoded digital image signal Vcd. And an output terminal 147 for outputting the encoded digital image signal Vcd obtained by the entropy encoding circuit 146.

  The operation of the encoding unit 135 shown in FIG. 2 will be described. The digital image signal Vdg1 is input to the input terminal 141. The image signal Vdg1 is supplied to the blocking circuit 142. In the blocking circuit 142, the image signal Vdg1 of the effective screen is divided into two-dimensional blocks having a size of (4 × 4) pixels, for example.

  The pixel data of each block obtained by the blocking circuit 142 is further supplied to the shuffling circuit 143 and shuffled. Thereby, block formation is performed such that the correlation between pixel data at adjacent positions included in each block is low.

  That is, in the shuffling circuit 143, as shown in FIG. 4, a macroblock MB is configured by 16 (= 4 × 4) blocks BL, and one each of the 16 blocks constituting the macroblock MB is provided. By extracting the pixel data, one block is reconstructed, and as a result, 16 new blocks BL1 to BL16 are reconstructed from the macroblock MB.

  Pixel data of each block obtained by the shuffling circuit 143 is supplied to the DCT circuit 144. The DCT circuit 144 performs DCT on the pixel data of each block for each block to calculate coefficient data as a conversion coefficient. The coefficient data is supplied to the quantization circuit 145.

  In the quantization circuit 145, coefficient data of each block is quantized using a quantization table, and quantized coefficient data of each block is sequentially obtained. The quantized coefficient data of each block is supplied to the entropy encoding circuit 146. In the encoding circuit 146, for example, Huffman encoding is performed on the quantized coefficient data of each block. As a result, the encoded digital image signal Vcd is obtained from the encoding circuit 146, and this image signal Vcd is output to the output terminal 147.

  The processing of the encoding unit 135 described above can also be performed by software. The flowchart of FIG. 5 shows the procedure of the encoding process in that case.

  First, in step ST1, the image signal Vdg1 is input, for example, for one frame. In step ST2, the image signal Vdg1 is blocked with shuffling. That is, the image signal Vdg1 is divided into two-dimensional blocks BL having a size of (4 × 4) pixels, and pixel data is shuffled in the 16 blocks BL constituting the macroblock MB. Blocks BL1 to BL16 are reconfigured (see FIG. 4).

  Next, in step ST3, DCT is performed on the pixel data of each block for each block to calculate coefficient data as transform coefficients. In step ST4, the coefficient data of each block is quantized using the quantization table, and the quantized coefficient data of each block is sequentially obtained.

  Next, in step ST5, for example, Huffman coding is performed on the quantized coefficient data of each block to generate an encoded digital image signal Vcd. In step ST6, the generated image signal Vcd for one frame is output.

  Next, in step ST7, it is determined whether or not the processing for all the frames to be processed has been completed. When the processing for all the frames has not been completed, the process returns to step ST1, and the image signal Vdg1 for the next one frame is input, and the same encoding process as described above is performed. On the other hand, when the process for all frames is completed, the encoding process is terminated.

  Returning to FIG. 1, the encoding device 130 also includes a recording unit 136 that records the encoded digital image signal Vcd output from the encoding unit 135 on a recording medium such as an optical disk. In this case, the recording unit 136 performs copying based on the analog image signal Van1.

  The encoding device 130 also decodes the encoded digital image signal Vcd output from the encoding unit 135, and the decoded digital image signal obtained by decoding by the decoding unit 137. A D / A converter 138 that converts Vdg2 into an analog signal and a display 139 that displays an image based on the analog image signal Van2 output from the D / A converter 138 are provided. The display 139 is, for example, a CRT display, LCD, or the like.

  FIG. 6 shows the configuration of the decoding unit 137. The decoding unit 137 decodes an input terminal 151 to which the encoded digital image signal Vcd is input and an image signal Vcd (an entropy encoded signal, for example, a Huffman encoded signal) input to the input terminal 151. And an entropy decoding circuit 152 as variable length decoding means.

  In addition, the decoding unit 137 performs inverse quantization on the quantized coefficient data of each block output from the decoding circuit 152, and obtains coefficient data of each block, An inverse DCT circuit 154 that obtains pixel data by performing inverse DCT for each block on the coefficient data of each block obtained by the inverse quantization circuit 153 is provided.

  In addition, the decoding unit 137 deshuffling the pixel data of each block obtained from the inverse DCT circuit 154, and returns the pixel data of each block obtained by the deshuffling circuit 155 to the position before blocking. The block decomposition circuit 156 for obtaining the decoded digital image signal Vdg2 and the output terminal 157 for outputting the image signal Vdg2 output from the block decomposition circuit 156 are provided. Here, the deshuffling circuit 155 and the block decomposition circuit 156 constitute deblocking means.

  In the deshuffling circuit 155, the reverse process of the shuffling circuit 143 in the encoding unit 135 described above is performed. That is, in the deshuffling circuit 155, the pixel data of the 16 blocks BL1 to BL16 are returned to the corresponding positions of the original 16 blocks BL (see FIG. 4). Further, the block decomposition circuit 156 performs a process reverse to that of the block circuit 142 in the encoding unit 135 described above. That is, in the block decomposition circuit 156, the data order is returned to the raster scan order.

  The operation of the decoding unit 137 shown in FIG. 6 will be described. The encoded digital image signal Vcd is input to the input terminal 151. This image signal Vcd is supplied to the entropy decoding circuit 152. The image signal Vcd is an entropy encoded signal, for example, a Huffman encoded signal. In the decoding circuit 152, the image signal Vcd is decoded, and quantized coefficient data of each block is obtained. The quantized coefficient data of each block is supplied to the inverse quantization circuit 153.

  In the inverse quantization circuit 153, inverse quantization is performed on the quantized coefficient data of each block, and coefficient data of each block is obtained. The coefficient data of each block is supplied to the inverse DCT circuit 154. In the inverse DCT circuit 154, inverse DCT is performed for each block on the coefficient data of each block to obtain pixel data of each block.

  Thus, the pixel data of each block obtained by the inverse DCT circuit 154 is supplied to the deshuffling circuit 155. In the deshuffling circuit 155, the pixel data of the 16 blocks BL1 to BL16 are returned to the corresponding positions of the original 16 blocks BL.

  Then, the pixel data of each block BL obtained by the deshuffling circuit 155 is supplied to the block decomposition circuit 156. In this block decomposition circuit 156, the order of pixel data is returned to the order of raster scanning. Thus, a decoded digital image signal Vdg2 is obtained from the block decomposition circuit 156, and this image signal Vdg2 is output to the output terminal 157.

  The processing of the decryption unit 137 described above can also be performed by software. The flowchart of FIG. 7 shows the procedure of the decoding process in that case.

  First, in step ST11, the image signal Vcd is input, for example, for one frame. In step ST12, entropy decoding is performed on the image signal Vcd to obtain quantized coefficient data of each block.

  Next, in step ST13, inverse quantization is performed on the quantized coefficient data of each block to obtain coefficient data of each block. In step ST14, inverse DCT is performed for each block on the coefficient data of each block to obtain pixel data of each block.

  Next, block decomposition with deshuffling is performed in step ST15. That is, the pixel data of the 16 blocks BL1 to BL16 are returned to the corresponding positions of the original 16 blocks BL (see FIG. 4), and the order of the pixel data is returned to the raster scan order, and the decoded digital An image signal Vdg2 is generated. In step ST16, the generated image signal Vdg2 for one frame is output.

  Next, in step ST17, it is determined whether or not the processing for all the frames to be processed has been completed. When the processing for all the frames has not been completed, the process returns to step ST11, the next one frame of the image signal Vcd is input, and the same decoding process as described above is performed. On the other hand, when the process for all frames is completed, the decoding process is terminated.

  The operation of the encoding device 130 shown in FIG. 1 will be described. An analog image signal Van1 with analog distortion output from the playback device 110 is supplied to the A / D converter 134 and converted into a digital signal. The digital image signal Vdg1 output from the A / D converter 134 is supplied to the encoding unit 135. In the encoding unit 135, the image signal Vdg1 is encoded to obtain an encoded digital image signal Vcd.

  In the encoding unit 135, as described above, the image signal Vdg1 is blocked with shuffling of a predetermined pattern so that the correlation between data at adjacent positions included in each block is low. DCT as orthogonal transform is performed on the pixel data of, the coefficient data of each block is quantized, and entropy coding is performed on the quantized coefficient data of each block. An encoded digital image signal Vcd is obtained.

  The encoded digital image signal Vcd output from the encoding unit 135 is supplied to the recording unit 136. In the recording unit 136, the image signal Vcd is recorded on a recording medium such as an optical disk, and copying based on the analog image signal Van1 is performed.

  When the analog image signal Van1 output from the player 110 has been subjected to the first encoding and decoding, an image obtained by decoding after reproducing the image signal Vcd recorded on the recording medium as described above The signal is subjected to the second encoding and decoding. In this case, since the analog image signal Van1 is accompanied by analog distortion, a decoded digital image signal obtained by decoding after reproducing the image signal Vcd recorded on the recording medium is output from the decoding unit 111. Compared with the decoded digital image signal Vdg0, it is greatly deteriorated.

  That is, for example, when the analog image signal Van1 is distorted due to a shift in the phase of the signal when converted to an analog signal, the A / D converter 134 may cause sampling phase fluctuations when converted to a digital signal. The block position of each block obtained by blocking by the encoding unit 135 is shifted from the block position in the first encoding and decoding.

  Therefore, more information is lost by quantization in the encoding unit 135. That is, the analog signal Van1 output from the D / A converter 112 is a signal from which a high-frequency component has been removed, and the signal level at a position different from the sampling position includes distortion. For this reason, when the sampling phase fluctuates in the A / D converter 134, a signal including distortion is A / D converted, and much information is obtained by quantization of the digital signal Vdg1 obtained by the A / D converter 134. Is lost. Therefore, the decoded digital image signal obtained by decoding after reproducing the image signal Vcd recorded on the recording medium is greatly degraded as compared with the decoded digital image signal Vdg0 obtained from the decoding unit 111 of the player 110. It will be a thing.

  Here, as described above, the encoding unit 135 performs blocking with shuffling of a predetermined pattern such that the correlation between pixel data at adjacent positions included in each block is low. That is, pixel data fluctuations between adjacent pixels after blocking are independent of the correlation with neighboring pixel data fluctuations. Thereby, the change of the coefficient data of each block accompanying the shift of the block position can be increased, and the information lost by the quantization can be further increased. That is, by performing this shuffling, the influence of analog distortion can be increased. Furthermore, when there is no analog distortion, reproduction with normal quality is possible even if shuffling is performed.

  When the analog image signal Van1 output from the playback device 110 has been subjected to encoding and decoding for the second time and thereafter, it is encoded by the encoding unit 135 and further decoded as described above. The image data has undergone encoding and decoding for the third and subsequent times, and is further deteriorated.

  Therefore, the image quality of the image obtained by reproducing the encoded digital image signal Vcd recorded on the recording medium by the recording unit 136 is greatly deteriorated compared to the image by the analog image signal Van1 output from the reproducing device 110. It becomes. Therefore, the encoding device 130 cannot perform copying while maintaining good image quality.

  The encoded digital image signal Vcd output from the encoding unit 135 is supplied to the decoding unit 137 and decoded. A decoded digital image signal Vdg2 obtained by decoding by the decoding unit 137 is converted into an analog image signal Van2 by a D / A converter 138. Then, the image signal Van2 output from the D / A converter 138 is supplied to the display 139. The display 139 displays an image based on the image signal Van2.

  In this case, when the analog image signal Van1 output from the playback device 110 has undergone the first encoding and decoding, it is encoded by the encoding unit 135 as described above, and further decoded by the decoding unit 137. The image signal Van2 obtained by the conversion is subjected to the second encoding and decoding, and is greatly deteriorated as described above. Therefore, the image quality of the image displayed on the display 139 is significantly deteriorated as compared with the image (displayed on the display 120) based on the analog image signal Van1 output from the playback device 110.

  Further, in the case of the image display system 100 shown in FIG. 1, in order to make it impossible for the encoding device 130 to copy while maintaining good image quality, the analog image signal Van1 output from the playback device 110 is processed in any way. The image quality of the image signal Van1 is not deteriorated.

  As described above, in the present embodiment, the encoding unit 135 of the encoding device 130 uses the digital image signal Vdg1 obtained by converting the analog image signal Van1 with analog distortion, which is output from the playback device 110, into a digital signal. Thus, encoding using block encoding is performed. The encoded digital image signal Vcd obtained by the encoding unit 135 is recorded on the recording medium by the recording unit 136.

  In this case, when the analog image signal Van1 output from the player 110 has undergone the first encoding and decoding, the image signal obtained by decoding after reproducing the image signal Vcd recorded on the recording medium Becomes the one that has undergone the second encoding and decoding and greatly deteriorated.

  Therefore, when the analog signal Van1 is used and the image is re-encoded by the encoding device 130 and recorded on the recording medium, the image data is greatly deteriorated, so that it is impossible to copy while maintaining good image quality. Thus, illegal copying using an analog image signal can be satisfactorily prevented.

  In the above embodiment, the encoding unit 135 performs block encoding using DCT as orthogonal transform. This orthogonal transformation is not limited to DCT, and other orthogonal transformations such as DST (Discrete Sine Transform), wavelet transformation, etc. may be used. Also, the encoding is not limited to block encoding, and may be other encoding. In short, the encoding process only needs to increase the deterioration of the encoded digital signal due to the influence of analog distortion on the digital signal.

  Further, the block coding is not limited to the one using orthogonal transform, and other block coding may be used. For example, the block coding may be ADRC (Adaptive Dynamic Range Coding).

  In this case, the encoding unit 135 is configured as shown in FIG.

  The digital image signal Vdg1 input to the input terminal 401 is supplied to the blocking circuit 402. In the blocking circuit 402, the image signal Vdg1 of the effective screen is divided into blocks having a size of, for example, (4 × 4) pixels.

  Pixel data of each block obtained by the blocking circuit 402 is supplied to the shuffling circuit 143. In the shuffling circuit 143, the pixel data of each block obtained by the blocking circuit 402 is subjected to shuffling processing to reconfigure the blocks (see FIG. 4).

  The pixel data of each block obtained by the shuffling circuit 143 is supplied to the maximum value detection circuit 403 and the minimum value detection circuit 404. The maximum value detection circuit 403 detects the maximum value MAX of the pixel data in the block for each block. The minimum value detection circuit 404 detects the minimum value MIN of the pixel data in the block for each block. The maximum value MAX and the minimum value MIN detected by the detection circuits 403 and 404 are supplied to the subtracter 405. In the subtractor 405, the dynamic range DR = MAX−MIN is calculated.

  Further, pixel data of each block obtained by the shuffling circuit 143 is supplied to the subtractor 407 after time adjustment by the delay circuit 406. The subtracter 407 is also supplied with the minimum value MIN detected by the minimum value detection circuit 404. In this subtractor 407, for each block, the minimum value MIN of the block is subtracted from the pixel data in the block to obtain minimum value removal data PDI.

  The minimum value removal data PDI of each block obtained by the subtractor 407 is supplied to the quantization circuit 408. The quantizing circuit 408 is supplied with the dynamic range DR obtained by the subtracter 405. In the quantization circuit 408, the minimum value removal data PDI is quantized by a quantization step determined according to the dynamic range DR. That is, the quantization circuit 408 sets a level range in which the dynamic range DR between the maximum value MAX and the minimum value MIN is equally divided by 2n, where n is the number of quantization bits, and which is the minimum value removal data PDI. An n-bit code signal is assigned depending on whether it belongs to the level range.

  FIG. 9 shows a case where the number of quantization bits is 3, in which a level range in which the dynamic range DR between the maximum value MAX and the minimum value MIN is equally divided is set, and the minimum value removal data PDI is Depending on whether it belongs to the level range, 3-bit code signals (000) to (111) are assigned. In FIG. 9, th1 to th7 are threshold values indicating the boundaries of the level range.

  Returning to FIG. 8, the code signal DT obtained by the quantization circuit 408 is supplied to the data synthesis circuit 411. The dynamic range DR obtained by the subtracter 405 is time-adjusted by the delay circuit 409 and supplied to the data synthesis circuit 411, and the minimum value MIN detected by the minimum value detection circuit 404 is also time-adjusted by the delay circuit 410. Supplied. In this data synthesizing circuit 411, block data is generated by synthesizing the minimum value MIN, the dynamic range DR, and the code signal DT corresponding to the number of pixels in the block for each block. The block data of each block generated by the data synthesis circuit 411 is sequentially output as an encoded digital image signal Vcd to the output terminal 412.

  The decoding unit 137 is configured as shown in FIG.

  The encoded digital image signal Vcd input to the input terminal 421 is supplied to the data decomposition circuit 422 and is decomposed into a minimum value MIN, a dynamic range DR, and a code signal DT for each block.

  The code signal DT of each block output from the data decomposition circuit 422 is supplied to the inverse quantization circuit 423. The inverse quantization circuit 423 is also supplied with the dynamic range DR output from the data decomposition circuit 422. In the inverse quantization circuit 423, the code signal DT of each block is inversely quantized based on the dynamic range DR of the corresponding block, and the minimum value removal data PDI 'is obtained.

  In this case, as shown in FIG. 9, the dynamic range DR is equally divided by the number of quantization bits, and the median values L1 to L8 of each region are used as decoded values (minimum value removal data PDI ′) of each code signal DT. Is done.

  The minimum value removal data PDI ′ of each block obtained by the inverse quantization circuit 423 is supplied to the adder 424. The adder 424 is also supplied with the minimum value MIN output from the data decomposition circuit 422. The adder 424 adds the minimum value MIN to the minimum value removal data PDI ′ to obtain pixel data of each block.

  The pixel data of each block obtained by the adder 424 is supplied to the deshuffling circuit 155. In the deshuffling circuit 155, the pixel data of the 16 blocks BL1 to BL16 are returned to the corresponding positions of the original 16 blocks BL (see FIG. 4).

  Then, the pixel data of each block BL obtained by the deshuffling circuit 155 is supplied to the block decomposition circuit 425. In the block decomposition circuit 425, the order of data is returned to the order of raster scanning. As a result, a decoded digital image signal Vdg2 is obtained from the block decomposition circuit 425. The image signal Vdg2 is output to the output terminal 426.

  In the above embodiment, as shown in FIG. 4, an example of the shuffling pattern performed in the macro block MB composed of 16 blocks BL is shown. However, the shuffling pattern is not limited to this. Absent. In short, any shuffling pattern may be used so that the correlation between pixel data at adjacent positions included in each block is low. For example, as shown in FIG. 11, the position of the pixel data may be interchanged within the block BL. In FIG. 11, “◯” indicates pixel data constituting the block, FIG. 11A shows a state before replacement, and FIG. 11B shows a state after replacement. This is also an example, and the number and group of pixel data to be replaced and the replacement position are not limited to this.

  In the above-described embodiment, the image signal is handled. However, the present invention can be similarly applied to an audio signal. In the case of an audio signal, a display portion serving as a display unit corresponds to a speaker serving as an audio output unit.

It is a block diagram which shows the structure of the image display system as embodiment. It is a block diagram which shows the structure of an encoding part. It is a figure for demonstrating blocking. It is a figure for demonstrating an example of a shuffling pattern. It is a flowchart which shows the procedure of an encoding process. It is a block diagram which shows the structure of a decoding part. It is a flowchart which shows the procedure of a decoding process. It is a block diagram which shows the other structure of an encoding part. It is a figure for demonstrating the operation | movement of the quantization of ADRC, and an inverse quantization. It is a block diagram which shows the other structure of a decoding part. It is a figure for demonstrating the other example of a shuffling pattern. It is a block diagram which shows the structure of the conventional image display system. It is a block diagram which shows the structure of the conventional encoding apparatus. It is a block diagram which shows the structure of the conventional decoding apparatus.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 100 ... Image display system, 110 ... Reproduction machine, 111 ... Decoding part, 112 ... D / A converter, 120,139 ... Display, 130 ... Encoding apparatus, 134 ... A / D converter, 135 ... encoding unit, 136 ... recording unit, 137 ... decoding unit, 138 ... D / A converter, 141 ... input terminal, 142 ... Blocking circuit, 143 ... Shuffling circuit, 144 ... DCT circuit, 145 ... Quantization circuit, 146 ... Entropy coding circuit, 147 ... Output terminal, 151 ... Input terminal, 152 ... entropy decoding circuit, 153 ... inverse quantization circuit, 154 ... inverse DCT circuit, 155 ... deshuffling circuit, 156 ... block decomposition circuit, 157 ... output terminal

Claims (26)

Decoding means for performing a decoding process on the encoded digital signal to obtain a decoded digital signal;
Digital / analog conversion means for obtaining an analog signal by performing digital-analog conversion processing with analog distortion on the decoded digital signal obtained by the decoding means;
Analog-digital conversion means for obtaining a digital signal by performing analog-digital conversion processing on the analog signal obtained by the digital-analog conversion means,
Encoding means for performing an encoding process on the digital signal obtained by the analog-digital conversion means to obtain an encoded digital signal;
The encoding means is
Blocking means for performing blocking with shuffling of a predetermined pattern such that the correlation between data at adjacent positions is low with respect to the digital signal obtained by the analog / digital conversion means;
And a block encoding unit that obtains an encoded digital signal by performing block encoding on the data of each block obtained by the blocking unit. Decoding means for performing a decoding process on the encoded digital signal to obtain a decoded digital signal;
Digital / analog conversion means for obtaining an analog signal by performing digital-analog conversion processing with analog distortion on the decoded digital signal obtained by the decoding means;
Analog-digital conversion means for obtaining a digital signal by performing analog-digital conversion processing on the analog signal obtained by the digital-analog conversion means,
Encoding means for performing an encoding process on the digital signal obtained by the analog-digital conversion means to obtain an encoded digital signal;
The encoding means is
Blocking means for performing blocking with shuffling of a predetermined pattern such that the correlation between data at adjacent positions is low with respect to the digital signal obtained by the analog / digital conversion means;
And a block coding unit that obtains an encoded digital signal by performing block coding on the data of each block obtained by the blocking unit. 3. The signal processing apparatus according to claim 2, wherein the block forming is a block forming data having a predetermined number of positions away from a digital signal obtained by the analog / digital conversion means as one block. . The signal processing apparatus according to claim 2, wherein the block formation is block formation accompanied by shuffling such that at least one set of data in the block is exchanged. The block encoding means includes
Orthogonal transform means for obtaining transform coefficients by performing orthogonal transform on the data of each block obtained by the blocking means;
The signal processing apparatus according to claim 2, further comprising: a quantization unit that quantizes the transform coefficient of each block from the orthogonal transform unit. The block encoding means includes
A maximum / minimum value detecting means for detecting the maximum value and the minimum value of the data in the block;
Dynamic range detection means for detecting the dynamic range of the data in the block from the maximum value and minimum value detected by the maximum value / minimum value detection means;
Generating means for subtracting the minimum value detected by the maximum value / minimum value detecting means from the data in the block to generate minimum value removal data;
Quantizing means for quantizing the minimum value removal data generated by the generating means by a quantization step determined according to the dynamic range detected by the dynamic range detecting means to obtain an encoded digital signal. The signal processing apparatus according to claim 2. The signal processing apparatus according to claim 2, wherein the analog distortion is distortion generated by removing a high-frequency component during digital-analog conversion. The signal processing apparatus according to claim 2, wherein the analog distortion is distortion caused by a phase shift of a signal during digital-analog conversion. The signal processing apparatus according to claim 2, wherein the digital signal is a digital image signal. The signal processing apparatus according to claim 2, wherein the digital signal is a digital audio signal. A decoding step of performing a decoding process on the encoded digital signal to obtain a decoded digital signal;
A digital-to-analog conversion step for obtaining an analog signal by performing a digital-to-analog conversion process with analog distortion on the decoded digital signal obtained in the decoding step;
An analog-digital conversion process for obtaining a digital signal by performing an analog-digital conversion process on the analog signal obtained in the digital-analog conversion process,
An encoding step of performing an encoding process on the digital signal obtained in the analog / digital conversion step to obtain an encoded digital signal,
The encoding step is
Blocking step for performing blocking with shuffling of a predetermined pattern such that the correlation between data at adjacent positions is low with respect to the digital signal obtained in the analog / digital conversion step;
And a block encoding step of performing block encoding on the data of each block obtained in the block forming step to obtain an encoded digital signal. An input means for inputting an analog signal obtained by sequentially performing an encoding process, a decoding process, and a digital-analog conversion process that generates analog distortion on the first digital signal;
Analog-to-digital conversion means for performing analog-to-digital conversion processing on the analog signal input from the input means and outputting a second digital signal;
Encoding means for obtaining an encoded digital signal by performing an encoding process on the second digital signal output from the analog / digital conversion means;
The encoding means is
Blocking means for performing blocking with shuffling of a predetermined pattern such that the correlation between data at adjacent positions is low with respect to the second digital signal;
An encoding apparatus comprising: block encoding means for performing block encoding on the data of each block obtained by the blocking means to obtain an encoded digital signal. 13. The encoding apparatus according to claim 12, wherein the blocking is blocking in which data separated by a predetermined number from the second digital signal is used as one block. The encoding apparatus according to claim 12, wherein the block formation is block formation accompanied by shuffling such that at least one set of data in the block is exchanged. The block encoding means includes
Orthogonal transform means for obtaining transform coefficients by performing orthogonal transform on the data of each block obtained by the blocking means;
The encoding apparatus according to claim 12, further comprising: a quantization unit that quantizes the transform coefficient of each block from the orthogonal transform unit. The encoding apparatus according to claim 15, wherein the orthogonal transform is a discrete cosine transform. The encoding apparatus according to claim 15, wherein the orthogonal transform is a discrete sine transform. The encoding apparatus according to claim 15, wherein the orthogonal transform is a wavelet transform. The block encoding means includes
A maximum / minimum value detecting means for detecting the maximum value and the minimum value of the data in the block;
Dynamic range detection means for detecting the dynamic range of the data in the block from the maximum value and minimum value detected by the maximum value / minimum value detection means;
Generating means for subtracting the minimum value detected by the maximum value / minimum value detecting means from the data in the block to generate minimum value removal data;
Encoding means for quantizing the minimum value removal data generated by the generation means by a quantization step determined according to the dynamic range detected by the dynamic range detection means to obtain an encoded digital signal. The encoding apparatus according to claim 12. The encoding apparatus according to claim 12, wherein the analog distortion is distortion generated by removing a high-frequency component during digital-analog conversion. The encoding apparatus according to claim 12, wherein the analog distortion is distortion caused by a phase shift of a signal during digital-analog conversion. The encoding apparatus according to claim 12, wherein the digital signal is a digital image signal. The encoding apparatus according to claim 12, wherein the digital signal is a digital audio signal. An input step of inputting an analog signal obtained by sequentially performing an encoding process, a decoding process, and a digital-analog conversion process that generates analog distortion on the first digital signal;
An analog-to-digital conversion step of performing an analog-to-digital conversion process on the analog signal input in the input step and outputting a second digital signal;
An encoding step of performing an encoding process on the second digital signal output in the analog-digital conversion step to obtain an encoded digital signal,
The encoding step is
A blocking step for performing blocking with shuffling of a predetermined pattern such that the correlation between data at adjacent positions is low with respect to the second digital signal;
A block encoding step of performing block encoding on the data of each block obtained in the blocking step to obtain an encoded digital signal. An encoded digital signal obtained by block-coding the data of each block obtained by performing blocking with shuffling in a predetermined pattern such that the correlation between adjacent data is low with respect to the digital signal A device for decoding,
Block decoding means for performing block decoding processing on the encoded digital signal;
Deblocking means for performing deblocking by deshuffling the data of each block obtained by the block decoding means based on the predetermined pattern;
A decoding apparatus comprising: a digital-to-analog conversion unit that performs digital-to-analog conversion processing with analog distortion on a digital signal obtained by the deblocking unit and outputs an analog signal . An encoded digital signal obtained by block-coding the data of each block obtained by performing blocking with shuffling with a predetermined pattern such that the correlation between adjacent data is low with respect to the digital signal A method of decrypting, comprising:
A block decoding step for performing a block decoding process on the encoded digital signal;
A deblocking step of deblocking the data of each block obtained in the block decoding step based on the predetermined pattern and performing deblocking;
A decoding method comprising: a digital / analog conversion step of performing a digital / analog conversion process with analog distortion on a digital signal obtained by the deblocking means and outputting an analog signal .

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