JP4091328B2 - Magnetic storage - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a highly integrated magnetic memory device using a tunnel magnetoresistive effect, which has a ferromagnetic layer / insulating layer / ferromagnetic layer junction and whose tunneling resistance is changed by an external magnetic field, as a memory element.
[0002]
[Prior art]
In recent years, a magnetic random access memory (MRAM) using a tunneling magneto-resistive effect (TMR) has been used as a magnetic storage device having characteristics such as non-volatility, high speed, and long-term reliability. Proposed. The operation principle is described, for example, by S. Tehrani et al. In "Recent Developments in Magnetic Tunnel Junction MRAM" IEEE Trans. Magn., Vol. 36, p.2752, 2000.
[0003]
The operation principle of the MRAM will be briefly described below. First, a magnetic tunnel junction (MTJ: Magnetic Tunnel Junction), which is a main part for obtaining a tunnel magnetoresistance effect, has a structure in which an insulating layer is sandwiched between two ferromagnetic layers. Is a recording layer whose magnetization direction is changed by an external magnetic field, and the other ferromagnetic layer is a fixed magnetization layer. This MTJ is formed in a structure in which the magnetization directions in the two ferromagnetic layers are in a stable state when the magnetization directions are parallel to each other and the two cases where the magnetization directions are antiparallel to each other.
[0004]
When the magnetization directions are parallel to each other between the upper and lower ferromagnetic layers, the tunnel current flowing through the MTJ layer is the largest, that is, the tunnel resistance is the smallest. On the other hand, when the magnetization directions are antiparallel between the upper and lower ferromagnetic layers, the tunnel current is small, that is, the tunnel resistance is the largest. As described above, when the tunnel resistance takes two states within a certain magnetic field range, “1” and “0” can be stored in each state.
[0005]
The change of the electrical resistance through the MTJ layer with respect to the external magnetic field becomes a so-called hysteresis curve as shown in FIG. At this time, the magnetic field necessary for reversing the magnetization of the recording layer is a switching magnetic field, and the magnitude thereof greatly depends on the structure of the MTJ layer.
[0006]
FIG. 6 schematically shows the structure of an MRAM memory cell. A gate electrode (word line) 62 is formed on the silicon substrate 61 via a gate oxide film, and source / drain regions 63 and 64 are formed on the surface of the silicon substrate 61 on both sides of the gate electrode 62. A ground line 65 is connected to the source region 63. A connection plug 66 is connected to the drain region 64. A lower electrode 68 is connected to the connection plug 66, and an MTJ layer 69 is formed on the lower electrode 68. A digit line 67 extending in a direction perpendicular to the paper surface of FIG. 6 is formed below the MTJ layer 69, and a bit line 70 extending in a direction intersecting the digit line 67 is formed above the MTJ layer 69.
[0007]
In order to write “1” or “0” information to the MTJ layer 69 as a storage operation, a pair of bit lines 70 and digit lines 67 arranged in a direction crossing each other are selected, and a current is supplied to both of them. A current magnetic field is generated respectively. If the magnitude of the current magnetic field is appropriately selected, only the magnetic field applied to the MTJ layer 69 of the selected cell located at the cross point between the bit line 70 and the digit line 67 exceeds the switching magnetic field, so that the desired information is obtained. It is written in the MTJ layer 69.
[0008]
On the other hand, in order to read the information “1” or “0” written in the MTJ layer, a voltage is applied to the gate electrode (reading word line) 62 of the MOSFET as the selection transistor to turn on the selection transistor. By detecting the value of the current flowing from the bit line 70 to the ground line 65 through the MTJ layer 69 and reading the difference in tunnel resistance between the different TMR elements, the information of “1” or “0” is determined.
[0009]
As described above, the operation as a magnetic memory device can be obtained by the MRAM structure having the MTJ layer composed of the ferromagnetic layer / insulating layer / ferromagnetic layer. However, there are several problems to achieve further higher integration in the future.
[0010]
As described above, the amount of current flowing through the bit line and the digit line as the write wiring is determined by the switching magnetic field strength derived from the magnetic characteristics of the recording layer of each memory cell. However, there is a characteristic that the switching magnetic field increases as the size of the ferromagnetic material as the recording layer decreases with the miniaturization of the element. For this reason, the amount of current flowing through the current magnetic field wiring increases, and there arises a problem that power consumption of the MRAM increases and a problem that hinders high-speed operation.
[0011]
Conversely, if the MTJ structure is devised to suppress an increase in switching magnetic field, or a structure that generates a large current magnetic field even with a small amount of current due to a complicated wiring structure combined with a magnetic material, the current magnetic field is used as the target. There is a problem of crosstalk in which writing is performed also in a memory cell adjacent to the memory cell, and a problem that long-term stability of the memory holding operation is impaired.
[0012]
Furthermore, the increase in switching magnetic field variation due to the increase in device shape variation due to device miniaturization has the problem of requiring a large peripheral circuit with an extra operating margin in consideration of the variation. This is a factor that prevents high integration.
[0013]
[Problems to be solved by the invention]
As described above, the conventional MRAM using the MTJ layer as a memory element has a problem in miniaturization in response to a demand for further higher integration in the future.
[0014]
An object of the present invention is to provide a magnetic memory device that can prevent an increase in switching magnetic field and realize a stable memory holding operation even if the element is miniaturized.
[0015]
[Means for Solving the Problems]
A magnetic memory device (MRAM) according to one embodiment of the present invention is formed of a recording material, an insulating layer, and a ferromagnetic material that are formed of a ferromagnetic material whose switching magnetic field changes with temperature and whose magnetization direction changes with an external magnetic field. A tunnel magnetoresistive effect element having a junction including a magnetization pinned layer, a bit line and a digit line arranged in directions intersecting each other, which gives a current magnetic field for writing to the tunnel magnetoresistive effect element, the bit line and the bit line It is formed of a heating resistor selected from the group consisting of poly-Si, metal oxynitride film and chalcogenide provided between the tunnel magnetoresistive effect element or between the digit line and the tunnel magnetoresistive effect element. And a temperature control layer.
A magnetic memory device (MRAM) according to another aspect of the present invention is formed of a recording material, an insulating layer, and a ferromagnetic material that are formed of a ferromagnetic material whose switching magnetic field changes with temperature and whose magnetization direction changes with an external magnetic field. A tunnel magnetoresistive element having a junction including a magnetization pinned layer, a bit line and a digit line arranged in directions intersecting each other, which gives a current magnetic field for writing to the tunnel magnetoresistive element, and the bit line And a temperature control layer having a thermoelectric effect provided between the tunnel magnetoresistive effect element or between the digit line and the tunnel magnetoresistive effect element.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below.
In the embodiment of the present invention, a ferromagnetic material whose switching magnetic field changes with temperature change is used for the recording layer, and a temperature control layer is laminated on the recording layer. A heating resistor layer, a thermoelectric effect semiconductor layer, or the like is used as the temperature control layer, and the switching magnetic field of the recording layer is controlled by increasing the temperature of the recording layer or conversely decreasing the temperature.
[0017]
With such a configuration, the recording layer can be magnetically soft at the time of writing so that the magnetization can be easily reversed with a small switching magnetic field, and the recording layer can be magnetically hard at the time of storage holding operation and reading. And stability can be increased.
[0018]
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
FIG. 1 is a cross-sectional view showing one memory cell of a magnetic memory device (MRAM) according to an embodiment of the present invention.
[0019]
As shown in FIG. 1, the word line 12 and the digit line 13 are formed at the same level. The digit line 13 extends in a direction perpendicular to the paper surface of FIG. A contact layer 15 is formed on the word line 12, and a lower electrode 16 is formed in connection with the contact layer 15. An MTJ layer 17 and a heating resistor layer 18 are formed on the lower electrode 16 corresponding to the upper side of the digit line 13. The MTJ layer 17 has a junction structure in which an antiferromagnetic layer 171, a magnetization pinned layer 172, for example, an insulating layer (tunnel barrier) 173 made of AlO _{x of} about 1 to 2 nm and a recording layer (magnetization free layer) 174 are sequentially laminated. . A bit line 21 extending in a direction crossing the digit line 13 is connected to the heating resistor layer 18.
[0020]
1 shows a structure in which the recording layer 174 and the heating resistor layer 18 adjacent thereto are provided on the bit line 21 side. However, the heating resistor 18 and the MTJ layer 17 are turned upside down to generate heat on the digit line 13 side. The resistor layer 18 and the recording layer 174 may be provided.
[0021]
The recording layer 174 of the MTJ layer 17 is formed of a ferromagnetic material whose switching magnetic field changes with temperature. In this embodiment, a ferromagnetic material whose switching magnetic field decreases as the temperature increases is used.
[0022]
In this MRAM, in order to write information in the MTJ layer 17, a pair of bit lines 21, digit lines 13, and word lines 12 arranged in a direction crossing each other are selected. That is, both the bit line 21 and the digit line 13 are energized to generate current magnetic fields, and current is passed from the bit line 21 to the heating resistor layer 18, the MTJ layer 17, and the word line 12 to thereby generate a heating resistor layer. The MTJ layer 17 is heated by causing 18 to generate heat. As a result, the magnetic characteristics of the recording layer 174 of the MTJ layer 17 become soft and the switching magnetic field decreases, so that a low current can be passed through the bit line 21 and the digit line 13 to enable writing with a low switching magnetic field. An increase can be prevented.
[0023]
At this time, since a current flows through each cell connected to the same bit line, the heating resistor of each cell generates heat. However, since the current magnetic field by the target digit line is not applied, the magnetization of the recording layer is not reversed. In addition, although the current magnetic field from the digit line reaches each cell arranged on the same digit line, the recording layer is not heated, so that its magnetic characteristics remain hard, and the magnetization is not reversed by the current magnetic field from the digit line. Therefore, the switching operation is performed only by the memory cell at the cross point where the soft magnetization by heating the recording layer and the current magnetic field application are performed simultaneously.
[0024]
On the other hand, in order to read the information written in the MTJ layer 17, the word line 12 is selected, a sense current is passed from the bit line 21 to the heating resistor layer 18, the MTJ layer 17, and the word line 12, and the tunnel resistance is detected. . Here, the configuration of the memory cell of FIG. 1 is a simple matrix structure having no switching element, but by comparing the reference cell with a simple peripheral circuit configuration by separating the word line 12 and the digit line 13. Can be read out. At this time, in order to effectively detect a change in magnetoresistance generated in the MTJ layer 17, it is desirable that the resistance value of the heating resistor 18 be equal to or less than the resistance value of the MTJ layer 17.
[0025]
As described above, the MRAM according to the embodiment of the present invention is different from the conventional MRAM in that the MTJ layer 17 is energized not only at the time of reading but also at the time of writing. Then, the current value supplied to the MTJ layer 17 for writing is set to be larger than the current value supplied to the read MTJ layer 17. That is, at the time of writing, the MTJ layer 17 is sufficiently heated by the heat generated by the heating resistor layer 18 to facilitate writing. On the other hand, at the time of reading, a sense current that is low enough to detect a change in magnetoresistance is passed. This is because if a large current is passed during reading, the MTJ layer 17 is heated too much by the heat generation of the heating resistor layer 18 and the already recorded magnetization information may be erased.
[0026]
Next, each component of the MRAM according to the embodiment of the present invention will be described in more detail.
[0027]
Many ferromagnetic alloys containing Fe, Co, and Ni as the material of the recording layer are applicable because the switching magnetic field decreases with increasing temperature. The recording layer material has a relatively large switching magnetic field at the temperature of the recording layer at the time of reading, a slightly higher Curie temperature than the temperature of the recording layer at the time of writing, and a large change in the switching magnetic field with respect to the temperature. Is preferred.
[0028]
As a material for the recording layer, a material that causes a magnetic phase transition due to a temperature rise and loses ferromagnetism can also be used. In this case, when the recording layer is heated to eliminate ferromagnetism and then cooled to generate ferromagnetism, information can be written into the memory cell by applying a current magnetic field by digit lines.
[0029]
Since the heating resistor is connected in series with the MTJ layer, a resistance value as small as possible is preferable in order to increase the effective magnetoresistance change amount. On the contrary, a large resistance value is preferable in order to increase the heating value. . As a balance between these, the resistance value of the heating resistor is, for example, approximately the same as that of the MTJ layer.
[0030]
Assuming that a 1 Gbit class MRAM is assumed, the size of the MTJ layer is about 0.1 μm wide × 0.1 μm long, and a desirable junction resistance RA is about 1 kΩμm ^2. 100 kΩ. In order to set the resistance of the heating resistor to 100 kΩ, which is the same as the junction resistance, the size of the heating resistor directly connected to the MTJ layer is assumed to be about 0.1 μm wide × 0.1 μm long × 0.05 μm thick. A material having a specific resistance of about 2 Ωcm is selected. Examples of the material having a specific resistance value of about several Ωcm include semiconductor materials such as poly-Si doped at a high concentration of about 10 ¹⁹ cm ⁻³ , and metal oxynitride films such as TiO _x N _y and TaO _x N _y. And chalcogenides.
[0031]
Here, the power that can be applied to the heating resistor layer is limited mainly by the withstand voltage of the MTJ layers connected in series. Since the double junction MTJ layer using the Al ₂ O ₃ barrier has a breakdown voltage of 3 V or more, the voltage applied to the heating resistor having the same resistance value is the same when the single junction operating range is 1.5 V. It is about 5V.
[0032]
When the heating resistor of the above size is made of a material having a specific resistance of 2 Ωcm, the power consumed by the heating resistor is 15 μW when 1.5 V is applied. When power of 15 μW is applied to the poly Si heating resistor of the above size, the temperature rise ΔT of the heating resistor due to energization heating is about 880 K, assuming that the power pulse application time is 50 ns and there is no heat escape. Become. Since this heat is mainly conducted up and down the heating resistor (because the lateral direction is surrounded by SiO _x having a low thermal conductivity), the temperature of the recording layer of the MTJ layer in contact with the heating resistor is sufficiently switched. Can be raised until it drops.
[0033]
In particular, in the layer structure of the heating resistor / recording layer / tunnel barrier / fixed layer, when the heat flowing from the heating resistor heats the recording layer, an Al ₂ O ₃ tunnel barrier layer having a low thermal conductivity thereunder is formed. Since it functions as a thermal barrier, it is possible to heat the recording layer more effectively.
[0034]
As described above, the operation characteristic of the MRAM according to the embodiment of the present invention is that a large current is passed (the bias voltage is set high) so that the heating resistor sufficiently generates heat and raises the temperature of the recording layer during the write operation. ) During the read operation, the current is reduced to such an extent that an output voltage necessary for high-speed read can be obtained (the bias voltage is set low).
[0035]
When a 1 Gbit class MRAM is assumed, the bias voltage at the time of reading is about 800 mV. The bias voltage at the time of writing is set within the withstand voltage of the MTJ layer and higher than the bias voltage at the time of reading, for example, about 1.5V. At this time, the amount of the temperature rise of the heating resistor is designed so that the switching magnetic field of the recording layer is sufficiently lowered at the time of writing, and the switching magnetic field is not lowered much at the time of reading. The temperature rise amount of the heating resistor can be designed by controlling the resistance, volume and specific heat of the heating resistor material, and controlling the applied voltage and the applied pulse width in terms of circuit.
[0036]
Japanese Patent Laid-Open No. 2000-285668 describes that information is recorded / reproduced by providing a heating means in a magnetic memory element with a small operating magnetic field and reducing the influence on adjacent cells. In this publicly known document, a wiring for heat generation is provided in a cross-point manner above and below a sheet-like resistance heating layer, and a crossing portion of selected wirings is heated. In addition, the recording layer of the memory element is disposed on the wiring for applying a magnetic field, and is located on the opposite side of the wiring from the resistance heating layer. However, it is difficult to effectively heat the recording layer with such a structure. That is, since the current magnetic field wiring requires a large current, a metal material having a large wiring thickness and a small specific resistance is generally used. Since a metal material with a small specific resistance has a high thermal conductivity, even if the lower side of the thick current magnetic field wiring is heated in this way, the heat almost flows away through the current magnetic field wiring and is recorded in the target cell. It is believed that the layer is not fully heated. Conversely, when power is applied to sufficiently heat the recording layer, it is considered that the heat generation reaches the surrounding cells and causes crosstalk.
[0037]
On the other hand, in the MRAM according to the embodiment of the present invention, since the heating resistor is disposed in contact with the recording layer and energized and heated, the recording layer can be effectively heated while minimizing heat escape. .
[0038]
To summarize the above discussion, the structural features of the MRAM according to the embodiment of the present invention with respect to the conventional MRAM and the above-mentioned known documents are as follows. That is,
(1) The recording layer and the heating resistor are in contact with each other and provided in series. (2) The resistance value of the heating resistor is approximately the same as the junction resistance. (3) A material having a higher specific resistance than a normal wiring metal material. (4) The magnitude of the voltage pulse (or current pulse) applied through the junction during writing and reading is changed.
[0039]
A method of manufacturing the MRAM shown in FIG. 1 will be described with reference to FIGS.
First, as shown in FIG. 2A, a first insulating film 11 made of SiO ₂ as an interlayer insulating film is formed on a lower substrate having a peripheral circuit, and planarized by a CMP (Chemical Mechanical Polishing) method. To do. On the first insulating film, an Al—Cu film having a thickness of about 200 nm is deposited by sputtering. Using a resist mask formed by photolithography, the Al—Cu film is etched by RIE (Reactive Ion Etching) to form word lines 12 and digit lines 13. At this time, in the contact region (not shown) with the peripheral circuit, contacts to the word line and the digit line are simultaneously formed. A second insulating film 14 is deposited on the entire surface, and a trench for forming a first contact layer is formed to a depth of about 150 nm by a RIE method using a resist mask formed by photolithography. The first contact layer 15 is formed by embedding, for example, W in the groove using MOCVD (Metal Organic Chemical Vapor Deposition), and planarizing this W by CMP.
[0040]
Next, as shown in FIG. 2B, a second contact layer (lower electrode) 16, an MTJ layer 17, and a heating resistor layer 18 are formed on the entire surface by sputtering, and a mask material is formed by low-temperature plasma CVD. A DLC (Diamond Like Carbon) layer 19 is formed. Here, the MTJ layer 17 is a junction in which an antiferromagnetic layer 171, a magnetization pinned layer 172, for example, an insulating layer (tunnel barrier) 173 made of AlO _{x of} about 1 to 2 nm, and a recording layer (magnetization free layer) 174 are sequentially laminated. It has a structure. Next, after patterning the DLC layer 19, the heating resistor layer 18 and the MTJ layer 17 are etched using the DLC pattern as a mask.
[0041]
Next, as shown in FIG. 2C, after the DLC pattern as a mask material is removed by O ₂ plasma ashing, a third insulating layer 20 is deposited on the entire surface, and the third insulating layer is etched back. 20 is thinned. The third insulating layer 20 and the second contact layer 16 are patterned by etching using a resist mask.
[0042]
Further, as shown in FIG. 2D, after a fourth insulating layer is deposited on the entire surface, planarization is performed by CMP. After forming a contact hole in this insulating film, an Al—Cu layer to be a wiring is deposited by sputtering, and RIE of the Al—Cu layer is performed using a resist mask, thereby forming the bit line 21. As a result, an MRAM structure having a heating layer by the heating resistor layer 18 is completed.
[0043]
In the case of an MTJ layer having a double junction structure, there is a possibility that the MTJ layer itself can generate heat without providing a heating resistor particularly in the vicinity of the junction. As shown in FIG. 4, tunnel electrons flowing in the Al ₂ O ₃ tunnel barrier layer 44 consume almost no energy and flow from the pinned layer 45 to the recording layer 43 as hot electrons. The electrons flowing into the recording layer 43 are repeatedly scattered in the recording layer 43 sandwiched between the double-junction barrier layers 44 and 42, and the energy applied as a bias voltage is released into the recording layer 43. The energy released from hot electrons in the recording layer 43 is converted into heat, which contributes to the temperature rise of the recording layer 43. If the scattering of electrons in the recording layer 43 is sufficiently large, most of the applied energy derived from the amount of current determined by the applied bias voltage and tunnel resistance is converted into thermal energy. For this reason, the temperature rise by it can be considered similarly to said electricity heating. However, in this case, the recording layer 43 is directly energized and heated. At this time, the recording layer 43 is sandwiched between upper and lower Al ₂ O ₃ barrier layers 44 and 42 having a low thermal conductivity (the lateral direction is surrounded by SiO _x having a low thermal conductivity). It is considered that the escape is small and the recording layer 43 is heated more effectively.
[0044]
3A and 3B are cross-sectional views of MRAM memory cells according to other embodiments of the present invention. FIG. 3A and FIG. 3B are cross-sectional views cut along planes orthogonal to each other.
[0045]
As shown in FIG. 3A, in this MRAM, a contact layer 31 and a thermoelectric semiconductor layer 32 are provided instead of the heating resistor layer 18 of FIG. As shown in FIG. 3B, an N-type semiconductor and a P-type semiconductor are used as the thermoelectric semiconductor layer 32, and the two thermoelectric semiconductor layers 32 are formed of two bit lines 21 across the contact layer 31. A thermoelectric effect element (Peltier element) is formed between them.
[0046]
In the case of this MRAM, the thermoelectric semiconductor layer 32 is used as a temperature control layer for the recording layer 174, and heating and cooling are performed by changing the direction of the current flowing in the thermoelectric effect element formed by joining two kinds of semiconductor layers. Is also possible. In the case of heating, a ferromagnetic material whose coercive force decreases as the temperature rises may be used for the recording layer 174, as in the MRAM in FIG. Conversely, when cooling, a material such as FeRh that causes a magnetic phase transition from a ferromagnetic material to an antiferromagnetic material by cooling may be used.
[0047]
【The invention's effect】
As described above, according to the present invention, it is possible to provide a magnetic memory device capable of preventing an increase in switching magnetic field and realizing a stable memory holding operation even if the element is miniaturized.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of an MRAM according to an embodiment of the present invention.
2 is a cross-sectional view showing a manufacturing method of the MRAM in FIG. 1;
FIG. 3 is a cross-sectional view of an MRAM according to another embodiment of the present invention.
FIG. 4 is a cross-sectional view of an MTJ layer having a double junction structure.
FIG. 5 is a diagram showing an operation curve of an MRAM.
FIG. 6 is a cross-sectional view showing an example of a conventional MRAM.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 11 ... 1st insulating film 12 ... Word line 13 ... Digit line 14 ... 2nd insulating film 15 ... 1st contact layer 16 ... 2nd contact layer (lower electrode)
17 ... MTJ layer 171 ... Antiferromagnetic layer 172 ... Magnetized pinned layer 173 ... Insulating layer (tunnel barrier)
174 ... Recording layer (magnetization free layer)
18 ... heating resistor layer 19 ... DLC layer 20 ... third insulating layer 21 ... bit line 31 ... contact layer 32 ... thermoelectric semiconductor layer

Claims (4)

A tunnel magnetoresistive element having a junction including a recording layer, an insulating layer, and a magnetization pinned layer formed of a ferromagnetic material, which is formed of a ferromagnetic material whose switching magnetic field changes with temperature and whose magnetization direction changes with an external magnetic field;
A bit line and a digit line arranged in directions crossing each other to give a current magnetic field for writing to the tunnel magnetoresistive element;
Heat generation selected from the group consisting of poly-Si, metal oxynitride film and chalcogenide provided between the bit line and the tunnel magnetoresistive effect element or between the digit line and the tunnel magnetoresistive effect element A magnetic memory device comprising: a temperature control layer formed of a resistor . The magnetic storage device according to claim 1 , wherein a larger current is applied when writing to the tunnel magnetoresistive element than when reading. A tunnel magnetoresistive element having a junction including a recording layer, an insulating layer, and a magnetization pinned layer formed of a ferromagnetic material, which is formed of a ferromagnetic material whose switching magnetic field changes with temperature and whose magnetization direction changes with an external magnetic field;
A bit line and a digit line arranged in directions crossing each other to give a current magnetic field for writing to the tunnel magnetoresistive element;
A magnetic memory comprising a temperature control layer having a thermoelectric effect provided between the bit line and the tunnel magnetoresistive element or between the digit line and the tunnel magnetoresistive element. apparatus. 4. The magnetic storage device according to claim 1 , wherein the recording layer is made of a ferromagnetic material that causes a magnetic phase transition.

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