JP4072762B2 - Waveform measuring device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a waveform display device, and more particularly to a waveform display device that changes the display luminance of a waveform over time.
[0002]
[Prior art]
When displaying the measured waveform, a plurality of waveforms corresponding to the passage of time are simultaneously displayed on the display screen, and the display luminance is lowered with the passage of time, so that the state of the waveform change can be easily recognized.
[0003]
The present applicant has proposed Japanese Patent Application Laid-Open No. 5-196646 as a waveform display device for reducing the display luminance of a plurality of waveforms over time.
[0004]
FIG. 4 is a block diagram showing a conventional example of such a waveform display device. In FIG. 4, the output data of the initial time data generation circuit 1 is input to the data terminal of the image memory 8 via the selection means 6 .
[0005]
The change value setting means 2 changes the initial time data set by the initial time data generation circuit 1 and includes an output data register 21 and a time data change circuit 22. The register 21 temporarily holds the output data signal from the time data change circuit 22 and inputs it to the data terminal of the image memory 8 via the selection means 6.
[0006]
The time data changing circuit 22 calculates the value of the data at the address designated by the pseudo-random number generating means 3 input from the image memory 8 and outputs it to the register 21. The time data changing circuit 22 is realized by combinational logic or a counter having an addition or subtraction function.
[0007]
The pseudo-random number generating means 3 generates a pseudo-random number having a period corresponding to the number of pixels to generate an address of the image memory 8 at random. For example, an M-sequence code generator including a shift register and an exclusive OR circuit is provided. Use. The output of the pseudo random number generation means 3 is input to the address terminal of the image memory 8 via the switching means 7.
[0008]
The write address generation circuit 4 creates an address of the image memory 8 for storing the virtual X, Y coordinate data based on the virtual X, Y coordinate data of the position constituting the waveform inputted from the outside. . The created address is input to the address terminal of the image memory 8 via the switching means 7.
[0009]
The display address generating means 5 designates which address data in the image memory 8 is to be displayed. The address designated by the display address generating means 5 is input to the address terminal of the image memory 8 via the switching means 7.
[0010]
The selection means 6 selects the output data of the initial time data generation circuit 1 and the output data of the change value setting means 2 and outputs them to the data terminal of the image memory 8.
[0011]
The switching means 7 selects any one of the address signals from the pseudo random number generation means 3, the write address generation circuit 4 and the display address generation means 5 and outputs it to the address terminal of the image memory 8.
[0012]
The image memory 8 has a plurality of refresh memories 81 to 8m for storing waveform data. The data conversion means 9 converts m-bit data output from the refresh memories 81 to 8m into a serial signal, and includes a plurality of shift registers 91 to 9m. Generally, the image memory 8 and the data conversion means 9 are integrated by a DRAM having a serial output port.
[0013]
Each address of the DRAM (that is, the refresh memories 81 to 8m in the image memory 8) corresponds to the pixel position of the display, and the time data corresponding to the time when the waveform data is written in the refresh memories 81 to 8m is stored at the address. Stored. This time data is m-bit data similar to the refresh memories 81 to 8m, and represents the time axis data of the pixel at the same address in the refresh memory.
[0014]
And the serial output from the data conversion means 9 is output to the display means 11 via the display brightness control circuit 10, and a display is performed.
[0015]
In such a configuration, display (operation for reading waveform data for a plurality of hours stored in the refresh memories 81 to 8m in the image memory 8 and rendering them as serial data on the display means 11), writing (external CPU) The waveform data input from the memory etc. is written in the refresh memories 81 to 8m, and the time data, which is the data corresponding to the written time, is stored in the corresponding address of the image memory 8) and erased (in the image memory 8). The operation of changing the time data at the address, that is, changing the brightness, complete erasure, etc.) is performed by time division or parallel processing while arbitrating so that the operation timing of the image memory 8 does not compete. As in the known method, such arbitration uses frame synchronization or horizontal synchronization in image processing (hereinafter referred to as CRT operation timing) or a reference clock from a CPU (not shown) or the like. At the timing of
[0016]
Next, the display operation will be described. In accordance with the operation timing of the display means 11, the display address generation means 5 creates an address of the image memory 8, and the switching means 7 selects the output of the display address generation means 5. The address selected by the switching means 7 is input to the address terminal of the image memory 8.
[0017]
The image memory 8 reads the waveform data and time data stored at this address and outputs them to the data conversion means 9. The data conversion means 9 converts each of the waveform data and the time data into serial data by the shift registers 91 to 9m, and sequentially outputs them to the display luminance control circuit 10.
[0018]
The display luminance control circuit 10 generates a voltage corresponding to the luminance based on the time data input from the data conversion unit 9 and inputs the voltage to the display unit 11. For example, since the luminance of the CRT is determined by the voltage of the input display signal, a change in luminance gradation due to a change in time data can be displayed.
[0019]
Next, write and erase operations will be described. The write address generation circuit 4 creates an address in the image memory 8 based on the X and Y coordinates of the point of the waveform to be displayed input from the outside. The output of the write address generation circuit 4 is input to the address terminal of the image memory 8 via the selection means 7.
[0020]
On the other hand, the initial time data generation circuit 1 outputs time data “0” corresponding to the highest gradation to be given to the latest waveform to the image memory 8 via the selection means 6, and the time data is the write address generation circuit 4. Is written in the address of the image memory 8 determined by the above. As a result, an initial state (maximum luminance state) of the captured waveform is formed.
[0021]
Next, the pseudo-random number generation means 3 generates a random number at a period corresponding to the number of pixels, and gives an address selected at random corresponding to the random number to the image memory 8 via the switching means 7.
[0022]
The image memory 8 outputs time data corresponding to the given address to the time data change circuit 22. When the input time data is, for example, the maximum value “15”, the time data change circuit outputs the value as it is as new time data to the image memory 8 via the register 21 and the selection means 6, and other than “15”. In this case, a value obtained by adding 1 to the input value (time data corresponding to the luminance under one gradation) is output as new time data to the image memory 8 via the register 21 and the selection means 6.
[0023]
Further, the image memory 8 writes the input time data to the address as changed time data. The time data and the waveform data thus changed are newly read out from the image memory 8 and displayed on the display means 11, so that the luminance gradation is displayed as a dark pixel one level lower.
[0024]
As described above, the pseudo-random number generation circuit 3 randomly generates the address of the image memory corresponding to all the pixels in a cycle that matches the number of pixels, so that the gradation of the pixels constituting the screen is lowered by one step at random. It becomes. Then, after the operation of lowering the gradation of all pixels by 1 is completed, the operation of further reducing the gradation is repeated. Therefore, the luminance of the displayed waveform changes discontinuously and randomly so that the fog disappears, so that it does not appear unnatural to the observer's eyes.
[0025]
Next, the time required for the erase operation will be described. For example, when an erase operation of one pixel is performed in 1 μs, the number of pixels is 512 × 512, time data is 4 bits (16 gradations), and the period of the pseudo random number matches the number of pixels, The time from when the waveform data is displayed to when it is completely erased is from 512 × 512 × 15 × 1 μs (3.93 seconds) to 512 × 512 × 16 × 1 μs (4.19 seconds). Note that the erasing speed of one pixel can be set by an external timer (not shown) or the like.
[0026]
If the setting is changed by an external instruction so that the erasing speed of one pixel is erased faster or the initial time data is set to a value from “0” to “14” (the number of gradations is reduced). The erasing speed can be increased.
[0027]
In addition, the erasing speed can be increased by changing the correspondence relationship between the time data and the luminance in the display luminance control circuit 10 instead of changing the initial time data. For example, when the time data is set to “1” or higher, the gradation is set to “0” and the other two levels so that the erasing speed can be increased.
[0028]
It is also possible to make the image memory 8 have a 1-bit configuration with only the refresh memory 81. At this time, since the dot is either written or not, there is no change in luminance gradation, and if the address generated by the pseudo-random number generating means 3 is used, the waveform is erased at random. Is obtained.
[0029]
In this operation, if the address data read from the image memory 8 is “1”, it is left as it is, and if it is “0”, it is changed to “1”. In this case, it is only necessary to set “1” as it is without performing the operation of counting data, that is, to clear the data, so that the configuration of the change value setting means 2 can be simplified.
[0030]
As described above, according to the configuration of FIG. 4, since the address that lowers the luminance of the pixel is randomly generated by the pseudo-random number generating means 3, the waveform of the waveform with time elapses without increasing the number of bits of the refresh memory 81. A waveform display device in which the luminance changes smoothly can be realized.
[0031]
[Patent Document 1]
JP 05-196646 A
[0032]
Patent Document 1 discloses an invention relating to a waveform display device that changes the display luminance of a plurality of waveforms over time.
[0033]
[Problems to be solved by the invention]
However, in the configuration of FIG. 4, rewriting of time information using pseudorandom numbers is performed by random access separately from the access for updating the original waveform data, so that an independent control circuit is required.
Another problem is that the control circuit becomes complicated and large in scale because the access frequency varies depending on the speed at which the waveform is erased.
[0034]
An object of the present invention is to solve such problems and to provide a waveform display device capable of changing the display luminance of a plurality of waveforms with the passage of time with a relatively small control circuit configuration. To do.
[0035]
[Means for Solving the Problems]
The invention of claim 1 which achieves the above object is as follows.
Time when a plurality of display pixels arranged two-dimensionally are selectively driven according to waveform data read from a refresh memory provided in the image memory to display a waveform, and the waveform data is stored in the refresh memory In the waveform display device that stores in the image memory as time data corresponding to the time data, and changes the display luminance of the display pixel with the passage of time based on the time data,
A pseudo-random number generating circuit for generating a pseudo-random number for specifying each pixel in changing the time data of each pixel stored in the image memory;
Offset calculating means for adding a predetermined offset value corresponding to the number of updates to the pseudo random number output of the pseudo random number generating circuit, and first detecting that the output of the offset calculating means is less than the range of the random value range Comprising a comparator, a second comparator for detecting that the output of the offset calculation means is 0 or more, and an AND gate to which these comparator outputs are input, the brightness of display pixels on the entire screen is designated a plurality of times. Range specification means to set the range of random value range so that the brightness of one gradation is lowered by updating the time data of
Is provided.
[0036]
The brightness of the display pixels on the entire screen is reduced by one gradation by updating the time data a specified number of times. Therefore, the gradation of the display brightness of the entire screen can also be reduced over time without complicated random access. become.
[0037]
The invention according to claim 2 is the waveform measuring apparatus according to claim 1,
The range specifying means is constituted by a logic gate .
[0038]
Thereby, the said range designation | designated means can be comprised comparatively compactly.
[0039]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of a waveform measuring apparatus showing an example of an embodiment of the present invention, and parts common to FIG. 4 differs from FIG. 1 in the connection relationship between the change value setting means 2 and the pseudo random number generation means 3 and the address system inputted to the address terminals of the image memory 8. FIG.
[0040]
That is, in FIG. 1, the pseudo-random number generating means 3 is connected to the change value setting means 2 via the range specifying means 12. The output of the address generation circuit 13 is input to the address terminal of the image memory 8.
[0041]
The pseudo-random number generating means 3 generates the same random value every time. As a result, a unique random value is given to each pixel (pixel), and the pixel is uniformly distributed over the entire screen.
[0042]
FIG. 2 is a block diagram showing a specific example of the range specifying means 12. The offset calculation unit 121 receives the output terminal of the pseudo-random number generator 3, the time data update count setting value n in the change value setting unit 2, and the set value m of the range width of the random value. The offset calculation unit 121 calculates − (n−1) · m based on these inputs, and adds the calculation result to the input terminals B of the comparator 122 and the comparator 123.
[0043]
The comparator 122 detects A> B (less than m), the set value m of the range width of the random value is input to the input terminal A, and the output terminal is connected to one input terminal of the AND gate 124. ing. The comparator 123 detects A ≦ B (0 or more), “0” is input to the input terminal A, and the output terminal is connected to the other input terminal of the AND gate 124.
[0044]
Here, the setting value m of the range width of the random value is a value determined by how many times the total number of pixels M (≈total number of pseudo-random numbers) of the entire screen is erased. When attention is paid to the output of the offset calculation unit 121, as shown in FIG. 3, the offset value increases in proportion to the number n of time data updates in the change value setting means 2. When the number of updates reaches N, M = N · m.
[0045]
The change value setting means 2 refers to the random value for each pixel, and reduces the gradation luminance if it is within a certain value range, and maintains the gradation luminance as it is if it is outside the range.
[0046]
On the other hand, the address generation circuit 13 periodically generates non-random aligned write addresses and display addresses in synchronization with a control signal for controlling the pseudo random number generation period of the pseudo random number generation means 3.
[0047]
As a result, the display brightness of pixels corresponding to the range width m set by one time data update can be reduced by one gradation, and these pixels are designated based on random numbers, so that the entire screen Will be distributed randomly. By executing the luminance reduction process by changing the time data for the specified number of times, it is possible to uniformly reduce the gradation of one gradation of the entire screen.
[0048]
In this case, the address control becomes simpler than the conventional random access, and can be realized with a relatively small control circuit configuration.
【The invention's effect】
As described above, according to the present invention, it is possible to provide a waveform display device capable of reducing the display luminance of a plurality of waveforms with the passage of time with a relatively small control circuit configuration. It is suitable for various waveform measuring devices.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an example of an embodiment of the present invention.
FIG. 2 is a block diagram showing a specific example of range specifying means 12 in FIG.
3 is an operation explanatory diagram of an offset calculation unit 121 in FIG. 2. FIG.
FIG. 4 is a block diagram showing a conventional example of a waveform display device.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Initial time data generation circuit 2 Change value setting means 3 Pseudo random number generation means 6 Selection means 8 Image memory 9 Data conversion means 10 Display luminance control circuit 11 Display means 12 Range designation means 13 Address generation circuit

Claims (2)

Time when a plurality of display pixels arranged two-dimensionally are selectively driven according to waveform data read from a refresh memory provided in the image memory to display a waveform, and the waveform data is stored in the refresh memory In the waveform display device that stores in the image memory as time data corresponding to the time data, and changes the display luminance of the display pixel with the passage of time based on the time data,
A pseudo-random number generating circuit for generating a pseudo-random number for specifying each pixel in changing the time data of each pixel stored in the image memory;
Offset calculating means for adding a predetermined offset value corresponding to the number of updates to the pseudo random number output of the pseudo random number generating circuit, and first detecting that the output of the offset calculating means is less than the range of the random value range Comprising a comparator, a second comparator for detecting that the output of the offset calculation means is 0 or more, and an AND gate to which these comparator outputs are input, the brightness of display pixels on the entire screen is designated a plurality of times. Range specification means to set the range of random value range so that the brightness of one gradation is lowered by updating the time data of
A waveform display device characterized by comprising: 2. The waveform display device according to claim 1, wherein the range specifying means is constituted by a logic gate .

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