JP4068503B2 - Exposure mask for integrated circuit and method for forming the same - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a phase shift mask used in the production of a semiconductor integrated circuit (IC) and a method for manufacturing the same, and more particularly to an improvement in resolution and depth of focus and image in the production of an IC by photolithography (ie, optical photographic manufacturing). The present invention relates to a mask structure capable of reducing shortening and a method for forming the same.
[0002]
[Prior art]
Today, most semiconductor integrated circuits are formed using optical photographic manufacturing techniques. In general, exposure is performed by projecting ultraviolet (UV) light onto a photosensitive resist material layer formed on a semiconductor wafer through a mask (that is, a reticle) while controlling the light. This mask is usually composed of a light-transmitting substrate on which a light-shielding material layer that defines a circuit pattern to be transferred to a resist-coated wafer is formed. When a negative resist is used, the exposed area of the resist layer is polymerized and cross-linked by the light passing through the mask to increase the molecular weight. In the subsequent development step, the unexposed portion of the resist layer is washed away with a developer, and the mask pattern is inverted, that is, the resist material pattern constituting the negative image remains. On the other hand, when a positive resist is used, the exposed portion of the resist layer becomes soluble in the developer due to the light that has passed through the mask, so the exposed resist layer portion is washed away in the developing process, and the mask pattern Only the pattern of the resist material that directly corresponds to is left. In either case, the remaining resist acts to define a pattern of semiconductor material that is subjected to subsequent processing steps (eg, an etching step or a deposition step) to form a desired semiconductor device.
[0003]
In forming a circuit pattern in the submicron region, it is required that the same resolution as that of the mask is obtained in the exposure process. By increasing the lens diameter and using light with a shorter wavelength (for example, the DUV region), higher resolution performance can be obtained, but the depth of focus is sacrificed. Therefore, it is important to make the depth of focus of the projection pattern as deep as possible. Usually, exposure light is required to pass through a relatively thick resist material layer, and it is important that the mask pattern is accurately projected even in the depth direction of the resist material. In addition to this, when the depth of focus is deepened (increased), degradation in resolution performance can be minimized even if the exposure apparatus is slightly deviated from the best focus position (defocus state). Even the most accurate photographic manufacturing apparatus cannot prevent submicron deviation from the best focus position.
[0004]
By the way, recently, a phase shift mask technique capable of considerably improving resist resolution for a predetermined depth of focus has been developed. A phase shift mask (PSM) differs from a conventional lithographic mask in that it uses a selectively placed mask pattern material that allows transmission of exposure light that is phase shifted by π (180 °). Yes. Such a technique was first proposed at the beginning of the 1980s, and is expected to make it possible to manufacture circuit patterns with a limit of about 0.25 μm and possibly less than that of the conventional lithography technique. The 180 ° phase difference of the exposure light generated at the position corresponding to the edge portion of the mask pattern produces an interference effect that greatly enhances the edge contrast, and a deeper depth of focus can be obtained with higher resolution performance (an opaque mask). (Compared to conventional binary intensity masks using only pattern material, eg chromium)). This technique is advantageous because it can be implemented using conventional lithography stepper optics and resist technology.
[0005]
A number of PSM technologies have been developed. Among these, Levenson type (alternating) type, auxiliary shifter type (subresolution), rim type (rim), halftone type (attenuated) phase shift technology and the like are known. In general, C.I. Harper et al., Electronic Materials & Processes Handbook, 2d ed. , 1994, § 10.4, pp. See 10.33-10.39. Among these techniques, the halftone phase shift technique can be applied to an arbitrary mask pattern and has the widest use. In halftone PSM, a single slightly transmissive (halftone) absorber with a 180 ° phase shift is used in place of a conventional opaque mask pattern material, such as a chromium layer. Originally, the halftone material was formed with two layers, namely a transmittance control layer and a phase control layer, but recently it was developed to realize the dual function of light transmittance and phase shift control. Similar effects are realized even when the single layer material is used. Ito et al., Optimization of Optical Properties for Single-layer Halftone Masks, SPIE Vol. 2197, p. 99, January 1994, such a single layer material is made of SiNx, and its composition ratio is controlled by changing the inflow of nitrogen gas during formation.
[0006]
The halftone PSM has been found to be one of the most useful techniques for applying to high resolution actual device patterns (eg, K. Hashimoto et al., The Application of Deep UV Phase Shifted). Single layer Halftone reticles to 256 Mbit Dynamic Random Access Memory Cell Patterns, Jpn. J. Appl. Phys. Vol. 33 (1994) pp. Therefore, it is required to provide higher resolution performance so that pattern sizes smaller than or smaller than that can be generated with high accuracy. Furthermore, the halftone PSM does not solve the problem of image shortening.
[0007]
The image shortening is a phenomenon in which the resolution performance of the entire pattern to be obtained is lowered. For example, in the case of certain shapes such as charge storage nodes in the DRAM pattern, element isolation and elongated hole patterns used to form contact holes of several depths, a slight defocus is underneath. This results in a substantial shortening of the hole pattern on a wafer. This is caused by the fact that the image intensity and contrast tend to decrease significantly toward the end of the hole, particularly under the condition of defocus of ± 1.0 μm. This is shown by the plot of the image intensity contour simulation of FIG. 1 (b) for a conventional halftone PSM.
[0008]
Accordingly, there is a need for an exposure mask for a semiconductor device that provides high overall resolution performance and deep depth of focus and minimizes image shortening. Furthermore, an efficient manufacturing method for generating such a mask is also desired.
[0009]
[Problems to be solved by the invention]
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an exposure mask for an integrated circuit that can improve the resolution performance and increase the depth of focus.
[0010]
Another object of the present invention is to provide an integrated circuit exposure mask that can reduce image shortening.
[0011]
Still another object of the present invention is to provide an efficient method for generating a mask structure as described above, particularly a method for forming an exposure mask for an integrated circuit that can be realized using conventional semiconductor manufacturing techniques.
[0012]
[Means for Solving the Problems]
In accordance with the first aspect of the present invention, these objects include a light-transmitting substrate and a mask layer formed on the light-transmitting substrate and having a circuit pattern for exposing a photosensitive material. It is embodied by the exposure mask of the integrated circuit. The mask layer has a light-transmitting surface having a rounded surface shape adjacent to the edge of the circuit pattern so as to generate an apparent mask boundary on the semiconductor substrate that is different from the actual mask boundary. It acts to diffract the exposure light irradiated through the transmission surface.
[0013]
According to the above configuration, the light-transmitting surface having a rounded surface shape increases the light intensity at the corner portion of the circuit pattern, so that the resolution performance of the corner portion by image shortening can be improved and the depth of focus can be increased. .
[0014]
Further, preferred embodiments of the present invention include the following (1) to (12).
[0015]
(1) The light-transmitting surface having a rounded surface shape is a projecting surface as a whole formed by the light-transmitting material layer present on the edge portion of the mask layer.
[0016]
(2) The light transmissive material layer includes a SiO2 layer.
[0017]
(3) The SiO2 layer includes a spin-on-glass (SOG) film.
[0018]
(4) The thickness of the light transmissive material layer does not exceed 50% of the thickness of the mask layer.
[0019]
(5) The circuit pattern includes an elongated hole pattern.
[0020]
(6) The rounded surface shape is a protruding surface formed by a concave region of the light-transmitting substrate that extends under the edge of the mask layer.
[0021]
(7) The depth of the concave region does not exceed three times the thickness of the mask layer.
[0022]
(8) The circuit pattern is linear.
[0023]
(9) The concave region of the light transmissive substrate is an etched region.
[0024]
(10) The mask is a halftone phase shift mask, and the mask layer includes a halftone material.
[0025]
(11) The halftone material includes at least one of a Si compound, a Cr compound, an Al compound, a Ti compound, a MoSi compound, and a mixture thereof.
[0026]
(12) The mask layer includes an opaque material.
[0027]
In yet another aspect, the present invention is embodied in a method of forming an exposure mask for an integrated circuit. The mask layer is arranged to form a circuit pattern for exposing the photosensitive material on the light-transmitting substrate, thereby forming a preliminary mask structure. A round surface made of a light-transmitting material adjacent to the edge of the circuit pattern to diffract the irradiated exposure light on the semiconductor substrate to produce an apparent mask boundary different from the actual mask boundary A light transmission surface having a shape is formed.
[0028]
According to the above formation method, a light transmission surface having a rounded surface shape is formed adjacent to the edge of the circuit pattern, so that the light intensity at the corner portion of the circuit pattern is increased and the corner portion is resolved by image shortening. Performance can be improved and depth of focus can be increased. At this time, no special manufacturing process is required, and it can be efficiently realized by using a conventional semiconductor manufacturing technique.
[0029]
Furthermore, preferred embodiments of the present invention include the following (1) to (10).
[0030]
(1) The step of forming a round light-transmitting surface is a step of depositing and forming a light-transmitting material layer on a preliminary mask structure and forming a projecting light-transmitting surface on the edge portion of the mask layer. Including.
[0031]
(2) The light transmissive material layer is made of SiO2.
[0032]
(3) SiO2 is a spin-on-glass (SOG) film.
[0033]
(4) The circuit pattern is an elongated hole pattern.
[0034]
(5) The thickness of the light transmissive material layer does not exceed 50% of the thickness of the mask layer.
[0035]
(6) The step of forming a round light transmitting surface is a step of etching the light transmitting substrate to form a concave region including a projecting light transmitting surface extending below the edge portion of the mask layer. is there.
[0036]
(7) The depth of the concave region does not exceed three times the thickness of the mask layer.
[0037]
(8) The mask is a halftone phase shift mask, and the mask layer contains a halftone material.
[0038]
(9) The halftone material contains at least one of Si compound, Cr compound, Al compound, Ti compound, MoSi compound, and a mixture thereof.
[0039]
(10) The mask layer includes an opaque material.
[0040]
The above objects and other features and advantages of the present invention will be readily apparent and fully understood from the following detailed description of the preferred embodiment described in connection with the accompanying drawings.
[0041]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0042]
FIG. 4 is a diagram showing an application of the first main embodiment of the present invention to a halftone type phase shift mask (PSM) 1 having a pattern of elongated holes 3. It is understood that the present invention is equally applicable to both single layer and multi-layer masks as shown in the prior art. The mask 1 is formed of a light transmissive substrate 5 made of, for example, quartz. The halftone phase shift mask layer 7 forms a desired circuit pattern and is disposed on the substrate (mask) 1.
[0043]
As the mask layer 7, a material that realizes both optical attenuation and phase shift functions, for example, a single layer of SiNx such as Ito shown in the prior art is preferably used. On the other hand, the mask layer 7 is composed of individual layers of materials for light attenuation and phase shifting, as is well known. The light transmittance of the mask layer 7 is optimized for a specific pattern according to known techniques.
[0044]
The above structure in the halftone PSM is modified in the present invention. In this embodiment, two regions 9a and 9b having a relatively high light transmittance are formed adjacent to the opposing ends of the elongated hole 3, respectively. The remaining (primary) region of the mask layer 3 is 0 <t1 ≦ 20%, where the light transmittance is t1, while the auxiliary secondary regions 9a and 9b have a light transmittance t2 (higher than t1). 0 <t2 ≦ 20%). More specifically as an example, the light transmittance t1 is about 4-8% and t2 is about 6-10% (2% difference). For a given mask pattern, the optimal difference between the light transmittances t1 and t2 is the optimal positioning of the secondary region with high light transmittance and relative dimensional constraints, such as exposure simulation and actual It can be determined empirically by exposure test. It is desirable that the difference between the light transmittances t1 and t2 does not exceed 10%, and the total area of the secondary region does not exceed 1/3 of the area of the primary region. The shape of the secondary region may vary, and may be a shape such as a rectangle, a square, an ellipse, and a circle.
[0045]
For elongated hole patterns in a conventional halftone PSM, as shown in the prior art image intensity simulation plot of FIG. 1 (a), a slight defocus condition, eg ± 1.0 μm, is a significant amount. Image shortening (that is, a decrease in optical image contrast and intensity at opposite ends of the elongated hole pattern). The inventor has found that this problem can be eliminated or significantly reduced by providing a region with increased transmittance adjacent to the region where image shortening occurs (decrease in image contrast). In the case of an elongated hole pattern, image shortening occurs at the opposite ends of the hole. FIG. 2A shows that when the mask shown in FIG. 4 is used, there is little or no image shortening for the same defocus.
[0046]
Image shortening at the best focus position can be reduced by the mask shape enlargement allowance with respect to the conventional mask. Such compensation does not solve the problem of image shortening in a defocus state with respect to mask deviation, but can reduce image shortening in a defocus condition. In this regard, the present invention improves overall lithographic performance compared to conventional masks.
[0047]
As noted above, areas with relatively high transmittance also act to increase the overall resolution performance that can be obtained (depth of focus for a given exposure tolerance). This corresponds to a simulation curve (ED tree) of exposure amount-defocus for the conventional halftone PSM (see FIG. 1B) and that for the mask 1 (FIG. It is shown by comparison with (see)). In FIG. 1 (b), the large curvature curves 11a, 11b are elongated hole patterns (specific critical dimension (CD) criteria under different focus / defocus conditions, eg 25 nm for a design rule of 0.25 μm). Represents the logarithm of the exposure amount necessary to sufficiently expose the resist material below along the long side (length dimension). Point 12 on the Y (focus) axis represents the best focus position. Similarly, the curved lines 13a and 13b having a small curvature represent the exposure amount necessary to sufficiently expose the lower resist material along the short side (width dimension) of the elongated hole pattern.
[0048]
The hatched area 15 defined by the low curvature curves 13a and 13b and the high curvature curves 11a and 11b represents the overall resolution performance that can be obtained. The maximum width of the hatched area 15 measured along the y (focus) axis represents the range of allowable deviation from the best focus 12, ie the depth of focus. In FIG. 2 (b), it can be seen that the curves 11a 'and 11b' have a much smaller curvature than the curves 11a and 11b in FIG. In this way, it can be seen that the overall resolution performance and depth of focus for the mask 1 of the present invention is significantly greater than for a conventional halftone PSM.
[0049]
FIG. 5 is a diagram for explaining the application of the above principle to the halftone PSM 17 including the linear pattern 19 (in the case of a positive resist). As in the embodiment of FIG. 4, the halftone mask 21 has a primary region with a light transmittance t1. Two secondary regions 23a and 23b having a transmittance t2 having an increased light transmittance are provided adjacent to the two ends of the linear pattern. The range of transmittance t1 and t2 for the elongated hole pattern embodiment (FIG. 4) and the relative sizes of their primary and secondary regions are also relative to the linear pattern embodiment of FIG. Applicable. With this configuration, the depth of focus can be increased and image shortening can be reduced as in the first embodiment.
[0050]
A manufacturing process of the phase shift mask according to the present invention will be described with reference to FIGS. FIG. 6 (a) shows a process flowchart, and FIG. 6 (b) shows a processing step for a mask having an elongated hole pattern shown in FIG. 4 as one possible example. In the first step 25, a halftone mask structure 27 is formed as in the conventional case. In this step, a halftone mask layer 7 corresponding to the circuit pattern is formed on the substrate 5 using a conventional technique such as coating with electron beam or laser patterning.
[0051]
Next, a resist material is applied on the mask structure 27, and a patterning step 29 (for example, patterning with an electron beam or a laser beam) is performed. Thus, the resist is removed from the mask in the region corresponding to the secondary region that increases the transmittance. In this way, a resist pattern 31 is formed.
[0052]
Next, in step 33, a weak oxidation process is performed to partially oxidize the exposed halftone material in the secondary regions 34a, 34b. By oxidizing the halftone material made of SiNx, SiO2 is formed and the light transmittance is increased. The weak oxidation treatment can be achieved with other halftone phase shift materials such as MoSiOxNy, CrOx, C, and Cr, and multi-layer halftone phase shift masks such as Cr / SiO2 halftone layers (eg, Cr). It is also effective to increase the light transmittance of the. The oxidation process should be carefully controlled to achieve the desired increase in light transmission. The oxidant should be selected from the standpoint of the resist material and halftone material being used. The oxidizing agent should oxidize the halftone material at a controllable rate and at the same time not damage the resist layer. Two generally suitable oxidation techniques are those using O2 ashing (plasma) and sulfuric acid solution.
[0053]
Finally, the remaining resist material is removed in step 35, and a completed mask structure 1 corresponding to that shown in FIG. 4 is obtained.
[0054]
The second main embodiment of the present invention will be described using two preferred modifications, one for an elongated hole pattern and one for a linear pattern. Compared to the first main embodiment, the mask structure according to the second main embodiment acts to increase the overall resolution performance and depth of focus obtained and to further reduce image shortening. To do. Furthermore, the second main embodiment can improve the corner shape of the exposed pattern and can be applied to both halftone PSM and conventional opaque mask structures. The structure of the second main embodiment can be used alone or in combination with the structure of the first main embodiment.
[0055]
In each of the variations, the rounded surface shape along the edge of the mask circuit pattern is used to diffract light from its normal path so as to increase image intensity and contrast. This compensates for roundness that occurs in the exposure mask at the corners of circuit patterns such as holes and lines. A certain degree of roundness is inevitable for the current mask manufacturing technology. Such roundness degrades image shortening and degrades lithography performance.
[0056]
7 to 9 show a first modification example in which the circuit pattern has an elongated hole 39 (in the case of a positive resist). The mask 41 includes a light-transmitting substrate 43 such as quartz and a layer 45 in which a mask material is patterned. The mask layer 45 may use an opaque material that blocks light, for example, chromium or a halftone phase shift material. In the latter case, the layer 45 is a single layer that performs the dual function of optical attenuation and phase shift, that is, SiNx, as in the first main embodiment. It consists of one of two layers to be realized.
[0057]
As shown in FIG. 9, the elongated hole 39 has a certain degree of roundness at the corner 47. This roundness reduces corner resolution (definition) and tends to cause image shortening with respect to defocus (especially in the longitudinal direction of the pattern).
[0058]
In the present invention, an additional layer 48 of light transmissive material is deposited on the substrate 43 and the mask layer 45 so as to produce a substantially rounded surface 46 on the edge of the mask layer 45. The light transmissive material is preferably a SiO2 coating such as a spin-on-glass (SOG) film. More preferably, the thickness of the light transmissive material layer 48 should generally not be greater than 50% of the thickness of the mask layer 45. Such a layer is moved outward with respect to the actual mask boundary 51 (usually a distance δ on the order of about 100 nm) to produce an apparent mask boundary 50 on the underlying resist-coated wafer. This has the effect of diffracting the exposure light 49 irradiated through this layer. This has the effect of increasing the light intensity at the corner and improving the corner definition.
[0059]
As shown in FIG. 9, the size of the image projected by the mask is larger than the actual size of the mask pattern (about 100 nm for each side). Therefore, it is necessary to take this into consideration when determining the size of the mask pattern and any amount of magnification reduction.
[0060]
FIG. 3A is a diagram showing an image intensity simulation plot for the halftone PSM shown in FIGS. Compared to the simulation results shown for the conventional halftone PSM (FIG. 1A) and the halftone PSM of FIG. 4 (FIG. 2A) for the best focus conditions, the corner resolution (Definition) is greatly improved. For the defocus position, image shortening equivalent to that of the embodiment of FIG. 4, that is, greatly reduced with respect to the conventional halftone PSM (or the conventional binary mask) is obtained.
[0061]
FIG. 3B is a diagram showing a simulation result of the ED tree for the halftone PSM of FIGS. As is apparent from this figure, as in the embodiment of FIG. 4, the curves 11a ", 11b" have a much smaller curvature than the curves 11a, 11b of FIG. (Measured along the y (focus) axis) Thus, it can be seen that the overall resolution performance and depth of focus for the mask 41 according to the invention is significantly greater than for a conventional halftone PSM.
[0062]
FIG. 10 to FIG. 12 are diagrams showing a second modification of the second main embodiment in which the circuit pattern includes a linear pattern 52 (in the case of a positive resist). Similar to the first modification shown in FIGS. 7 to 9, the mask 53 includes a light-transmitting substrate 55 patterned using a layer of a mask material 57. Alternatives to the mask material shown with respect to the first variant (FIGS. 7 to 9) (eg halftone PSM using opaque material) are also applicable to the second variant.
[0063]
As shown in FIG. 12, the linear pattern 52 has a certain degree of roundness at the corner 59. As in the first modification example, such roundness reduces the resolving power of the corner, and easily causes image shortening particularly in a defocused state.
[0064]
In this second variant, the mask substrate 55 has a recessed area 61 that provides a rounded surface 62 under the edge of the mask layer 57. This concave region is formed by etching the upper surface of the substrate 55 to a depth not exceeding three times (3 ×) the thickness of the mask layer 57. An isotropic etching process (eg, either wet etching or chemical dry etching (CDE)) may be used to produce an effective round shape. The rounded surface 62 has an effect of diffracting the exposure light 63 adjacent to the edge of the linear pattern in the inward direction. The light 63 is blocked (or attenuated and phase shifted) by the mask layer 57 to produce an apparent mask boundary 65 that is moved outward relative to the actual mask boundary 67. This, in turn, improves the corner limitation and increases the light intensity and image contrast at the corners of the linear pattern. Furthermore, as in the first variation, a substantial increase in overall resolution performance and depth of focus is obtained.
[0065]
In the above description, this invention was demonstrated using the preferable embodiment. By reviewing this disclosure, other embodiments, changes, modifications, and the like will be possible to those skilled in the art within the spirit and scope of the claims.
[0066]
【The invention's effect】
As described above, according to the present invention, it is possible to obtain an exposure mask for an integrated circuit that can improve the resolution performance and increase the depth of focus.
[0067]
Moreover, an exposure mask for integrated circuits that can reduce image shortening can be obtained.
[0068]
Furthermore, an efficient method for generating the mask structure as described above, in particular, a method for forming an exposure mask for an integrated circuit that can be executed using a conventional semiconductor manufacturing technique is obtained.
[Brief description of the drawings]
FIG. 1A is a diagram showing a simulation plot of image intensity with respect to exposure light irradiated through an elongated hole pattern of a conventional halftone PSM in a best focus position and a defocused state; b) The figure shows the simulation curve (ED tree) of the exposure amount-focal shift for the mask of the elongated hole pattern of FIG.
FIG. 2 (a) shows the exposure light irradiated through the elongated hole-shaped pattern of the phase shift mask according to the first main embodiment of the present invention in the best focal position and in the defocus state. The figure which shows the simulation plot of image intensity | strength, (b) The figure which shows the simulation curve (ED tree) of the exposure amount-defocus with respect to the mask pattern of the elongate hole of (a) figure as a graph.
FIG. 3A is a diagram showing exposure light irradiated through an elongated hole-like pattern of a phase shift mask according to a second main embodiment of the present invention in a best focus position and a defocused state. The figure which shows the simulation plot of image intensity | strength, (b) The figure which shows the simulation curve (ED tree) of the exposure amount-defocus with respect to the mask pattern of the elongate hole of (a) figure as a graph.
FIG. 4 is a schematic top view showing a mask structure (in the case of a positive resist) of a hole pattern in the halftone PSM according to the first main embodiment of the present invention.
FIG. 5 is a schematic top view showing a mask structure (in the case of a positive resist) of a linear pattern in the halftone PSM according to the first main embodiment of the present invention.
6A is a process flowchart showing a method of forming a mask structure of the first main embodiment, and FIG. 6B is a diagram for the hole pattern mask structure of FIG. The top view which shows a part of process step shown in FIG.
FIG. 7 is a partial sectional view of a first mask structure according to a second main embodiment of the present invention.
8 is a schematic partial enlarged cross-sectional view of the mask structure shown in FIG. 7, for explaining exposure light irradiated through this mask. FIG.
9 is a schematic top view of the mask structure shown in FIG. 7, for explaining the exposure light irradiated through the mask. FIG.
FIG. 10 is a partial cross-sectional view of a second mask structure according to a second main embodiment of the present invention.
11 is a schematic partial cross-sectional view of the second mask structure shown in FIG. 10, for explaining exposure light irradiated through this mask. FIG.
12 is a schematic top view of the second mask structure shown in FIG. 11, for explaining exposure light irradiated through the mask. FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Halftone type phase shift mask, 3 ... Elongated hole, 5 ... Light transmissive substrate, 7 ... Mask layer, 19a, 9b ... Secondary region, 17 ... Halftone type phase shift mask, 19 ... Linear pattern, 21 ... halftone mask, 23a, 23b ... secondary region, 27 ... halftone mask structure, 31 ... resist pattern, 34a, 34b ... secondary region, 39 ... elongated hole, 41 ... mask, 43 ... light transmissive substrate, 45 ... mask layer, 46 ... round surface, 48 ... light transmissive material layer, 51 ... mask boundary, 52 ... linear pattern, 53 ... mask, 55 ... mask substrate, 57 ... mask layer, 59 ... corner, 62 ... round surface 63 ... exposure light, 65 ... apparent mask boundary, 67 ... actual mask boundary.

Claims (5)

A light transmissive substrate;
In an integrated circuit exposure mask comprising a light-shielding mask layer formed with a circuit pattern including a plurality of linear patterns on the light-transmitting substrate and exposing a photosensitive material .
As the light shielding mask layer generates a mask boundary apparent to be moved outwardly relative to actual mask boundary light shielding regions on a semiconductor substrate,
The integrated circuit exposure mask has a light transmission surface having a rounded surface shape adjacent to each of the edges of the plurality of linear patterns ,
The rounded surface-shaped region extends from below the edge of the linear pattern of the light-shielding mask layer to the outer region, and is formed by a concave region of the light-transmitting substrate, through the rounded surface shape. An exposure mask for an integrated circuit, wherein the exposure light irradiated in this manner is bent outward with respect to an actual mask boundary . 2. The integrated circuit exposure mask according to claim 1 , wherein the depth of the concave region does not exceed three times the thickness of the mask layer. 3. The integrated circuit exposure mask according to claim 1, wherein the concave region of the light-transmitting substrate is an etched region. A light transmissive substrate, forming a light-shielding mask layer to form a circuit pattern including for exposing a photosensitive material, a plurality of linear patterns,
The light shielding mask layer is adjacent to each of the edges of the plurality of linear patterns so as to generate an apparent mask boundary on the semiconductor substrate that moves the light shielding region outward relative to the actual mask boundary. Forming a light-transmitting surface having a round surface-shaped region made of a light-transmitting material,
The step of forming a light transmissive surface having a round surface-shaped region is formed by etching the upper surface of the light transmissive substrate and extending from below the edge of the linear pattern of the light shielding mask layer to an outer region. By forming the concave region, the light transmission surface having a region for bending the exposure light irradiated through the rounded surface shape outward with respect to the actual mask boundary is formed. A method of forming an exposure mask for an integrated circuit. 5. The method of forming an exposure mask for an integrated circuit according to claim 4 , wherein the depth of the concave region does not exceed three times the thickness of the mask layer.

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