JP4059225B2 - Voltage equalization circuit for battery pack - Google Patents

Voltage equalization circuit for battery pack Download PDF

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JP4059225B2
JP4059225B2 JP2004124654A JP2004124654A JP4059225B2 JP 4059225 B2 JP4059225 B2 JP 4059225B2 JP 2004124654 A JP2004124654 A JP 2004124654A JP 2004124654 A JP2004124654 A JP 2004124654A JP 4059225 B2 JP4059225 B2 JP 4059225B2
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voltage equalization
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JP2005312161A (en
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英樹 山田
徹也 小林
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Denso Corp
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Description

本発明は、組み電池の電圧均等化回路に関する。   The present invention relates to a voltage equalization circuit for an assembled battery.

たとえばリチウム電池を用いた組み電池などでは、組み電池を構成する二次電池(セル)間の電圧の均等化すなわち電圧ばらつきの低減が必要であり、種々の電圧均等化回路が提案されている。   For example, in an assembled battery using a lithium battery, it is necessary to equalize voltage between secondary batteries (cells) constituting the assembled battery, that is, to reduce voltage variation, and various voltage equalization circuits have been proposed.

下記の特許文献1は、互いに直列接続された2つのセルからなる電池ブロックの内部セル電圧を均等化する電圧均等化回路ブロックを複数用い、更に二つの電池ブロックが一つのセルを共有することにより、組み電池のすべてのセル電圧を均等化させる電圧均等化方式(2セル均等化方法)を提案している。   Patent Document 1 below uses a plurality of voltage equalization circuit blocks that equalize the internal cell voltage of a battery block composed of two cells connected in series with each other, and further, two battery blocks share one cell. Have proposed a voltage equalization method (two-cell equalization method) for equalizing all cell voltages of the assembled battery.

同じく、下記の特許文献2は、互いに直列接続された3つのセルからなる電池ブロックの内部セル電圧を均等化する電圧均等化回路ブロックを複数用い、更に二つの電池ブロックが一つのセルを共有することにより、組み電池のすべてのセル電圧を均等化させる電圧均等化方式(3セル均等化方法)を提案している。
特開平08−556443号公報 特開平11−262188号公報
Similarly, Patent Document 2 below uses a plurality of voltage equalization circuit blocks that equalize the internal cell voltage of a battery block composed of three cells connected in series with each other, and two battery blocks share one cell. Thus, a voltage equalization method (three-cell equalization method) for equalizing all cell voltages of the assembled battery has been proposed.
Japanese Patent Application Laid-Open No. 08-556443 JP-A-11-262188

上記した上記特許文献1の2セル均等化方法では、nセルの組み電池の電圧均等化のためにn−1個の電圧均等化回路ブロックが必要となり、もし各電圧均等化回路ブロックをそれぞれIC個した場合、組み電池の電圧均等化回路を実現するために多数のICが必要となると言う問題が生じた。この問題を改善するために、電位的に隣接する複数の電圧均等化回路ブロックを一つのICに集積することも考えられる。たとえば、電位的に隣接する二つの電池ブロックを一つのICに集積する場合、これは結局、3セルを均等化することと等しいため(2k(kは正の整数)+1)個の総セル数をもつ組み電池しか均等化を行うことができない。すなわち、一つのICに集積する電圧均等化回路ブロック数を増加すると、特定の総セル数をもつ組み電池にしか適用できない。   In the above-described 2-cell equalization method of Patent Document 1, n-1 voltage equalization circuit blocks are required for voltage equalization of n-cell assembled batteries. If each voltage equalization circuit block is an IC, In this case, there arises a problem that a large number of ICs are required to realize a voltage equalization circuit for the assembled battery. In order to improve this problem, it is conceivable to integrate a plurality of voltage equalizing circuit blocks adjacent to each other in a single IC. For example, if two battery blocks that are adjacent to each other in potential are integrated in one IC, this is equivalent to equalizing three cells after all (2k (k is a positive integer) +1) total number of cells It is possible to equalize only the assembled battery having That is, if the number of voltage equalization circuit blocks integrated in one IC is increased, it can be applied only to a battery pack having a specific total number of cells.

同様に、上記した上記特許文献2の3セル均等化方法も、(2k(kは正の整数)+1)個の総セル数をもつ組み電池しか均等化を行うことができない。   Similarly, the 3-cell equalization method of Patent Document 2 described above can equalize only the assembled batteries having the total number of cells (2k (k is a positive integer) +1).

同じように考えると4セル均等化方法では(3k(kは正の整数)+1)個の総セル数をもつ組み電池しか均等化を行うことができず、5セル均等化方法では(4k(kは正の整数)+1)個の総セル数をもつ組み電池しか均等化を行うことができないという問題があった。   In the same way, the 4-cell equalization method can equalize only the assembled battery having the total number of cells (3k (k is a positive integer) +1), and the 5-cell equalization method (4k ( There is a problem that equalization can be performed only with assembled batteries having k as a positive integer) +1) total number of cells.

すなわち、上記した従来の電圧均等化方法では、電圧均等化のためのICの種類を増やすことなく、種々の総セル数をもつ組み電池の電圧均等化を行うことができないという欠点があった。   That is, the above-described conventional voltage equalization method has a drawback that voltage equalization of assembled batteries having various total cell numbers cannot be performed without increasing the types of ICs for voltage equalization.

本発明は上記問題点に鑑みなされたものであり、電圧均等化のためのICの種類を増やすことなく、種々の総セル数をもつ組み電池の電圧均等化が可能な組み電池の電圧均等化回路を提供することをその目的としている。   The present invention has been made in view of the above problems, and voltage equalization of assembled batteries capable of voltage equalization of assembled batteries having various total cell numbers without increasing the types of ICs for voltage equalization. Its purpose is to provide a circuit.

本発明の組み電池の電圧均等化回路は、互いに直列接続されたm(mは3以上の正の整数)個の二次電池からなる電池ブロックの電圧をm個に分圧して出力する分圧回路と、前記分圧と前記電池ブロックの隣接2セルの接続点の電位とを比較することにより前記分圧の方が低いと判別した場合は前記接続点より低電位側の前記二次電池を放電し、前記分圧の方が高いと判別した場合は前記接続点より高電位側の前記二次電池を放電して前記電池ブロック内の前記各二次電池の電圧を均等化する放電回路とをそれぞれ有する一対の電圧均等化回路ブロックを備え、前記一対の電圧均等化回路ブロックは、n(nはmより大きい正の整数)個の二次電池を直列接続してなる組電池の一対の前記電池ブロックに対して個別に前記均等化動作を行う組み電池の電圧均等化回路において、前記一対の電池ブロックは、互いに隣接して接続されるx(xは2以上の正の整数)個の前記二次電池を共有することを特徴としている。   The voltage equalization circuit for the assembled battery according to the present invention divides the voltage of the battery block composed of m (m is a positive integer of 3 or more) secondary batteries connected in series with each other into m and outputs the divided voltage. If it is determined that the divided voltage is lower by comparing the circuit, the divided voltage, and the potential at the connection point of two adjacent cells of the battery block, the secondary battery on the lower potential side than the connection point A discharge circuit that discharges and discharges the secondary battery at a higher potential side than the connection point to equalize the voltages of the secondary batteries in the battery block when it is determined that the partial pressure is higher; Each of the pair of voltage equalization circuit blocks, and the pair of voltage equalization circuit blocks includes a pair of battery packs in which n (n is a positive integer larger than m) secondary batteries are connected in series. A set for performing the equalization operation individually on the battery blocks In the voltage equalization circuit of the battery, the pair of battery blocks is characterized in that sharing x (x is a positive integer of 2 or more) number of the secondary battery connected adjacent to each other.

なお、この発明では、電池ブロックが3個以上のセルを有するため、電圧均等化回路ブロックは、自己が電圧均等化を行う電池ブロックに所属する複数の隣接2セルの接続点を個別に電位制御する複数の放電回路(たとえばオペアンプ回路)を有する。   In the present invention, since the battery block has three or more cells, the voltage equalization circuit block individually controls the potential of the connection points of a plurality of adjacent two cells belonging to the battery block that performs voltage equalization. A plurality of discharge circuits (for example, operational amplifier circuits).

すなわち、この発明によれば、それぞれ独立にセル間の電圧均等化が行われる二つの電池ブロックが2個以上のセルを共有する回路構成(以下、複数セル共有方式と称するものとする)を採用している。これに対して、従来の電圧均等化方式は、二つの電池ブロックが1セルを共有するので、以下、1セル共有方式とも称するものとする。このようにすれば、あるセル数の電池ブロックを均等化する電圧均等化回路ブロックを用いて、従来の1セル共有方式とは異なる総セル数の組み電池を、電圧均等化回路ブロックの端子に端数を生じることなく電圧を均等化することが可能となる。なお、電圧均等化回路ブロックの端子に端数を生じるとは、各分圧を形成するために電圧均等化回路ブロックのブロック電圧を検出するための最高電位端子及び最低電位端子と、電池ブロックのセルを放電するための複数の中間電位端子とを空きが生じることなく電池ブロックの各セル間の接続点に接続できないことを言う。   That is, according to the present invention, a circuit configuration in which two battery blocks that perform voltage equalization between cells independently share two or more cells (hereinafter referred to as a multiple cell sharing method) is adopted. is doing. On the other hand, the conventional voltage equalization method is also referred to as a one-cell sharing method, since two battery blocks share one cell. In this way, by using a voltage equalization circuit block that equalizes a battery block of a certain number of cells, an assembled battery having a total number of cells different from the conventional one-cell sharing method is used as a terminal of the voltage equalization circuit block. It is possible to equalize the voltages without generating fractions. It should be noted that the generation of fractions at the terminals of the voltage equalization circuit block means that the highest potential terminal and the lowest potential terminal for detecting the block voltage of the voltage equalization circuit block to form each divided voltage, and the cell of the battery block This means that a plurality of intermediate potential terminals for discharging the battery cannot be connected to a connection point between each cell of the battery block without causing a space.

たとえば、電池ブロックが3セルをもつ場合において、2セル共有方式を採用すれば任意の総セル数をもつ組み電池の電圧均等化が可能となる。また、電池ブロックが4セルをもつ場合において2セル共有方式を採用すれば、総セル数が4以上の偶数個となる組み電池の電圧均等化が可能となる。   For example, when the battery block has three cells, the voltage equalization of the assembled battery having an arbitrary total number of cells can be achieved by adopting the two-cell sharing method. Further, when the two-cell sharing method is adopted when the battery block has four cells, it is possible to equalize the voltages of the assembled batteries in which the total number of cells is an even number of four or more.

更に、本発明によれば、電圧均等化に必要な時間を短縮することができる。すなわち、電池ブロックが複数の共有セルをもつということは、隣接する電池ブロック間で複数のセルがそれぞれ電池ブロック間の電圧均等化処理を受けることを意味するため従来の1セル共有方式に比べて電圧均等化速度が向上する。   Furthermore, according to the present invention, the time required for voltage equalization can be shortened. In other words, the fact that a battery block has a plurality of shared cells means that a plurality of cells are subjected to voltage equalization processing between the battery blocks between adjacent battery blocks. Voltage equalization speed is improved.

好適な態様において、互いに隣接して接続された所定のy(yはxと異なる2以上の正の整数)個又は1個の前記二次電池を共有する他の一対の前記電池ブロックを個別に均等化する他の一対の前記電圧均等化回路ブロックを有する。すなわち、この態様によれば、たとえば本発明の2セル共有方式で電圧均等化される電池ブロック群と、従来の1セル共有方式で電圧均等化される電池ブロック群とを混合して組み電池を構成することができるので、種々の又は任意の総セル数をもつ組み電池の電圧均等化が可能となる。もしくは、2セル共有方式で電圧均等化される電池ブロック群と、3セル共有方式電圧均等化される電池ブロック群とにより組み電池を構成してもよい。更には、1セル共有セル方式の電池ブロック群、2セル共有セル方式の電池ブロック群、3セル共有セル方式の電池ブロック群が混在する組み電池を構成することもできる。その結果として、この態様によれば、1種類の電圧均等化回路ブロックが集積されたICを用いて種々の又は任意の総セル数をもつ組み電池を電圧均等化することができる。 In a preferred aspect, predetermined y ( two is a positive integer different from x) connected adjacent to each other or another pair of battery blocks sharing one secondary battery individually It has another pair of voltage equalization circuit blocks for equalization. That is, according to this aspect, for example, a battery block group that is voltage-equalized by the two-cell sharing method of the present invention and a battery block group that is voltage-equalized by the conventional one-cell sharing method are mixed to form an assembled battery. Since it can be configured, it is possible to equalize the voltage of assembled batteries having various or arbitrary total cell numbers. Alternatively, the assembled battery may be configured by a battery block group that is voltage-equalized by the 2-cell sharing method and a battery block group that is voltage-equalized by the 3-cell sharing method. Furthermore, an assembled battery in which a battery block group of a 1-cell shared cell system, a battery block group of a 2-cell shared cell system, and a battery block group of a 3-cell shared cell system can be configured. As a result, according to this aspect, it is possible to perform voltage equalization on assembled batteries having various or arbitrary total cell numbers using an IC in which one type of voltage equalization circuit block is integrated.

好適な態様において、前記各放電回路による前記分圧回路の所定の分圧と前記電池ブロックの所定の二次電池の接続点の電位とを一致させる動作を禁止するスイッチ手段を有する。このようにすれば、万が一、二つ以上のセルを共有する二つの電圧均等化回路ブロックの動作が干渉して、これら二つの電圧均等化回路ブロックが電圧均等化を行う二つの電池ブロックのセル電圧が所定の電圧値に収束しない状況が生じたとしても、上記スイッチ手段を動作させることにより、所定の電圧均等化回路ブロックの電圧均等化動作を禁止するため、これにより上記干渉を抑制して、これら二つの電池ブロックのセル電圧を良好に所定の電圧値に収束させることができる。   In a preferred aspect, there is provided switch means for prohibiting an operation of matching a predetermined voltage division of the voltage dividing circuit by each discharge circuit and a potential of a connection point of a predetermined secondary battery of the battery block. In this case, by any chance, the operation of two voltage equalization circuit blocks sharing two or more cells interferes, and the cells of two battery blocks in which these two voltage equalization circuit blocks perform voltage equalization Even if a situation where the voltage does not converge to a predetermined voltage value occurs, by operating the switch means, the voltage equalization operation of the predetermined voltage equalization circuit block is prohibited, thereby suppressing the interference. The cell voltages of these two battery blocks can be converged to a predetermined voltage value satisfactorily.

なお、スイッチ手段としては隣接2セルの接続点と放電回路との接続を遮断するスイッチを含むか、もしくは放電回路の動作を停止させるスイッチを有すればよく、これらのスイッチは所定プログラムにより自動動作してもよく、あるいは手動により開閉されてもよい。放電回路の動作を停止させるスイッチとしては、たとえば放電回路の電源端子への電源電圧の印加を遮断する放電回路用の電源スイッチを採用することができる。   The switch means may include a switch for cutting off the connection between the connection point of the adjacent two cells and the discharge circuit, or a switch for stopping the operation of the discharge circuit. These switches automatically operate according to a predetermined program. Alternatively, it may be opened and closed manually. As a switch for stopping the operation of the discharge circuit, for example, a power switch for the discharge circuit that cuts off the application of the power supply voltage to the power supply terminal of the discharge circuit can be employed.

電圧均等化回路ブロックは、自己が電圧均等化を行う電池ブロックに所属する複数の隣接2セルの接続点を個別に電位制御する複数の放電回路(たとえばオペアンプ回路)を有する。このスイッチ手段は、一つの電圧均等化回路ブロックに含まれて複数の隣接2セルの接続点を個別に放電する複数の放電回路のうち、その一部の放電回路の動作だけを遮断できればよい。   The voltage equalization circuit block has a plurality of discharge circuits (for example, operational amplifier circuits) that individually control potentials of connection points of a plurality of adjacent two cells belonging to a battery block that performs voltage equalization. This switch means only needs to be able to cut off only the operation of a part of the plurality of discharge circuits included in one voltage equalization circuit block and individually discharging the connection points of a plurality of adjacent two cells.

以下、本発明の具体的な実施態様を図面を参照して説明する。もちろん、本発明の組み電池の電圧均等化回路は下記の実施態様に限定されるものではなく、本発明の技術思想を公知技術やそれと共通機能を有する技術を組み合わせて実現することも可能である。たとえば、放電回路としては、オペアンプ回路の代わりにコンデンサを用いた電荷移動方式のものなどを採用することができる。   Hereinafter, specific embodiments of the present invention will be described with reference to the drawings. Of course, the voltage equalization circuit of the assembled battery of the present invention is not limited to the following embodiments, and the technical idea of the present invention can be realized by combining known techniques and techniques having common functions with them. . For example, a charge transfer system using a capacitor instead of an operational amplifier circuit can be employed as the discharge circuit.

実施例1の組み電池の電圧均等化回路を図1に示すブロック図を参照して説明する。図1において、1〜6は、組み電池100を構成する各二次電池(セル)であり、セル1〜4は電池ブロック101を構成し、セル3〜6は電池ブロック101の低電位側にて電池ブロック101に隣接する電池ブロック102を構成している。7、8は同一の回路構成をもつ4セル用均等化IC(本発明で言う電圧均等化回路ブロック)であり、4セル用均等化IC7は電池ブロック101の電圧均等化を行い、4セル用均等化IC8は電池ブロック102の電圧均等化を行う。   The voltage equalization circuit of the assembled battery of Example 1 will be described with reference to the block diagram shown in FIG. In FIG. 1, 1 to 6 are secondary batteries (cells) constituting the assembled battery 100, the cells 1 to 4 constitute the battery block 101, and the cells 3 to 6 are on the low potential side of the battery block 101. The battery block 102 adjacent to the battery block 101 is configured. 7 and 8 are 4-cell equalization ICs (voltage equalization circuit block referred to in the present invention) having the same circuit configuration. The 4-cell equalization IC 7 performs voltage equalization of the battery block 101 and is used for 4 cells. The equalization IC 8 performs voltage equalization of the battery block 102.

この実施例では、それぞれ電圧均等化回路ブロックをなす4セル用均等化IC7、8により個別に電圧均等化処理を受けつつ互いに隣接する二つの電池ブロック101、102は、互いに隣接する2つのセル3、4を共有する。言い換えれば、これら4セル用均等化IC7、8は、2つの共有セル3、4に対して電圧均等化を行う。   In this embodiment, two battery blocks 101 and 102 that are adjacent to each other while being individually subjected to voltage equalization processing by the four-cell equalization ICs 7 and 8 that form voltage equalization circuit blocks, respectively, 4 is shared. In other words, these four-cell equalization ICs 7 and 8 perform voltage equalization on the two shared cells 3 and 4.

これにより、4セル用均等化IC7はセル1〜4の電圧均等化を行い、4セル用均等化IC8がセル3〜6の電圧均等化を行うため、最終的に各セル1〜6の電圧は均等化されることになる。すなわち、この実施例の4セル用均等化ICを用いれば、図1に示すように総セル数6の組み電池の電圧均等化を行うことができる。更に一般化して考えると、2以上の正の整数個の4セル用均等化ICを用いれば、総セル数が6以上の偶数個である組み電池の電圧均等化を行うことができる。   As a result, the 4-cell equalization IC 7 equalizes the voltages of the cells 1 to 4 and the 4-cell equalization IC 8 performs the voltage equalization of the cells 3 to 6. Will be equalized. That is, if the 4-cell equalization IC of this embodiment is used, the voltage equalization of the assembled battery having a total cell number of 6 can be performed as shown in FIG. Considering further generalization, voltage equalization can be performed for an assembled battery having a total number of cells that is an even number of six or more by using a positive integer of four or more equalization ICs for four cells.

なお、4セル用均等化IC7、8の具体的な回路構成としては、それが電圧均等化を行う電池ブロックのセル数より1少ない従来のオペアンプ型放電回路を用いる方式や、スイッチングされるコンデンサを用いて電荷を移動を行う方式などを採用することができる。オペアンプ型放電回路については、下記に具体的に説明する。   As a specific circuit configuration of the 4-cell equalization ICs 7 and 8, a method using a conventional operational amplifier type discharge circuit, which is one less than the number of cells of the battery block that performs voltage equalization, or a capacitor to be switched is used. It is possible to employ a method of moving charges by using them. The operational amplifier type discharge circuit will be specifically described below.

実施例2の組み電池の電圧均等化回路を図2に示す回路図を参照して説明する。図2において、1〜4は、組み電池100’を構成する各二次電池(セル)であり、セル1〜3は電池ブロック103を構成し、セル2〜4は電池ブロック103の低電位側にて電池ブロック103に隣接する電池ブロック104を構成している。7’、8’は同一の回路構成をもつ3セル用均等化IC(電圧均等化回路ブロックとも言う)であり、3セル用均等化IC7’は電池ブロック103の電圧均等化を行い、3セル用均等化IC8’は電池ブロック104の電圧均等化を行う。   A voltage equalization circuit of the assembled battery of Example 2 will be described with reference to a circuit diagram shown in FIG. In FIG. 2, 1 to 4 are secondary batteries (cells) constituting the assembled battery 100 ′, the cells 1 to 3 constitute the battery block 103, and the cells 2 to 4 represent the low potential side of the battery block 103. The battery block 104 adjacent to the battery block 103 is configured. 7 'and 8' are equalization ICs for three cells (also referred to as voltage equalization circuit blocks) having the same circuit configuration, and the equalization IC for 3 cells 7 'performs voltage equalization of the battery block 103 and 3 cells. The equalizing IC 8 ′ performs voltage equalization of the battery block 104.

この実施例においても、これら二つの3セル用均等化IC7’、8’により個別に電圧均等化処理を受けつつ互いに隣接する二つの電池ブロック103、104は、互いに隣接する2つのセル2、3を共有する。言い換えれば、これら二つの3セル用均等化IC7’、8’は、2つの同一セル7、8に対して電圧均等化を行う。   Also in this embodiment, the two battery blocks 103 and 104 adjacent to each other while being individually subjected to the voltage equalization processing by the two three-cell equalization ICs 7 ′ and 8 ′ include the two cells 2, 3 and 3 adjacent to each other. Share In other words, these two 3-cell equalization ICs 7 ′ and 8 ′ perform voltage equalization on the same two cells 7 and 8.

これにより、3セル用均等化IC7’がセル1〜3の電圧均等化を行い、3セル用均等化IC8’がセル2〜4の電圧均等化を行うため、最終的に各セル1〜4の電圧は均等化されることになる。すなわち、この実施例の3セル用均等化ICを用いれば、図2に示すように総セル数4の組み電池の電圧均等化を行うことができる。なお、この実施例では総セル数が5以上となると、3個の3セル用均等化ICが一つの同じセルに対して電圧均等化を行うことになる。したがって、この場合には3セル用均等化ICの個数を2以上とすることにより、総セル数が4以上の組み電池の電圧均等化が可能となる。   As a result, the 3-cell equalization IC 7 ′ performs voltage equalization for the cells 1 to 3 and the 3-cell equalization IC 8 ′ performs voltage equalization for the cells 2 to 4. Will be equalized. That is, if the three-cell equalization IC of this embodiment is used, it is possible to equalize the voltage of the assembled battery having a total cell number of four as shown in FIG. In this embodiment, when the total number of cells is 5 or more, three three-cell equalization ICs perform voltage equalization on one and the same cell. Therefore, in this case, by setting the number of equalization ICs for three cells to 2 or more, it is possible to equalize the voltages of the assembled batteries having a total number of cells of 4 or more.

以下、3セル用均等化IC7’、8’の回路動作を以下に説明する。3セル用均等化IC7’は、抵抗式の分圧回路70と、二つのオペアンプ型放電回路(本発明で言う放電回路)71、72を有している。3セル用均等化IC8’は、抵抗式の分圧回路80と、二つのオペアンプ型放電回路(本発明で言う放電回路)81、82を有している。3セル用均等化IC7’、8’は、最高電位端子L1と、二つの中間電位端子L2、L3と、最低電位端子L4とを有している。   The circuit operation of the 3-cell equalization ICs 7 'and 8' will be described below. The three-cell equalization IC 7 ′ has a resistance type voltage dividing circuit 70 and two operational amplifier type discharge circuits (discharge circuits in the present invention) 71 and 72. The three-cell equalization IC 8 ′ has a resistance voltage dividing circuit 80 and two operational amplifier type discharge circuits (discharge circuits in the present invention) 81 and 82. The three-cell equalization ICs 7 'and 8' have a highest potential terminal L1, two intermediate potential terminals L2 and L3, and a lowest potential terminal L4.

分圧回路70はそれぞれ等しい抵抗値をもつ分圧抵抗R21、R22、R23を直列接続してなり、分圧回路80はそれぞれ等しい抵抗値をもつ分圧抵抗R31、R32、R33を直列接続してなる。放電回路71はオペアンプ211とその負帰還抵抗201とを有し、放電回路72はオペアンプ212とその負帰還抵抗202とを有している。放電回路81はオペアンプ311とその負帰還抵抗301とを有し、放電回路82はオペアンプ312とその負帰還抵抗302とを有している。つまり、最高電位端子L1及び最低電位端子L4は電池ブロックの電圧を分圧回路へ入力するための端子(電圧入力端子とも言う)をなしており、2つの中間電位端子L2、L3は各電池ブロックにそれぞれ二箇所存在する隣接2セルの接続点の電位を変化させるための端子(放電端子とも言う)をなしている。   The voltage dividing circuit 70 is formed by connecting voltage dividing resistors R21, R22, and R23 having equal resistance values in series, and the voltage dividing circuit 80 is formed by connecting voltage dividing resistors R31, R32, and R33 having equal resistance values in series. Become. The discharge circuit 71 has an operational amplifier 211 and its negative feedback resistor 201, and the discharge circuit 72 has an operational amplifier 212 and its negative feedback resistor 202. The discharge circuit 81 has an operational amplifier 311 and its negative feedback resistor 301, and the discharge circuit 82 has an operational amplifier 312 and its negative feedback resistor 302. That is, the highest potential terminal L1 and the lowest potential terminal L4 form terminals (also referred to as voltage input terminals) for inputting the voltage of the battery block to the voltage dividing circuit, and the two intermediate potential terminals L2 and L3 are each battery block. 2 are terminals (also referred to as discharge terminals) for changing the potential at the connection point of two adjacent cells existing in two locations.

したがって、分圧回路70の3つの分圧出力点は電池ブロック103の電圧を3等分した分圧V1、V2を出力し、分圧回路80の3つの分圧出力点は電池ブロック104の電圧を3等分した分圧V1’、V2’を出力し、これら分圧は放電回路71、72、81、82の+入力端に入力される。放電回路71、72、81、82のマイナス入力端には各電池ブロック103、104の中間電位端子L2、L3の電位V12、V23、V34が入力される。   Accordingly, the three voltage dividing output points of the voltage dividing circuit 70 output the divided voltages V1 and V2 obtained by dividing the voltage of the battery block 103 into three equal parts, and the three voltage dividing output points of the voltage dividing circuit 80 are the voltages of the battery block 104. Are divided into three equal parts, and divided voltages V1 ′ and V2 ′ are output, and these divided voltages are input to the positive input terminals of the discharge circuits 71, 72, 81 and 82. The potentials V12, V23, and V34 of the intermediate potential terminals L2 and L3 of the battery blocks 103 and 104 are input to the negative input terminals of the discharge circuits 71, 72, 81, and 82, respectively.

各オペアンプの動作自体は上記した特許文献に記載されるものと本質的に同じである。オペアンプ212は分圧V1と検出電圧V23とを比較し、オペアンプ211は分圧V2と検出電圧V12とを比較し、オペアンプ312は分圧V1’と検出電圧V34とを比較し、オペアンプ311は分圧V2’と検出電圧V23とを比較する。   The operation itself of each operational amplifier is essentially the same as that described in the above-mentioned patent document. The operational amplifier 212 compares the divided voltage V1 and the detected voltage V23, the operational amplifier 211 compares the divided voltage V2 and the detected voltage V12, the operational amplifier 312 compares the divided voltage V1 ′ and the detected voltage V34, and the operational amplifier 311 The voltage V2 ′ is compared with the detection voltage V23.

以下、負帰還抵抗器201付きのオペアンプ211からなる放電回路71の動作を説明する。ここで、各オペアンプはその−入力端に接続される組み電池の接続点に電極端子が接続される二つのセル1、2から、その電源電圧を給電されるものとする。   Hereinafter, the operation of the discharge circuit 71 including the operational amplifier 211 with the negative feedback resistor 201 will be described. Here, it is assumed that each operational amplifier is supplied with power supply voltage from two cells 1 and 2 whose electrode terminals are connected to the connection point of the assembled battery connected to the negative input terminal.

まず、検出電圧V12が分圧V2より高い場合を考える。放電回路71の出力電圧は非常に低くなり、電流は中間電位端子L2から負帰還抵抗器201を通じて放電回路71の出力端へ向けて流れ、これにより、セル2又はセル2、3が放電する。逆に、検出電圧V12が分圧V2より低い場合を考える。放電回路71の出力電圧は非常に高くなり、電流は放電回路71の出力端から負帰還抵抗器201を通じて中間電位端子L2へ向けて流れ、これにより、セル1が放電する。このような動作は本質的に他の放電回路72、81、82でも同じであり、これにより、3セル用均等化IC7’は電池ブロック103のセル間の電圧均等化を行い、3セル用均等化IC8’は電池ブロック104のセル間の電圧均等化を行い、これにより、組み電池100’の各セル間の電圧均等化がなされる。なお、放電回路71の出力端はオペアンプ211の内部回路を通じてオペアンプ211の+電源端子、−電源端子に接続され、これら二つの電源端子の間に組み電池のすべてのセル又は所定のセルの組み合わせから電源電圧が印加されているものとする。つまり、分圧と電池ブロックの隣接2セルの接続点の電位とを比較することにより分圧の方が低いと判別した場合は接続点より低電位側の二次電池を放電し、分圧の方が高いと判別した場合は接続点より高電位側の二次電池を放電して電池ブロック内の各二次電池の電圧を均等化することができ、更に二つの電圧均等化回路ブロック7、8により個別に均等化される二つの電池ブロックが二つのセルを共有するためこれら二つの電池ブロック間の電圧均等化を短時間で処理することもできる。   First, consider a case where the detection voltage V12 is higher than the divided voltage V2. The output voltage of the discharge circuit 71 becomes very low, and the current flows from the intermediate potential terminal L2 to the output terminal of the discharge circuit 71 through the negative feedback resistor 201, whereby the cell 2 or the cells 2 and 3 are discharged. Conversely, consider the case where the detection voltage V12 is lower than the divided voltage V2. The output voltage of the discharge circuit 71 becomes very high, and the current flows from the output terminal of the discharge circuit 71 toward the intermediate potential terminal L2 through the negative feedback resistor 201, whereby the cell 1 is discharged. Such an operation is essentially the same in the other discharge circuits 72, 81, 82, whereby the 3-cell equalization IC 7 ′ performs voltage equalization between the cells of the battery block 103, and the 3-cell equalization. The integrated IC 8 ′ performs voltage equalization between the cells of the battery block 104, whereby voltage equalization between the cells of the assembled battery 100 ′ is performed. The output terminal of the discharge circuit 71 is connected to the + power supply terminal and the −power supply terminal of the operational amplifier 211 through the internal circuit of the operational amplifier 211. Between these two power supply terminals, all cells of the assembled battery or a combination of predetermined cells are used. It is assumed that a power supply voltage is applied. In other words, if it is determined that the partial pressure is lower by comparing the partial pressure with the potential at the connection point of two adjacent cells in the battery block, the secondary battery on the lower potential side than the connection point is discharged and the partial pressure is If it is determined that the voltage is higher, the secondary battery on the higher potential side than the connection point can be discharged to equalize the voltage of each secondary battery in the battery block. Further, the two voltage equalizing circuit blocks 7, Since two battery blocks that are individually equalized by 8 share two cells, voltage equalization between these two battery blocks can be processed in a short time.

(変形態様)
変形態様を図3を参照して説明する。この実施例は、4セル用均等化IC7〜9を従来の1セル共有方式で均等化する例を示す。各電池ブロック101〜103のうち電位的に隣接する2つの電池ブロックはそれぞれ1セルを共有する。すなわち、4セル用均等化ICを用いると、1セル共有方式、2セル共有方式、3セル共有方式のどれかを用いて組み電池の電圧均等化を行うことができる。
(Modification)
A modification will be described with reference to FIG. This embodiment shows an example in which the 4-cell equalization ICs 7 to 9 are equalized by the conventional one-cell sharing method. Two battery blocks adjacent to each other among the battery blocks 101 to 103 share one cell. That is, when the 4-cell equalization IC is used, the voltage of the assembled battery can be equalized using any one of the 1-cell sharing method, the 2-cell sharing method, and the 3-cell sharing method.

参考態様)
参考態様を図4を参照して説明する。
( Reference mode)
A reference mode will be described with reference to FIG.

この参考態様は、4セル用均等化IC7〜9を用いて総セル数9の組み電池の電圧均等化を行う例を示す。4セル用均等化IC7、8は互いに二つの共有セルをもつ二つの電池ブロック101、102に対して電圧均等化を個別に行い、4セル用均等化IC8、9は互いに一つの共有セルをもつ二つの電池ブロック102、103に対して電圧均等化を個別に行う。すなわち、4セル用均等化ICを用いると、1セル共有方式、2セル共有方式、3セル共有方式が混在した組み電池の電圧均等化を行うことができる。 This reference mode shows an example in which voltage equalization is performed on an assembled battery having a total number of 9 cells using the 4-cell equalization ICs 7 to 9. The 4-cell equalization ICs 7 and 8 individually perform voltage equalization on the two battery blocks 101 and 102 having two shared cells, and the 4-cell equalization ICs 8 and 9 have one shared cell. Voltage equalization is individually performed for the two battery blocks 102 and 103. That is, when the 4-cell equalization IC is used, it is possible to perform voltage equalization of the assembled battery in which the 1-cell sharing method, the 2-cell sharing method, and the 3-cell sharing method are mixed.

実施例3の組み電池の電圧均等化回路を図5を参照して説明する。この実施例は、図2において、スイッチS1、S2、S3を設けた点をその特徴としている。通常は、スイッチS1、S2はオンされ、スイッチS3はオフされて、図2と同一の回路構成となっている。   A voltage equalization circuit of the assembled battery of Example 3 will be described with reference to FIG. This embodiment is characterized in that the switches S1, S2, and S3 are provided in FIG. Normally, the switches S1 and S2 are turned on and the switch S3 is turned off, so that the circuit configuration is the same as in FIG.

図5において、オペアンプや分圧回路の抵抗の間の公差が大きいと、電池ブロック間の電圧均等化が所定値に収束しない可能性が考えられる。すなわち、図2においてセル1〜4の電圧をV1、V2、V3、V4とし、分圧抵抗R21、R22、R23、R31、R32、R33の抵抗値を簡略化のためにそのままR21、R22、R23、R31、R32、R33とみなすと、収束条件は以下のようになる。   In FIG. 5, if the tolerance between the resistances of the operational amplifier and the voltage dividing circuit is large, the voltage equalization between the battery blocks may not converge to a predetermined value. That is, in FIG. 2, the voltages of the cells 1 to 4 are V1, V2, V3, and V4, and the resistance values of the voltage dividing resistors R21, R22, R23, R31, R32, and R33 are simply R21, R22, and R23 for simplification. , R31, R32, R33, the convergence condition is as follows.

V1:V2:V3=R21:R22:R23
V2:V3:V4=R31:R32:R33
しかし、この二つの等式が成立するのは、
R22:R23=R32:R33
が成立する場合のみである。各電圧均等化回路ブロック(3セル用均等化IC)の間で回路定数のばらつきが大きく、電圧均等化がうまくできないと予想される場合には、あらかじめ図5のスイッチS1、S2をオフし、スイッチS3をオンすることにより、オペアンプ回路である放電回路81の動作を停止することにより、収束を容易化することができる。すなわち、この態様は、スイッチを追加することにより2セル共有3セル均等化方法を1セル共有2セル均等化方法に変更して回路定数ばらつきに起因するオペアンプ間の干渉(逆動作)を回避するものである。なお、実際にはわずかな不感帯をもうけることにより多少のばらつきは問題とならないようにするが、不感帯を大きくすると均等化電圧の誤差が大きくなるという問題が生じる。
(変形態様)
電圧均等化回路ブロック8’の放電回路82の動作を選択的に停止するには、図6に示すように、放電回路82のオペアンプ311の+電源端子とそれに電源電圧を印加する端子との間に電源スイッチS4を介設しておき、この電源スイッチS4を開放してもよい。このようにすれば、一つのスイッチにより同様の効果を奏することができる。
V1: V2: V3 = R21: R22: R23
V2: V3: V4 = R31: R32: R33
But these two equations hold
R22: R23 = R32: R33
This is only the case. When it is expected that the circuit constants vary greatly between the voltage equalization circuit blocks (three-cell equalization IC) and the voltage equalization cannot be performed well, the switches S1 and S2 in FIG. By turning on the switch S3, the operation of the discharge circuit 81, which is an operational amplifier circuit, is stopped, so that convergence can be facilitated. That is, in this aspect, by adding a switch, the 2-cell shared 3-cell equalization method is changed to the 1-cell shared 2-cell equalization method to avoid interference (opposite operation) between operational amplifiers due to circuit constant variations. Is. In practice, a slight dead band is provided so that some variation does not become a problem. However, when the dead band is increased, an error in the equalization voltage increases.
(Modification)
In order to selectively stop the operation of the discharge circuit 82 of the voltage equalization circuit block 8 ′, as shown in FIG. 6, between the + power supply terminal of the operational amplifier 311 of the discharge circuit 82 and the terminal to which the power supply voltage is applied. A power switch S4 may be provided in the front and the power switch S4 may be opened. In this way, the same effect can be achieved with a single switch.

実施例1の組み電池の電圧均等化回路を示すブロック回路図である。FIG. 3 is a block circuit diagram illustrating a voltage equalization circuit of the assembled battery according to the first embodiment. 実施例2の組み電池の電圧均等化回路を示す回路図である。FIG. 6 is a circuit diagram showing a voltage equalization circuit of the assembled battery of Example 2. 変形態様を示すブロック回路図である。It is a block circuit diagram which shows a deformation | transformation aspect. 変形態様を示すブロック回路図である。It is a block circuit diagram which shows a deformation | transformation aspect. 実施例3の組み電池の電圧均等化回路を示す回路図である。FIG. 6 is a circuit diagram showing a voltage equalization circuit of the assembled battery of Example 3. 変形態様を示すブロック回路図である。It is a block circuit diagram which shows a deformation | transformation aspect.

符号の説明Explanation of symbols

L1 最高電位端子
L2 中間電位端子
L4 最低電位端子
R21〜R23 分圧抵抗
R31〜R33 分圧抵抗
S1〜S4 スイッチ(スイッチ手段)
1〜6 セル(二次電池)
セル用均等化IC(電圧均等化回路ブロック、本発明で言う一対の電圧均等化回路ブロックの一つ
8 セル用均等化IC(電圧均等化回路ブロック、本発明で言う一対の電圧均等化回路ブロックの他の一つ、並びに、本発明で言う他の一対の電圧均等化回路ブロックの一つ)
9 セル用均等化IC(電圧均等化回路ブロック、本発明で言う他の一対の電圧均等化回路ブロックの他の一つ)
70、80 分圧回路
71、72 放電回路
81、82 放電回路
100 組み電池
101 電池ブロック(本発明で言う一対の電池ブロックの一つ)
102 電池ブロック(本発明で言う一対の電池ブロックの他の一つ、並びに、本発明で言う他の一対の電池ブロックの一つ)
103 電池ブロック(本発明で言う他の一対の電池ブロックの他の一つ)
104 電池ブロック
211 オペアンプ
212 オペアンプ
311 オペアンプ
312 オペアンプ

L1 highest potential terminal L2 intermediate potential terminal L4 lowest potential terminal R21 to R23 voltage dividing resistor R31 to R33 voltage dividing resistor S1 to S4 switch (switch means)
1-6 cells (secondary battery)
7- cell equalization IC (voltage equalization circuit block, one of a pair of voltage equalization circuit blocks referred to in the present invention )
8 cell equalization IC (voltage equalization circuit block, another one of a pair of voltage equalization circuit blocks referred to in the present invention, and one of another pair of voltage equalization circuit blocks referred to in the present invention)
9 Cell equalization IC (voltage equalization circuit block, other one of the other pair of voltage equalization circuit blocks referred to in the present invention)
70, 80 Voltage divider circuit 71, 72 Discharge circuit 81, 82 Discharge circuit 100 Battery pack 101 Battery block (one of a pair of battery blocks in the present invention)
102 battery block (the other one of the pair of battery blocks referred to in the present invention and one of the other pair of battery blocks referred to in the present invention)
103 battery block (the other one of the other pair of battery blocks referred to in the present invention)
104 battery block 211 operational amplifier 212 operational amplifier 311 operational amplifier 312 operational amplifier

Claims (3)

互いに直列接続されたm(mは3以上の正の整数)個の二次電池からなる電池ブロックの電圧をm個に分圧して出力する分圧回路と、前記分圧と前記電池ブロックの隣接2セルの接続点の電位とを比較することにより前記分圧の方が低いと判別した場合は前記接続点より低電位側の前記二次電池を放電し、前記分圧の方が高いと判別した場合は前記接続点より高電位側の前記二次電池を放電して前記電池ブロック内の前記各二次電池の電圧を均等化する放電回路とをそれぞれ有する一対の電圧均等化回路ブロックを備え、
前記一対の電圧均等化回路ブロック(7,8)は、
n(nはmより大きい正の整数)個の二次電池を直列接続してなる組電池(100)の一対の前記電池ブロック(101、102)に対して個別に前記均等化動作を行う組み電池の電圧均等化回路において、
前記一対の電池ブロック(101、102)は、
互いに隣接して接続されるx(xは2以上の正の整数)個の前記二次電池(3、4)を共有することを特徴とする組み電池の電圧均等化回路。
A voltage dividing circuit which (is m 3 or more positive integer) connected in series the m voltage of the battery block of the secondary battery of m to divide the output from each other, a front Stories partial pressure of the battery block When it is determined that the partial pressure is lower by comparing the potential at the connection point of two adjacent cells, the secondary battery on the lower potential side than the connection point is discharged, and the partial pressure is higher. a pair of voltage equalizing circuit blocks each having a discharge circuit for equalizing the voltage of each secondary battery when it is determined within the battery block to discharge the rechargeable battery on the high potential side of the connection point Prepared,
The pair of voltage equalization circuit blocks (7, 8) includes:
A set in which the equalization operation is individually performed on a pair of battery blocks (101, 102) of a battery pack (100) in which n (n is a positive integer larger than m) secondary batteries are connected in series. In the battery voltage equalization circuit,
The pair of battery blocks (101, 102)
A voltage equalization circuit for an assembled battery, wherein x (x is a positive integer of 2 or more) secondary batteries (3, 4) connected adjacent to each other are shared.
請求項1記載の組み電池の電圧均等化回路において、
互いに隣接して接続された所定のy(yはxと異なる2以上の正の整数)個又は1個の前記二次電池を共有し且つ前記一対の電池ブロック(101、102)とは異なる電池ブロック対である他の一対の前記電池ブロック(102、103)を個別に均等化し且つ前記一対の電圧均等化回路ブロック(7,8)とは異なる電圧均等化回路ブロック対である他の一対の前記電圧均等化回路ブロック(8、9)を有することを特徴とする組み電池の電圧均等化回路。
In the assembled battery voltage equalization circuit according to claim 1,
Predetermined y (y is a positive integer greater than or equal to 2 different from x) or one secondary battery connected adjacent to each other and different from the pair of battery blocks (101, 102) Another pair of voltage equalization circuit blocks (7, 8) which are different from the pair of voltage equalization circuit blocks (7, 8) individually equalizing the other pair of battery blocks (102, 103) as a block pair A voltage equalization circuit for an assembled battery, comprising the voltage equalization circuit block (8, 9) .
請求項1記載の組み電池の電圧均等化回路において、
前記電圧均等化回路ブロックは、
前記各放電回路による前記分圧回路の所定の分圧と前記電池ブロックの所定の二次電池の接続点の電位とを一致させる動作を禁止するスイッチ手段を有することを特徴とする組み電池の電圧均等化回路。
In the assembled battery voltage equalization circuit according to claim 1,
The voltage equalization circuit block includes:
A voltage of the assembled battery comprising switch means for prohibiting an operation of matching a predetermined voltage division of the voltage dividing circuit by the discharge circuit with a potential of a connection point of a predetermined secondary battery of the battery block. Equalizing circuit.
JP2004124654A 2004-04-20 2004-04-20 Voltage equalization circuit for battery pack Expired - Fee Related JP4059225B2 (en)

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