JP4042052B2 - Semiconductor device - Google Patents

Description

The present invention is related to semiconductor equipment having a heating element such as semiconductor devices.

  The semiconductor element generates heat during operation, and if the temperature reaches a certain level due to heat generation, the semiconductor element may be thermally destroyed. In order to detect a temperature rise, a temperature detector may be provided in the semiconductor element.

In the conventional example (see Patent Document 1), as shown in FIGS. 14 and 15, the semiconductor device 300 includes an output transistor 305 and a temperature detection transistor 310 on a semiconductor substrate. The output transistor 305 includes a collector region 306, a first base region 307, and a first emitter region 308. The temperature detection transistor 310 includes a collector region 306, a second base region 311, and a second emitter region 312. The output transistor 305 is disposed in a free area at the center of the temperature detection transistor 310.
JP-A-6-342876

  The above conventional example has the following problems. First, since the temperature detection transistor 310 is arranged in the empty area in the center of the output transistor 305, the structure of the semiconductor device 300 becomes complicated and a singular part is generated inside. The singular part reduces the withstand amount and tends to cause thermal destruction of the semiconductor device 300.

  In addition, a pad is provided outside the semiconductor device 300, and the internal temperature detection transistor 310 must be connected to the pad by a wire, which increases the size of the semiconductor device 300. Furthermore, it is necessary to form the temperature detection transistor 310 in all the semiconductor devices 300 that are desired to detect a temperature rise, and the range of selection of the semiconductor device 300 is narrowed.

The present invention has been made in view of the above circumstances, the semiconductor device breakdown voltage is large, the size is small, and an object thereof to provide Hisage the semiconductor equipment the width of selection spreads.

The basic technical idea of the present invention is to provide a temperature detector in a semiconductor base substrate on which a heating element such as a semiconductor element is mounted.
(1) A semiconductor device according to a first invention comprises a semiconductor base substrate having at least one pn junction part in which a second conductivity type semiconductor is formed in a part of the first conductivity type semiconductor, as described in claim 1. At least one heating element joined to the semiconductor base substrate via the insulating layer and the metal layer, a first terminal connected to the first conductive type semiconductor, and a second terminal connected to the second conductive type semiconductor, The heating element is a semiconductor element, the pn junction is located immediately below the semiconductor element, and the pn junction protrudes from the surface of the semiconductor substrate more than the other parts. It is characterized by that.

  In this semiconductor device, when the temperature changes due to heat generation during operation of the heat generating element, the pn junction in the semiconductor base substrate disposed in the vicinity of the heat generating element functions as a temperature detection unit and detects a change in temperature.

(2) A semiconductor device according to a second aspect is the semiconductor device according to claim 1, wherein the temperature of the heating element is detected by a pn junction, and the semiconductor base substrate is formed based on the detection result. The operation of the heat generating element is controlled by a built-in temperature adjustment circuit.

In this semiconductor device , the temperature adjustment circuit in the semiconductor base substrate controls the operation of the heat generating element based on the input from the pn junction, and suppresses or stops the operation when the heat generation exceeds the allowable range.
(3) According to a third aspect of the present invention, there is provided a semiconductor device having at least one pn junction part in which a second conductivity type semiconductor is formed in a part of the first conductivity type semiconductor. A first semiconductor base substrate having an insulating layer and a first metal layer, a second semiconductor base substrate having a second insulating layer and a second metal layer, and between the first semiconductor base substrate and the second semiconductor base substrate And a second terminal connected to the second conductivity type semiconductor, the heating element being a semiconductor element, and the pn The junction is located immediately below or directly above the semiconductor element .

  In this semiconductor device, when the temperature changes due to heat generation during the operation of the semiconductor element, the pn junction portion of the first semiconductor base substrate or the second semiconductor base substrate functions as a temperature detection unit and detects a change in temperature.

(4) Fourth invention the semiconductor device according to, as described in claim 4, in the semiconductor device according to claim 3, detects the temperature of the heating element by the pn junction, the first semiconductor base on the basis of the detection result The operation of the heating element is controlled by a temperature adjustment circuit formed in the substrate or the second semiconductor base substrate.

In this semiconductor device , the temperature adjustment circuit in the first or second semiconductor base substrate controls the operation of the heat generating element based on the input from the pn junction, and suppresses or stops the operation when the heat generation exceeds the allowable range. To do.

(1) According to the semiconductor device of the first invention, since the temperature rise of the heat generating element can be detected without incorporating a temperature detection unit, the semiconductor is focused on the element characteristics corresponding to the switching characteristics and the steady ON characteristics. A heating element such as an element can be selected, and a connection line between the temperature detection unit and an external pad is not required.

Furthermore, heating elements Runode Oh semiconductor device, according to the temperature of the semiconductor device detected by the pn junction can be controlled semiconductor element from the outside. In addition, since the pn junction is positioned directly below the semiconductor element, the temperature of the heating element can be accurately detected.

Furthermore, the height of this semiconductor device can be kept low. Crowded make mounted recessed portion a heating element on the convex portion that protrudes from a semiconductor base substrate, since the set only the external connection terminals to the p-type layer and the n-type layer of the portion does not protrude the external connection terminals projecting portion This is because the external connection terminal can be kept lower than the upper surface of the heating element.
Further, if the insulating layer contains the same constituent elements as the semiconductor base substrate or the semiconductor element, the occurrence of cracks due to distortion at the junction between the heating element and the insulating layer can be prevented. Since the insulating layer located between the semiconductor base substrate and the semiconductor element contains a constituent element of the semiconductor element or the semiconductor base substrate, the linear expansion coefficient of the insulating layer becomes a value close to the linear expansion coefficient of the heat generating element or the base substrate. This is because the difference in quantity is reduced.
(2) According to the semiconductor device of claim 2 , when the heat generation amount of the heat generating element is large and the heat generation temperature is high, the operation of the heat generating element is controlled by the temperature adjustment circuit based on the detected temperature, thereby causing the malfunction of the heat generating element. And can prevent thermal destruction.
(3) According to the semiconductor device of claim 3 , since the heat generating element is sandwiched between the semiconductor base substrates so as to be electrically connected from the upper and lower surfaces, the temperature rise of the heat generating element is detected without incorporating the temperature detecting unit. Therefore, it is possible to select a heating element such as a semiconductor element by placing importance on the element characteristics according to the switching characteristics and the steady ON characteristics, and the connection line between the temperature detection unit and an external pad or the like becomes unnecessary. In addition, the heat generating element and the semiconductor base substrate can be electrically connected, heat can be radiated from both sides, and temperature can be detected on both sides.

Further according to this semiconductor device, since the heating element is a semiconductor device, according to the temperature of the semiconductor device detected by the pn junction, it can control the operation of the semiconductor device. Moreover, since the pn junction is located immediately above or directly below the semiconductor element, the temperature of the heating element can be accurately detected. Since the pn junction is located on the top surface of the convex portion, the height of the temperature signal terminal output from the pn junction may be made thinner than the sum of the height of the convex portion and the thickness of the heating element. Becomes easier.

If the first and second insulating layers include constituent elements of the semiconductor element or the first and second semiconductor base substrates, the linear expansion coefficient of the heating element and the linear expansion coefficient of the base substrate or the heating element are close to each other. It becomes. As a result, the occurrence of cracks due to distortion at the joint between the heating element and the first and second insulating layers is prevented.
(4) According to the semiconductor device of claim 4 , when the heat generation amount in the heat generating element is large or the heat generation temperature is high, the temperature adjustment circuit sends a signal to the control unit of the heat generating element based on the detected temperature to control the operation. As a result, it is possible to prevent malfunction and thermal destruction of the heat generating element due to temperature rise.

A. Semiconductor Device There are two types of semiconductor devices of the present invention. The first type has one semiconductor base substrate, and the second type has two semiconductor base substrates.
(1) The first type includes a semiconductor base substrate, an insulating layer and a metal layer, a heating element such as a semiconductor element, and a first terminal and a second terminal.

The pn junction of the semiconductor base substrate is a diode in which the p-type layer is diffused in a part of the n-type layer or the n-type layer is diffused in a part of the p-type layer. The semiconductor base substrate has a pn junction protruding from the surface including the pn junction . For example, if a part of the n-type layer is protruded and a p-type layer is formed in the protrusion, a protruding pn junction can be realized.

The insulating layer can include the same constituent elements as the semiconductor base substrate or the heating element. For example,
If the insulating layer is made of SiO2 and the semiconductor base substrate is made of SiC, both contain Si. In addition, the semiconductor base substrate can incorporate a temperature adjustment circuit that controls the operation of the heating element in accordance with the heat generation at the pn junction.
(2) The second type is a first semiconductor base substrate, a first insulating layer and a first metal layer thereon, a second semiconductor base substrate, a second insulating layer and a second metal layer thereon, and a first metal. A heating element such as a semiconductor element between the layer and the second metal layer, and a first (n-type) terminal and a second (p-type) terminal are included. In other words, the first semiconductor base substrate and the second semiconductor base substrate are arranged on both sides of the heating element.

The first conductive semiconductor (n-type layer) and the second conductive semiconductor (p-type layer) may be mounted on either the first semiconductor base substrate or the second semiconductor base substrate. At least one of the first and second base substrates has a convex portion, the pn junction portion is provided only on one of the semiconductor base substrates, and the pn junction portion protrudes from the surface including the pn junction portion.

The first and second insulating layers may include the same constituent elements as the first and second semiconductor base substrates or the heating elements, respectively. For example, if the first and second insulating layers are made of SiO2, and the first and second semiconductor base substrates are made of SiC, both contain Si. In addition, the first or second semiconductor base substrate can incorporate a temperature adjustment circuit that controls the operation of the heating element in accordance with the heat generation at the pn junction.
B. Semiconductor Element In both the first type semiconductor device and the second type semiconductor device, one or more (a plurality of) heating elements are bonded to the base substrate via an insulating layer and a metal layer. The heat generating element includes a semiconductor element and a heater coil, and the plurality of semiconductor elements can be electrically connected in parallel or can be arranged electrically independently.

When there is one semiconductor base substrate, the n-type terminal and the p-type terminal are electrically connected to the n-type layer and the p-type layer, respectively. When there are two semiconductor base substrates, two n-type terminals and two p-type terminals are provided, and the first n-type terminal and the first p-type layer are connected to the n-type layer and the p-type layer of the first semiconductor base substrate. The terminal and the second p-type layer are electrically connected to the second n-type layer and the second p-type layer of the second semiconductor base substrate, respectively. The p-type layer and the n-type layer may be mounted on either the first semiconductor base substrate or the second semiconductor base substrate. In order to make the n-type terminal and the p-type terminal conductive to the n-type layer and the p-type layer, a part of the insulating layer is removed and a metal part is locally formed on the base substrate.
C. Heating element control method In the heating element control method, the heat generated in the heating element is detected by a pn junction formed in the semiconductor base substrate, and the temperature adjustment formed in the semiconductor base substrate based on the detection result in the pn junction part. The circuit controls the operation of the heating element. The pn junction and the temperature adjustment circuit are formed simultaneously when the semiconductor base substrate is manufactured.
D. Manufacturing method of semiconductor device The manufacturing method of a semiconductor device of the present invention includes a step of forming a base substrate having a pn junction, a step of laminating an insulating film and a metal layer, and a heating element when there is one semiconductor base substrate. It consists of the process of joining and the process of forming the 1st type terminal and the 2nd terminal. Any of the step of bonding the semiconductor elements and the step of forming the first type terminal and the second terminal may be performed first. Pn
At the time of forming the joint, a temperature adjustment circuit can be formed as necessary.

 When there are two semiconductor base substrates, a step of forming a first semiconductor base substrate having a first pn junction, a step of stacking a first insulating film and a first metal layer, a first n-type terminal, and a first p-type terminal are provided. A step of forming, a step of bonding the heat generating element, a step of forming a second semiconductor base substrate having a second pn junction, a step of laminating the second insulating film and the second metal layer, a second n-type terminal, Forming a second p-type terminal. When forming the pn junction, a temperature adjustment circuit for a heating element can be formed on any semiconductor base substrate as necessary.

Embodiments of the present invention will be described below with reference to the accompanying drawings.
<First embodiment>
(Constitution)
1, 2 and 3 show a semiconductor device according to the first embodiment. The semiconductor device includes a semiconductor base substrate (hereinafter referred to as “base substrate”) 10, an insulating film 20 and a metal layer 25, a semiconductor element 40 and a lead frame 50, an n-type terminal 55 and a p-type terminal 57, and a mold. And resin 60. This is a case where there is one base substrate, the temperature detection unit 15 protrudes, and one semiconductor element 40 is arranged.

  As can be seen from FIGS. 2 and 3, the base substrate 10 includes an n-type layer 11 made of silicon containing antimony and the like, and a p-type layer 13 in which boron is diffused. The n-type layer 11 has a rectangular shape as a whole, and a rectangular raised portion 12 is formed at the center thereof, and protrudes upward from the other portions. A p-type layer 13 is formed on the protruding raised portion 12. A pn junction (diode) 15 is formed between the raised portion 12 of the n-type layer 11 and the p-type layer 13. The same effect can be obtained even if the p-type layer and the n-type layer are reversed by pn.

As can be seen from FIGS. 1, 2, and 3, an insulating layer (for example, a film thickness of about 2 μm) 20 made of a silicon oxide film (SiO ₂ ) is laminated on the base substrate 10. The insulating layer 20 covers a portion excluding the right end portion of the base substrate 10, and a raised portion 21 that rises upward is formed at the center portion corresponding to the pn junction portion 15.

  The metal layer 25 laminated on the insulating layer 20 is made of nickel, for example, and spreads from the n-type layer 11 to the p-type layer 13. The first metal part 26 formed on the right side of the insulating layer 20 and the second metal part 27 formed on the right end of the base substrate 10 are electrically connected to the n-type layer 11 and the p-type layer 13, respectively.

  A rectangular semiconductor element 40 is bonded to the right half of the metal layer 25 via the solder layer 30 and is located immediately above the pn junction 15. An external connection terminal 45 is bonded to one side of the insulating layer 20, and an external connection terminal 47 is bonded to the other side, and is coupled to the surface of the semiconductor element 40 by wires 46 and 48.

  A lead frame 50 is joined to the left half of the metal layer 25 via a solder layer 30. The lead frame 50 includes an L-shaped main body 51 adjacent to the semiconductor element 40 and external connection terminals 52 projecting sideways from the base substrate 10. The n-type terminal 55 joined to the first metal part 26 by the solder 32 extends in the same direction as the external connection terminal 47, and the p-type terminal 57 joined to the second metal part 27 by the solder 32 is the same as the n-type terminal 55. Extending in the direction.

A mold resin 60 (not shown in FIGS. 1 and 3) seals and integrates the base substrate 10, the semiconductor element 40, the lead frame 50, and the terminals 45, 52, 55 and 57.
(Production method)
The semiconductor device was manufactured as follows. First, as shown in FIG. 4A, a protective oxide film 17 made of SiO 2 is formed on an n-type layer 11 made of silicon containing antimony. Here, a nitrogen compound may be used instead of the protective oxide film 17. As shown in FIG. 4B, p-type ions (boron) are implanted from above the protective oxide film 17 and thermally diffused. Then, as shown in FIG. 4C, the p-type layer 13 diffused between the n-type layer 11 and the protective oxide film 17 is formed.

  Next, as shown in FIG. 4D, the entire protective oxide film 17 is removed. Thereafter, the p-type layer 13 around the central portion is removed, and the surface of the n-type layer 11 is etched. As shown in FIG. 4E, an insulating film 20 made of an oxide film (SiO 2) is laminated on the surface of the n-type layer 11. The insulating film 20 has a raised portion 21 laminated on the surface of the p-type layer 13.

  Subsequently, as shown in FIG. 4F, nickel is stacked on the n-type layer 11 and the insulating layer 20, and then partially etched. As a result, the metal layer 25 stacked on the insulating layer 20, the second metal portion 27 stacked on the right end portion of the insulating layer 20, and the first metal portion 26 stacked on the base substrate 10 are formed.

Finally, as shown in FIG. 4G, the semiconductor terminal 40 is joined to the right end portion of the metal layer 25 and the lead frame 50 is joined to the left end portion via the solder 30. Further, the external connection terminal 45 and the external connection terminal 47 are attached to the insulating layer 20 and bonded to the semiconductor element 40 with wires 46 and 48. Further, the n-type terminal 55 is joined to the first metal part 26 via the solder 31, and the p-type terminal 57 is joined to the second metal part 27 via the solder 32.
(Function and effect)
In this embodiment, when the semiconductor element 40 operates and generates heat, the temperature of the base substrate 10 increases. As a result, the Vf of the temperature detection diode 15 (between the p-type terminal 57 and the n-type terminal 55) decreases, so that an increase in the temperature of the semiconductor element 40 can be detected by an external temperature detection circuit (not shown).

  According to this embodiment, since the temperature detecting unit including the pn junction 15 protruding in the base substrate 10 that contacts the semiconductor element 40 is provided, the following effects can be obtained.

  First, the semiconductor element 40 does not have a built-in temperature detection part, and there is no singular part inside, so that the breakdown tolerance increases. Secondly, it is not necessary to include a semiconductor element with a built-in temperature detector, and the semiconductor element can be selected with an emphasis on the element characteristics according to the switching characteristics and the steady ON characteristics, and the range of selection is widened. .

Thirdly, since the semiconductor element 40 does not have a built-in temperature detection unit, an external pad and a wire for connecting the semiconductor element and the pad become unnecessary. As a result, the size of the semiconductor device can be reduced. Fourth, since the p-type layer 13 at the center of the base substrate 10 protrudes upward, the height of the external connection terminals can be suppressed, and the height of the base substrate 10 on which the semiconductor element 40 is mounted is suppressed. It is done.
<First Reference Example >
The first reference example shown in FIGS. 5, 6 and 7 differs from the first embodiment in that the base substrate is flat.

  The base substrate 80 includes an n-type layer 82 and a p-type layer 83, and a pn junction (diode) 84 is formed therebetween. Notches 87 and 88 are formed in a part of the insulating layer 86, and the metal layer 90 covers a portion extending from the n-type layer 82 to the p-type layer 83. The first metal part 92 that has entered the notch 87 is electrically connected to the n-type layer 82, and the second metal part 93 that has entered the notch 88 is electrically connected to the p-type layer 83.

  A semiconductor element 95 is joined to the right half of the metal layer 90, and a lead frame 98 is joined to the left half via a solder layer 96. One external connection terminal 101 is bonded to one side of the insulating layer 86, and one external connection terminal 102 is bonded to the other side, and the surface of the semiconductor element 95 is wire bonded. The lead frame 98 has an external connection terminal 99. The n-type terminal 92 that is conducted to the first metal part 105 that has entered the first notch 87 and the p-type terminal 93 that is conducted to the second metal part 107 that has entered the second notch 88 are connected to the external connection terminal 103. It extends in the same direction.

  When manufacturing this semiconductor device, first, as shown in FIG. 7A, a protective oxide film 81 is formed on the surface of the base substrate 80 and the n-type layer 82. As shown in FIG. 7B, a resist pattern (film thickness 2 μm) 85 is formed in a predetermined region on the protective oxide film 81 using a photomask.

  As shown in FIG. 7C, p-type ions are implanted from the surface side into the n-type layer 82 in the region where the protective oxide film 81 is exposed. As shown in FIG. 7D, the resist pattern 85 is removed and a diffusion layer of the p-type layer 83 is formed in the center of the n-type layer 82 by heating. As shown in FIG. 7E, when the protective oxide film 81 is removed, the base substrate 80 is completed.

  Next, as shown in FIG. 7F, an oxide insulating layer 86 (film thickness of about 2 μm) is formed on the surface of the base substrate 80. A part of the insulating layer 86 is removed by etching to form notches 87 and 88. As shown in FIG. 7G, the metal layer 90 is formed on the insulating layer 86, the first metal portion 105 enters the notch 87, and the second metal portion 107 enters the notch 88.

  Finally, as shown in FIG. 7H, the semiconductor element 95 and the lead frame 98 are joined to the metal layer 90 via the solder layer 86. The n-type terminal 92 is joined to the first metal part 105 by the solder layer 106, and the p-type terminal 93 is joined to the second metal part 107 by the solder layer 108.

According to this reference example , since the base substrate is flat, the structure of the semiconductor device is simplified and an effect of being easily manufactured can be obtained.
< Second Reference Example >
The second reference example shown in FIGS. 8 and 9 differs from the first embodiment in that the surface of the base substrate is flat and two semiconductor elements are arranged.

  More specifically, the p-type layer 112 is formed over a wide region in the center of the n-type layer 111 in the base substrate 110 having a flat surface. Two semiconductor elements 121 and 122 and one lead frame 125 are disposed on a metal layer 116 disposed on the base substrate 110 via an insulating layer 115. As a result, a temperature detection unit 113 composed of a pn junction is formed below the first semiconductor element 121 and the second semiconductor element 122.

  One external connection terminal 126 is disposed on one side of the insulating layer 115, and two external connection terminals 127 and 128 are disposed on the other side. Wire bonding is performed between the surfaces of the first semiconductor element 121 and the second semiconductor element 122 and the collector electrode 126 and the external connection terminals 127 and 128. In addition, the lead frame 125 is electrically connected to the first semiconductor element 121 and the second semiconductor element 122 through the metal layer 116. As a result, the first semiconductor element 121 and the second semiconductor element 122 are electrically connected in parallel.

  An n-type terminal 131 is connected to the n-type layer 111 via a first metal part 117, and a p-type terminal 132 is connected to the p-type layer 112 via a second metal part 118.

According to this reference example , it is possible to obtain an effect that the heat generation of the two first semiconductor elements 121 and the second semiconductor elements 122 can be detected by the pair of n-type terminal 131 and p-type terminal 132.
< Third reference example >
The third reference example shown in FIGS. 10 and 11 differs from the first reference example in that the two semiconductor elements are electrically independent.

  A large p-type layer 142 is formed at the center of the n-type layer 141 of the base substrate 140, and an insulating layer 145 and a metal layer 147 are stacked thereon. The first semiconductor element 151 and the second semiconductor element 156 are disposed slightly above the pn junction 143. The external connection terminal 152 and the external connection terminal 157 are attached to one side of the insulating layer 145, the external connection terminal 153 and the external connection terminal 158 are attached to the other side, and the first semiconductor element 151 and the second semiconductor element 156 are connected to the wire. Bonded.

  Between the left lead frame 161 and the right lead frame 163, an n-type terminal 166 that is electrically connected to the n-type layer 141 through the first metal portion 165 is formed, and the first semiconductor element 151 and the second semiconductor element 156 are formed. In between, a p-type terminal 168 is formed which is electrically connected to the p-type layer 144 via the second metal portion 167.

According to this reference example , the controlled object can be controlled by two independent first semiconductor elements 151 and second semiconductor elements 156, and the same effect as the second reference example can be obtained.
< Second embodiment>
The second embodiment shown in FIG. 12 differs from the first embodiment in that a base substrate is disposed on both sides of the semiconductor element via a metal layer and an insulating layer.

  The structure of the lower (first) base substrate 172, the lower (first) insulating layer 174, and the lower (first) metal layer 176 is basically the same as that of the base substrate 10, the insulating layer 20, and the metal layer 25 of the first embodiment. Same as the configuration. The upper (second) base substrate 182, the upper (second) insulating layer 184, and the upper (second) metal layer 186 are configured so that the lower base substrate 172, the lower insulating layer 174, and the lower metal layer with respect to the semiconductor element 170. It is symmetric with the configuration of 176.

  At the time of manufacturing this semiconductor device, the lower base substrate 172 is formed, and the semiconductor element 180 is bonded via the lower insulating film 174 and the lower metal layer 176. Further, a lower external connection terminal 173, a lower external connection terminal 175, and the like are formed. Next, the upper external connection terminal 183 and the upper external connection terminal 185 are formed. A second base substrate 182 having a second pn junction is formed through the second metal layer 186 and the second insulating film 184.

  At this time, in the first embodiment, the first insulating layer 174 and the first metal layer are formed on the first base substrate 172 in the same process as bonding the semiconductor element 40 to the base substrate 10 via the insulating layer 20 and the metal layer 25. The semiconductor element 180 is bonded via the 176. Thereafter, a process opposite to that of the first embodiment is performed, and the second base substrate 182 may be bonded through the second metal layer 186 and the second insulating layer 184. Note that an n-type terminal and a p-type terminal (not shown) are formed on the lower metal layer 176 and the upper metal layer 184.

  According to this embodiment, in addition to the effects of the first embodiment, the base substrates 172 and 182 having the temperature detecting portions are arranged on the upper and lower surfaces of the semiconductor element 180, so that the temperature rise can be reliably detected. Is obtained. In addition, since the heat generated in the semiconductor element 170 is radiated from both the upper and lower surfaces, the heat radiation effect is good, and the height of the temperature detection terminal is kept low.

When the temperature detection terminals are formed only above or below, the temperature of the semiconductor element can be detected more accurately if the temperature detection terminal is arranged on the side where the pattern of the semiconductor element is formed.
< Fourth Reference Example >
In the fourth reference example shown in FIG. 13, the operation of the semiconductor element is controlled in accordance with the heat generation. That is, a temperature adjustment circuit 205 is formed in the base substrate 200 in addition to the pn junction 203 formed by the n-type layer 201 and the p-type layer 202.

  This temperature adjustment circuit 205 reads the Vf of the temperature detection diode generated between the p-type layer 202 and the n-type layer 201, and inputs a signal for suppressing the output to the terminal of the semiconductor element when Vf falls below a certain value. Consists of.

  The insulating layer 211 is cut out above the temperature adjustment circuit 205, and a control terminal 213 attached using the cutout is electrically connected to the temperature adjustment circuit 205. The temperature adjustment circuit 205 was formed by forming a pattern in a p-type / n-type ion implantation diffusion process for forming a temperature detection diode during manufacture of the base substrate. A semiconductor element 210 is mounted via a metal layer 212 and is connected to a control terminal 213 by a control signal connection line 216.

In this reference example , the voltage of the pn junction 203 changes in accordance with the heat generation (heat generation amount and temperature) in the semiconductor element 210, and the change (generally lowering) is compared with the reference voltage of the temperature adjustment circuit 205. To do. When the heat generation exceeds a predetermined state, the temperature adjustment circuit 205 sends a signal to the semiconductor element 210 via the connection line 216 to suppress the operation or improve the cooling capacity of the cooling means (not shown). In this way, it is possible to prevent malfunction and thermal destruction of the semiconductor element 210 due to heat generation.

A temperature adjustment circuit similar to the temperature adjustment circuit 205 can be formed on the base substrate 11 of the first embodiment, the base substrate 172 or 182 of the second embodiment, or the like.

It is a top view which shows 1st Example of this invention. It is a cross-sectional view of FIG. It is a partial longitudinal cross-sectional view of FIG. (A) to (g) is an explanatory view showing the manufacturing process of the first embodiment. It is a top view of the 1st reference example . It is a cross-sectional view of FIG. (A)-(h) is explanatory drawing which shows the manufacturing process of a 1st reference example . It is a top view of the 2nd reference example . It is a cross-sectional view of FIG. It is a top view of the 3rd reference example . It is a cross-sectional view of FIG. It is sectional drawing of 2nd Example. It is sectional drawing of the 4th reference example . It is a top view of a prior art example. It is sectional drawing of FIG.

Explanation of symbols

10: base substrate 11: n-type layer 13: p-type layer 15: pn junction 20: insulating layer 25: metal layer 26: first metal part 27: second metal part 30: solder layer 40: semiconductor element 45: lead Frame 55: n-type terminal 57: p-type terminal 205: temperature adjustment circuit

Claims (4)

A semiconductor base substrate having at least one pn junction in which a second conductivity type semiconductor is formed on a part of the first conductivity type semiconductor;
At least one heating element bonded to the semiconductor base substrate via an insulating layer and a metal layer;
A first terminal electrically connected to the first conductive semiconductor and a second terminal electrically connected to the second conductive semiconductor;
The heating element is a semiconductor element;
The pn junction is located immediately below the semiconductor element, and the pn junction protrudes from the surface of the semiconductor substrate more than other portions.
A semiconductor device. The semiconductor device according to claim 1, wherein the temperature of the heat generating element is detected by the pn junction, and the operation of the heat generating element is controlled by a temperature adjustment circuit built in the semiconductor base substrate based on the detection result . A first semiconductor base substrate having at least one pn junction in which a second conductivity type semiconductor is formed in a part of the first conductivity type semiconductor, and comprising a first insulating layer and a first metal layer;
A second semiconductor base substrate comprising a second insulating layer and a second metal layer;
A heating element disposed between the first semiconductor base substrate and the second semiconductor base substrate;
A first terminal electrically connected to the first conductive semiconductor and a second terminal electrically connected to the second conductive semiconductor ;
The heating element is a semiconductor element;
The pn junction is located immediately below or directly above the semiconductor element, and at least one of the first semiconductor base substrate and the second semiconductor base substrate has a convex portion at a portion in contact with the semiconductor element.
A semiconductor device. Claims wherein the pn junction to detect the temperature of the heating elements, controls the operation of the heat generating element at a temperature adjusting circuit formed on the first semiconductor base substrate or the second semiconductor base substrate based on a detection result 3. The semiconductor device according to 3.

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