JP4036464B2 - Chip resistor with low resistance value - Google Patents

Chip resistor with low resistance value Download PDF

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JP4036464B2
JP4036464B2 JP2006175079A JP2006175079A JP4036464B2 JP 4036464 B2 JP4036464 B2 JP 4036464B2 JP 2006175079 A JP2006175079 A JP 2006175079A JP 2006175079 A JP2006175079 A JP 2006175079A JP 4036464 B2 JP4036464 B2 JP 4036464B2
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resistor
resistance
metal
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connection terminal
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JP2006253730A (en
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虎之 塚田
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Rohm Co Ltd
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Description

本発明は,例えば,1Ω以下というように低い抵抗値を有するチップ抵抗器に関するものである。 The present invention is, for example, relates to a chip resistor having a low resistance value as hereinafter 1 [Omega.

従来,この種のチップ抵抗器は,例えば,特開2001−118701号公報等に記載されているように,抵抗体を,例えば,銅等のように低い抵抗を有する基材の金属(以下,低抵抗の金属と称する)に対してニッケル等のように前記基材の金属よりも高い抵抗を有する金属(以下,高抵抗の金属と称する)を添加して成る合金にて直方体に形成し,この抵抗体のうち直方体における長手方向に沿った左右両端に,プリント基板等に対して半田付け等にて接続するために接続端子電極を設ける一方,前記抵抗体のうち少なくとも両接続端子電極間の部分を絶縁体にて被覆するという構成にしている。   Conventionally, this type of chip resistor has been described in, for example, as disclosed in Japanese Patent Application Laid-Open No. 2001-118701 and the like. A metal having a higher resistance than the metal of the base material (hereinafter referred to as a high-resistance metal), such as nickel, to a rectangular parallelepiped. Among the resistors, connection terminal electrodes are provided at both left and right ends along the longitudinal direction of the rectangular parallelepiped for soldering to a printed circuit board or the like, and at least between the connection terminal electrodes of the resistors. The part is covered with an insulator.

そして,この種のチップ抵抗器において,その両接続端子電極間における抵抗値は,その抵抗体を構成する合金における固有抵抗に依存するところが大きく,前記合金における固有の抵抗は,高抵抗の金属に対する低抵抗の金属の割合が大きいときには低く,低抵抗の金属に対する高抵抗の金属の割合が多くなると高くなるように,高抵抗の金属に対する低抵抗の金属の割合に比例して低くなり,低抵抗の金属に対する高抵抗の金属の割合に比例して高くなる。   In this type of chip resistor, the resistance value between the two connection terminal electrodes largely depends on the specific resistance of the alloy constituting the resistor, and the specific resistance of the alloy is higher than that of the high resistance metal. The ratio is low in proportion to the ratio of the low-resistance metal to the high-resistance metal so that the ratio is low when the ratio of the low-resistance metal is large and increases as the ratio of the high-resistance metal to the low-resistance metal increases. It increases in proportion to the ratio of high resistance metal to metal.

このために,従来のチップ抵抗器においては,その抵抗体の直方体における長手方向に沿った長さ寸法と,その長手方向と直角方向の幅寸法とが予め決められている場合において,その両接続端子電極間における抵抗値,つまり,チップ抵抗器における抵抗値をより低くするには,
(1).前記合金を,高抵抗の金属に対する低抵抗の金属の割合を少なくした合金にする。
(2).前記抵抗体における板厚さ寸法を厚くする。
のいずれか一方又は両方を採用するという構成にしている。
For this reason, in the conventional chip resistor, when the length dimension along the longitudinal direction of the rectangular parallelepiped of the resistor and the width dimension perpendicular to the longitudinal direction are determined in advance, both the connections are made. To lower the resistance value between the terminal electrodes, that is, the resistance value of the chip resistor,
(1). The alloy is an alloy in which the ratio of the low resistance metal to the high resistance metal is reduced.
(2). The plate thickness dimension of the resistor is increased.
Either one or both of these are employed.

しかし,一般に,金属材料には,抵抗が温度によって変化するという抵抗温度係数が存在し,この抵抗温度係数は,合金によりも純粋の金属のほうが高いという性質を有していることが知られている。   However, it is generally known that metal materials have a temperature coefficient of resistance that the resistance varies with temperature, and this temperature coefficient of resistance is higher for pure metals than for alloys. Yes.

従って,前記チップ抵抗器における抵抗値を低くすることのために,前記(1)のように,その抵抗体を構成する合金において低抵抗の金属(基材の金属)の割合を多くすることは,この合金は,前記低抵抗の金属(基材の金属)の純度に近づくことになるから,前記チップ抵抗器における抵抗温度係数が高くなるという問題がある。   Therefore, in order to reduce the resistance value of the chip resistor, it is necessary to increase the proportion of the low-resistance metal (base metal) in the alloy constituting the resistor as in (1). Since this alloy approaches the purity of the low-resistance metal (base metal), there is a problem that the temperature coefficient of resistance in the chip resistor is increased.

また,前記チップ抵抗器における抵抗値を低くすることのために,前記(2)のように,前記抵抗体における板厚さ寸法を厚くすることは,チップ抵抗器における重量のアップを招来するばかりか,抵抗体における長手方向の両端を接続端子電極に曲げ加工することが困難になり,且つ,抵抗値を,抵抗体に対するトリミング溝の刻設にて所定値に調節するためのトリミング調整が,著しく困難になるという問題がある。   Further, in order to reduce the resistance value in the chip resistor, increasing the thickness of the resistor in the resistor as in (2) only increases the weight of the chip resistor. Alternatively, it is difficult to bend the both ends of the resistor in the longitudinal direction to the connection terminal electrode, and trimming adjustment for adjusting the resistance value to a predetermined value by engraving a trimming groove on the resistor is performed. There is a problem that it becomes extremely difficult.

一方,金属材料における抵抗温度係数は,殆どの純金属の場合において正であるが,この純金属の複数を合金化した合金の場合には,その一部の合金に,負の抵抗温度係数を呈するものが存在し,この負の抵抗温度係数を有する合金を抵抗体に使用した場合には,この負の抵抗温度係数が,前記チップ抵抗器に,そのまま,マイナスの抵抗温度係数となって現れるという点も問題であった。   On the other hand, the temperature coefficient of resistance in metal materials is positive in the case of most pure metals, but in the case of an alloy in which a plurality of these pure metals are alloyed, a negative resistance temperature coefficient is given to some of the alloys. If an alloy having this negative resistance temperature coefficient is used for the resistor, this negative resistance temperature coefficient appears as a negative resistance temperature coefficient as it is in the chip resistor. That was also a problem.

本発明は,これら問題を解消したチップ抵抗器を提供することを技術的課題とするものである。 It is a technical object of the present invention to provide a chip resistor that solves these problems.

この技術的課題を達成するため本発明における請求項1は,
「高抵抗の金属と低抵抗の金属との合金にて直方体に形成した抵抗体と,この抵抗体の裏面における両端に設けた接続端子電極とから成るチップ抵抗器において,
前記抵抗体における表面には,当該抵抗体を構成する合金よりも低い抵抗の純金属によるメッキ層が形成され,前記接続端子電極は,前記抵抗体を構成する合金よりも低い抵抗の金属製であり,前記抵抗体のうち前記両接続端子電極間の部分には,断面積の部分的縮小部が設けられていて,この断面積の部分的縮小部は,前記メッキ層にて埋められており,更に,前記抵抗体の裏面のうち前記両接続端子電極間の部分は,絶縁体にて被覆されている。」
ことを特徴としている。
In order to achieve this technical problem, claim 1 of the present invention provides:
“In a chip resistor comprising a resistor formed in a rectangular parallelepiped with an alloy of a high resistance metal and a low resistance metal, and connection terminal electrodes provided on both ends of the back surface of the resistor,
On the surface of the resistor, a plating layer made of a pure metal having a lower resistance than the alloy constituting the resistor is formed, and the connection terminal electrode is made of a metal having a resistance lower than that of the alloy constituting the resistor. A portion of the resistor between the connection terminal electrodes is provided with a partial reduced portion of the cross-sectional area, and the partial reduced portion of the cross-sectional area is filled with the plating layer. further, the portion between the two connecting terminal electrode of the back surface of the resistor is covered with an insulator. "
It is characterized by that.

本発明における請求項2は,
「前記請求項1の記載において,前記抵抗体を構成する合金が,負の抵抗温度係数を有するものである。」
ことを特徴としている。
Claim 2 in the present invention includes:
“In claim 1, the alloy constituting the resistor has a negative resistance temperature coefficient.”
It is characterized by that.

本発明における請求項3は,
「前記請求項1又は2の記載において,前記メッキ層のうち前記抵抗体における表面の部分には,左右に分断する部分か,或いは,幅狭にする部分が設けられている。」
ことを特徴としている。
Claim 3 in the present invention includes:
“In the first or second aspect of the invention, a portion of the plated layer on the surface of the resistor is provided with a portion that is divided into left and right portions or a portion that is narrowed .”
It is characterized by that.

前記したように,高抵抗の金属と低抵抗の金属との合金製の抵抗体における表面に,前記合金よりも低い抵抗の純金属によるメッキ層を形成する一方,裏面の両端に,前記抵抗体を構成する合金よりも低い抵抗の金属製の接続端子電極を設けたことにより,両接続端子電極間における抵抗値は,抵抗体を合金のみで構成する場合よりも,前記純金属のメッキ層,及び,低抵抗の両接続端子電極の分だけ低くなる。   As described above, a plated layer of pure metal having a resistance lower than that of the alloy is formed on the surface of a resistor made of an alloy of a high resistance metal and a low resistance metal, while the resistor is formed on both ends of the back surface. By providing a connection terminal electrode made of a metal having a lower resistance than that of the alloy constituting the metal alloy, the resistance value between the two connection terminal electrodes is higher than that in the case where the resistor is made of only the alloy, And it is lowered by the amount of both low-resistance connection terminal electrodes.

これにより,両接続端子電極間における抵抗値,つまり,チップ抵抗器における抵抗値を,前記抵抗体を構成する合金において高抵抗の金属に対する低抵抗の金属の割合を多くすることなく,且つ,前記抵抗体における板厚さ寸法を厚くすることなく,低くすることができるから,チップ抵抗器における抵抗値を,その長さ寸法及び幅寸法を同じにした状態で低くする場合に,抵抗温度係数が増大すること,及び,前記抵抗値のトリミング調整及び前記接続端子電極の曲げ加工が困難になること,並びに,重量が増大することを確実に回避できるのである。   Thus, the resistance value between the two connection terminal electrodes, that is, the resistance value in the chip resistor can be obtained without increasing the ratio of the low-resistance metal to the high-resistance metal in the alloy constituting the resistor, and Since the plate thickness in the resistor can be lowered without increasing the thickness, the resistance temperature coefficient is reduced when the resistance value in the chip resistor is lowered with the same length and width dimensions. It is possible to reliably avoid the increase, the trimming adjustment of the resistance value and the bending process of the connection terminal electrode, and the increase in weight.

この場合,前記した構成にすることに加えて,前記抵抗体のうち前記両接続端子電極間の部分に,断面積の部分的縮小部を設けて,この断面積の部分的縮小部を,前記メッキ層にて埋めるという構成にすることにより,チップ抵抗器における抵抗値を,更に低くすることができる。 In this case, in addition to the above-described configuration, a partial reduction portion of the cross-sectional area is provided in a portion between the connection terminal electrodes of the resistor, and the partial reduction portion of the cross-sectional area is The resistance value in the chip resistor can be further lowered by adopting a configuration in which it is filled with the plating layer.

前記純金属のメッキ層における抵抗温度係数は,一般的にいって正であるから,請求項2に記載したように,抵抗体を,負の抵抗温度係数を有する金属合金製にすることにより,この抵抗体における負の抵抗温度係数を,この抵抗体の表面に形成したメッキ層における正の抵抗温度係数にて相殺できるから,チップ抵抗器に負の抵抗温度係数が現れることを回避できるか,或いは,チップ抵抗器に現れる負の抵抗温度係数を小さくできるのである。Since the resistance temperature coefficient in the pure metal plating layer is generally positive, as described in claim 2, by making the resistor made of a metal alloy having a negative resistance temperature coefficient, Since the negative resistance temperature coefficient in this resistor can be offset by the positive resistance temperature coefficient in the plating layer formed on the surface of this resistor, is it possible to avoid the appearance of a negative resistance temperature coefficient in the chip resistor? Alternatively, the negative resistance temperature coefficient appearing in the chip resistor can be reduced.

以下,本発明の実施の形態を図面について説明する。   Embodiments of the present invention will be described below with reference to the drawings.

図1及び図2は,第1の実施の形態によるチップ抵抗器1を示す。   1 and 2 show a chip resistor 1 according to a first embodiment.

このチップ抵抗器11は,長さ寸法がLで,幅寸法がWで,厚さ寸法がTの直方体に形成された抵抗体12と,この抵抗体12の下面における両端に固着した接続端子電極13と,前記抵抗体12における上面の全体を覆う上面絶縁体14と,前記前記抵抗体12における下面のうち前記両接続端子電極13間の部分を覆う下面絶縁体14′によって構成されている。   The chip resistor 11 includes a resistor 12 formed in a rectangular parallelepiped having a length dimension of L, a width dimension of W, and a thickness dimension of T, and connection terminal electrodes fixed to both ends of the lower surface of the resistor body 12. 13, an upper surface insulator 14 that covers the entire upper surface of the resistor 12, and a lower surface insulator 14 ′ that covers a portion of the lower surface of the resistor 12 between the connection terminal electrodes 13.

前記抵抗体12は,例えば,銅・ニッケル合金,ニッケル・クロム合金又は鉄・クロム合金等のように,低い抵抗を有する基材の金属(以下,低抵抗の金属と称する)に対してこの基材の金属よりも高い抵抗を有する金属(以下,高抵抗の金属と称する)を添加して成る合金製である。   The resistor 12 is formed on a base metal having a low resistance (hereinafter referred to as a low resistance metal) such as a copper / nickel alloy, a nickel / chromium alloy, or an iron / chromium alloy. It is made of an alloy formed by adding a metal having a higher resistance than the metal of the material (hereinafter referred to as a high resistance metal).

これに対して,両接続端子電極13は,前記抵抗体12を構成する合金よりも低い抵抗を有する合金,又は銅等の純金属による金属製である。   On the other hand, both connection terminal electrodes 13 are made of an alloy having a lower resistance than the alloy constituting the resistor 12 or a metal made of a pure metal such as copper.

そして,前記抵抗体12の表面に,当該抵抗体12を構成する合金よりも低い抵抗を有する銅又は銀等の純金属によるメッキ層15を,当該表面の全体にわたって形成する。   A plated layer 15 made of pure metal such as copper or silver having a lower resistance than the alloy constituting the resistor 12 is formed on the entire surface of the resistor 12.

このメッキ層15を形成することにより,前記第1の実施の形態の場合と同様に,両接続端子電極13間における抵抗値は,抵抗体12を合金のみで構成する場合よりも,前記純金属のメッキ層15,及び低抵抗の両接続端子電極13の分だけ低くなるから,両接続端子電極13間における抵抗値,つまり,チップ抵抗器11における抵抗値を,前記抵抗体12を構成する金属合金において高抵抗の金属に対する低抵抗の金属の割合を多くすることなく,且つ,前記抵抗体12における板厚さ寸法Tを厚くすることなく,低くすることができる。   By forming this plating layer 15, as in the case of the first embodiment, the resistance value between the connection terminal electrodes 13 is higher than that in the case where the resistor 12 is made of only an alloy. Therefore, the resistance value between the connection terminal electrodes 13, that is, the resistance value in the chip resistor 11, is reduced by the metal constituting the resistor 12. It is possible to reduce the alloy without increasing the ratio of the low-resistance metal to the high-resistance metal and without increasing the thickness T of the resistor 12.

前記チップ抵抗器11における抵抗値は,抵抗体12の表面に形成するメッキ層15を,図3に示すように,適宜長さSだけ分断するか,図4に示すように,幅狭に形成することによって,高くすることができるというように,前記メッキ層15によって抵抗値を任意に設定することができる。   The resistance value of the chip resistor 11 is formed by dividing the plating layer 15 formed on the surface of the resistor 12 by a length S as shown in FIG. 3, or by forming a narrow width as shown in FIG. By doing so, the resistance value can be arbitrarily set by the plating layer 15 so that it can be increased.

前記した構成に加えて,図5及び図6に示すように,抵抗体12のうち前記両接続端子電極13間に部分に,その長手側面から横方向に延びるスリット溝17を少なくとも一つ以上穿設するか,貫通孔を穿設する等して,当該抵抗体12における断面積を部分的に縮小し,このスリット溝17又は貫通孔等のような断面積の部分的縮小部を,抵抗体12の表面に形成したメッキ層15にて埋めるように構成する。
これにより,チップ抵抗器11における抵抗値を,更に低い,微小な抵抗値にすることができる。
In addition to the above-described configuration, as shown in FIGS. 5 and 6, at least one slit groove 17 extending laterally from the longitudinal side surface is formed in the portion of the resistor 12 between the connection terminal electrodes 13. The sectional area of the resistor 12 is partially reduced by providing a through hole or the like, and a partially reduced portion of the sectional area such as the slit groove 17 or the through hole is provided as a resistor. It is configured to be filled with a plating layer 15 formed on the surface of 12.
Thereby, the resistance value in the chip resistor 11 can be set to a lower and minute resistance value.

ところで,前記メッキ層15の純金属における抵抗温度係数は,一般的に正であるから,この正の抵抗温度係数を有する純金属のメッキ層15を,例えば,43〜45wt%がニッケルで残りが銅の銅ニッケル合金等のように負の抵抗温度係数を有する合金金属製の抵抗体12に対して形成することにより,前記抵抗体12における負の抵抗温度係数を,この抵抗体12の表面に形成したメッキ層15における正の抵抗温度係数にて相殺できるから,チップ抵抗器11に負の抵抗温度係数が現れることを回避できるか,或いは,チップ抵抗器11に現れる負の抵抗温度係数を小さくできる。   By the way, since the resistance temperature coefficient of the pure metal of the plating layer 15 is generally positive, the pure metal plating layer 15 having the positive resistance temperature coefficient is made of, for example, 43 to 45 wt% of nickel and the rest. By forming the resistor 12 made of an alloy metal having a negative resistance temperature coefficient such as a copper-nickel alloy of copper, the negative resistance temperature coefficient in the resistor 12 is applied to the surface of the resistor 12. Since the positive resistance temperature coefficient in the formed plating layer 15 can be offset, it is possible to avoid the negative resistance temperature coefficient from appearing in the chip resistor 11 or to reduce the negative resistance temperature coefficient appearing in the chip resistor 11. it can.

そして,前記実施の形態によるチップ抵抗器11の製造に際しては,以下に述べる方法を採用できる。   In manufacturing the chip resistor 11 according to the above embodiment, the following method can be employed.

すなわち,先ず,図7及び図8に示すように,前記抵抗体12の多数個を縦及び横方向に並べて一体化して成る抵抗体用合金板B1を用意して,この抵抗体用合金板B1の下面に,前記接続端子電極13を形成するための接続端子電極用金属板B2を重ねて接合することにより,積層素材金属板Bを製作し,この積層素材金属板Bにおける前記抵抗体用合金板B1の上面のうち前記各抵抗体12の箇所の各々に,純金属によるメッキ層15を形成する。   That is, first, as shown in FIGS. 7 and 8, there is prepared a resistor alloy plate B1 in which a large number of the resistors 12 are aligned in the vertical and horizontal directions, and this resistor alloy plate B1 is prepared. A laminated material metal plate B is manufactured by overlapping and joining a connecting terminal electrode metal plate B2 for forming the connecting terminal electrode 13 on the lower surface of the metal plate, and the resistor alloy in the laminated material metal plate B is manufactured. A plated layer 15 made of pure metal is formed on each of the resistor elements 12 on the upper surface of the plate B1.

次いで,図9及び図10に示すように,前記積層素材金属板Bにおける前記接続端子電極用金属板B2のうち,前記抵抗体12の両端における接続端子電極13の部分を残し,その他の部分を切削加工等により除去する。   Next, as shown in FIG. 9 and FIG. 10, in the connection terminal electrode metal plate B2 in the laminated material metal plate B, the portions of the connection terminal electrodes 13 at both ends of the resistor 12 are left, and the other portions are replaced. Remove by cutting or the like.

次いで,図11及び図12に示すように,前記積層素材金属板Bにおける抵抗体用合金板B1の上面の全体を,上面絶縁体14にて被覆する一方,前記抵抗体用合金板B1における下面のうち前記各接続端子電極13間の部分を,下面絶縁体14′にて被覆する。   Next, as shown in FIGS. 11 and 12, the entire upper surface of the resistor alloy plate B1 of the laminated material metal plate B is covered with the upper surface insulator 14, while the lower surface of the resistor alloy plate B1 is covered. Of these, the portion between the connection terminal electrodes 13 is covered with a lower surface insulator 14 '.

そして,最後に,前記積層素材金属板Bを,前記各抵抗体12ごとに区画する縦方向の切断線B′及び横方向の切断線B″に沿って切断することにより,図1及び図2に示す構造のチップ抵抗器11を得ることができる。 Finally, the laminated material metal plate B is cut along a vertical cutting line B ′ and a horizontal cutting line B ″ partitioning each resistor 12, so that FIGS. The chip resistor 11 having the structure shown in FIG.

また,この製造方法においては,前記積層素材金属体Bにおける抵抗体用合金板B1の上面に対して純金属によるメッキ層15を形成する工程を,前記積層素材金属体Bにおける接続端子電極用金属板B2のうち接続端子電極13以外の部分を切削加工等により除去する工程の後において行うようにしても良い。   Further, in this manufacturing method, the step of forming the plated layer 15 of pure metal on the upper surface of the resistor alloy plate B1 in the laminated material metal body B includes the metal for connection terminal electrodes in the laminated material metal body B. You may make it carry out after the process of removing parts other than the connection terminal electrode 13 among board B2 by cutting.

本発明の実施の形態によるチップ抵抗器を示す斜視図である。It is a perspective view which shows the chip resistor by embodiment of this invention. 図1のII−II視断面図である。FIG. 2 is a sectional view taken along line II-II in FIG. 1. 前記チップ抵抗器における第1の変形例を示す斜視図である。It is a perspective view which shows the 1st modification in the said chip resistor. 前記チップ抵抗器における第2の変形例を示す斜視図である。It is a perspective view which shows the 2nd modification in the said chip resistor. 前記チップ抵抗器における第3の変形例を示す部分平面図である。It is a fragmentary top view which shows the 3rd modification in the said chip resistor. 図5のVI−VI視断面図である。FIG. 6 is a sectional view taken along line VI-VI in FIG. 5. 前記チップ抵抗器の製造に際しての第1の工程を示す斜視図である。It is a perspective view which shows the 1st process at the time of manufacture of the said chip resistor. 図7のVIII−VIII視拡大断面図である。FIG. 8 is an enlarged sectional view taken along line VIII-VIII in FIG. 7. 前記チップ抵抗器の製造に際しての第2の工程を示す斜視図である。It is a perspective view which shows the 2nd process at the time of manufacture of the said chip resistor. 図9のX−X視拡大断面図である。FIG. 10 is an enlarged sectional view taken along line XX in FIG. 9. 前記チップ抵抗器の製造に際しての第3の工程を示す斜視図である。It is a perspective view which shows the 3rd process in the case of manufacture of the said chip resistor. 図11のXII −XII 視拡大断面図である。FIG. 12 is an enlarged sectional view taken along line XII-XII in FIG. 11.

符号の説明Explanation of symbols

11 チップ抵抗器
12 抵抗体
13 接続端子電極
14 上面絶縁体
14′ 下面絶縁体
15 メッキ層
DESCRIPTION OF SYMBOLS 11 Chip resistor 12 Resistor 13 Connection terminal electrode 14 Upper surface insulator 14 'Lower surface insulator 15 Plating layer

Claims (3)

高抵抗の金属と低抵抗の金属との合金にて直方体に形成した抵抗体と,この抵抗体の裏面における両端に設けた接続端子電極とから成るチップ抵抗器において,
前記抵抗体における表面には,当該抵抗体を構成する合金よりも低い抵抗の純金属によるメッキ層が形成され,前記接続端子電極は,前記抵抗体を構成する合金よりも低い抵抗の金属製であり,前記抵抗体のうち前記両接続端子電極間の部分には,断面積の部分的縮小部が設けられていて,この断面積の部分的縮小部は,前記メッキ層にて埋められており,更に,前記抵抗体の裏面のうち前記両接続端子電極間の部分は,絶縁体にて被覆されていることを特徴とする低い抵抗値を有するチップ抵抗器。
In a chip resistor comprising a resistor formed in a rectangular parallelepiped with an alloy of a high resistance metal and a low resistance metal, and connection terminal electrodes provided at both ends of the back surface of the resistor,
On the surface of the resistor, a plating layer made of a pure metal having a lower resistance than the alloy constituting the resistor is formed, and the connection terminal electrode is made of a metal having a resistance lower than that of the alloy constituting the resistor. A portion of the resistor between the connection terminal electrodes is provided with a partial reduced portion of the cross-sectional area, and the partial reduced portion of the cross-sectional area is filled with the plating layer. Further, a chip resistor having a low resistance value is characterized in that a portion between the two connection terminal electrodes in the back surface of the resistor is covered with an insulator.
前記請求項1の記載において,前記抵抗体を構成する合金が,負の抵抗温度係数を有するものであることを特徴とする低い抵抗値を有するチップ抵抗器。   2. The chip resistor having a low resistance value according to claim 1, wherein the alloy constituting the resistor has a negative temperature coefficient of resistance. 前記請求項1又は2の記載において,前記メッキ層のうち前記抵抗体における表面の部分には,左右に分断する部分か,或いは,幅狭にする部分が設けられていることを特徴とする低い抵抗値を有するチップ抵抗器。   3. The low-pitch layer according to claim 1, wherein a portion of the surface of the resistor in the plated layer is provided with a portion that is divided into left and right portions or a portion that is narrowed. A chip resistor having a resistance value.
JP2006175079A 2006-06-26 2006-06-26 Chip resistor with low resistance value Expired - Fee Related JP4036464B2 (en)

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