JP4036323B2 - Semiconductor circuit module - Google Patents

Semiconductor circuit module Download PDF

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Publication number
JP4036323B2
JP4036323B2 JP2002156403A JP2002156403A JP4036323B2 JP 4036323 B2 JP4036323 B2 JP 4036323B2 JP 2002156403 A JP2002156403 A JP 2002156403A JP 2002156403 A JP2002156403 A JP 2002156403A JP 4036323 B2 JP4036323 B2 JP 4036323B2
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Japan
Prior art keywords
semiconductor
semiconductor chip
circuit pattern
circuit module
chip
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JP2002156403A
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JP2003347500A (en
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茂 岡本
秀久 橘
成治 田中
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Sansha Electric Manufacturing Co Ltd
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Sansha Electric Manufacturing Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901—Structure
    • H01L2224/4903—Connectors having different sizes, e.g. different diameters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Description

【０００１】
【発明の属する技術分野】
本発明は，半導体チップを印刷回路パターンに固着して，半導体チップと印刷回路パターン間，又は半導体チップ間を接続して，それぞれの半導体チップに絶縁性粘着膜で被覆した半導体回路モジュールの構造，及びその製造法に関する。
【０００２】
【従来の技術】
従来の半導体回路モジュールを図６に示す。ここで１は半導体チップで回路パターン２の上に固着されている。３は耐熱性絶縁基板で，銅，アルミニウム，鉄などの金属を基材とし，その一方の表面に窒化アルミニウムなどのセラミック材又はガラス繊維で補強された耐熱性絶縁材が貼られ，これに銅回路パターン２が形成されて印刷回路基板４となる。抵抗器等の電子部品５ははんだ付けで固着されて回路パターン２に電気接続されている。半導体チップ１はボンディングワイヤ又は条状金属などの接続導体６で半導体チップ間接続又は回路パターン２に接続されている。部品実装された印刷回路基板４の全周縁に枠体１０が接着され固着した後，エポキシ樹脂などの充填材料１１で部品実装された印刷回路基板４の上面全体を充填して封入する。図示していないが外部と電気接続するために必要な端子金具は充填物の外部に引き出されている。
【０００３】
以上のようにして半導体回路モジュールが製作されているが，基板面積が大きい電力制御用の半導体回路モジュールでは，大量に充填材料を必要とし，材料コストと製造工程での設備費用や枠体製作の為の金型費用が掛かっている。モジュールの小型化の要求と，電力制御用では半導体チップ及び抵抗器など電子部品の発熱量が大きいので放熱効果を改良したい要求がある。
【０００４】
【発明が解決しようとする課題】
上記のように回路基板の全周縁に対して枠体を接着して，固着するのを待って充填材料を充填する工程で，設備・材料及び工数のコストが掛かること及び，回路モジュールの放熱効果が良くない欠点があった。半導体回路モジュールの放熱効果を改良しコストを引き下げるようにすること，機器組込み時の占有面積を小さくした半導体回路モジュールを実現することが本発明の目的である。
【０００５】
【課題を解決するための手段】
上記の目的を達成するために，枠体を必要としない半導体回路モジュールとその製造法について実験と考察がなされた結果，半導体回路モジュールの構成要素として，半導体チップ，回路パターンを形成した絶縁基板，半導体チップの接続導体，該チップを覆う絶縁物，放熱を促進する為の放熱板で機能を付与させ信頼性が確保できることが見出された。このようにして以下に述べる様に課題を解決できた。
【０００６】
請求項１に関しては、耐熱性絶縁基板の表面に回路パターンを金属で形成した印刷回路基板の回路パターン上に、パッケージに収納されていない半導体チップの下面を固着し、該チップから上記回路パターンに接続導体で接続、又は該半導体チップ間を接続導体で接続して半導体モジュールとしての機能を確保出来た。絶縁性粘着膜の材料が上記チップの周縁から流れて広がりすぎない様に、半導体チップが、該半導体チップの外周を局部的に取り巻くように周辺を切り起こして形成した堤防が形成された放熱板を介して回路パターンに固着された半導体回路モジュールとした。該半導体チップと接続導体との接続部位と前記半導体チップ表面のみを最低必要量の絶縁性粘着膜で滴下塗布により被覆することによって、耐環境信頼性を確保した半導体回路モジュールとして製作するので、周縁を囲む枠体とモジュール全面充填封止を必要とせず、充填封止工程を局所の滴下塗布工程におき替えられるため材料削減と加熱炉設備削減ができ、小型化されて安価に製作できた。
【００１１】
【発明の実施の形態】
本発明による実施の形態を図１に断面図で示す。１は半導体チップで，２は回路パターン，３は耐熱性絶縁基板，４は印刷回路基板，５は電子部品，６はボンディングワイヤ又は条状金属などの接続導体，７は絶縁性粘着膜である。次に製作工程順を追って説明する。半導体チップ１は回路パターン２の上に固着される。耐熱性絶縁基板３は銅，アルミニウム，鉄などの金属を基材とし，その一方の表面に窒化アルミニウムなどのセラミック材又はガラス繊維で補強された耐熱性絶縁材が貼られ，これに銅回路パターン２が形成されて印刷回路基板４となる。抵抗器等の電子部品５は，はんだ付け２１で固着されて回路パターン２に電気接続されている。半導体チップ１はボンディングワイヤ又は条状金属などの接続導体６で半導体チップ間接続又は回路パターン２に接続されている。部品実装された印刷回路基板４表面のパターン上の半導体チップ１に対して耐環境信頼性を向上させるために，該チップ１の表面を外気から遮断する目的で絶縁性粘着膜７が形成されている。
【００１２】
該チップ１と接続導体６との接続部位６１を含むチップ表面を覆うように，例えば，シリコンゲル又はシリコンゴムなどの絶縁性粘着物が約１滴，滴下塗布されて絶縁性粘着膜７が形成される。
【００１３】
図２，図３は他の実施形態を示し，図２は平面図を，図３はその断面図を示す。図２及び図３において，８は放熱器で，この放熱器８の周辺に切り起こし工程による堤防９がチップ１を取り巻くようにして局部的に形成されている。回路パターン２の上にこの放熱器８を介して半導体チップ１を固着して，半導体チップ１の底面を除く表面を覆うように絶縁性粘着物７を１滴だけ滴下して塗布する。この絶縁性粘着物７は，粘着性があっても，当初は流動性がある場合には流れて広がっていく。粘度がやや少なくて流動性が大きくても堤防９によって外に流出するのを食い止めることができた。
【００１４】
図４，図５は他の実施形態を示し，図４は平面図を，図５はその断面図を示す。図４及び図５において，印刷回路基板３の形状を，チップ固着部位近傍で該半導体チップを取り巻く様に局部的に堤防９を形成した印刷回路基板とし，回路パターン２の上に半導体チップ１を固着した場合，半導体チップ１の底面を除く表面を覆うように絶縁性粘着物７を１滴だけ滴下して塗布すると，粘度がやや少なくて流動性が大きくても，図２の場合と同様に堤防９によって外に流出するのをくい止めることができた。回路基板に堤防９を形成する工程は，無機質の粉末を成形する金型形状で自由に形成できた，有機物の絶縁基板の場合では所定の形状の絶縁物を接着することによって形成できた。
【００１５】
８ミリメートル角の６個の電力制御用半導体チップが搭載された従来の回路基板の面積が６０ミリメートル角のサイズであった時，この半導体回路モジュールでは，全面を覆うために約３０ミリリットルのエポキシ等の充填材料を必要としていたが，同様のモジュールで本発明による実施形態では例えば，半導体チップが８ミリメートル角のサイズであり，絶縁性粘着膜７はこれを覆うだけの分量の粘着物でよいから，チップ１つ当たり０．０５ミリリットル程度であり，６個のチップに対して０．３ミリリットルでよい。従来の全面充填の構成に比較して１００分の１程度の絶縁性粘着物でよくなった。材料コストが大幅に削減できたこと，及び製造工程での充填設備費用や，枠体製作の為の金型費用が不要となった。モジュールの小型化の要求と，電力制御用では半導体チップ及び抵抗器など電子部品の発熱量が大きいので放熱効果を改良したい要求があるが，抵抗器など発熱の大きい部品を覆う絶縁物即ち断熱材を取り除いた構造であるから空冷放熱の効果か大きい。図示していないが外部と電気接続するために必要な端子金具は充填物の外部に引き出されている。
【００１６】
本発明によれば、モジュールが占有していた枠体の面積が不要となったので、機器に組み込む際の面積効率が向上すると共に枠体部品と全面充填材料を削減して絶縁性粘着膜の局所的な滴下塗布工程におき換えることができ、この絶縁性粘着膜が堤防によって外に流出するのを食い止めることができ、安価に製造できるモジュールが実現できた。枠体の接着作業及び、早く固着させる為に加熱する加熱炉設備のコストが削除できたので省エネルギー、省資源に寄与し工業的価値が大きい。
【図面の簡単な説明】
【図１】 本発明による一実施形態を示す半導体回路モジュールの断面図。
【図２】 本発明による他の実施形態を示す半導体回路モジュールの平面図。
【図３】 図２に示す半導体回路モジュールの断面図。
【図４】 本発明による他の実施形態を示す半導体回路モジュールの平面図。
【図５】 図４に示す半導体回路モジュールの断面図。
【図６】 従来の半導体回路モジュールの断面図。
【符号の説明】
１ 半導体チップ
２ 回路パターン
２１ はんだ付け
３ 耐熱性絶縁基板
４ 印刷回路基板
５ 電子部品
６ 接続導体
６１ 接続部位
７ 絶縁性粘着膜
８ 放熱板
９ 堤防[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a structure of a semiconductor circuit module in which a semiconductor chip is fixed to a printed circuit pattern, and the semiconductor chip is connected to the printed circuit pattern or between the semiconductor chips, and each semiconductor chip is covered with an insulating adhesive film. And its manufacturing method.
[0002]
[Prior art]
A conventional semiconductor circuit module is shown in FIG. Here, reference numeral 1 denotes a semiconductor chip fixed on the circuit pattern 2. Reference numeral 3 denotes a heat-resistant insulating substrate, which is made of a metal such as copper, aluminum, or iron, and has a heat-resistant insulating material reinforced with a ceramic material such as aluminum nitride or glass fiber on one surface thereof. A circuit pattern 2 is formed to form a printed circuit board 4. The electronic component 5 such as a resistor is fixed by soldering and is electrically connected to the circuit pattern 2. The semiconductor chip 1 is connected to the connection between semiconductor chips or the circuit pattern 2 by a connection conductor 6 such as a bonding wire or a strip metal. After the frame body 10 is adhered and fixed to the entire periphery of the printed circuit board 4 mounted with components, the entire upper surface of the printed circuit board 4 mounted with components with a filling material 11 such as epoxy resin is filled and sealed. Although not shown, terminal fittings necessary for electrical connection with the outside are drawn out of the filling.
[0003]
Semiconductor circuit modules are manufactured as described above, but semiconductor circuit modules for power control with a large substrate area require a large amount of filling material, which requires material costs, equipment costs in the manufacturing process, and frame manufacturing. There is a cost for the mold. There is a demand for miniaturization of modules, and for power control, there is a demand for improving the heat dissipation effect because the heat generation of electronic components such as semiconductor chips and resistors is large.
[0004]
[Problems to be solved by the invention]
As mentioned above, the process of adhering the frame to the entire periphery of the circuit board, filling it with the filling material after waiting for fixing, increases the cost of equipment, materials and man-hours, and the heat dissipation effect of the circuit module There was a bad defect. It is an object of the present invention to improve the heat dissipation effect of a semiconductor circuit module so as to reduce the cost, and to realize a semiconductor circuit module having a small occupied area when the device is incorporated.
[0005]
[Means for Solving the Problems]
In order to achieve the above object, as a result of experiments and considerations on a semiconductor circuit module that does not require a frame and its manufacturing method, as a component of the semiconductor circuit module, a semiconductor chip, an insulating substrate on which a circuit pattern is formed, It has been found that reliability can be ensured by providing a function with a connection conductor of a semiconductor chip, an insulator covering the chip, and a heat sink for promoting heat dissipation. In this way, the problems could be solved as described below.
[0006]
With respect to claim 1, a lower surface of a semiconductor chip not housed in a package is fixed on a circuit pattern of a printed circuit board in which a circuit pattern is formed of metal on the surface of a heat-resistant insulating substrate, and the circuit pattern is formed from the chip. A function as a semiconductor module can be secured by connecting with a connecting conductor or connecting between the semiconductor chips with a connecting conductor. A heat sink having a dike formed by cutting and raising the periphery of the semiconductor chip so as to locally surround the outer periphery of the semiconductor chip so that the material of the insulating adhesive film does not flow too far from the periphery of the chip A semiconductor circuit module fixed to the circuit pattern via Since the semiconductor chip and the connecting conductor and the surface of the semiconductor chip only are coated with the minimum required amount of the insulating adhesive film by dripping and coating, it is manufactured as a semiconductor circuit module that ensures environmental resistance. No need for filling and sealing the entire frame and module, and the filling and sealing process can be replaced with a local dripping and coating process, so material and heating furnace facilities can be reduced, miniaturized and inexpensively manufactured.
[0011]
DETAILED DESCRIPTION OF THE INVENTION
An embodiment according to the present invention is shown in a sectional view in FIG. 1 is a semiconductor chip, 2 is a circuit pattern, 3 is a heat-resistant insulating substrate, 4 is a printed circuit board, 5 is an electronic component, 6 is a connecting conductor such as a bonding wire or strip metal, and 7 is an insulating adhesive film. . Next, the manufacturing process order will be described. The semiconductor chip 1 is fixed on the circuit pattern 2. The heat-resistant insulating substrate 3 is made of a metal such as copper, aluminum, or iron, and a heat-resistant insulating material reinforced with a ceramic material such as aluminum nitride or glass fiber is pasted on one surface thereof, and a copper circuit pattern is attached to the surface. 2 is formed to be a printed circuit board 4. The electronic component 5 such as a resistor is fixed by soldering 21 and is electrically connected to the circuit pattern 2. The semiconductor chip 1 is connected to the connection between semiconductor chips or the circuit pattern 2 by a connection conductor 6 such as a bonding wire or a strip metal. In order to improve the environmental reliability of the semiconductor chip 1 on the surface of the printed circuit board 4 on which the components are mounted, an insulating adhesive film 7 is formed for the purpose of shielding the surface of the chip 1 from the outside air. Yes.
[0012]
In order to cover the chip surface including the connection portion 61 between the chip 1 and the connection conductor 6, for example, about 1 drop of insulating adhesive such as silicon gel or silicon rubber is applied dropwise to form the insulating adhesive film 7. Is done.
[0013]
2 and 3 show another embodiment, FIG. 2 is a plan view, and FIG. 3 is a sectional view thereof. In FIGS. 2 and 3, reference numeral 8 denotes a radiator, and a dike 9 by a cutting and raising process is locally formed around the chip 1 around the radiator 8. The semiconductor chip 1 is fixed onto the circuit pattern 2 via the radiator 8 and only one drop of the insulating adhesive 7 is applied so as to cover the surface excluding the bottom surface of the semiconductor chip 1. Even if this insulating adhesive 7 has adhesiveness, it flows and spreads when it initially has fluidity. Even if the viscosity is slightly low and the fluidity is large, the levee 9 can prevent the water from flowing out.
[0014]
4 and 5 show another embodiment, FIG. 4 is a plan view, and FIG. 5 is a sectional view thereof. 4 and 5, the shape of the printed circuit board 3 is a printed circuit board in which a dike 9 is locally formed so as to surround the semiconductor chip in the vicinity of the chip fixing portion, and the semiconductor chip 1 is placed on the circuit pattern 2. In the case of fixing, if only one drop of the insulating adhesive 7 is applied so as to cover the surface excluding the bottom surface of the semiconductor chip 1, even if the viscosity is slightly low and the fluidity is high, the same as in the case of FIG. The levee 9 was able to stop it from flowing out. The step of forming the dike 9 on the circuit board could be freely formed in the shape of a mold for molding an inorganic powder, and in the case of an organic insulating board, it could be formed by adhering an insulator having a predetermined shape.
[0015]
When the area of a conventional circuit board on which six semiconductor chips for power control of 8 mm square are mounted is 60 mm square, this semiconductor circuit module has about 30 ml of epoxy or the like to cover the entire surface. However, in the embodiment according to the present invention, for example, the semiconductor chip has a size of 8 mm square, and the insulating adhesive film 7 may be an adhesive that is sufficient to cover the semiconductor chip. , About 0.05 milliliter per chip, and 0.3 milliliter for 6 chips. Compared to the conventional full-surface filling configuration, about 1 / 100th of the insulating adhesive is sufficient. Material costs could be greatly reduced, and filling equipment costs in the manufacturing process and mold costs for frame production were no longer required. There is a demand for miniaturization of modules, and for power control, there is a demand to improve the heat dissipation effect due to the large amount of heat generated by electronic components such as semiconductor chips and resistors. The effect of air-cooling and heat dissipation is great because of the structure that has been removed. Although not shown, terminal fittings necessary for electrical connection with the outside are drawn out of the filling.
[0016]
According to the present invention, since the area of the frame occupied by the module is no longer necessary, the area efficiency when incorporating the device is improved, and the frame parts and the entire filling material are reduced, and the insulating adhesive film is reduced . The module could be replaced with a local dripping coating process, and the insulating adhesive film could be prevented from flowing out by the dike, and a module that could be manufactured at low cost could be realized. Since the cost of the frame bonding work and the heating furnace equipment that is heated to fix the frame quickly can be eliminated, it contributes to energy saving and resource saving, and has great industrial value.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a semiconductor circuit module showing an embodiment according to the present invention.
FIG. 2 is a plan view of a semiconductor circuit module showing another embodiment according to the present invention.
3 is a cross-sectional view of the semiconductor circuit module shown in FIG.
FIG. 4 is a plan view of a semiconductor circuit module showing another embodiment according to the present invention.
5 is a cross-sectional view of the semiconductor circuit module shown in FIG.
FIG. 6 is a cross-sectional view of a conventional semiconductor circuit module.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Circuit pattern 21 Soldering 3 Heat-resistant insulating board 4 Printed circuit board 5 Electronic component 6 Connection conductor 61 Connection part 7 Insulating adhesive film 8 Heat sink 9 Embankment

Claims (1)

耐熱性絶縁基板の表面に回路パターンを金属で形成した印刷回路基板の回路パターン上に、パッケージに収納されていない半導体チップの下面を固着し、該半導体チップから上記回路パターンに接続導体で接続、又は該半導体チップ間を接続導体で接続して形成される半導体回路モジュールにおいて、該半導体チップの外周を局部的に取り巻くように周辺を切り起こして形成した堤防を有する放熱板を介して上記回路パターン上に固着されて、前記回路パターンに電気接続されるとともに、該半導体チップと前記接続導体との接続部位及び、前記半導体チップ表面のみを絶縁性粘着膜を滴下塗布により被覆することを特徴とする半導体回路モジュール。The lower surface of the semiconductor chip that is not housed in the package is fixed on the circuit pattern of the printed circuit board in which the circuit pattern is formed of metal on the surface of the heat-resistant insulating substrate, and the semiconductor chip is connected to the circuit pattern by a connection conductor, Alternatively, in the semiconductor circuit module formed by connecting the semiconductor chips with connecting conductors, the circuit pattern is formed via a heat sink having a bank formed by cutting and raising the periphery so as to locally surround the outer periphery of the semiconductor chip. It is secured to the upper, while being electrically connected to the circuit pattern, a connection portion between the connection conductor and the semiconductor chip and, wherein the coating only by a dropping applying an insulating adhesive film said semiconductor chip surface Semiconductor circuit module.
JP2002156403A 2002-05-29 2002-05-29 Semiconductor circuit module Expired - Fee Related JP4036323B2 (en)

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