JP4031946B2

JP4031946B2 - Delay wave canceller

Info

Publication number: JP4031946B2
Application number: JP2002116116A
Authority: JP
Inventors: 浩一郎今村; 啓之濱住; 一彦澁谷
Original assignee: Japan Broadcasting Corp
Current assignee: Japan Broadcasting Corp
Priority date: 2002-04-18
Filing date: 2002-04-18
Publication date: 2008-01-09
Anticipated expiration: 2022-04-18
Also published as: JP2003309498A

Description

【０００１】
【発明の属する技術分野】
本発明は、ＯＦＤＭ信号を用いたデジタル伝送およびデジタル放送において、親局からの受信信号に含まれるマルチパスや、親局からの受信信号を受信と同一周波数で再送信する際に発生する電波の回り込みなどによる希望波の遅延波を、適応フィルタを用いて電気的にキャンセルするための遅延波キャンセラに関するものである。
【０００２】
【従来の技術】
この種の従来の遅延波キャンセラでは、例えば本願人の出願に係る特開２００１−２３７７４９号公報の「回り込みキャンセラ」に見られるように、キャンセル残差成分を示す周波数特性を算出するに当り、ほとんどの処理が直列的に行われている。
【０００３】
【発明が解決しようとする課題】
しかしながら、ＦＦＴ窓が有効シンボル期間からずれることによる周波数位相特性の誤差の検出は、特に演算量が多いため、その算出に時間を要するという問題があった。このため、キャンセラで信号を観測して適応フィルタに対する新たなフィルタ係数を生成するのに時間を要し、係数更新の間隔が長くなるという問題があった。
【０００４】
そこで、本発明の目的は、適応フィルタの係数更新間隔が短くて済む遅延波キャンセラを提供することにある。
【０００５】
【課題を解決するための手段】
本発明は、受信系統からの入力信号が供給される被減算端子及び遅延波キャンセル用のキャンセル信号が供給される減算端子を有している減算器と、
該減算器からの出力信号が供給され、該出力信号にフィルタ係数の特性を畳み込むことにより前記キャンセル信号を生成する適応フィルタと、
前記減算器の出力信号を受信し、該出力信号に含まれる遅延波のキャンセル残差成分を示す周波数特性を算出して、該キャンセル残差成分によってフィルタ係数を算出するキャンセル残差算出部と、
該キャンセル残差算出部からの出力に基づいて得られる更新分のフィルタ係数と、前記適応フィルタに供給されている前回更新した際のフィルタ係数とから前記適応フィルタに供給する新たなフィルタ係数を算出するフィルタ係数更新部とを具えている遅延波キャンセラにおいて、
前期キャンセル残差算出部が、
ＦＦＴ窓を用いて有効シンボル期間の時間領域の信号を抽出してＦＦＴ（高速フーリエ変換）し、周波数領域のデータに変換して出力するＦＦＴ回路と、
該ＦＦＴ回路から出力された周波数領域のデータをＬ個（Ｌは自然数）に分割して、該分割数と同数の複数個の残差周波数特性算出回路へ出力するデータ分配回路と、
該データ分配回路からの信号が入力され、入力された周波数領域のデータからキャンセル残差成分を示す周波数特性を算出して出力するＬ個の残差周波数特性算出回路と、
該残差周波数特性算出回路からの各信号を合成し、連続した周波数特性データとして出力するデータ合成回路と、
該データ合成回路から出力される周波数特性データをＩＦＦＴ（逆高速フーリエ変換）して前記更新分のフィルタ係数を生成するＩＦＦＴ回路と、
を具えており、前記Ｌ個の各残差周波数算出回路が、
前記データ分配回路から入力されたそれぞれの周波数領域のデータから伝搬路の周波数位相特性を算出して出力する周波数特性算出回路と、
該周波数特性算出回路から出力される周波数位相特性信号から、前記ＦＦＴ回路のＦＦＴ窓が有効シンボル期間の正規の位置からの誤差による周波数位相特性の誤差を算出するＦＦＴ窓誤差算出回路と、
前記Ｌ個の各残差周波数特性算出回路におけるＦＦＴ窓誤差算出回路の出力がそれぞれ入力され、これらのＦＦＴ窓誤差算出回路から入力された周波数位相特性の誤差データの平均値を算出して出力するＦＦＴ窓誤差平均回路と、
前記周波数特性算出回路からの信号を、前記ＦＦＴ窓誤差平均回路から出力されるＦＦＴ窓誤差分を用いて位相補正して出力するＦＦＴ窓誤差補正回路と、
該ＦＦＴ窓誤差補正回路の出力に含まれる主波成分を算出して出力する主波算出回路と、
各残差周波数特性算出回路の主波算出回路の出力がそれぞれ入力され、各主波算出回路からのデータの平均値を算出して出力する主波平均回路と、
該主波平均回路の出力と前記ＦＦＴ窓誤差補正回路の出力からキャンセル残差成分を示す周波数特性を算出するキャンセル残差演算回路と、
を具えて、前記キャンセル残差成分を示す周波数特性の算出を前記Ｌ個の残差周波数特性算出回路で並列処理するように構成したことを特徴とするものである。
【０００６】
本発明によれば、前記キャンセル残差算出部が、２つの残差周波数特性算出回路を具え、前記データ分配回路が、これら２つの残差周波数特性算出回路に前記ＦＦＴ回路から出力されたデータを２配分する際に、ＤＣキャリアに最も近いデータを双方の残差周波数特性算出回路に出力して、前記２つの残差周波数特性算出回路がＤＣキャリアを基準としてＦＦＴ窓誤差による周波数位相特性の補正を行うようにする。
【０００８】
さらに本発明の他の好適例では、前記キャンセル残差演算回路が、前記ＦＦＴ窓誤差補正回路から出力された周波数特性F(k,n)（ここに、ｋは周波数を表すキャリア番号、ｎは前記フィルタ係数更新部によるフィルタ係数の更新回数を表す自然数）と前記主波平均回路から出力された主波成分D(n)とから、前記キャンセル残差成分E(k,n)を次式、

に基づいて算出して、前記入力信号に含まれるマルチパスをキャンセルするフィルタ係数を生成するように構成する。
【０００９】
本発明のさらに他の好適例では、前記キャンセル残差演算回路が、前記ＦＦＴ窓誤差補正回路から出力された周波数特性F(k,n)（ここに、ｋは周波数を表すキャリア番号、ｎは前記フィルタ係数更新部によるフィルタ係数の更新回数を表す自然数）と前記主波平均回路から出力された主波成分D(n)とから、前記キャンセル残差成分E(k,n)を次式、

に基づいて算出して、前記入力信号に含まれる回り込みをキャンセルするフィルタ係数を生成するように構成する。
【００１０】
【発明の実施の形態】
以下添付図面を参照して、実施例により本発明を詳細に説明する。
【００１１】
図１は、本発明による遅延波キャンセラの一実施例を示すブロック図であり、ここに、１は本発明遅延波キャンセラ、２は減算器、３はバンドパスフィルタ、４は適応フィルタ、５はフィルタ係数生成回路、６はキャンセル残差算出部、７はフィルタ係数更新部、８はＦＦＴ回路、９はデータ分配回路、１０−１，１０−２，…,１０−Ｌは残差周波数特性算出回路、１１はデータ合成回路、１２はＩＦＦＴ回路である。
【００１２】
遅延波キャンセラ１は、時間領域の信号が入力されて、遅延波をキャンセルした後の時間領域の信号を出力するように構成されている。
【００１３】
減算器２は、遅延波キャンセラ１に入力されたキャンセラ信号から、適応フィルタ４より出力される遅延波キャンセル用のキャンセル信号を減算して、バンドパスフィルタ３へ出力する。
【００１４】
バンドパスフィルタ３は、減算器２から出力された信号の信号帯域外の周波数成分を減衰させ、遅延波キャンセラ出力として出力するとともに、適応フィルタ４およびフィルタ係数生成回路５へ出力する。
【００１５】
適応フィルタ４は、バンドパスフィルタ３からの信号にフィルタ係数生成回路５からのフィルタ係数を畳み込むことでキャンセル信号を生成して減算器２の減算端子に出力する。
【００１６】
フィルタ係数生成回路５は、キャンセル残差演算部６とフィルタ係数更新部７とから構成されており、バンドパスフィルタ３から入力された遅延波キャンセラ出力信号は先ずキャンセル残差演算部６へ入力される。
【００１７】
ＦＦＴ回路８は、バンドパスフィルタ３から入力された時間領域の信号である遅延波キャンセラ出力信号の有効シンボル期間を、ＦＦＴ窓を用いて抽出し、抽出したデータをＦＦＴ（高速フーリエ変換）して周波数領域のデータに変換して、データ分配回路９へ出力する。
【００１８】
データ分配回路９は、ＦＦＴ回路８からの周波数領域のデータをＬ個（Ｌは自然数）の領域に分割して、この分割数と同数のＬ個の残差周波数特性算出回路１０へそれぞれ出力する。
【００１９】
それぞれの残差周波数特性算出回路１０は、各々入力された周波数領域のデータからキャンセル残差成分を示す周波数特性を各回路にて並列に算出してデータ合成回路１１へ出力する。なお、残差周波数特性算出回路１０の動作の詳細については、図２を参照して後に詳細に説明する。
【００２０】
データ合成回路１１はＬ個の各残差周波数特性算出回路１０からのキャンセル残差成分を示す周波数特性を周波数が連続的となるように合成した周波数特性データをＩＦＦＴ回路１２へ出力する。
【００２１】
ＩＦＦＴ回路１２は、入力された周波数特性データをＩＦＦＴ（逆高速フーリェ変換）してフィルタ係数更新分データを生成して、キャンセル残差算出部６の出力としてフィルタ係数更新部７へ出力する。
【００２２】
フィルタ係数更新部７は、キャンセル残差算出部６からのフィルタ係数更新分データと適応フィルタ４に供給されている前回更新した際のフィルタ係数とから新しいフィルタ係数を生成して適応フィルタ４へ出力する。
【００２３】
以上、本発明による遅延波キャンセラの動作について説明したが、キャンセル残差算出部６にＬ個の残差周波数特性算出回路１０−１，１０−２，…,１０−Ｌを用いて並列処理を行っていること以外は本願人の出願に係る特開２００１−２３７７４９号公報の「回り込みキャンセラ」などで公知の処理であるため、その詳細な動作についての説明は省略する。
【００２４】
図２は、図１のキャンセル残差算出部６における残差周波数特性算出回路１０の一実施例を示すブロック図であり、この例では、Ｌ＝２の場合の構成を示している。なお、図１と同じブロックを示すものには、同じ参照番号を付して示してあり、また、各残差周波数特性算出回路１０−１および１０−２における同じ構成要素を示すものにも同じ参照番号を付して示してある。
【００２５】
この例では、ＦＦＴ回路８から出力された周波数領域データをデータ分配回路９にて２つに分配する例を示している。
【００２６】
データ分配器９からそれぞれの残差周波数特性算出回路１０−１および１０−２に入力された信号は、先ず周波数特性算出回路１３に入力され、ＯＦＤＭ信号に挿入されているＳＰ（Scattered Pilot）やデータキャリアの判定値などを用いることで伝搬路の周波数特性を算出し、ＦＦＴ窓誤差算出回路１４およびＦＦＴ窓誤差補正回路１５へ出力する。
【００２７】
ＦＦＴ窓誤差算出回路１４は、ＦＦＴ回路８のＦＦＴ窓がＯＦＤＭ信号の有効シンボル期間における正規の位置からの誤差による周波数位相特性の誤差を算出して出力する。この回路１４の簡単な動作原理を説明する。有効シンボル期間の正規の位置からの誤差τ（τは時間を示す実数）は、周波数特性上ではexp（jωτ）（ｊは虚数単位）となって現れるため、この成分が周波数位相特性で一次傾斜の誤差となる。したがって、ＦＦＴ窓誤差算出回路１４はこの周波数位相特性の誤差を最小２乗法による直線近似にて算出するものである。なお、この詳細な動作については、本発明者らの発明に係る特開２０００−２９５１９５号公報の「ＯＦＤＭ復調装置」を参照されたい。また、ＦＦＴ窓誤差算出回路１４は、周波数位相特性の誤差算出結果を同じ残差周波数特性算出回路１０内のＦＦＴ窓誤差平均回路１６に出力するとともに、他の残差周波数特性算出回路１０におけるＦＦＴ窓誤差平均回路１６にも同時に出力する。
【００２８】
ＦＦＴ窓誤差平均回路１６は、各ＦＦＴ窓誤差算出回路１４から入力された周波数位相特性の誤差データの平均値を算出してＦＦＴ窓誤差補正回路１５へ出力する。ここで、各ＦＦＴ窓誤差平均回路１６からの出力は、入力が同じであるため、同じデータが出力される。
【００２９】
ＦＦＴ窓誤差補正回路１５は、ＦＦＴ窓誤差平均回路１６からの周波数位相特性の平均誤差データを用いて、周波数特性算出回路１３からの出力に含まれる周波数位相特性の誤差を補正して、その結果F(n,k)（ここに、ｋは周波数を表すキャリア番号、ｎはフィルタ係数更新部７によるフィルタ係数の更新回数を表す自然数）を主波算出回路１７およびキャンセル残差演算回路１８へ出力する。
【００３０】
ここで、ＦＦＴ回路８から出力された周波数領域データをデータ分配回路９にて２分配する際に、このデータ分配回路９は、ＤＣキャリア（ＯＦＤＭ信号の中心キャリア）に最も近いデータをどちらの残差周波数特性算出回路１０−１および１０−２にも出力するように構成する。ＤＣキャリアはＦＦＴ窓誤差による周波数位相特性の誤差を受けないキャリアであるため、このキャリアを基準として残差周波数特性算出回路１０はＦＦＴ窓誤差による周波数位相特性の補正を行っている。したがって、各残差周波数特性算出回路回路１０にＦＦＴ回路８から出力された周波数領域データを持たせることで、２つの回路が独立してＦＦＴ窓誤差による周波数位相特性の補正を行うことができるために、キャンセル残差算出部の処理速度の向上が可能となる。しかし、ＦＦＴ窓誤差補正回路１５については、ＤＣキャリアを基準として周波数位相特性の誤差を補正する必要があるため、３個以上の回路で並列処理を行ったとしても、各回路からの出力について周波数特性が連続しているかを判定し、連続していない場合には、連続したものとなるように補正する必要がある。このため、この処理は３個以上のＦＦＴ窓誤差補止回路１５、即ち３つ以上の残差周波数特性算出回路回路１０を用いて行っても処理速度の向上は余り期待できない。
【００３１】
主波算出回路１７は、ＦＦＴ窓誤差補正回路１５の出力に含まれる主波成分、即ち、ＦＦＴ窓誤差補正回路１５からのF(n,K)を周波数方向に平均値を算出した次式（１）にて表わされる主波成分D1(n)を主波平均回路１９へ出力する。

ここに、ＫはF(n,K)のデータ数を示している。
【００３２】
主波平均回路１９は、主波算出回路１７の出力D1(n)と、別の主波算出回路１７からの出力D2(n)との平均D(n)を算出してキャンセル残差演算回路１８へ出力する。なお、前記平均D(n)は次式で表される。

【００３３】
キャンセル残差演算回路１８は、ＦＦＴ窓誤差補正回路１５の出力F(n,K)と、主波平均回路１９の出力D(n)からキャンセル残差成分を示す周波数特性E(n,k)を算出してデータ合成回路１１へ出力する。
ここに、キャンセル残差成分を示す周波数特性E(ｋ,n)は、遅延波キャンセラをマルチパスキャンセラ（ゴーストキャンセラ）として用いる場合は下記の（３）式を、また、回り込みキャンセラ（エコーキャンセラ）として用いる場合は下記の（４）式をそれぞれ用いて算出する。

これは、キャンセルすべき遅延波の伝搬路の状祝が異なるため、図１に示す構成の遅延波キャンセラで遅延波をキャンセルする場合の条件が異なることによるものである。
【００３４】
【発明の効果】
本発明によれば、適応フィルタの係数更新間隔を短くし、希望波の遅延波を迅速にキャンセルする遅延波キャンセラを実現することができる。
【図面の簡単な説明】
【図１】本発明による遅延波キャンセラの一実施例を示したブロック図である。
【図２】図1の遅延波キャンセラにおける残差周波数特性算出回路の一実施例を示したブロック図である。
【符号の説明】
１遅延波キャンセラ
２減算器
３バンドパスフィルタ
４適応フィルタ
５フィルタ係数生成回路
６キャンセル残差算出部
７フィルタ係数更新部
８ＦＦＴ回路
９データ分配回路
１０−１，１０−２，…,１０−Ｌ残差周波数特性算出回路
１１データ合成回路
１２ＩＦＦＴ回路
１３周波数特性算出回路
１４ＦＦＴ窓誤差算出回路
１５ＦＦＴ窓誤差補正回路
１６ＦＦＴ窓誤差平均回路
１７主波算出回路
１８キャンセル残差演算回路
１９主波平均回路[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a multipath included in a received signal from a parent station in digital transmission and broadcasting using an OFDM signal, and radio waves generated when a received signal from a parent station is retransmitted at the same frequency as reception. The present invention relates to a delay wave canceller for electrically canceling a delayed wave of a desired wave due to wraparound or the like using an adaptive filter.
[0002]
[Prior art]
In the conventional delayed wave canceller of this type, for example, as seen in “wraparound canceller” of Japanese Patent Application Laid-Open No. 2001-237749 related to the applicant's application, almost no frequency characteristic indicating the cancellation residual component is calculated. Are performed in series.
[0003]
[Problems to be solved by the invention]
However, the detection of the error of the frequency phase characteristic due to the shift of the FFT window from the effective symbol period has a problem that it takes time for the calculation because the calculation amount is particularly large. For this reason, it takes time to observe the signal with the canceller and generate a new filter coefficient for the adaptive filter, and there is a problem that the coefficient update interval becomes long.
[0004]
Accordingly, an object of the present invention is to provide a delayed wave canceller that requires a short coefficient update interval of an adaptive filter.
[0005]
[Means for Solving the Problems]
The present invention is a subtractor having a subtracted terminal to which an input signal from a receiving system is supplied and a subtracting terminal to which a cancellation signal for delay wave cancellation is supplied;
An adaptive filter which is supplied with an output signal from the subtractor and generates the cancellation signal by convolving a characteristic of a filter coefficient with the output signal;
A cancellation residual calculation unit that receives an output signal of the subtractor, calculates a frequency characteristic indicating a cancellation residual component of a delay wave included in the output signal, and calculates a filter coefficient using the cancellation residual component;
A new filter coefficient to be supplied to the adaptive filter is calculated from the updated filter coefficient obtained based on the output from the cancellation residual calculation unit and the filter coefficient at the time of the previous update supplied to the adaptive filter. In a delayed wave canceller comprising a filter coefficient update unit
The previous term cancellation residual calculation part
An FFT circuit that extracts a time-domain signal of an effective symbol period using an FFT window, performs FFT (Fast Fourier Transform), converts the signal into frequency-domain data, and outputs the data;
A data distribution circuit which divides the frequency domain data output from the FFT circuit into L pieces (L is a natural number) and outputs the divided data to a plurality of residual frequency characteristic calculation circuits of the same number as the division number;
Is the signal input from the data distribution circuit, and the L residual frequency characteristic calculation circuit which calculates and outputs the Frequency characteristic indicative for canceling residual components from the data of the input frequency domain,
A data synthesizing circuit that synthesizes each signal from the residual frequency characteristic calculation circuit and outputs it as continuous frequency characteristic data;
An IFFT circuit for generating the updated filter coefficient by performing IFFT (Inverse Fast Fourier Transform) on the frequency characteristic data output from the data synthesis circuit ;
And each of the L residual frequency calculation circuits includes:
A frequency characteristic calculation circuit that calculates and outputs a frequency phase characteristic of a propagation path from data of each frequency domain input from the data distribution circuit;
An FFT window error calculation circuit for calculating an error of the frequency phase characteristic due to an error from the normal position of the effective symbol period from the frequency phase characteristic signal output from the frequency characteristic calculation circuit;
The outputs of the FFT window error calculation circuits in the L residual frequency characteristic calculation circuits are respectively input, and the average value of the frequency phase characteristic error data input from these FFT window error calculation circuits is calculated and output. FFT window error averaging circuit;
An FFT window error correction circuit that performs phase correction on the signal from the frequency characteristic calculation circuit using the FFT window error output from the FFT window error averaging circuit,
A main wave calculation circuit that calculates and outputs a main wave component included in the output of the FFT window error correction circuit;
An output of the main wave calculation circuit of each residual frequency characteristic calculation circuit is input, respectively, and a main wave average circuit that calculates and outputs an average value of data from each main wave calculation circuit;
A cancellation residual calculation circuit for calculating a frequency characteristic indicating a cancellation residual component from the output of the main wave averaging circuit and the output of the FFT window error correction circuit;
The frequency characteristic calculation indicating the cancellation residual component is processed in parallel by the L residual frequency characteristic calculation circuits.
[0006]
According to the present invention, the cancellation residual calculation unit includes two residual frequency characteristic calculation circuits, and the data distribution circuit outputs the data output from the FFT circuit to the two residual frequency characteristic calculation circuits. When the two distributions are performed, data closest to the DC carrier is output to both residual frequency characteristic calculation circuits, and the two residual frequency characteristic calculation circuits correct frequency phase characteristics due to FFT window errors using the DC carrier as a reference. To do .
[0008]
Furthermore, in another preferred embodiment of the present invention, the cancellation residual calculation circuit has a frequency characteristic F (k, n) output from the FFT window error correction circuit (where k is a carrier number representing a frequency, n is From the main wave component D (n) output from the main wave averaging circuit, the cancellation residual component E (k, n) is expressed by the following equation:

And a filter coefficient for canceling the multipath included in the input signal is generated.
[0009]
In still another preferred embodiment of the present invention, the cancellation residual calculation circuit has a frequency characteristic F (k, n) output from the FFT window error correction circuit (where k is a carrier number representing a frequency, n is From the main wave component D (n) output from the main wave averaging circuit, the cancellation residual component E (k, n) is expressed by the following equation:

And a filter coefficient for canceling the wraparound included in the input signal is generated.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.
[0011]
FIG. 1 is a block diagram showing an embodiment of a delayed wave canceller according to the present invention, where 1 is a delayed wave canceller of the present invention, 2 is a subtractor, 3 is a bandpass filter, 4 is an adaptive filter, and 5 is Filter coefficient generation circuit, 6 is a cancellation residual calculation unit, 7 is a filter coefficient update unit, 8 is an FFT circuit, 9 is a data distribution circuit, 10-1, 10-2,. A circuit, 11 is a data synthesis circuit, and 12 is an IFFT circuit.
[0012]
The delayed wave canceller 1 is configured to receive a time domain signal and output a time domain signal after canceling the delayed wave.
[0013]
The subtracter 2 subtracts the cancel signal for canceling the delayed wave output from the adaptive filter 4 from the canceller signal input to the delayed wave canceller 1 and outputs the result to the bandpass filter 3.
[0014]
The bandpass filter 3 attenuates the frequency component outside the signal band of the signal output from the subtracter 2, outputs it as a delayed wave canceller output, and outputs it to the adaptive filter 4 and the filter coefficient generation circuit 5.
[0015]
The adaptive filter 4 generates a cancel signal by convolving the filter coefficient from the filter coefficient generation circuit 5 with the signal from the bandpass filter 3, and outputs it to the subtraction terminal of the subtractor 2.
[0016]
The filter coefficient generation circuit 5 includes a cancellation residual calculation unit 6 and a filter coefficient update unit 7, and the delayed wave canceller output signal input from the bandpass filter 3 is first input to the cancellation residual calculation unit 6. The
[0017]
The FFT circuit 8 extracts an effective symbol period of the delayed wave canceller output signal that is a time domain signal input from the bandpass filter 3 using an FFT window, and performs FFT (Fast Fourier Transform) on the extracted data. The data is converted into frequency domain data and output to the data distribution circuit 9.
[0018]
The data distribution circuit 9 divides the frequency domain data from the FFT circuit 8 into L (L is a natural number) areas and outputs the data to L residual frequency characteristic calculation circuits 10 having the same number as the division number. .
[0019]
Each of the residual frequency characteristic calculation circuits 10 calculates a frequency characteristic indicating a cancellation residual component in parallel from each input frequency domain data, and outputs the frequency characteristic to the data synthesis circuit 11. Details of the operation of the residual frequency characteristic calculation circuit 10 will be described later in detail with reference to FIG.
[0020]
The data synthesis circuit 11 outputs to the IFFT circuit 12 frequency characteristic data obtained by synthesizing the frequency characteristics indicating the cancellation residual components from the L residual frequency characteristic calculation circuits 10 so that the frequencies are continuous.
[0021]
The IFFT circuit 12 performs IFFT (inverse high-speed Fourier transform) on the input frequency characteristic data to generate filter coefficient update data, and outputs the data to the filter coefficient update unit 7 as an output of the cancellation residual calculation unit 6.
[0022]
The filter coefficient update unit 7 generates a new filter coefficient from the filter coefficient update data from the cancellation residual calculation unit 6 and the filter coefficient at the previous update supplied to the adaptive filter 4 and outputs the new filter coefficient to the adaptive filter 4 To do.
[0023]
The operation of the delayed wave canceller according to the present invention has been described above, but parallel processing is performed using the L residual frequency characteristic calculation circuits 10-1, 10-2,..., 10-L in the cancellation residual calculation unit 6. Except for what is performed, since it is a known process in “wraparound canceller” of Japanese Patent Application Laid-Open No. 2001-237749 related to the applicant's application, a detailed description of the operation is omitted.
[0024]
FIG. 2 is a block diagram showing an example of the residual frequency characteristic calculation circuit 10 in the cancellation residual calculation unit 6 of FIG. 1. In this example, a configuration in the case of L = 2 is shown. The same blocks as those shown in FIG. 1 are denoted by the same reference numerals, and the same components as those in the residual frequency characteristic calculation circuits 10-1 and 10-2 are shown. It is shown with a reference number.
[0025]
In this example, the frequency domain data output from the FFT circuit 8 is divided into two by the data distribution circuit 9.
[0026]
The signals input from the data distributor 9 to the respective residual frequency characteristic calculation circuits 10-1 and 10-2 are first input to the frequency characteristic calculation circuit 13, and SP (Scattered Pilot) or the like inserted into the OFDM signal. The frequency characteristic of the propagation path is calculated by using the determination value of the data carrier and the like, and is output to the FFT window error calculation circuit 14 and the FFT window error correction circuit 15.
[0027]
The FFT window error calculation circuit 14 calculates and outputs an error in the frequency phase characteristic due to an error from the normal position of the FFT window of the FFT circuit 8 in the effective symbol period of the OFDM signal. A simple operation principle of the circuit 14 will be described. Since the error τ from the normal position of the effective symbol period (τ is a real number indicating time) appears as exp (jωτ) (j is an imaginary unit) on the frequency characteristics, this component is the primary slope in the frequency phase characteristics. Error. Therefore, the FFT window error calculation circuit 14 calculates the frequency phase characteristic error by linear approximation using the least square method. For this detailed operation, refer to “OFDM demodulator” in Japanese Patent Laid-Open No. 2000-295195 according to the invention of the present inventors. The FFT window error calculation circuit 14 outputs an error calculation result of the frequency phase characteristic to the FFT window error averaging circuit 16 in the same residual frequency characteristic calculation circuit 10 and FFTs in the other residual frequency characteristic calculation circuits 10. Simultaneously output to the window error averaging circuit 16.
[0028]
The FFT window error averaging circuit 16 calculates the average value of the frequency phase characteristic error data input from each FFT window error calculation circuit 14 and outputs the average value to the FFT window error correction circuit 15. Here, since the output from each FFT window error averaging circuit 16 is the same, the same data is output.
[0029]
The FFT window error correction circuit 15 corrects the error of the frequency phase characteristic included in the output from the frequency characteristic calculation circuit 13 by using the average error data of the frequency phase characteristic from the FFT window error averaging circuit 16, and the result F (n, k) (where k is a carrier number representing a frequency and n is a natural number representing the number of times the filter coefficient is updated by the filter coefficient updating unit 7) is output to the main wave calculation circuit 17 and the cancellation residual calculation circuit 18 To do.
[0030]
Here, when the frequency domain data output from the FFT circuit 8 is divided into two by the data distribution circuit 9, the data distribution circuit 9 determines which of the remaining data is closest to the DC carrier (the center carrier of the OFDM signal). The differential frequency characteristic calculation circuits 10-1 and 10-2 are also configured to output. Since the DC carrier is a carrier that does not receive an error in the frequency phase characteristic due to the FFT window error, the residual frequency characteristic calculation circuit 10 corrects the frequency phase characteristic due to the FFT window error based on this carrier. Therefore, since each of the residual frequency characteristic calculation circuit circuits 10 has the frequency domain data output from the FFT circuit 8, the two circuits can independently correct the frequency phase characteristics due to the FFT window error. In addition, the processing speed of the cancellation residual calculation unit can be improved. However, since the FFT window error correction circuit 15 needs to correct the error of the frequency phase characteristic with reference to the DC carrier, even if parallel processing is performed by three or more circuits, the frequency from the output from each circuit It is determined whether or not the characteristics are continuous. If the characteristics are not continuous, it is necessary to correct the characteristics to be continuous. Therefore, even if this process is performed using three or more FFT window error compensation circuits 15, that is, three or more residual frequency characteristic calculation circuit circuits 10, an improvement in the processing speed cannot be expected.
[0031]
The main wave calculation circuit 17 calculates the average value of the main wave component included in the output of the FFT window error correction circuit 15, that is, F (n, K) from the FFT window error correction circuit 15 in the frequency direction. The main wave component D1 (n) represented by 1) is output to the main wave averaging circuit 19.

Here, K indicates the number of data of F (n, K).
[0032]
The main wave average circuit 19 calculates an average D (n) between the output D1 (n) of the main wave calculation circuit 17 and the output D2 (n) from another main wave calculation circuit 17, and calculates a cancellation residual calculation circuit. 18 is output. The average D (n) is expressed by the following formula.

[0033]
The cancellation residual calculation circuit 18 has a frequency characteristic E (n, k) indicating a cancellation residual component from the output F (n, K) of the FFT window error correction circuit 15 and the output D (n) of the main wave averaging circuit 19. Is calculated and output to the data synthesis circuit 11.
Here, for the frequency characteristic E (k, n) indicating the cancellation residual component, the following equation (3) is used when the delayed wave canceller is used as a multipath canceller (ghost canceller), and a wraparound canceller (echo canceller). When using as, it calculates using the following (4) Formula, respectively.

This is because the conditions for canceling the delayed wave with the delayed wave canceller having the configuration shown in FIG. 1 are different because the propagation path of the delayed wave to be canceled is different.
[0034]
【The invention's effect】
According to the present invention, it is possible to realize a delayed wave canceller that shortens the coefficient update interval of the adaptive filter and quickly cancels the delayed wave of the desired wave.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an embodiment of a delayed wave canceller according to the present invention.
2 is a block diagram showing an embodiment of a residual frequency characteristic calculation circuit in the delayed wave canceller of FIG. 1. FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Delay wave canceller 2 Subtractor 3 Band pass filter 4 Adaptive filter 5 Filter coefficient generation circuit 6 Cancellation residual calculation part 7 Filter coefficient update part 8 FFT circuit 9 Data distribution circuit 10-1, 10-2, ..., 10-L Residual frequency characteristic calculation circuit 11 Data synthesis circuit 12 IFFT circuit 13 Frequency characteristic calculation circuit 14 FFT window error calculation circuit 15 FFT window error correction circuit 16 FFT window error averaging circuit 17 Main wave calculation circuit 18 Cancellation residual calculation circuit 19 Main wave Average circuit

Claims

A subtractor having a subtracted terminal to which an input signal from a receiving system is supplied and a subtracting terminal to which a cancellation signal for delay wave cancellation is supplied;
An adaptive filter which is supplied with an output signal from the subtractor and generates the cancellation signal by convolving a characteristic of a filter coefficient with the output signal;
A cancellation residual calculation unit that receives an output signal of the subtractor, calculates a frequency characteristic indicating a cancellation residual component of a delay wave included in the output signal, and calculates a filter coefficient using the cancellation residual component;
A new filter coefficient to be supplied to the adaptive filter is calculated from the updated filter coefficient obtained based on the output from the cancellation residual calculation unit and the filter coefficient at the time of the previous update supplied to the adaptive filter. In a delayed wave canceller comprising a filter coefficient update unit
The previous term cancellation residual calculation part
An FFT circuit that extracts a time-domain signal of an effective symbol period using an FFT window, performs FFT (Fast Fourier Transform), converts the signal into frequency-domain data, and outputs the data;
A data distribution circuit which divides the frequency domain data output from the FFT circuit into L pieces (L is a natural number) and outputs the divided data to a plurality of residual frequency characteristic calculation circuits of the same number as the division number;
Is the signal input from the data distribution circuit, and the L residual frequency characteristic calculation circuit which calculates and outputs the Frequency characteristic indicative for canceling residual components from the data of the input frequency domain,
A data synthesizing circuit that synthesizes each signal from the residual frequency characteristic calculation circuit and outputs it as continuous frequency characteristic data;
An IFFT circuit for generating the updated filter coefficient by performing IFFT (Inverse Fast Fourier Transform) on the frequency characteristic data output from the data synthesis circuit ;
And each of the L residual frequency calculation circuits includes:
A frequency characteristic calculation circuit that calculates and outputs a frequency phase characteristic of a propagation path from data of each frequency domain input from the data distribution circuit;
An FFT window error calculation circuit for calculating an error of the frequency phase characteristic due to an error from the normal position of the effective symbol period from the frequency phase characteristic signal output from the frequency characteristic calculation circuit;
The outputs of the FFT window error calculation circuits in the L residual frequency characteristic calculation circuits are respectively input, and the average value of the frequency phase characteristic error data input from these FFT window error calculation circuits is calculated and output. FFT window error averaging circuit;
An FFT window error correction circuit that performs phase correction on the signal from the frequency characteristic calculation circuit using the FFT window error output from the FFT window error averaging circuit,
A main wave calculation circuit that calculates and outputs a main wave component included in the output of the FFT window error correction circuit;
An output of the main wave calculation circuit of each residual frequency characteristic calculation circuit is input, respectively, and a main wave average circuit that calculates and outputs an average value of data from each main wave calculation circuit;
A cancellation residual calculation circuit for calculating a frequency characteristic indicating a cancellation residual component from the output of the main wave averaging circuit and the output of the FFT window error correction circuit;
The delay wave canceller is configured such that the frequency characteristic calculation indicating the cancellation residual component is processed in parallel by the L residual frequency characteristic calculation circuits.

The cancellation residual calculation unit includes two residual frequency characteristic calculation circuits, and when the data distribution circuit distributes two pieces of data output from the FFT circuit to the two residual frequency characteristic calculation circuits, The data closest to the DC carrier is output to both residual frequency characteristic calculation circuits, and the two residual frequency characteristic calculation circuits correct the frequency phase characteristic due to the FFT window error using the DC carrier as a reference. The delayed wave canceller according to claim 1.

The cancel residual calculating circuit, the FFT window error correction circuit frequency characteristic F output from (k, n) (here, k is a carrier number representing the frequency, n represents the filter coefficient by the filter coefficient update unit Natural number representing the number of updates) and the main wave component D (n) output from the main wave averaging circuit , the cancellation residual component E (k, n) is expressed by the following equation:

The delay wave canceller according to claim 1 or 2 , wherein the delay coefficient canceller is configured to generate a filter coefficient that cancels a multipath included in the input signal .

The cancellation residual calculation circuit outputs a frequency characteristic F (k, n) output from the FFT window error correction circuit (where k is a carrier number representing a frequency, n is a filter coefficient update by the filter coefficient update unit) Natural number representing the number of times) and the main wave component D (n) output from the main wave averaging circuit , the cancellation residual component E (k, n) is expressed by the following equation:

The delay wave canceller according to claim 1 , wherein the delay wave canceller is configured to generate a filter coefficient that is calculated on the basis of the input signal and cancels a wraparound included in the input signal .