JP4031429B2 - Electronic ballast - Google Patents

Abstract

An electronic ballast for driving a gas discharge lamp includes a rectifier, a valley-fill circuit, an inverter having first and second series-connected controllably conductive device having complementary duty cycles, a control circuit for controlling the controllably conductive device, and an independent cat ear power supply to provide power to the ballast control circuits. The result is a ballast having substantially improved THD, and current crest factor. In a preferred embodiment, the valley-fill circuit includes an energy storage device that stores energy in response to a controllably conductive device. In an especially preferred embodiment, the controllably conductive device of the valley-fill circuit is also one of the controllably conductive devices of the inverter.

Description

  The present invention relates to an electronic ballast for a gas discharge lamp such as a fluorescent lamp.

  This application is related to and is a continuation-in-part of co-pending application 09 / 887,848 filed on June 22, 2001, named Electronic Ballast, and is a partial continuation application, and is named 11 November 2001, named Single Switch Electonic Dimming Ballast. Relating to co-pending application 10 / 006,036 filed on May 5th. The entire disclosures of which are incorporated herein by reference.

  Fluorescent lamp electronic ballasts can usually be analyzed as having a “front end” and a “back end”. The front end typically includes a rectifier that changes an alternating current (AC) line voltage to a direct current (DC) bus voltage and a filter circuit that filters the DC bus voltage. The filter circuit typically comprises an energy storage capacitor. Electronic ballasts often also use a boost circuit that boosts the magnitude of the DC bus voltage. In addition, electronic ballasts are known that use passive power factor correction means to reduce ballast input current total harmonic distortion. These means include a line frequency filter circuit that is high impedance at the line frequency and for the first 30 harmonics of the line frequency. The high impedance of the line frequency filter circuit has a significant reduction effect on the harmonic input current predistortion. These filters are in contrast to EMI filters that have low impedance at the line frequency, and associated harmonics, and therefore have no significant effect on ballast input current total harmonic distortion.

  The ballast back end typically includes a switching inverter that converts the DC bus voltage to a high frequency AC voltage and a resonant tank circuit that has a relatively high impedance to couple the high frequency AC voltage to the lamp electrode. The ballast backend also typically includes a feedback circuit that monitors the lamp current and generates a control signal that controls the switching of the inverter to maintain the desired lamp current magnitude.

  In order to maintain stable lamp operation, normal prior art electronic ballasts filter the DC bus voltage to minimize bus voltage ripple. This is typically accomplished by providing a bus capacitor having a relatively large capacitance and thus a relatively large energy storage capacity. By providing a relatively large bus capacitor, the amount of decay from the commutation peak voltage is minimized from one half cycle to the next. Minimizing the amount of ripple on the DC bus will also minimize the current crest factor (CCF) of the lamp current. The lamp current CCF is defined as the ratio of the magnitude of the peak lamp current to the root mean square (RMS) magnitude of the lamp current.

  An important indicator of the lamp current quality of gas discharge lamps such as fluorescent lamps is the current crest factor (CCF) of the lamp current. A low CCF is preferred because a high CCF can degrade the lamp filament and then significantly reduce the lamp life. The Japanese Industrial Standard (JIS) JIS C8117-1992 recommends a CCF of 2.1 or lower, and the International Electrotechnical Commission (IEC) standard 921-1988-07 recommends a CCF of 1.7 or lower.

  However, using a relatively large bus capacitor to minimize ripple on the DC bus voltage has drawbacks. The larger the bus capacitor, the more expensive it will occupy more area on the printed circuit board and the like, and use more volume inside the ballast. Also, the bus capacitor is discharged whenever the bus voltage level is greater than the instantaneous absolute value of the AC line voltage, and therefore the bus capacitor is within each line half cycle that is near the absolute peak voltage of the AC line voltage. Recharged only during a relatively short time. Thus, a conventional prior art ballast draws a relatively large amount of current during the short time that the bus capacitor is charged, as shown in FIG. As a result, the ballast input current waveform introduces distortion, undesirable harmonics and undesirable levels of total harmonic distortion (THD).

  In an AC power system, a voltage or current waveform can be represented as a fundamental vibration and a series of harmonics. These harmonics have a frequency that is some multiple of the fundamental frequency of the line voltage or line current. Specifically, the distortion of the AC waveform has a component that is an integer multiple of the fundamental frequency. Of particular importance are harmonics that are integer multiples of the third harmonic. These harmonics numerically add a neutral line for a three-stage power system. Usually, total harmonic distortion is calculated using the first 30 harmonics of the fundamental frequency. The total harmonic distortion (THD) of the ballast input current is preferably less than 33.3% to prevent overheating of the neutral wire in a three-stage power system. Furthermore, many users of lighting systems require the ballast to have less than 20% ballast input current total harmonic distortion.

  One approach to reducing ballast input current total harmonic distortion and improving ballast power factor was to use the well-known active power factor correction (APFC) circuit. This approach has certain tradeoffs, including adding ballast complexity, more components, higher costs, potential reduced reliability, and possibly increased power consumption. In addition, ballasts with APFCs typically use relatively large bus capacitors with the disadvantages noted above.

  Another approach to reducing ballast input current total harmonic distortion has been to use a valley fill circuit between the rectifier and the inverter. One drawback of the conventional prior art valley filling circuit is that it may have a larger bus ripple, which can result in even higher lamp current crest factor and shorten lamp life.

  Traditional approaches to providing electronic ballasts with improved power factor and THD are T.-F.Wu, Y.-J.Wu, C.-H.Chang, and ZRLiu's “Ripple-Free, Single-Stage Electronic Ballasts with Dither-Booster Power Factor Corrector, IEEE Industry Applications Society Annual Meeting, pages 2372-77, 1977, Y.-S.Youn, G.Chae, and G.-H.Cho's `` A Unity Power Factor Electronic Ballast for Fluorescent Lamp having Improved Valley Fill and Valley Boost Converter '', IEEE PESC97 Record, pp. 53-59, 1997, G. Chae, Y.-S.Youn, and G.-H.Cho High Power Factor Correction Circuit using Valley Charge-Pumping for Low Cost Electronic Ballasts ”, IEEE 0-7803-4489-8 / 98, 2003-8 pages, 1998.

  Previous patents showing attempts to provide electronic ballasts with improved power factor and total harmonic distortion include U.S. Pat.No. 5,387,847, `` Passive Power Factor Ballast Circuit for the Gas Discharge Lamps '', February 1995. Issued to Wood on the 7th, U.S. Patent No. 5,399,944, `` Ballast Circuit for Driving Gas Discharge '', issued to Konopka et al. On March 21, 1995, U.S. Patent No. 5,517,086, `` Modified Valley Fill High Power Factor Correction "Ballast", issued to El-Hamamsy et al. On May 14, 1996, US Patent No. 5,994,847, "Electronic Ballast with Lamp Current Valley-fill Power Factor Correction", issued November 30, 1999.

Another reference is “Fluorescent Ballast Design Using Passive PFC and Crest Factor Control” by Peter M. Wood, 1998. This reference shows a type of ballast that uses a line frequency filter having a large impedance at the line frequency and for the first 30 harmonics of the line frequency.
Simultaneous continuation application No. 09 / 887,848 No. 10 / 006,036 U.S. Pat.No. 5,387,847 U.S. Pat.No. 5,399,944 U.S. Pat.No. 5,517,086 U.S. Patent No. 5,994,847 U.S. Pat.No. 5,041,763 U.S. Pat.No. 5,387,847 T.-F.Wu, Y.-J.Wu, C.-H.Chang, and ZRLiu `` Ripple-Free, Single-Stage Electronic Ballasts with Dither-Booster Power Factor Corrector '', IEEE Industry Applications Society Annual Meeting, 2372-77, 1977 Y.-S.Youn, G.Chae, and G.-H.Cho `` A Unity Power Factor Electronic Ballast for Fluorescent Lamp having Improved Valley Fill and Valley Boost Converter '', IEEE PESC97 Record, pp. 53-59, 1997 G.Chae, Y.-S.Youn, and G.-H.Cho `` High Power Factor Correction Circuit using Valley Charge-Pumping for Low Cost Electronic Ballasts '', IEEE 0-7803-4489-8 / 98, 2003- 8 pages, 1998 `` Fluorescent Ballast Design Using Passive PFC and Crest Factor Control '' by Peter M. Wood, 1998

  According to the first feature of the present invention, a novel electronic ballast for driving a gas discharge lamp includes a rectifier circuit that converts an AC line input voltage into a rectified voltage, and an energy storage device that is charged via a switching impedance. A valley filling circuit, wherein the energy of this device is used to fill a valley between successive rectified voltage peaks to generate a valley filling voltage, and the valley filling voltage is converted to a high frequency AC voltage. And an inverter circuit having a controllable conductive device directly connected for conversion. The energy storage device can be a capacitor or any other energy storage component or combination of components. Charging the energy storage device means that the energy stored in the energy storage device increases. A controllable conductive device is a device whose conductivity can be controlled by an external signal. These controllable conductive devices include metal oxide semiconductor field effect transistors (MOSFETs), insulated gate bipolar transistors (IGBT), bipolar junction transistors (BJT), triacs, SCRs, repeaters, switches, vacuum tubes, and other switching Devices such as devices are included. A high frequency AC voltage is applied to the resonant tank circuit to cause a current to flow through the gas charging lamp. In order to deliver the desired lamp current to the gas charging lamp and reduce the total harmonic distortion of the ballast input current, a control circuit is provided that controls the conduction in the controllable conductive device in a novel manner. The described electronic ballast of the present invention can drive more than one gas charging lamp.

  In a preferred embodiment of the ballast, the energy storage device of the valley fill circuit includes a capacitor commonly referred to as a valley fill capacitor. The capacitor stores energy during the first charging portion of each half cycle of the AC line voltage and delivers energy to the inverter circuit, which in turn is in the second discharging portion of each half cycle of the AC line voltage. In addition, a lamp current is caused to flow through the gas discharge lamp. The switching impedance of the valley filling circuit includes a resistor in series with the controllable conductive device, through which the valley filling capacitor is charged.

  In an alternative embodiment, the energy storage device of the valley fill circuit includes a valley fill capacitor and the switching impedance includes an inductor in series with a controllable conductive device connected together in a buck converter circuit configuration. The valley fill capacitor stores energy during the first charging portion of each half cycle of the AC line voltage and delivers energy to the inverter circuit during the second discharging portion of each half cycle of the AC line voltage. The buck circuit inductor stores energy in response to the conduction of the controllable conductive circuit during the charging period of the valley filling capacitor and stores the energy in response to the non-conduction of the controllable conductive device during the charging period of the valley filling capacitor. Transfer to valley fill capacitor.

  In an alternative embodiment, the buck circuit inductor comprises a tap connected to the bus voltage via a rectifier diode to provide various discharge and charge times to the valley fill capacitor.

  According to the second feature of the present invention, the novel electronic ballast that drives the gas discharge lamp includes a rectifier circuit that converts an AC line input voltage into a full-wave rectified voltage, and a valley filling voltage. A valley filling circuit that fills valleys between successive rectified voltage peaks, an inverter circuit having a series connection switching device (controllable conductive device) for converting the valley filling voltage into a high-frequency AC voltage, and a high-frequency AC voltage released from the gas A resonant tank for coupling to the lamp, a control circuit for controlling the conduction of the controllable conductive device to deliver the desired current to the gas discharge lamp, and so that the total harmonic distortion of the ballast input current is reduced. Means for extracting the input current near the zero crossing of the AC line input voltage.

  In a preferred embodiment of the ballast, the means for drawing current near the zero crossing is a cat ear circuit. The cat ear circuit is preferably a cat ear power supply that can also supply the power necessary to operate the control circuit or other housekeeping and auxiliary circuits. The cat ear circuit draws current from the AC line near the zero crossing of the AC line voltage at the leading edge of each half cycle or the trailing edge of each half cycle. The name of the cat ear circuit is derived from the characteristic waveform of the input current waveform. This current “fills in” or supplements the current waveform taken by the ballast from the AC line near the zero voltage crossing. The cat ear circuit may comprise a circuit that “cuts in” or “cuts out” the cat ear circuit in response to a fixed input voltage level. Alternatively, the cat ear circuit can comprise a circuit that monitors the current drawn by the ballast back end and causes the cat ear circuit to draw input current only when the back end is not drawing large current. .

  The foregoing summary, as well as the following detailed description of the preferred embodiments, is better understood when read in conjunction with the appended drawings. For the purpose of illustrating the invention, there are shown in the drawings drawings and embodiments that are presently preferred. Like reference numerals refer to like parts throughout the several views. However, it should be understood that the invention is not limited to the specific methods and instrumentalities disclosed.

Ballast Overview Referring first to FIG. 2, a simplified block diagram of an electronic ballast 810 constructed in accordance with the present invention is shown. The ballast 810 includes a rectifier circuit 820 that can be connected to an AC power source having a given line frequency. Usually, a given line frequency of an AC power source is 50Hz or 60Hz. However, the present invention is not limited to these specific frequencies. Whenever a device is connected, coupled, connected in a current relationship, or connectable to another device, the device can be directly connected by a wire, or alternatively, a resistor, It means that it can be connected via other devices such as, but not limited to, diodes, controllable conductive devices, and this connection can be in series or parallel configuration. The rectifier circuit 820 converts the AC input voltage into a full-wave rectified voltage. In one embodiment of the invention, rectifier circuit 820 is connected via diode 840 to the novel valley fill circuit 830 described. A high frequency bypass filter capacitor 850 is connected to both ends of the input terminal of the valley filling circuit 830. The valley filling circuit 830 selectively charges and discharges the described energy storage device so as to create a valley filling voltage. The output terminal of the valley filling circuit 830 is connected to the input terminal of the inverter circuit 860. The inverter circuit 860 converts the rectified DC voltage into a high frequency AC voltage. The output terminal of the inverter circuit 860 is connected to the output circuit 870, which typically includes a resonant tank and can also include a coupling transformer. Output circuit 870 filters the output of inverter circuit 860 to provide an essentially sinusoidal high frequency voltage, as well as providing voltage gain and increased output impedance. The output circuit 870 can be connected to drive a load 880 such as a gas discharge lamp which is a fluorescent lamp. An output current sensing circuit 890 coupled to load 880 provides load current feedback to control circuit 882. The control circuit 882 generates a control signal that controls the operation of the valley filling circuit 830 and the inverter circuit 860 so as to provide a desired load current to the load 880. A cat ear circuit 884 is connected across the output terminals of the rectifier circuit 820 and provides the power necessary for proper operation of the control circuit 882.

Valley Fill Circuit Referring now to FIG. 3, a schematic circuit diagram of a first embodiment 910 of the valley fill circuit 830 of FIG. 2 is shown in the form of a buck converter circuit. At both ends of the first input terminal 912 and the second input terminal 914, an energy storage device 916 is connected in series with the first diode 918 in the form of a capacitor. The function of the buck converter circuit 910 is to provide a controlled charging current to the capacitor 916. This capacitor 916 is also called a valley filling capacitor. An inductor 920 is connected to the junction of the capacitor 916 and the cathode of the first diode 918, which is in series with a second (optional) diode 922 and a controllable conductive device switch 924 in a common circuit. Connected. Controllable conductive device 924 is shown as a metal oxide semiconductor field effect transistor (MOSFET), but may be a bipolar junction transistor (BJT), an insulated gate bipolar transistor (IGBT), or other controllable conductive device. Is possible. The buck converter circuit 910 also includes a third rectifier diode 926, which can also be a properly controlled synchronous rectifier or MOSFET, and the junction of the buck inductor 920 and the second diode 922, , And one terminal of the capacitor 916 connected to the input 912. The first output terminal 928 is connected to the input terminal 912, the capacitor 916, and the cathode of the rectifier diode 926. The second output terminal 930 is connected to the second input terminal 914, the common circuit, the anode of the diode 918, and the switch 924.

  The operation of the buck converter circuit 910 is described with respect to FIGS. 3, 4, 5, and 6. The buck converter circuit 910 operates under two different conditions. Under condition I (interval I in FIG. 4), the instantaneous rectified line voltage 1010 applied to the input terminals 912, 914 of the buck converter circuit 910 is equal to or less than the voltage 1012 across the capacitor 916, and therefore Capacitor 916 discharges some of its stored energy to the inverter circuit. Under this condition, diode 840 (FIG. 2) is reverse biased and diode 918 is forward biased to conduct. Thereby, a discharge path of the capacitor 916 is established from the common circuit terminal 930 to the buck converter output terminal 928 through the diode 918 and the capacitor 916. The switch 924 is alternately opened and closed at a frequency that is well above the frequency of the rectified line voltage, typically about 30 kHz or above. When switch 924 is conducting, the remaining energy still in buck inductor 920 from the previous charge cycle is discharged through diode 922 and switch 924 to the common circuit. Thereafter, diodes 922 and 926 are reverse biased so that no further current flows through buck inductor 920.

  Under the condition II (interval II in FIG. 4), the instantaneous rectification line voltage is larger than the voltage across the capacitor 916, and the capacitor 916 increases the stored energy. During interval II, the operation of the buck converter depends on the conductive state of switch 924.

  When switch 924 is conducting, buck converter circuit 910 is in the simplified form of FIG. 5 and the voltage across buck inductor 920 is the instantaneous rectified line voltage minus the voltage across capacitor 916. be equivalent to. Accordingly, capacitor 916 is charged by the current flowing from input 912 through capacitor 916, back inductor 920, and switch 924 to the common circuit. Further, energy is stored in the buck inductor 920 by the voltage applied to the buck inductor 920 when the switch 924 is conducting. When the switch 924 is not conducting (as shown in FIG. 6), the current 1210 flowing through the buck inductor 920 is rectified through the diode 926 and flows into the capacitor 916, and thus the energy stored in the buck inductor 920. Some or all of this is transferred to capacitor 916. Note that under Condition II, capacitor 916 is charged both when switch 924 is conducting and when switch 924 is not conducting.

  As a result of the operation of the buck converter circuit 910, the capacitor 916 is charged over a time period 1310 during which the ballast is operating at full light output, as shown in FIG. The charging of the valley filling capacitor 916 is preferably performed over 90 degrees of each line half cycle.

  It has been found that the resulting ballast input current total harmonic distortion is reduced when the valley fill capacitor is charged beyond 90 degrees of each 180 degree line frequency half cycle.

  Another advantage of the buck converter circuit 910 is that the inrush current into the capacitor 916 at the start of each charging cycle is limited by the buck inductor 920. This can also be seen in FIG. 7, where the peak line current 1312 is greatly reduced compared to the peak line current 1314 of a conventional prior art ballast without an active power factor correction (APFC) or valley fill circuit. Has been. The inrush current limitation is even more pronounced when the ballast is initially turned on. Thus, when power is first applied to a normal active power factor correction ballast, the energy storage capacitor is charged until the voltage on the capacitor rises to the peak voltage of the AC line voltage. During this charging period, the input current is essentially limited only by the wire resistance and the impedance of the AC power source supplying the ballast. The ballast buck converter circuit 910 of the present invention is inherently limited in current, thereby overcoming other significant drawbacks of APFC type ballasts.

  Another advantage of buck converter circuit 910 is that it provides overvoltage protection for capacitor 916. That is, the capacitor 916 will not be charged beyond the peak rectified line voltage under no load conditions, such as when no lamp is connected. This is what conventional boost and buck-boost converters have to add extra circuitry to prevent charging the energy storage capacitors to potentially tremendously high voltages in unloaded conditions In contrast.

  As shown in FIG. 8, the charging time of the capacitor 916 decreases when the lamp is dimmed to about 10 percent light output. At the same time, the bus ripple voltage is also reduced and the current crest factor of the lamp current becomes lower.

  Referring now to FIG. 9, a second embodiment of a buck converter circuit 1410 having an inverter circuit 860 is shown. Inverter circuit 860, described in more detail below, includes a high side switch 2112 and a low side switch 924. Both high side switch 2112 and low side switch 924 are controllable conductive devices such as MOSFETs or IGBTs. In this embodiment, buck converter circuit 1410 and inverter circuit 860 share controllable conductive device 924. The second embodiment of the buck converter circuit 1410 otherwise operates in essentially the same manner as the first embodiment of the buck converter circuit 910.

  Referring now to FIG. 10, a third embodiment of a buck converter circuit 1510 in which the buck inductor 920 is replaced with a tapped inductor 1520 is shown. The anode of rectifier diode 926 is coupled to the internal coil of tapped inductor 1520 at the tap rather than the junction between tapped inductor 1520 and diode 922. The placement of the inductor tap provides the ability to change the discharge time of the inductor 1520. The continuous mode operation of the buck converter can be reduced or eliminated altogether. However, this extra flexibility is accompanied by an extra voltage stress tradeoff for switch 924. Thus, when tapped inductor 1520 is transferring energy to capacitor 916, tapped inductor 1520 has a voltage applied across switch 924 multiplied by the turns ratio of tapped inductor 1520 across capacitor 916. Acts to equal the voltage. A snubber circuit including a snubber diode 1552 in series with a parallel combination of snubber resistor 1554 and snubber capacitor 1556 causes the junction of tapped back inductor 1520 and diode 922 to dissipate uncoupled residual energy in the tapped back inductor. And the common circuit.

  In one embodiment of the tapped back inductor circuit of FIG. 10, capacitor 916 is a parallel combination of two 47 microfarad, 250 volt capacitors, diodes 918 and 926 are MUR160 diodes, and diodes 922 and 1552 are , 1000 volt 1 amp diode, resistor 1554 is a series combination of two 91 kilohm and 1 watt resistors, capacitor 1556 is a capacitor to microfarad 630 volts at .0047, switch 924 is 250 This is a IRFI634G MOSFET with a bolt. The tapped back inductor 1520 has about 180 total turns from the cathode of the diode 918 to the anode of the diode 922 and has an inductance of about 1.427 millihenries, and the number of turns from the cathode of the diode 918 to the tap is about 75. , Having about 244 microhenry inductance, about 105 turns from the tap to the anode of diode 922, and having about 492 microhenry inductance.

  In each of the previously described embodiments of valley filling circuit 830 (FIG. 2), the charging current of capacitor 916 increases as the conduction time of controllable conductive switch 924 increases. When the lamp is dimmed to a low light level, the switch 924 conducts for a longer time, increasing the charge accumulation in the capacitor 916, thereby increasing the bus voltage. Having a higher voltage at low light levels is advantageous because the lamp voltage increases at low light levels, allowing higher bus voltages to drive the lamp through a higher impedance. Because it becomes. Higher output impedance improves lamp stability. This is discussed in US Pat. No. 5,041,763 issued to Sullivan et al. On August 20, 1991 and assigned to Lutron Electronics Co., Inc.

  The charging current also increases when the potential difference between the rectified line voltage and the voltage across the capacitor 916 increases. As a result, the instantaneous charging current of the tapped back inductor is highest in the middle of the line half cycle and decreases towards the periphery of the line half cycle, which reduces the total harmonic distortion of the ballast input current. .

  Referring now to FIG. 11, another embodiment 1570 of valley fill circuit is shown. In this embodiment, valley fill circuit 1570 includes capacitor 916, diode 922, switch 924, diode 1572 coupled between capacitor 916 and terminal 912, diode 1574, and “flyback”. "Transformer 1576" is included. The “primary” winding of transformer 1576 is connected between the anode of diode 922 and terminal 928 of valley fill circuit 1570. The “secondary” winding of transformer 1576 is connected between the common circuit and the anode of diode 1574, and the cathode of diode 1574 is connected to the junction of capacitor 916 and the anode of diode 1572.

  When the rectified line voltage applied to terminals 912, 914 in FIG. 11 exceeds the voltage across capacitor 916, the voltage applied across the “secondary” winding of flyback transformer 1576 causes diode 1574 to Then, the capacitor 916 is recharged. When the rectified line voltage is lower than the voltage across the capacitor, capacitor 916 discharges through output terminals 928 and 930.

  Referring now to FIG. 12, there is shown a fourth embodiment 1610 of a valley filling circuit that uses only a capacitive energy storage device. In this embodiment, the valley filling circuit 1610 includes a first energy storage device 1632 connected in series with a first diode 1634 across a first input terminal 912 and a second input terminal 914 to the circuit 1610. A second energy storage capacitor 1616 is connected in series with the second diode 1636, the cathode of which is coupled to the input 912. Third diode 1638 is connected between the junction of capacitor 1632 and diode 1634 and the junction of capacitor 1616 and diode 1636. The other terminal of the energy storage capacitor 1616 is connected to the second input terminal 1914 by a fourth diode 1618 in parallel with the resistor 1620.

  When the rectified line voltage applied to terminals 912, 914 exceeds the sum of the voltage across capacitor 1632 and the voltage across 1616 due to the forward voltage drop across diode 1638, diodes 1634, 1636, and 1618 Is reverse biased, diode 1638 is forward biased, and energy storage capacitors 1632 and 1616 are charged through a series path of capacitor 1632, diode 1638, capacitor 1616, and resistor 1620. Resistor 1620 limits the charging current to energy storage capacitors 1632 and 1616 to reduce current spikes of current drawn by the ballast from the line, thereby reducing ballast input current total harmonic distortion. Capacitors 1632 and 1616 typically have the same value and are charged to about one-half peak input voltage.

  When the rectified line voltage applied to terminals 912, 914 falls below the sum of the voltage across capacitor 1632 and the voltage across 1616, diode 1638 is reverse biased. After the voltage across input terminals 912, 914 drops more than the turn-on voltage of diode 1634 than the voltage across capacitor 1632, capacitor 1632 discharges through diode 1634 and output terminals 928 and 930. After the voltage across input terminals 912 and 914 drops more than the turn-on voltage of diode 1636 than the voltage across capacitor 1616, capacitor 1616 discharges through diode 1636, resistor 1620, and output terminals 928 and 930. . When the voltage drop across resistor 1620 exceeds the turn-on voltage of diode 1618, capacitor 1616 discharges through diodes 1636, 1618 and output terminals 928, 930.

  In summary, the capacitors 1632 and 1616 are charged in series and discharged in parallel to deliver stored energy to the inverter circuit that drives the gas discharge lamp. The amount of ripple in the bus voltage is thereby reduced and the current crest factor of the lamp current delivered by the ballast is improved.

  The valley filling circuit of FIG. 12 is very different from the Wood valley filling circuit of US Pat. No. 5,387,847. Most notably, Wood shows in FIG. 2 of his patent a resistance in series with a diode connected between two capacitors. In contrast, the valley fill circuit of FIG. 12 provides a resistor 1620 in parallel with a diode 1618 that is connected in pairs between the capacitor 1616 and the common circuit. This novel configuration provides the desired improvement in ballast input current total harmonic distortion, but is done in a manner that is more readily useful with additional improvements.

  To further improve ballast input current total harmonic distortion, the valley fill circuit 1610 of FIG. 12 can be modified by placing a controllable conductive device 924 in series with a resistor 1620 as shown in FIG. Is possible. This creates a switching resistor circuit. The controllable conductive device 924 typically operates at high frequencies, that is, at frequencies that are several times greater than the fundamental frequency of the AC line voltage. Ballast input current total harmonic distortion can be improved by controlling the conduction of switch 924 such that the conduction time of switch 924 is increased in the middle or near the peak of each line half cycle. This provides a ballast input current waveform that more closely matches the AC line voltage waveform.

  The valley filling circuit of FIG. 13 can be integrated with the ballast inverter circuit shown in FIG. 14, where the controllable conductive device 924 is shared by the valley filling circuit 1810 and the inverter circuit 2110. Alternatively, the switch 924 of the valley fill circuit 1710 of FIG. 13 can be an independently controlled controllable conductive device separate from each of the switches of the inverter circuit 860.

  The resistance loss in valley filling circuit 1710 of FIG. 13 can be reduced by replacing resistor 1620 with an inductor 1920 in series with switch 924, as shown in FIG. In an alternative configuration, the combination of inductor 1920 and switch 924 can be replaced by a single inductor. However, the high-frequency switching action of the switch 924 makes it possible to use a relatively small and inexpensive inductor 1920.

  As an alternative to the switch 924, a secondary winding 2024 from a high frequency transformer can be substituted as shown in FIG. A high frequency transformer is usually present in the ballast. By adding a secondary winding of the appropriate number of turns (preferably to an existing transformer), a voltage of alternating polarity is introduced in series with the inductor 1920 to obstruct and assist current flow through the inductor 1920. Can be performed alternately. Thereby, the winding 2024 effectively functions as a switch.

Inverter circuit As can be seen from FIGS. 17 and 18, the output of the capacitor 916 and the buck converter 1510 provides a high frequency inverter that provides a high frequency voltage to the resonant tank circuit 2220 of FIG. 18 to cause the lamp current to flow through the gas discharge lamp. A circuit 2110 is connected. Inverter circuit 2110 includes a first controllable conductive device 2112 and a second controllable conductive device 924 connected in series. The bus voltage is greater than the rectified line voltage or the voltage across capacitor 916. When the rectified line voltage is greater than the voltage on capacitor 916, inverter circuit 2110 draws current directly from the AC line. When the rectified line voltage is less than the voltage across capacitor 916, inverter circuit 2110 draws current from capacitor 916.

  When the inverter circuit draws current directly from the AC line over 90 ° of each 180 ° line frequency half cycle near the time of the AC line peak, the resulting THD of the ballast input current is less than 33.3% It turned out to be.

  The operation of inverter circuit 2110 will now be described in connection with FIG. The inverter circuit 2110 uses a fixed frequency D (1-D) complementary duty cycle switching operation mode. This means that only one and only one of the switching devices 2112, 924 are always conducting. In this discussion, the duty cycle D refers to the conduction time of the first switch 2112 and the complementary duty cycle (1-D) refers to the conduction time of the second switch 924. Considering that one of the devices 2112, 924 is always conducting, the sum of the conduction times labeled D and (1-D) for each respective device is the period of the switching frequency. In actual electronic circuits, there is usually a time commonly referred to as dead time when both devices 2112 and 924 are not conducting. This dead time is usually very short compared to the conduction time of the devices 2112, 924. The purpose of this dead time is to ensure that both devices 2112 and 924 do not conduct at the same time. However, this dead time can be increased and used as an additional control parameter for the inverter circuit. When switch 2112 (shown as SW1 in FIG. 19) is conducting, the output of inverter circuit 2110 is connected to buck converter circuit output terminal 928, which is a valley fill voltage. When the switching device 924 (shown as SW2 in FIG. 19) is conducting, the output of the inverter circuit 2110 is connected to the buck converter circuit output terminal 930, which is a common circuit. For a given instantaneous valley fill voltage, the maximum lamp current that can be delivered to the gas discharge lamp for that instantaneous valley fill voltage is achieved when the conduction times of the two switching devices 2112, 924 are equal. In this electronic ballast, the lamp current depends on both the instantaneous valley filling voltage and the conduction time of the switching devices 2112, 924. The conduction time of the switching devices 2112 and 924 is controlled by the control circuit 882 shown in FIG. 17 in response to the current flowing through the gas discharge lamps 2210 and 2212 shown in FIG. The operation of the control circuit is described in detail below.

  Conventional control algorithms used to control electronic ballast inverters typically adjust the conduction time of the controllable conductive device to maintain the rms lamp current at a constant value. The conventional control loop is correspondingly slow so as to maintain the conduction time of the controllable conductive device approximately constant over the course of the line frequency half cycle. This algorithm, when applied to a valley fill type ballast, results in a high current crest factor for the lamp current due to modulation of the valley fill voltage.

  The control circuit of the presently preferred embodiment adjusts the conduction time of the controllable conductive device. The conduction time of switch 2112 is reduced to provide a relatively narrow pulse, and the conduction time of switch 924 is increased to provide a relatively wide pulse. Thereby, the peak of the envelope of the high frequency lamp current is reduced in the vicinity of the peak of the line frequency half cycle. Hereinafter, this is called “hump down” of the lamp current (FIG. 19).

  By reducing the lamp current near the peak of the line frequency half cycle, the current drawn by the inverter circuit is reduced. This effect itself reduces ballast input current and increases ballast input current total harmonic distortion. However, in the ballast of the present invention, the decrease in lamp current is associated with an increase in switch 924 conduction time. This increase in conduction current increases the charging current of the valley fill capacitor. This increase in valley fill current increases the total current drawn by the ballast near the peak of the line frequency half cycle. Increasing ballast current near the peak of the line frequency half cycle has the beneficial effect of reducing ballast input current total harmonic distortion. This improvement offsets the effects of increased THD caused by reducing peak lamp current. The increase in the ballast input current near the peak of the line frequency half cycle due to the increase in the current drawn by the valley fill circuit is hereinafter referred to as “hump-up” of the ballast input current. See FIG.

  Although we have described reducing the conduction time of switch 2112 to produce a relatively narrow pulse and increasing the conduction time of switch 924 to produce a relatively wide pulse, those skilled in the art will recognize the ballast input current. The switch 2112 conduction time and the switch 924 with the appropriate circuit configuration of the valley fill circuit can be reversed to achieve the same hump up and lamp current hump down.

Resonant Tank Circuit Referring again to FIGS. 17 and 18, the output of the inverter circuit 2110 is connected to a resonant tank circuit 2220 that includes an inductor 2222 and a capacitor 2224 (FIG. 18). The resonant tank circuit 2220 filters the output voltage of the inverter circuit 2110 so as to supply an essentially sinusoidal current to the gas discharge lamps 2210, 2212. In addition, resonant tank circuit 2220 provides voltage gain and increased output impedance. The output of the resonant tank circuit 2220 is coupled to the electrodes of the gas discharge lamps 2210, 2212 by a transformer 2230. DC blocking capacitor 2232 prevents DC current from flowing through the primary winding of transformer 2230.

Current Sensing Circuit Referring to FIG. 18, the ballast also includes a current sensing circuit 2240 comprising a first diode 2242 and a second diode 2244, and a resistor 2246 coupled in series with the lamps 2210, 2212. Current sensing circuit 2240 generates a half-wave rectified voltage across resistor 2246, which is proportional to the lamp current and represents a measure of the actual light output of the gas discharge lamp. The half-wave rectified voltage is applied as an input to the control circuit 882 in FIG. In an alternative embodiment, current sensing can be implemented in a well-known manner by using a current transformer or alternatively a full wave connected diode. For non-dimming ballasts and ballasts that only require moderate performance, the current sensing circuit can be omitted.

Control Circuit The control circuit 882 of FIG. 17 will be described in more detail with reference to FIGS. 20, 21, and 22. The first embodiment of the control circuit 882 generates signals that control the conduction of the switching devices 2112 and 924 (FIGS. 20 and 22). The control circuit 882 receives as input the half-wave rectified voltage from the current sensing circuit 2240 and generates a DC voltage that represents the actual light output from the lamp. This DC voltage representing the light output is compared with the desired light level to adjust the duty cycle of the switching device 2112, 924 to minimize the difference between the voltage representing the light output voltage and the reference voltage. The In a dimming electronic ballast, the reference voltage can be provided by an external input such as a 0-10 volt control signal. Alternatively, the reference voltage can be generated by detecting a phase angle control signal applied to the ballast by the AC line voltage when the ballast is supplied with two-wire dimming control. In a preferred embodiment of the ballast, the reference voltage is a phase angle control signal applied to the ballast via an additional input to the ballast, as shown in FIGS. Generated from

  The control circuit includes a feedback circuit 2440 (FIG. 20) connected to receive inputs from the current sensing circuit 2240 and the control input circuit 2460 and provides a conductive signal to the control terminals of the controllable conductive devices 2112, 924. . The control circuit may optionally include a wave shaping circuit 2480 to provide additional input to the feedback circuit 2440, as will be described in detail below.

  As can be seen from FIG. 22, the feedback circuit 2440 is connected to receive an input signal representing the lamp output from the current sensing circuit 2240 at the inverting terminal 2444 and to receive a desired light level reference signal at the non-inverting terminal 2446. Differential amplifier 2442. The differential amplifier 2442 generates an error signal representing the difference between the actual light output and the desired light output. The error signal is provided to a pulse width modulation (PWM) circuit 2448, which generates a drive signal that is applied to the gates of inverter circuit switches 2112, 924. The PWM circuit 2448 is well known in the art and therefore will not be described in detail here.

  Wave shaping circuit 2480 provides an AC reference voltage signal summed with an essentially DC reference voltage signal from control input circuit 2460. The shape of the AC reference voltage signal can take various waveforms, but it is possible to design a particularly effective but simple circuit that utilizes waveforms already present in the ballast. The wave shaping circuit 2480 shown in detail in FIG. 22 includes a voltage divider including a resistor 2482. This resistor is connected in series with an automatic gain control (AGC) circuit 2690 that provides a scaled version of the valley fill voltage from the buck converter circuit 1510. Details of the AGC 2690 are shown in FIG. 23 and discussed below. If it is not necessary to adjust the gain of the wave shaping circuit 2480, such as in a non-dimming ballast, the AGC 2690 can optionally be replaced by a passive impedance such as a resistor.

  The scaled voltage signal from the voltage divider is clipped by a diode 2486 having an anode connected to the output of the voltage divider and a cathode connected to the DC reference voltage VREF. The clipped signal then passes through DC blocking capacitor 2488 and is summed with the DC reference voltage from control input circuit 2460.

  The control circuit also includes a lower end clamp 2680 connected between the common input point of the control input, wave shaping, and feedback circuit and the common circuit. The lower end clamp 2680 prevents the reference voltage from becoming so low that the current flowing through the lamp cannot be maintained.

  The addition of an AC reference signal reduces the combined reference voltage when the valley fill voltage is lower, such as near the zero crossing of the input line voltage, and reduces the combined reference voltage, such as when the input line voltage is approaching the instantaneous peak value. As the voltage increases, it has the effect of increasing the combined reference voltage. Similarly, the lamp current supplied to the lamp by inverter circuit 2110 decreases when the valley fill voltage is lower and increases when the valley fill voltage increases. Therefore, the addition of an AC reference signal that tracks or follows the valley fill voltage has the effect of shaping the current drawn by the lamp to a waveform similar to the waveform of the valley fill voltage. As a result, the ballast input current has a lower shape near the valley and a higher shape near the peak of the AC line voltage, thereby improving ballast input current total harmonic distortion. However, this improvement in ballast input current total harmonic distortion is at the cost of higher lamp current crest factor.

  An additional feature of the wave shaping circuit 2480 is a diode 2486 for clipping the peak of the AC reference signal. During the time that the AC reference voltage signal is clipped, the combined reference voltage is constant while the valley fill voltage reaches a peak. The overall response of the control circuit is designed to be “quick”, so the control circuit reduces the conduction time of switch 2112 and increases the conduction time of switch 924 to produce more constant high frequency voltage. It responds quickly while the bus voltage is at its peak to deliver to the resonant tank and thus deliver a constant lamp current to the lamp. The net effect is to reduce the peak of the lamp current envelope and thus reduce the current crest factor of the lamp current. This is shown in FIG. 19 as lamp current humpdown. At the same time, the increase in conduction time of the switch 924 increases the charging current drawn by the capacitor 916, as shown in FIG. This increases the ballast input current compared to when the charging current of the capacitor 916 is not increased, thus boosting the ballast input current. This effect reduces ballast input current total harmonic distortion. The electronic dimming ballast constructed with the described wave shaping circuit achieved stable operation with ballast input current total harmonic distortion less than 20% and lamp current crest factor less than 1.7. .

  The AGC circuit 2690 shown in FIG. 22 changes the output of the wave shaping circuit 2480 when the ballast is required to reduce the lamp current and thereby dimm the lamp. The AGC circuit 2690 of FIG. 23 includes a first transistor 2691 and a second transistor 2692, resistors 2693, 2494, and 2695, and a diode 2696. The conduction of the first transistor 2691 is controlled by the output of the control input 2460 (FIG. 22). When the input voltage decreases, this represents a dimming condition, the conductivity of the first transistor 2691 increases, the voltage at the base of the second transistor 2692 decreases, thereby reducing the conductivity of the second transistor 2692, The impedance of the AGC circuit 2690 presented to the wave shaping circuit 2480 is effectively increased. Increasing the impedance of the AGC circuit 2690 increases the voltage at the junction of the AGC circuit 2690 and the resistor 2482 and more signals are clipped by the diode 2480. As the voltage increases and becomes more and more clipped, the AC portion of this voltage decreases, thereby reducing the effectiveness of the wave shaping circuit.

  A second embodiment of the feedback circuit 2440 of FIG. 20 is shown in FIG. 24, which includes a microprocessor 26102. The microprocessor receives input representing the desired light level and lamp current and generates an output signal for driving the control terminal of the controllable conductive device of the inverter circuit. One such microprocessor suitable for this use is manufactured by Motorola Corporation under the MC68HC08 model number. For simplicity, the analog and digital analog circuitry required to interface the microprocessor 26102 with the ballast analog circuitry is considered within the ordinary skill in the art and is not shown here.

  A third embodiment of the feedback circuit 2440 of FIG. 20 is shown in FIG. 25 and includes a gate driver circuit 26104. FIG. In addition to the microprocessor 26102, the gate driver circuit 26104 includes a gate driver circuit 26104 that receives a single gate drive signal from the microprocessor 26102 and generates a signal that can control the operation of the inverter circuit switch. One such gate driver circuit suitable for this use is manufactured by International Rectifier with part number IR2111. Of course, other suitable microprocessors (Microchip Technology Inc., PIC 16C54A, Chandler, Arizona) and gate drivers can be substituted for the specific embodiments described herein. In addition, an application specific integrated circuit (ASIC) (not shown) or a digital signal processor (DSP) (not shown) can be substituted to provide the same functionality as the microprocessor disclosed herein. is there.

  The high level flowchart illustrating the operation of the feedback control circuit embodiment of FIGS. 24 and 25 shown in FIG. 26 includes a step of measuring the lamp current IL (step 26110) and a dimming signal VDIM representing the desired light level. Step (step 26120). The measured lamp current IL is compared with the measured dimming signal VDIM (step 26130), and if IL is less than VDIM, the conduction time of the controllable conductive device of the inverter circuit is made more equal (step 26140). If IL is greater than VDIM determined in step 26150, the conduction time of the controllable conduction time of the inverter circuit is made less equal (step 26160). If IL is equal to VDIM, the conduction time of the controllable conductive device of the inverter circuit is not changed and the process is repeated.

Cat ear circuit
Cat-ear circuits have been used for many years to provide power to two-wire control circuits, incandescent triac-based dimmers, and fan motors. A conventional prior art cat-ear circuit is shown in FIG. Standard electronic dimming devices for lighting loads are well known, and circuits using earcat power supply circuits are also well known. In such applications, the dimmer is placed between the AC line and the load, receives a sine wave voltage from the AC line as input, and provides a “truncated” form of the sine wave input voltage as output. In the truncated form, when the triac is conducting, the leading edge of the input voltage waveform is blocked by the non-conductive triac and only the tail portion of the input voltage waveform is passed to the load by the triac. The triac is turned on at a predetermined time and conducts until the next zero crossing of the input voltage waveform. With respect to the zero crossing of the AC line voltage, it is possible to control the amount of power delivered to the load by changing the time to triac conduction.

  The prior art cat-ear circuit of the 2-wire dimmer draws power from the AC line during part of the input voltage waveform when the triac is not conducting. That is, the prior art cat-ear circuit extracts current from the line through the load during times when a large load current is not normally flowing. However, so far, the cat ear circuit has only been used to derive an auxiliary power source that operates a control circuit in the electronic device. It has not been used to intentionally shape the input current drawn from the wire by the electronic device. Specifically, the cat ear circuit has not been used in electronic ballasts to assist in shaping the input current, nor has it been used as an auxiliary power source in electronic ballasts. In the ballast of the present invention, the advantage of the cat ear circuit input current shaping contributes to the reduction of ballast current total harmonic distortion.

  The ballast of the present invention includes a cat ear circuit 884 (FIG. 2) connected across the output of the rectifier circuit 820. A cat ear circuit can generally be defined as a circuit designed to draw current from a line during a selected portion of the line period. Thus, the cat ear circuit can be used in a new and unique way to shape the ballast input current waveform so as to improve the ballast input current total harmonic distortion. In fact, the cat ear circuit can be used to generate input current waveforms for various electronic devices, such as switch mode power supplies and AC line DC converters, to reduce total input current harmonic distortion.

  As shown in FIG. 28, the cat ear circuit 884 (FIG. 20) extracts current from the rectifier 820 only in the “tail portion” of the input line period, that is, in the region of the input line period near the line voltage zero crossing. The cat ear circuit 884 extracts current near the line voltage zero crossing, so that the tail of the input line current extracted from the AC line when the ballast backend is not extracting current from the AC line (Figure 19). "Fill". By filling the tail, the line current drawn by the ballast becomes more continuous, thereby reducing ballast input current total harmonic distortion as described with respect to FIG.

  As shown in FIG. 31, the cat ear circuit takes out the ballast input current in a relatively short time at the tail of each 180 degree line frequency half cycle. In one embodiment, the cat ear circuit draws ballast input current at approximately 45 degrees of each 180 degree line frequency half cycle following the zero crossing (interval I in FIG. 31). Next, the inverter circuit extracts the ballast input current at about 90 degrees of each 180 degree line frequency half cycle (interval II in FIG. 31). Finally, the cat ear circuit draws ballast input current at approximately 45 degrees of each 180 degree line frequency half cycle before the next zero crossing (interval III in FIG. 31).

  This embodiment shows a cat ear circuit that extracts ballast input current at about 45 degrees after the zero crossing and about 45 degrees before the next zero crossing. However, one skilled in the art can appreciate that the time for the cat ear circuit to take ballast input current can be varied. For example, without exceeding the desired maximum THD and without departing from the scope or spirit of the present invention, the cat ear circuit extracts ballast input current at approximately 35 degrees of each 180 degree line frequency half cycle following the zero crossing. , The inverter circuit draws the ballast input current at about 90 degrees of each 180 degree line frequency half cycle, and finally the cat ear circuit takes about 55 of each 180 degree line frequency half period before the next zero crossing. The ballast input current is taken in degrees. Also, those skilled in the art may experience some dead time when the ballast input current is not taken by the cat ear circuit or inverter circuit without exceeding the desired maximum THD and without departing from the scope or spirit of the present invention. I can understand that there is.

  In the first embodiment 2810 of the cat ear circuit 884 shown in FIG. 29, the cat ear circuit 2810 is designed with a fixed voltage cut-in point and a cut-out point. That is, the first embodiment 2810 of the cat ear circuit extracts current from the AC line only when the rectified line voltage is smaller than a fixed value. This condition occurs during a time period near the line voltage zero crossing. The cut-out voltage point and the cut-in voltage point are the same during the first interval from the time immediately after the cat ear circuit 2810 takes the line voltage zero crossing to the time the inverter circuit 2110 in FIG. The circuit 2110 is adjusted to draw current during the second interval from the time when it stops drawing current from the AC line to the next voltage zero crossing.

  When the rectified line voltage is lower than the selected voltage, the charging transistor 2812 (FIG. 29) operates to allow the energy storage capacitor 2814 to be charged, thereby charging towards the voltage VCC. The charge rate of capacitor 2814 is determined by resistor 2816 in series with the drain of MOSFET transistor 2812. This current drawn by the cat ear circuit is combined to form a virtually piecewise continuous ballast input current when combined with the current drawn by the ballast back-end circuit. Although transistor 2812 is shown as a MOSFET, it can be any suitable controllable conductive device such as, but not limited to, BJT or IGBT.

  When the rectified line voltage is equal to or greater than the predetermined voltage, the cutout transistor 2818 begins to conduct. The collector of cutout transistor 2818 pulls the cathode of Zener diode 2820 toward VCC, which effectively turns off charge transistor 2818. The predetermined cut-in and cut-out voltages are determined by a resistor divider network that includes resistors 2822 and 2824 to which the base of cut-out transistor 2818 is connected.

  It should be noted that the cat ear circuit of the present invention also provides a power supply for the ballast control circuit. This allows the ballast to draw current during a predetermined portion of each half cycle of the AC line. This portion can include periods before and after the line voltage zero crossing, or only one such period, or any other useful period in a half cycle.

  In the second embodiment 2910 of the cat ear circuit 884 shown in FIG. 30, the cat ear circuit 2910 actively monitors the current drawn from the back end of the ballast, and the back end takes out a current greater than a predetermined value. Includes a circuit that causes the cat ear circuit to draw current from the line only when not. The current monitoring circuit includes a transistor 2930, a capacitor 2932, resistors 2934 and 2936, and diodes 2938 and 2940. Ballast backend current flows through diodes 2938, 2940 and resistor 2936 when returning to input rectifier circuit 820. When the ballast back end is drawing a current greater than a predetermined value, the voltage at the emitter of transistor 2930 is negative by a voltage equal to the combined forward voltage drop of diodes 2938, 2940. Through resistor 2934, the transistor 2930 base-emitter junction is forward biased, thereby turning transistor 2930 on. Turning on transistor 2930 pulls the gate of transistor 2812 down, thereby turning transistor 2812 off. When the backend current is less than a predetermined value set by the voltage divider of resistors 2936, 2934, transistor 2930 is turned off, allowing transistor 2812 to turn on and providing a charging path for capacitor 2814. . This second embodiment slightly improves the ballast input current total harmonic distortion compared to the first embodiment.

  The particular embodiment of the described cat ear circuit shows a cat ear circuit connected to an AC power source via a rectifier circuit. Of course, it is possible to construct a cat ear circuit that is directly connected to an AC power source rather than going through a rectifier circuit. For example, the particular embodiment of the described cat ear circuit may alternatively include another rectifier for connection to an AC power source.

  In addition to providing a means to shape the input current drawn by the ballast to improve total harmonic distortion of the ballast input current, the cat ear circuit provides the following additional features. The cat-ear circuit also provides a faster start of the ballast and should not be affected by the ballast's mode of operation, just as normal conventional trickle charge and bootstrap systems are affected. Is advantageous. In effect, the cat ear circuit and the inverter circuit are separated from each other so as to allow fine tuning of each without affecting the others.

  The result of combining the improved valley fill circuit, control circuit, and cat ear circuit of the present invention can be seen in FIG. The cat ear circuit comprises means for extracting the input current near the zero crossing of the input AC line voltage waveform, whereby the ballast input current total harmonic distortion is greatly reduced. That is, the cat ear circuit fills the current waveform near the zero crossing.

  The improved valley fill circuit of the present invention comprises means for charging the energy storage device for the majority of each half period of the AC input voltage, thereby reducing ballast input current total harmonic distortion. This is shown as an ideal waveform in FIG. It can be seen that in the middle part of each line half-cycle, the ideal waveform substantially matches the sinusoidal current waveform.

  The combination of the cat ear circuit and the improved valley filling circuit comprises means for selectively extracting current from the AC power source.

  Ballast operation is further improved by the control circuitry disclosed herein. The control circuit comprises means for selectively changing the conduction time of the inverter circuit switch in response to the bus voltage. Thereby, as shown in FIG. 19, the energy storage device extracts more current from the AC power source near the peak time of each line half cycle of the AC line voltage, and more near the valley of each line half cycle of the AC line voltage. Take out a small current.

  Independent of the power supply, i.e. through the rectifier stage of the ballast itself, or through the rectifier stage of the ballast itself, rather than the secondary side of the transformer power supply associated with the ballast backend or APFC Providing a power supply that derives power directly from the line at the front end makes it easier to cope with transient conditions at start, stop, and during abnormal or fault conditions. In this case, the preferred form of such an independent power supply is the previously described cat-ear circuit configured as a power supply. Thus, the independent power supply of the preferred embodiment isolates the power supply from the back end, thereby simplifying ballast control while extracting current from the line to reduce ballast input current total harmonic distortion. It provides for simultaneously providing a means for more precise control of the scheme.

  Although the invention has been described with respect to particular embodiments of the invention, many other changes and modifications and other uses will be apparent to those skilled in the art. Accordingly, the invention is preferably not limited by the specific disclosure herein, but only by the appended claims.

FIG. 3 shows voltage and current waveforms in a prior art electronic ballast without APFC or valley fill circuit, some ideal waveforms are shown with dashed lines. 1 is a simplified block diagram of one embodiment of an electronic ballast of the present invention. FIG. FIG. 2 is a simplified schematic circuit diagram of a first embodiment of a valley fill circuit using a buck converter circuit that can be used in the electronic ballast of the present invention. FIG. 4 is a simplified diagram illustrating a valley fill voltage in the buck converter circuit of FIG. 3 illustrating a method of operation. FIG. 4 is a simplified schematic circuit diagram of the buck converter circuit of FIG. 3 illustrating a first mode of operation. FIG. 4 is a simplified schematic circuit diagram of the buck converter circuit of FIG. 3 showing a second mode of operation. FIG. 4 is a diagram schematically illustrating various voltage and current waveforms in an electronic ballast including the buck converter circuit of FIG. 3 at full light output. FIG. 4 is a simplified illustration of various voltage and current waveforms in an electronic ballast including the buck converter circuit of FIG. 3 at 10 percent light output. FIG. 6 is a simplified schematic circuit diagram of a second embodiment of a valley filling circuit having a buck converter circuit integrated with an inverter circuit according to the present invention. FIG. 6 is a simplified schematic circuit diagram of a third embodiment of a valley fill circuit having an integrated buck converter circuit with a tapped inductor in a buck converter circuit according to the present invention. FIG. 6 is a simplified schematic circuit diagram of another alternative embodiment of a valley fill circuit having a flyback transformer for refilling the valley fill capacitor. FIG. 6 is a simplified schematic circuit diagram of a fourth embodiment of a valley filling circuit according to the present invention. FIG. 6 is a simplified schematic circuit diagram of a fifth embodiment of a valley filling circuit according to the present invention. FIG. 9 is a simplified schematic circuit diagram of a sixth embodiment of a valley filling circuit integrated with an inverter circuit according to the present invention. FIG. 10 is a simplified schematic circuit diagram of a seventh embodiment of a valley filling circuit according to the present invention; FIG. 20 is a simplified schematic circuit diagram of an eighth embodiment of a valley filling circuit according to the present invention. FIG. 2 is a simplified schematic circuit diagram of a ballast constructed in accordance with the present invention. FIG. 2 is a simplified schematic circuit diagram of a ballast constructed in accordance with the present invention. FIG. 18 is a set of diagrams based on a common time showing the inverter circuit switch conduction time of FIG. 17 varying over a half cycle of the line voltage and the resulting line current drawn by the ballast. FIG. 5 is a simplified schematic circuit diagram of a second embodiment of an electronic ballast constructed in accordance with the present invention. FIG. 5 is a simplified schematic circuit diagram of a second embodiment of an electronic ballast constructed in accordance with the present invention. FIG. 22 is a simplified partial schematic circuit diagram of the ballast of FIGS. 20 and 21, including details of a control circuit, a wave shaping circuit, and a feedback circuit. FIG. 23 is a simplified schematic circuit diagram of the automatic gain control circuit of the wave shaping circuit of FIG. FIG. 21 is a simplified block diagram of a second embodiment of the feedback circuit of FIG. FIG. 21 is a simplified block diagram of a third embodiment of the feedback circuit of FIG. FIG. 26 is a simplified flowchart illustrating the operation of the feedback circuit of FIGS. 24 and 25. FIG. FIG. 2 is a simplified schematic circuit diagram of a prior art earcat power supply. FIG. 23 is a diagram showing a simplified waveform of line current taken by the cat-ear power supply of FIGS. 20 and 22. 1 is a simplified schematic circuit diagram of a first embodiment of a cat-ear circuit having a fixed cut-in point and a fixed cut-out point according to the present invention. FIG. FIG. 6 is a simplified schematic circuit diagram of a second embodiment of a cat-ear circuit including active monitoring of back-end current. FIG. 22 is a diagram illustrating a simplified waveform of a line current extracted by the electronic ballast of FIGS. 20 and 21.

Explanation of symbols

810 Electronic ballast
820 Rectifier circuit
830 Valley filling circuit
840 diodes
860 inverter circuit
870 output circuit
880 load
882 Control circuit
884 cat ear circuit
910 Buck inverter circuit
912 1st input terminal
914 2nd input terminal
916 Energy storage device
918 1st diode
920 inductor
922 2nd diode
924 Controllable conductive device
926 3rd rectifier diode
928 Output 1 terminal
930 2nd output terminal
992 2nd diode
1010 Instantaneous rectification line voltage
1210 current
1310 hour period
1312 Peak line current
1314 Peak line current
1410 Buck converter circuit
1510 Buck converter circuit
1520 tapped inductor
1552 Snubber diode
1554 Snubber resistance
1556 Snubber capacitor
1570 Valley filling circuit
1572 diodes
1574 diode
1576 flyback transformer
1610 Valley filling circuit
1616 Second energy storage capacitor
1618 4th diode
1620 resistance
1632 1st energy storage device
1634 Diode
1636 2nd diode
1638 diode
1710 Valley filling circuit
1810 Valley filling circuit
1920 inductor
2024 Winding
2110 High frequency inverter circuit
2112 First controllable conductive device
2210 Gas discharge lamp
2212 Gas discharge lamp
2220 Resonant tank circuit
2230 transformer
2232 DC blocking capacitor
2240 Current sensing circuit
2242 1st diode
2244 2nd diode
2246 resistance
2440 Feedback circuit
2442 differential amplifier
2444 Inverting terminal
2446 Non-inverting terminal
2448 PWM circuit
2460 Control input circuit
2480 wave forming circuit
2482 resistance
2486 diode
2488 DC blocking capacitor
2680 Bottom clamp
2690 Automatic gain control (AGC) circuit
2691 1st transistor
2692 2nd transistor
2693 resistance
2694 resistance
2695 resistors
2696 diode
26102 microprocessor
2810 cat ear circuit
2812 charging transistor
2814 Energy storage capacitor
2816 resistance
2818 cutout transistor
2820 Zener diode
2822 resistance
2824 resistance
2910 cat ear circuit
2930 Transistor
2932 capacitors
2934 Resistance
2936 resistance
2938 Diode
2940 diode

Claims (57)

In an electronic ballast that drives at least one gas discharge lamp from an AC power source having an approximately sinusoidal line voltage at a given line frequency,
A rectifier circuit having an AC input terminal and a DC output terminal, wherein the AC input terminal is connectable to the AC power source, and when the AC input terminal is powered by the AC power source , the rectifier circuit is A rectifier circuit for generating a rectified output voltage at the DC output terminal;
A valley filling circuit having an input terminal and an output terminal, wherein the input terminal of the valley filling circuit is connected to the DC output terminal of the rectifier circuit, and the valley filling circuit passes through a resistor and a first controllable conductive device. An energy storage device that can be directly charged from the DC output terminal, and the resistor carries only a charging current of the energy storage device, a valley filling circuit;
A high frequency drive for causing a lamp current to flow through the at least one gas discharge lamp when the input terminal is connected to the output terminal of the valley filling circuit and the AC input terminal is powered by the AC power source; An inverter circuit for generating a voltage,
In the time when the inverter circuit is greater than 90 ° of each 180 ° line frequency half cycle,
Adapted to draw current from the AC power source substantially only through the rectifier circuit, so that the current drawn from the AC power source has a total harmonic distortion of less than 33.3%, thereby An electronic ballast wherein the lamp current has a lamp current crest factor less than 2.1.   The electronic ballast of claim 1, wherein the lamp current crest factor is less than about 1.7.   Further comprising a cat ear circuit connected to the AC power source, the cat ear circuit prior to a first zero crossing of the line voltage and a first zero crossing of the line voltage; Adapted to conduct current in a second, relatively short time period, thereby reducing the total harmonic distortion of the current drawn from the AC power source compared to the absence of the cat ear circuit; The electronic ballast according to claim 1.   4. The electronic ballast of claim 3, wherein the current drawn from the AC power source has a total harmonic distortion of less than about 20%.   4. The electronic ballast according to claim 3, wherein the cat ear circuit extracts current from the AC power source when an instantaneous value of the line voltage is smaller than a predetermined absolute value.   4. The electronic ballast of claim 3, wherein the cat ear circuit extracts current from the AC power source only when the current extracted by the inverter circuit is approximately zero.   4. The electronic ballast according to claim 3, wherein the cat ear circuit extracts current from the AC power source at least when the current extracted by the inverter circuit is substantially zero. In an electronic ballast for driving at least one gas discharge lamp from an AC power supply having an approximately sinusoidal line voltage at a given line frequency,
A rectifier circuit having an AC input terminal and a DC output terminal, wherein the AC input terminal is connectable to the AC power source, and when the AC input terminal is powered by the AC power source, the rectifier circuit is A rectifier circuit that generates a rectified output voltage at the DC output terminal;
A valley filling circuit having an input terminal and an output terminal, wherein the input terminal of the valley filling circuit is connected to the DC output terminal of the rectifier circuit, and the valley filling circuit passes through a resistor and a first controllable conductive device. includes a rechargeable energy storage device directly from the DC output terminal, the resistor, and a valley fill circuit conveys only the charging current of the energy storage device,
A high frequency drive for causing a lamp current to flow through the at least one gas discharge lamp when the AC input terminal is powered by the AC power supply, the input terminal being connected to the output terminal of the valley filling circuit; An inverter circuit for generating a voltage;
A cat-ear circuit connected to the AC power source, the first relatively short time following the first zero crossing of the line voltage and the second relatively short before the next zero crossing of the line voltage. An electronic ballast comprising a cat ear circuit that conducts current over time, thereby reducing total harmonic distortion of the current drawn from the AC power source compared to the absence of the cat ear circuit.   9. The electronic ballast of claim 8, wherein the cat ear circuit further comprises a cat ear power source.   9. The electronic ballast according to claim 8, wherein the cat ear circuit extracts a current from the AC power source only when an instantaneous value of the line voltage is smaller than a predetermined absolute value.   9. The electronic ballast of claim 8, wherein the cat ear circuit extracts current from the AC power source only when the current drawn by the inverter circuit from the AC power source is approximately zero.   9. The electronic ballast of claim 8, wherein the cat ear circuit extracts current from the AC power source at least when the current drawn by the inverter circuit from the AC power source is approximately zero.   The electronic ballast has an auxiliary circuit coupled to the electronic ballast and having an auxiliary circuit power input terminal, and the cat ear circuit is coupled to and drives the auxiliary circuit power input terminal; The electronic ballast according to claim 9. In an electronic ballast that drives at least one gas discharge lamp from an AC power source having an approximately sinusoidal line voltage at a given line frequency,
A rectifier circuit having an AC input terminal and a DC output terminal, wherein the AC input terminal is connectable to the AC power source, and when the AC input terminal is powered by the AC power source, the rectifier circuit is A rectifier circuit that generates a rectified output voltage at the DC output terminal;
A valley filling circuit having an input terminal and an output terminal, wherein the input terminal of the valley filling circuit is connected to the DC output terminal of the rectifier circuit, and the valley filling circuit passes through a resistor and a first controllable conductive device. includes a rechargeable energy storage device directly from the DC output terminal, the resistor, and a valley fill circuit conveys only the charging current of the energy storage device,
A high-frequency driving voltage for causing the lamp current of the at least one gas discharge lamp to flow when the AC input terminal is supplied with power by the AC power source, the input terminal being connected to the output terminal of the valley filling circuit; An inverter circuit that generates
An inverter circuit that draws current through the rectifier circuit substantially only from the AC power source and at a time greater than 90 ° of each 180 ° line frequency half cycle;
A cat-ear circuit connected to the AC power source, the first relatively short time following the first zero crossing of the line voltage and the second relatively short before the next zero crossing of the line voltage. An electronic ballast adapted to conduct current in time and thereby reduce total harmonic distortion of the current drawn from the AC power source to less than 33.3%.   15. The electronic ballast of claim 14, wherein the total harmonic distortion of the current drawn from the AC power source is less than about 20%.   15. The electronic ballast of claim 14, wherein the cat ear circuit comprises a cat ear power source.   15. The electronic ballast of claim 14, wherein the cat ear circuit extracts current from the AC power source only when the line voltage is less than a predetermined absolute value.   15. The electronic ballast of claim 14, wherein the cat ear circuit draws current from the AC power source only when the current drawn from the AC power source by the inverter circuit is approximately zero.   15. The electronic ballast of claim 14, wherein the cat ear circuit extracts current from the AC power source at least when the current extracted by the inverter circuit is approximately zero. In an electronic ballast that drives at least one gas discharge lamp from an AC power source having an approximately sinusoidal line voltage at a given line frequency,
A rectifier circuit having an AC input terminal and a DC output terminal, wherein the AC input terminal is connectable to the AC power source, and when the AC input terminal is powered by the AC power source, the rectifier circuit is A rectifier circuit that generates a rectified output voltage at the AC output terminal;
A valley filling circuit having an input terminal and an output terminal, wherein the input terminal of the valley filling circuit is
An energy storage device connected to the DC output terminal of the rectifier circuit, wherein the valley filling circuit is directly chargeable from the DC output terminal via a resistor and a first controllable conductive device, the resistor being the energy storage device; A valley filling circuit that carries only the charging current of
A high-frequency driving voltage for causing a lamp current to flow through the at least one gas discharge lamp when the AC input terminal is supplied with power by the AC power source, the input terminal being connected to the output terminal of the valley filling circuit; An inverter circuit for generating
A valley fill control coupled to the energy storage device and operable to allow the energy storage device to draw charging current from the rectifier circuit at times greater than 90 ° of each 180 ° line frequency half cycle. An electronic ballast, comprising: a valley fill control circuit, wherein the current drawn from the AC power source has a total harmonic distortion of less than 33.3%.   21. The electronic ballast of claim 20, wherein the first controllable conductive device is a MOSFET.   21. The electronic ballast of claim 20, wherein the inverter circuit includes the controllable conductive device, whereby the first controllable conductive device serves a dual purpose.   The inverter circuit includes a second control conductive device and a third control conductive device connected in series connected to both ends of the input terminal of the inverter circuit, whereby each of the three controllable conductive devices is independent 21. The electronic ballast of claim 20, wherein the electronic ballast is an apparatus. In an electronic ballast that drives at least one gas discharge lamp that derives ballast input current from an AC power source having a line voltage that is approximately sinusoidal at a given line frequency,
A rectifier circuit having an AC input terminal and a DC output terminal, wherein the AC input terminal is connectable to the AC power source, and when the AC input terminal is powered by the AC power source, A rectifier circuit for generating a rectified output voltage at the output terminal;
A valley filling circuit having an input terminal and an output terminal, wherein the input terminal of the valley filling circuit is connected to the DC output terminal of the rectifier circuit;
An inverter circuit including a first controllable conductive device and a second controllable conductive device coupled in series and coupled between the output terminal of the valley filling circuit and the at least one gas discharge lamp, wherein the at least An inverter circuit for generating a high-frequency driving voltage for causing the lamp current to flow through one gas discharge lamp;
Inverter coupled to the first controllable conductive device and the second controllable conductive device connected in series and independently controlling the conduction time of the first controllable conductive device and the second controllable conductive device connected in series A control circuit,
The inverter control circuit reduces the conduction time of the first controllable conductive device to generate a relatively narrow pulse, and at the same time relatively wide during the period near the instantaneous peak absolute voltage of each line frequency half cycle Operable to increase the conduction time of the second controllable conductive device to generate a pulse, whereby the magnitude of the envelope of the lamp current is large when there is no change in the conduction time The crest factor of the lamp current is reduced, so that the increase in the conduction time of the second controllable conductive device results in the ballast input current not having the increase in conduction time. The total harmonic distortion of the ballast input current is reduced ,
An electronic ballast , wherein the valley filling circuit comprises a switching resistor circuit . 25. The electronic ballast of claim 24 , wherein the lamp current has a current crest factor less than 2.1. 25. The electronic ballast of claim 24 , wherein the lamp current has a current crest factor less than about 1.7. 25. The electronic ballast of claim 24 , wherein when current does not flow through the second controllable conductive device, current flows only through the first controllable conductive device and vice versa. 25. The electronic ballast of claim 24 , wherein current flows alternately between the first controllable conductive device and the second controllable conductive device. 25. The electronic ballast according to claim 24 , wherein a sum of the conduction times of the first controllable conductive device and the second controllable conductive device connected in series is a period of the high-frequency driving voltage. 25. The electronic ballast of claim 24 , wherein the inverter control circuit includes a microcontroller. 25. The electronic ballast of claim 24 , wherein the inverter circuit includes a digital signal processing circuit. 25. The electronic ballast of claim 24 , wherein the inverter control circuit includes an ASIC. An electronic ballast that drives at least one lamp,
A rectifier circuit that can be operably connected to an AC line;
A current extraction circuit connected to both ends of the rectifier circuit;
A valley filling circuit having an input terminal and an output terminal, wherein the input terminal of the valley filling circuit is connected to the DC output terminal of the rectifier circuit, and the valley filling circuit passes through a resistor and a first controllable conductive device. includes a rechargeable energy storage device directly from the DC output terminal, the resistor, and a valley fill circuit conveys only the charging current of the energy storage device,
An inverter circuit connected to the output terminal of the valley filling circuit for supplying a lamp current to the at least one lamp;
An electronic ballast in which the current extraction circuit extracts current from the AC line when the instantaneous voltage on the AC line becomes substantially zero so as to reduce the total harmonic distortion of the input current extracted by the ballast. 34. The electronic ballast of claim 33 , wherein the current extraction circuit is a cat ear circuit. 35. The electronic ballast of claim 34 , wherein the cat ear circuit extracts current from the AC line between a predetermined cut-in point and a cut-out point. 35. The method of claim 34 , wherein the cat ear circuit actively monitors the current drawn by the inverter circuit and only draws the current when the inverter circuit is not drawing a current greater than a predetermined value. Electronic ballast. An electronic ballast that drives at least one lamp,
A rectifier circuit that can be operably connected to an AC line;
A valley filling circuit including a capacitor,
A valley filling circuit operable to selectively charge the capacitor from the rectifier circuit via an impedance and first electronic switching device;
An inverter circuit comprising at least one electronic switching device for supplying lamp current to the at least one lamp,
The capacitor is charged during at least 90 ° of each half cycle of the AC line ;
An electronic ballast further comprising a flyback transformer coupled to the capacitor to control delivery of energy to the capacitor . 38. The electronic ballast of claim 37 , wherein the first electronic switching device is a MOSFET. 38. The electronic ballast of claim 37 , wherein the valley fill circuit includes at least one of the at least one switching device of the inverter circuit. 38. The electronic ballast of claim 37 , wherein the flyback transformer is connected to the capacitor by a controllable conductive device. An electronic ballast that drives at least one lamp,
A rectifier circuit that can be operably connected to an AC line;
A valley filling circuit including an energy storage device,
A valley filling circuit operable to selectively charge the energy storage device;
An inverter that provides a lamp current to the at least one lamp and includes a first electronic switch connected in series with a second electronic switch;
A control circuit for controlling the conduction time of the first electronic switch and the second electronic switch,
During a time near the time of the absolute peak value of the AC line, the first electronic switch is controlled to conduct for a relatively shorter time, and the second electronic switch is conducted for a relatively longer time. Controlled, thereby reducing the total harmonic distortion of the ballast input current and the current crest factor of the lamp current ,
An electronic ballast , wherein the valley filling circuit comprises a switching resistor circuit . An electronic ballast that drives at least one lamp,
A rectifier circuit that can be operably connected to an AC line;
A valley filling circuit including an energy storage device,
A valley filling circuit operable to selectively charge the energy storage device;
An inverter that provides a lamp current to the at least one lamp and includes a first electronic switch connected in series with a second electronic switch;
A control circuit for controlling the conduction time of the first electronic switch and the second electronic switch,
During a time near the time of the absolute peak value of the AC line, the first electronic switch is controlled to conduct for a relatively shorter time, and the second electronic switch is conducted for a relatively longer time. Controlled, thereby reducing the total harmonic distortion of the ballast input current and the current crest factor of the lamp current ,
An electronic ballast further comprising a flyback transformer, wherein the energy storage device is charged via the flyback transformer . 43. The electronic ballast of claim 41 or 42 , wherein the control circuit includes a microprocessor. 43. The electronic ballast of claim 41 or 42 , wherein the control circuit includes a digital signal processor. 43. The electronic ballast of claim 41 or 42 , wherein the control circuit comprises an ASIC. An electronic ballast that drives at least one lamp,
A rectifier circuit that can be operably connected to an AC line;
A valley filling circuit including an energy storage device,
A valley filling circuit operable to selectively charge the energy storage device from the rectifier circuit via a resistor and a first controllable conductive device ;
A back end including an inverter circuit for supplying lamp current to the lamp;
A control circuit for controlling the operation of the inverter circuit;
A cat ear circuit for supplying power to the control circuit, wherein the inverter circuit supplies a first current from the AC line during a predetermined portion of each half cycle greater than 90 ° of each half cycle of the AC line. Take out electronic ballast. The inverter circuit draws the first current during a first portion of each half cycle, and the cat ear circuit generates a second from the AC line during a second non-overlapping portion of each half cycle. 47. The electronic ballast of claim 46 , wherein two currents are extracted. 48. The electronic ballast of claim 47 , wherein the cat ear circuit begins to draw the second current at a predetermined fixed cut-in point for each half cycle. 48. The electronic ballast of claim 47 , wherein the cat ear circuit stops drawing the second current at a predetermined fixed cut-out point for each half cycle. 48. The electronic ballast of claim 47 , wherein the cat ear circuit includes an active back end current monitoring circuit to monitor the current drawn by the back end. An electronic ballast that drives at least one lamp,
A rectifier circuit that can be operably connected to an AC line;
A valley filling circuit including an energy storage device,
An electronic ballast comprising a valley fill circuit operable to selectively charge the energy storage device from the rectifier circuit via a resistor and a first electronic switch. 52. The electronic ballast of claim 51 , wherein the energy storage device is a capacitor. 52. The electronic ballast of claim 51 , wherein the first electronic switch is a MOSFET. The ballast input current total harmonic distortion of the lamp current provided by an electronic ballast that drives at least one gas discharge lamp from an AC power supply having an approximately sinusoidal line voltage at a given line frequency, from 33.3% A method of reducing the current crest factor by less than 2.1,
a) receiving the substantially sinusoidal line voltage from the AC power source;
b) rectifying the substantially sinusoidal line voltage from the AC power source to provide a full wave rectified voltage;
c) charging the energy storage device from the full-wave rectified voltage via a resistor and a controllable conductive device to provide a DC voltage;
d) modifying the full wave rectified voltage by providing the DC voltage between peaks of the full wave rectified voltage to provide a valley fill voltage;
e) applying the valley filling voltage to an inverter to provide a high frequency AC voltage;
f) using the high frequency AC voltage to cause a lamp current to flow through the at least one gas discharge lamp;
g) causing the inverter to draw current from the AC power source at times exceeding 90 ° of each 180 ° line frequency half cycle. In an electronic ballast that drives at least one gas discharge lamp that can be connected to an AC power source having a line voltage of approximately sinusoidal at a given line frequency, the ballast input current total harmonic distortion is less than 33.3%. A method of reducing,
a) rectifying the sinusoidal line voltage from the AC power source to provide a full wave rectified voltage;
b) charging an energy storage device from the full-wave rectified voltage via a resistor and a controllable conductive device to provide a DC voltage;
c ) modifying the full wave rectified voltage by providing a DC voltage between the peaks of the full wave rectified voltage to provide a valley fill voltage;
d ) applying the valley filling voltage to an inverter to provide a high frequency AC voltage;
e ) using the high frequency AC voltage to cause a current to flow through the at least one gas discharge lamp;
f ) causing the inverter to draw current from the AC power source through an impedance and controllable conductive device at times exceeding 90 ° of each 180 ° line frequency half cycle;
g ) extracting additional current from the AC power source via a cat ear circuit during a first time period following the line voltage zero crossing and during a second time interval prior to the next line voltage zero crossing. Method. In an electronic ballast that drives at least one gas discharge lamp from an AC power supply having a substantially sinusoidal line voltage at a given line frequency, the ballast input current total harmonic distortion is reduced to less than 33.3%. And
a) rectifying the substantially sinusoidal line voltage from the AC power source to provide a full wave rectified voltage;
b) providing an energy storage device to modify the full wave rectified voltage by providing a DC voltage between peaks of the full wave rectified voltage to provide a valley fill voltage;
c) applying a valley fill voltage to the inverter to provide a high frequency AC voltage;
d) using the high frequency AC voltage to cause a lamp current to flow through the at least one gas discharge lamp;
e) causing the energy storage device to draw current from the AC power source via a resistor and a controllable conductive device for a time greater than 90 ° of each 180 ° line frequency half cycle. In an electronic ballast that drives at least one gas discharge lamp from an AC power source having a substantially sinusoidal line voltage at a given line frequency, the ballast input current total harmonic distortion is reduced and the current crest factor is reduced. A method of reducing,
a) rectifying the substantially sinusoidal line voltage from the AC power source to provide a full wave rectified voltage;
b) providing an energy storage device to modify the full-wave rectified voltage by providing a DC voltage between peaks of the full-wave rectified voltage to provide a valley fill voltage;
c) applying the valley fill voltage to an inverter having at least a first controllable conductive device and a second controllable conductive device to provide a high frequency AC voltage;
d) using the high frequency AC voltage to cause a lamp current to flow through the at least one gas discharge lamp;
e) the first controllable conductive device and the second control to hump up the ballast input current and hump down the lamp current during a time near the time of the absolute peak voltage of the AC power source. Controlling the conduction time of the possible conductive device ;
f) causing the energy storage device to draw current from the AC power source via a resistor and a third controllable conductive device for a time greater than 90 ° of each 180 ° line frequency half cycle .

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