JP4012747B2 - Phase shift detection method and phase shift detection apparatus for two-phase oscillator - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a phase shift detection method and a phase shift detection apparatus for a two-phase oscillator, and more particularly to a technique for reliably detecting a phase shift between the two-phase outputs, each of which includes a DDS system. It is.
[0002]
[Prior art]
DDS is an abbreviation for direct digital synthesizer, and is known as an oscillator that can output an arbitrary frequency by simply setting frequency data (phase increment). An example of a two-phase oscillator using two oscillators according to the DDS method is shown in FIG.
[0003]
Both the first oscillator 10 and the second oscillator 20 include address calculators 11 and 21 formed of an n-bit full adder, waveform memories 12 and 22 having a waveform data table for one cycle, D / A converters 13 and 23, And low-pass filters 14 and 24.
[0004]
In order to obtain outputs of the same frequency from the two oscillators 10 and 20, each oscillator 10 and 20 is supplied with a reference clock from one reference clock generator 30. The oscillators 10 and 20 are supplied with frequency data, phase data, and a declear / clear signal for simultaneously controlling oscillation / stop from the oscillator control CPU 50. These data and signals are taken into the address calculators 11 and 21 in synchronization with the reference clock.
[0005]
For example, sine wave data for one cycle is written in advance in each waveform memory 12 and 22, and a reference signal generator 30 is operated so that each oscillator 10 and 20 is simultaneously given a declear signal to each oscillator. 10 and 20 start oscillating.
[0006]
When the frequency is changed during the oscillation, the frequency data may be simultaneously supplied from the oscillator control CPU 50 to the oscillators 10 and 20. The frequency data is simultaneously taken into the address calculators 11 and 21, thereby changing the output frequency while maintaining the phase relationship.
[0007]
Here, if the frequency data (phase increment) is fdata, the number of bits of the address calculator is n, the frequency of the reference clock is fref, and the output frequency is fout, the output frequency fout is obtained by the following equation (1).
fout = (fdata / 2 ⁿ ) × fref (1)
[0008]
As described above, according to the DDS oscillator, an arbitrary output frequency can be generated simply by setting a value corresponding to a phase increase as frequency data. Further, as the frequency of the reference clock is increased, a high-frequency sine wave output can be obtained.
[0009]
However, when the two oscillators 10 and 20 are actually mounted on a circuit board, the timing for taking in the frequency data may be shifted by one clock due to the influence of the wiring of the board and the difference in the DDS characteristics.
[0010]
That is, the frequency data is taken into each of the oscillators 10 and 20 at the timing of the reference clock after the declear signal is issued. For example, one of the oscillators 10 takes in the data immediately after the declear signal is issued. On the other hand, the other oscillator 20 sometimes takes in data when it is delayed by one clock. For this reason, a phase shift corresponding to one clock of the reference clock occurs between the two phases. This phenomenon becomes more remarkable as the reference clock becomes faster.
[0011]
In order to detect this phase shift, a phase shift detection circuit 40 is provided between the outputs of the oscillators 10 and 20. Conventionally, in many cases, the phase shift detection circuit 40 uses either a phase shift detection circuit 410 using a flip-flop (FF) shown in FIG. 4 or a phase shift detection circuit 420 using a multiplication circuit shown in FIG. .
[0012]
4 includes first and second comparators 411 and 413, and first and second D-FFs (delayed flip-flop circuits) 412 and 414. .
[0013]
The sine wave output signal of the first oscillator 10 is converted into a rectangular wave by the first comparator 411, and this is used as the SQ1 signal. Similarly, the sine wave output signal of the second oscillator 20 is also converted into a rectangular wave by the second comparator 413. This is the SQ2 signal.
[0014]
The SQ1 signal is input to the D input terminal of the first D-FF 412. On the other hand, the SQ2 signal is input to the clock input terminal of the first D-FF 412, and the D input when the SQ2 signal rises, that is, the SQ1 signal is latched and output (Q1). If the output Q1 is read by a CPU or the like (not shown) and the output Q1 is at “Hi” level, it is determined that the SQ1 signal rises before the SQ2 signal.
[0015]
Similarly, the SQ2 signal is input to the D input terminal of the second D-FF 414. On the other hand, the SQ1 signal is input to the clock input terminal of the second D-FF 414, and the D input when the SQ1 signal rises, that is, the SQ2 signal is latched and output (Q2). The output Q2 is read by a CPU or the like (not shown).
[0016]
The CPU determines, based on the “Hi” and “Lo” logics of the outputs Q1 and Q2, which phase is advanced when there is a phase shift and when there is a phase shift. For example, when the output Q1 is at the “Hi” level, the SQ1 signal rises before the SQ2 signal, that is, the phase on the second oscillator 20 side is ahead of the phase on the first oscillator 10 side. It means that.
[0017]
In the phase shift detection circuit 420 of FIG. 5, both sine wave output signals of the first and second oscillators 10 and 20 are input to the analog multiplication circuit 421. When the output signal of the first oscillator 10 is Asin (ωt) and the output signal of the second oscillator 10 is Bsin (ωt + θ), the output W of the multiplication circuit 421 is
W = ABcos θ / 2−ABcos (2ωt + θ) / 2
Thus, the direct current component AB cos θ / 2 changes depending on the phase shift amount θ.
[0018]
Therefore, by measuring the DC voltage contained in the output W of the multiplication circuit 421 with the DC voltmeter 422, an output signal corresponding to the phase difference between the first oscillator 10 and the second oscillator 20 is obtained, and the output signal And the voltage when the phase difference is zero (θ = 0 in the above equation), the phase difference between the first oscillator 10 and the second oscillator 20 can be known.
[0019]
[Problems to be solved by the invention]
The phase shift detection circuit 410 of FIG. 4 has an advantage that the configuration is simple. However, when the reference clock supplied to the oscillators 10 and 20 is high speed or when there is no phase shift between the oscillators 10 and 20, D Since the time from the input to the clock input is short, the specified setup time and hold time unique to the circuit element cannot be satisfied, and the operation may become unstable.
[0020]
According to the phase shift detection circuit 420 of FIG. 5, even when the output frequency is high, within the band of the analog multiplier circuit, not only the presence / absence of the phase shift to a relatively high frequency but also the phase shift amount can be detected. Can do.
[0021]
However, when the output frequency is low, the phase difference corresponding to the time of one clock is small, so it is difficult to detect the difference when no phase shift occurs. In order to detect this, a high-accuracy DC voltmeter must be built in the apparatus, resulting in an increase in cost.
[0022]
As an example, when the reference clock is 100 MHz, the time of one clock is 10 ns. When the output frequency of the oscillator is 10 MHz, the phase shift due to one clock is 36 °, and therefore the phase shift of the output of the multiplier circuit is cos 36 °. The DC voltage measured by the DC voltmeter is the voltage when the phase difference is zero. About -20%.
[0023]
On the other hand, when the output frequency of the oscillator is 1 MHz, the phase shift by one clock is 3.6 °, and therefore the phase shift of the output of the multiplication circuit is cos 3.6 °, and the DC voltage measured by the DC voltmeter is It is only about -2% with respect to the voltage when the phase difference is zero. In order to detect this 2% voltage change, a high-accuracy DC voltmeter is required as described above.
[0024]
The present invention has been made to solve such problems, the purpose is in a two-phase oscillator each oscillator are both made of DDS oscillator uses a multiplier circuit as a phase shift detection circuit, a DC voltmeter It is an object of the present invention to provide a phase shift detection method for a two-phase oscillator and a phase shift detection apparatus that can detect the presence or absence of a phase shift between the two-phase outputs without using them.
[0025]
[Means for Solving the Problems]
To achieve the above Symbol purpose, the first aspect of the present application consists DDS oscillator first and second oscillators to oscillate both receiving the same reference clock, the first sine wave output from the first oscillator The signal and the second sine wave signal output from the second oscillator are input to a multiplier circuit, a DC voltage included in the output signal of the multiplier circuit is detected, and the first voltage is detected based on the DC voltage. In a phase shift detection method of a two-phase oscillator for detecting a phase shift between a sine wave signal and the second sine wave signal, a polarity discrimination circuit connected to the output side of the multiplier circuit via a low pass filter for AC removal The oscillators are oscillated at the same phase and the same frequency by the same reference clock, the oscillation frequency at that time is fout, and the frequency of the reference clock is fref. Phase shift one of the oscillator of the phase by the following formula (1),
Phase shift amount (deg) = 90− (fout / fref) × 360/2 (1)
And detecting the presence or absence of a phase shift between the first sine wave signal and the second sine wave signal by determining the polarity of the DC voltage included in the output of the multiplication circuit by the polarity determination circuit. It is a feature.
[0026]
The second invention of the present application is an implementation of the first invention, and is a multiplier circuit that oscillates in response to the same reference clock and multiplies each sine wave output signal of the first and second oscillators comprising the DDS oscillator. A phase shift detector for a two-phase oscillator that detects a DC voltage included in an output signal of the multiplication circuit and detects a phase shift between the sine wave output signals based on the DC voltage. Polarity determining means connected to the output side of the multiplication circuit via a low pass filter for AC removal, and an oscillator control CPU for giving frequency data and phase data to each of the oscillators, the oscillator control CPU, The oscillators are oscillated with the same reference clock at the same phase and the same frequency, the oscillation frequency at that time is fout, and the frequency of the reference clock is fref. To, after the oscillation start, the following equation the phase of one of the oscillator (1) by the amount of phase shift,
Phase shift amount (deg) = 90− (fout / fref) × 360/2 (1)
The polarity determining means determines the polarity of the DC voltage included in the output of the multiplication circuit and detects the presence or absence of a phase shift between the sine wave output signals.
[0027]
DETAILED DESCRIPTION OF THE INVENTION
First, after the described first embodiment of the present invention (Reference Embodiment) by 1, it will be described a second implementation mode of the present invention Ri by the FIG.
[0028]
First, the first embodiment as a reference embodiment will be described with reference to FIG. 1. Two DDS oscillators 10 and 20 described in FIG. 3 are used as a two-phase oscillator, and a phase shift detection circuit thereof is used. The multiplication circuit 421 and the DC voltmeter 422 described in FIG. 5 are used. Note that the multiplication circuit 421 may be a known one.
[0029]
The basic operation is the same as that of the conventional example described above, and the sine wave output signals of the first and second oscillators 10 and 20 are both input to the analog multiplier circuit 421 and multiplied.
[0030]
That is, when the output signal of the first oscillator 10 is Asin (ωt) and the output signal of the second oscillator 10 is Bsin (ωt + θ), the multiplication circuit 421
W = ABcos θ / 2−ABcos (2ωt + θ) / 2
An output is obtained, and the direct current component AB cos θ / 2 included in the output W varies with the phase shift amount θ.
[0031]
In the first embodiment, the phase of the first oscillator 10 or the second oscillator is set to + 90 ° (or −90 °) (shifted) in order to facilitate detection of the phase shift by the DC voltmeter 422. .
[0032]
When the phase on the first oscillator 10 side is set to + 90 °, the output W of the multiplier circuit 421 is expressed by the following equation (2).
Asin (ωt + 90 °) ・ Bsin (ωt + θ)
= Acos (ωt) · Bsin (ωt + θ)
= −ABsin (−θ) / 2 + ABsin (2ωt + θ) / 2
= ABsin (θ) / 2 + ABsin (2ωt + θ) / 2 (2)
[0033]
When the phase on the second oscillator 20 side is set to + 90 °, the output W of the multiplication circuit 421 is expressed by the following equation (3).
Asin (ωt) ・ Bsin (ωt + θ + 90 °)
= Asin (ωt) · Bcos (ωt + θ)
= ABsin (-θ) / 2 + ABsin (2ωt + θ) / 2
= -ABsin (θ) / 2 + ABsin (2ωt + θ) / 2 (3)
[0034]
As described above, the DC component included in the output W of the multiplication circuit 421 is ABsin (θ) / 2 or −ABsin (θ) / 2, and the change amount is sin (θ). The amount of change of becomes larger than the amount of change of cos in the conventional example, and the detection of the phase shift by the DC voltmeter 422 becomes easy.
[0035]
Here, the present invention is compared with the conventional example on the assumption that the reference clock supplied to the oscillators 10 and 20 is 100 MHz, and the outputs of the first oscillator and the second oscillator 20 are both 1V. The conventional example has been described with reference to FIG.
[0036]
(A) When there is no phase shift,
Conventional example: The output of the multiplication circuit is cos 0 °, and the output voltage is 0.5V.
In the present invention, the output of the multiplication circuit is sin 0 °, and the output voltage is 0V.
(B) When the output frequency of the oscillators 10 and 20 is 10 MHz, the phase shift by one clock is 36 °.
Conventional example: The deviation of the output of the multiplication circuit is cos 36 °, and the output voltage is 0.405V.
In the present invention, the output deviation of the multiplication circuit is sin 36 °, and the output voltage is 0.294V.
(C) When the output frequency of the oscillators 10 and 20 is 1 MHz, the phase shift due to one clock is 3.6 °.
Conventional example: The deviation of the output of the multiplication circuit is cos 3.6 °, and the output voltage is 0.499V.
In the present invention, the output deviation of the multiplication circuit is sin 3.6 °, and its output voltage is 0.031V.
[0037]
As can be seen, in the conventional example, in order to detect a phase shift of 3.6 °, it is necessary to detect 1 mV (= 0.5 V−0.499 V) with a DC voltmeter. On the other hand, in the present invention, it is only necessary to detect 31 mV (= 0 V-0.031 V), and therefore there is no need to use a high-accuracy DC voltmeter.
[0038]
As a method of setting the phase of the first oscillator 10 or the second oscillator to + 90 ° (or −90 °), as shown in FIG. 1, the multiplication circuit 421 is shifted to, for example, the input stage on the first oscillator 10 side. There is a method of shifting the phase of the sine wave output signal of the first oscillator 10 by 90 ° by providing the phase shifter 423. However, in the present invention, such a control CPU (not shown) is used for the oscillator whose phase is shifted. Phase data corresponding to the amount of phase shift is provided. According to this, the sine wave output signal of the oscillator can be phase shifted by 90 ° by software without requiring hardware as a phase shifter. .
[0039]
Next, referring to FIG. 2, a second embodiment will be described regarding the onset bright (the first and second inventions). Also in the second embodiment, as in the first embodiment, the two DDS oscillators 10 and 20 of FIG. 1 are used as the two-phase oscillator, but the phase shift detection circuit has a multiplication as shown in FIG. A circuit in which a polarity discriminating circuit (polarity discriminating means) 425 is connected to the output side of the circuit 421 via an AC removing low-pass filter 424 is used.
[0040]
In this case, the polarity discriminating circuit 425 includes a comparator having a reference potential as a GND (ground) potential. The output signal of the multiplication circuit 421 is subjected to AC component removal by the low-pass filter 424, and then the DC component is compared with the GND potential by the polarity discrimination circuit 425 to determine the polarity (+,-).
[0041]
Assuming that the output signal of the first oscillator 10 is Asin (ωt) and the output signal of the second oscillator 10 is Bsin (ωt + θ), W = ABcos θ / 2−ABcos (2ωt + θ) from the multiplication circuit 421 as in the first embodiment. In this second embodiment, the presence or absence of a phase shift between the two-phase outputs is detected as follows.
[0042]
First, the first oscillator 10 and the second oscillator 20 are oscillated at the same frequency (fout). At this time, a declear signal is simultaneously applied to the oscillators 10 and 20 by a control CPU (not shown) to control the oscillators 10 and 20 to oscillate in the same phase.
[0043]
When oscillation starts, for example, the phase of the first oscillator 10 is shifted by the phase shift amount according to the following equation (4).
Phase shift amount (deg) = 90− (fout / fref) × 360/2 (4)
Note that fref is the frequency of the reference clock given to the DDS oscillator, and this phase shift control is based on the phase data given from the oscillator control CPU 50 to the first oscillator 10.
[0044]
Assuming that the initial phase difference between the first oscillator 10 and the second oscillator 20 at the start of oscillation is θ0 (deg), the phase of the first oscillator 10 is shifted by the phase shift amount of the above equation (4). The phase difference is expressed by the following equation (5).
Phase difference (deg) = θ0 + 90− (fout / fref) × 360/2 (5)
[0045]
Here, when there is no phase shift between the two phases and when there is a phase shift, the initial phase difference θ0 is respectively
When there is no phase shift; θ0 = 0
When there is a phase shift: θ0 = (fout / fref) × 360
It is.
[0046]
Accordingly, the output of the first oscillator 10 and the output of the second oscillator 20 whose phase is shifted by the phase shift amount of the above equation (4) are multiplied by the multiplication circuit 421, and the DC component after passing through the low-pass filter 424 and its polarity. Is as follows.
[0047]
That is, when there is no phase shift, θ0 = 0, so that the phase difference between the two phases is 90− (fout / fref) × 360/2 according to the above equation (5), and therefore, during the output of the multiplier circuit 421 The DC component included is
cos (90- (fout / fref) × 360/2)
The polarity is “+”.
[0048]
On the other hand, when there is a phase shift, θ0 = (fout / fref) × 360. Therefore, the phase difference between the two phases is 90+ (fout / fref) × 360/2 by the above equation (5). Therefore, the direct current component included in the output of the multiplication circuit 421 is
cos (90+ (fout / fref) × 360/2)
Thus, the polarity is “−”.
[0049]
Therefore, the presence / absence of a phase shift at the start of oscillation between the two phases can be detected by taking the output of the polarity determination circuit 425 into a CPU (control means) (not shown).
[0050]
As described above, according to the second embodiment, although a multiplication circuit is used as the phase shift detection means, a DC voltmeter is not required, and the cost can be reduced accordingly. Further, even when there is no phase shift between the two phases, stable determination is possible. Furthermore, the phase shift can be determined at a high speed.
[0051]
The above description is for an example in which the phase of the first oscillator 10 is advanced with respect to the second oscillator 20, but if the above operation is applied to the second oscillator 20, the phase will be delayed. Judgment is possible when there is.
[0052]
【The invention's effect】
As described above, according to the first and second inventions of the present application, the phase shift of the two-phase oscillator having the first and second DDS oscillators is detected by the phase shift detection means including the multiplication circuit. The polarity discriminating circuit is connected to the output side of the multiplier circuit via a low pass filter for removing AC, and each DDS oscillator is oscillated at the same phase and the same frequency by the same reference clock, and the oscillation frequency at that time is fout, The frequency of the reference clock is fref, and after the start of oscillation, the phase of one of the DDS oscillators is shifted by 90− (fout / fref) × 360/2, and is included in the output of the multiplication circuit by the polarity discrimination circuit By detecting the polarity of the DC voltage, the presence or absence of a phase shift between the two-phase outputs can be detected quickly and stably without using a DC voltmeter. Rukoto it is.
[Brief description of the drawings]
FIG. 1 is a block diagram of a two-phase oscillator including a phase shift detection circuit according to a first embodiment (reference embodiment) of the present invention.
FIG. 2 is a block diagram showing a phase shift detection circuit according to a second embodiment of the present invention.
FIG. 3 is a block diagram of a two-phase oscillator having two DDS oscillators.
FIG. 4 is a block diagram showing a phase shift detection circuit as a first conventional example.
FIG. 5 is a block diagram showing a phase shift detection circuit as a second conventional example.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10,20 Oscillator 11,21 Address calculator 12,22 Waveform memory 13,23 D / A converter 14,24 Low pass filter 30 Reference clock generator 40 Phase shift detection circuit 421 Multiplication circuit 422 DC voltmeter 423 Phase shifter 424 Low pass Filter 425 Polarity discrimination circuit 50 Oscillator control CPU

Claims (2)

The first and second oscillators are both DDS oscillators that oscillate in response to the same reference clock, and the first sine wave signal output from the first oscillator and the second sine wave signal output from the second oscillator. Is input to the multiplier circuit, the DC voltage included in the output signal of the multiplier circuit is detected, and the phase shift between the first sine wave signal and the second sine wave signal is detected based on the DC voltage. In the method of detecting the phase shift of the two-phase oscillator
A polarity discriminating circuit connected to the output side of the multiplier circuit via an AC-removing low-pass filter is provided, and the oscillators are oscillated at the same phase and the same frequency by the same reference clock. fout, where the frequency of the reference clock is fref, and after the start of oscillation, the phase of one of the oscillators is shifted by the phase shift amount according to the following equation (1), and is included in the output of the multiplier circuit by the polarity discriminating circuit. A method of detecting a phase shift of a two-phase oscillator, wherein the polarity of a direct current voltage is determined and the presence or absence of a phase shift between the first sine wave signal and the second sine wave signal is detected.
Phase shift amount (deg) = 90− (fout / fref) × 360/2 (1) A multiplier circuit that oscillates in response to the same reference clock and multiplies the sine wave output signals of the first and second oscillators composed of the DDS oscillator, and detects a DC voltage contained in the output signal of the multiplier circuit. In the phase shift detector for a two-phase oscillator that detects the phase shift between the sine wave output signals based on the DC voltage,
Polarity discriminating means connected to the output side of the multiplication circuit via a low pass filter for AC removal, and an oscillator control CPU for giving frequency data and phase data to each oscillator, the oscillator control CPU The oscillators are oscillated with the same reference clock at the same phase and the same frequency, the oscillation frequency at that time is fout, the frequency of the reference clock is fref, and the phase of one of the oscillators is changed after the oscillation starts. The phase shift amount is shifted by the following equation (1), the polarity discriminating means discriminates the polarity of the DC voltage included in the output of the multiplication circuit, and detects the presence or absence of a phase shift between the sine wave output signals. A phase shift detector for a two-phase oscillator, characterized in that:
Phase shift amount (deg) = 90− (fout / fref) × 360/2 (1)

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