JP3453721B2 - Vibrator drive circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vibrator driving circuit,
For example, it can be used for an angular velocity detecting device.

[0002]

2. Description of the Related Art For example, techniques relating to a device for detecting a rotational angular velocity using a vibrator are disclosed in Japanese Patent Application Laid-Open Nos. H5-240649, H5-288555, and GB2266149A.

In the apparatus for detecting the rotational angular velocity as described above, a vibrator such as a piezoelectric element is driven at a resonance point so as to vibrate at a frequency corresponding to its natural frequency, and a driving terminal of the vibrator is driven. The angular velocity is detected by measuring the phase difference between the signal and the signal of the detection terminal.

[0004] The natural frequency of the vibrator fluctuates due to the influence of ambient temperature and the like. Therefore, when the vibrator is driven at a constant frequency in an environment where a temperature change occurs, the vibration state of the vibrator cannot be maintained at the resonance point. If the vibration state of the vibrator deviates from the resonance point, the amplitude of the vibration fluctuates and an error occurs in the relationship between the phase difference and the angular velocity.

Accordingly, for example, British Patent Application Publication GB226
In 6149A, a PLL (phase-locked loop) circuit is used to control the vibrator to maintain the vibration state at the resonance point. That is, the phase difference between the signal at the drive voltage application terminal of the vibrator and the signal at the return voltage extraction terminal of the vibrator is 90.
The oscillation frequency of the VCO (Voltage Controlled Oscillator) is automatically adjusted so that the temperature becomes higher.

[0006]

In order to control the phase difference between the signal of the drive voltage application terminal of the vibrator and the signal of the return voltage output terminal of the vibrator to be 90 degrees using a PLL circuit. Shifts the phase of one signal by 90 degrees to form a PLL
The phase difference between two signals applied to the phase comparator of the circuit needs to be zero in a steady state.

A phase shift circuit for shifting the phase of a signal can be constituted by a time constant circuit composed of, for example, a capacitor, a resistor and the like. However, the phase shift amount of this type of phase shift circuit changes according to the frequency. Therefore, if the driving frequency of the vibrator greatly fluctuates due to a change in the ambient temperature, the PLL circuit does not function properly, and the driving frequency deviates from the resonance frequency of the vibrator.

A VCO used in a PLL circuit is
In general, a signal such as a rectangular wave including various harmonics is output. Therefore, when the output signal of the VCO is applied to the vibrator as it is, the vibrator can be used in various vibration modes other than the mode used for measuring the angular velocity. Due to the vibration, the noise included in the detected signal increases, and the measurement error increases. Therefore, generally, a low-pass filter is connected to the output of the VCO,
The vibrator is driven by a signal having a waveform close to a sine wave. However, since the low-pass filter is a time constant circuit, the amount of phase change of the signal passing therethrough changes according to the frequency of the signal. That is, if the driving frequency of the vibrator fluctuates in accordance with the change in the ambient temperature, the PLL circuit will not function properly due to a phase change in the low-pass filter, and the driving frequency will greatly deviate from the resonance frequency of the vibrator.

Therefore, the present invention prevents the vibration state of the vibrator from deviating from the resonance state and detects the vibration from the vibrator even when the natural vibration frequency of the vibrator fluctuates due to fluctuations in the ambient temperature. It is an object to prevent an increase in noise included in a signal.

[0010]

In order to solve the above-mentioned problems, a vibrator drive circuit according to the present invention comprises a vibrator (2),
A first terminal driving signal oscillating for vibration driving the body is supplied (5a, 5b), and, vibrating body is the vibration signal
Second pin at the resonant state of vibration at the natural frequency, the feedback signal shifted by a predetermined amount of phase relative to the drive voltage supplied to the first terminal appears by No. (4
a, 4b) , and the drive signal of the vibrator (10) including
Phase comparison means (21) for outputting a signal corresponding to the phase difference between the feedback signals , loop filter means (22) for outputting a voltage corresponding to the signal output by the phase comparison means,
And a voltage-controlled oscillating means (23) for generating a signal having a frequency corresponding to the output voltage of the loop filter means.
L control means (20); address counter means (61) for counting the number of waves of the signal output by the PLL control means; sine wave or data having a waveform close to the sine wave are held at a plurality of addresses, and the address terminal is connected to the address terminal. Waveform data output means (6) to which the count value of the address counter means is applied.
2); D / A conversion means (63) for converting the data of the waveform output from the waveform data output means into an analog signal; and converting the signal corresponding to the signal output from the D / A conversion means into the analog signal. Means (14) for applying a signal to the first terminal of the vibrator; means (1) for applying a signal corresponding to a signal applied to the first terminal of the vibrator to one input of the phase comparing means
Means for applying a signal corresponding to a signal appearing at the second terminal of the vibrator to the other input of the phase comparing means (3, 17);
2, 16);

Further, according to the present invention, between the first terminal of the vibrator and one input of the phase comparing means, or between the second terminal of the vibrator and the other input of the phase comparing means. Phase shift means (4) for shifting the phase of the signal by 90 degrees.
0) is inserted.

According to a third aspect of the present invention, there is provided a synchronization control means for synchronizing a signal applied to one input of the phase comparison means with a count value of the address counter means.
SQ) is installed.

The symbols shown in the parentheses indicate the reference numerals of the corresponding elements in the embodiments described later for reference, but each component of the present invention is a specific element in the embodiments. It is not limited to only.

[0014]

In the present invention, the phase comparison means (21), the loop filter means (22) and the voltage controlled oscillation means (2)
The PLL control means constituted by 3) applies the signals to the first terminals (5a, 5b) of the vibrator (10) such that the phases of the signals applied to the two input terminals of the phase comparison means match. Automatically control the frequency of the signal. When the vibrator resonates, a signal whose phase is shifted by a predetermined amount with respect to the signal of the first terminal appears at the second terminal (4a, 4b).

The two inputs of the phase comparing means are compensated for the phase difference by the above-mentioned predetermined amount in advance, and then the first terminal (5
a, 5b), a signal (SE) corresponding to the signal applied to
Since the signal (SF) corresponding to the signal appearing at the second terminals (4a, 4b) is applied, the PLL control means generates a drive signal having a frequency such that the vibrator vibrates in a resonance state. The resonance state does not have to be perfect resonance.

In the present invention, the phase shift means (40) is used to match the phases between signals applied to the two inputs of the phase comparison means.

In the third aspect, the synchronization control means (71, SQ) synchronizes a signal applied to one input of the phase comparison means with a count value of the address counter means. Waveform data output means (62)
By changing the correspondence between the address and the waveform data,
In response to the signal (SE) applied to one input of the phase comparison means, the signal (S) applied to the first terminals (5a, 5b)
Since the phase of P) can be freely adjusted, the installation of the phase shift means can be omitted.

According to the present invention, the signal (S) having a waveform close to a sine wave is generated by the address counter means (61), the waveform data output means (62) and the D / A conversion means (63).
Since P) is obtained, even when the signal output from the D / A conversion means (63) is applied directly to the excitation electrode of the vibrator, unnecessary mode vibration due to harmonics does not occur much.
B - even when using a pass filter, since the harmonic attenuation rate required for it is relatively small, the b - phase shift caused by the pass filter is small. For example, although the frequency of the drive signal of the vibrator fluctuates with a change in temperature, in the present invention, the phase shift caused by the low-pass filter is small, so that even if the frequency fluctuates, The phase hardly changes. For this reason, the PLL control means can always maintain the vibrator in the resonance state.

[0019]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG.
FIG. 2 shows a detailed configuration of some of the blocks in FIG. 1, and FIG. 3 shows the appearance of the sensor element 10 shown in FIG. In FIG. 1, the sensor element 10 shows a cross section taken along line 1A-1A in FIG. The cylindrical piezoelectric body 2 of the sensor element 10 is fixed to an element base 1 having a lower end, a disk at the upper end and a round bar-shaped leg on the lower surface thereof. A substantially upper half of the outer peripheral surface of the cylindrical piezoelectric body 2 is covered with a reference potential electrode 3 connected to the equipment ground. Shaped electrode segments are joined. In the electric circuit connection shown in FIG. 1, of the eight electrode segments, a pair of electrode segments 4a and 4b opposed to each other in the first diametric direction D1 are a feedback electrode and a second electrode segment.
A pair of electrode segments 5a and 5b facing each other in the diametric direction D2 is an excitation electrode, and a pair of electrode segments 5a facing each other in the third diametric direction D3.
The pair of electrode segments 6a and 6b are detection electrodes.
In this example, a pair of electrode segments 7a and 7b facing each other in the fourth diameter direction D4 is not used.

The AC voltage generated by the oscillation circuit is
The voltage is applied to the excitation electrodes 5a and 5b of the sensor element 10, whereby the cylindrical piezoelectric body 2 is deformed and vibrates. Further, the feedback electrodes 4a, 4b
Is fed back to the oscillation circuit.
Using the feedback signal, the oscillating circuit automatically adjusts the frequency of the output signal so that the cylindrical piezoelectric body 2 vibrates at a frequency corresponding to its resonance frequency fm.

When power is supplied to the oscillation circuit, a certain voltage is applied between the excitation electrodes 5a and 5b and the reference potential electrode 3, whereby the cylindrical piezoelectric body 2 expands in the second diameter direction D2. Or shrink. Due to this deformation, a certain voltage is generated between the feedback electrodes 4a and 4b and the reference potential electrode 3. The cylindrical piezoelectric body 2 at the vibration reduction peak when the cylindrical piezoelectric body 2 expands / contracts in the second diameter direction D2 at the resonance frequency fm is shown by an exaggerated dotted line 2B in FIG. ,
The cylindrical piezoelectric body 2 at the enlarged peak is shown by a two-dot chain line 2A in FIG. As can be seen from FIG. 4, the enlargement / reduction in the second diameter direction D2 is reduction / enlargement in the first diameter direction D1, and the reduction peak in the D2 direction corresponds to the enlargement peak in the D1 direction. Therefore, in this example, the cylindrical piezoelectric body 2 vibrates in the cross direction (D1 & D2).

As described above, when the cylindrical piezoelectric body 2 is vibrating in the cross direction (D1 & D2) (the two-dot chain line 2 in FIG. 4).
A & dotted line 2B) and the detection electrodes 6a, 6b are located at nodes of vibration, so that the voltage appearing between them and the reference potential electrode 3 is low. No voltage appears in an ideal state, but a certain amount of voltage is generated because the shape of the cylindrical piezoelectric body 2 is not a perfect cylinder.

When the cylindrical piezoelectric body 2 rotates, for example, as shown in FIG.
When rotated clockwise as shown in FIG. 5, Coriolis forces F1 to F4 are generated by this rotation and the vibration of the cylindrical piezoelectric body 2,
Thereby, the vibration direction (D2) of the cylindrical piezoelectric body 2 is twisted (rotated) in the third diametric direction D3 (or the fourth diametric direction D4) as shown by, for example, a solid line 2C in FIG. As the voltage appearing at 6a, 6b increases, the phase of the voltage (alternating current) shifts. The amount of this phase shift is
This corresponds to the rotational angular velocity applied to the cylindrical piezoelectric body 2.
Therefore, the apparatus shown in FIG. 1 includes a circuit for measuring the amount of phase shift of the signal appearing on the detection electrodes 6a and 6b.

An oscillation circuit for exciting the cylindrical piezoelectric body 2 will be described with reference to FIG. PLL (phase locked loop)
B) The two input terminals of the circuit 20 have the signals SE respectively.
And SF are applied. The signal (triangular wave) output from the PLL circuit 20 passes through the pseudo sine wave generation circuit 60 and the low-pass filter 14 and serves as a drive signal SA as the excitation electrode 5
a, 5b. The drive signal SA is input to the inverter 17 with the Schmitt trigger via the low-pass filter 13. The binary signal SD obtained at the output of the inverter 17 passes through a 90-degree phase shift circuit 40 and is converted into a signal SE. The signal SE has a phase of 90 with respect to the signal SD.
It is a signal delayed by degrees. Signals appearing at the feedback electrodes 4a and 4b pass through the low-pass filter 12 and are input to an inverter 16 with a Schmitt trigger. Inver
The binary signal SF obtained at the output of the
0 is applied to one input terminal.

The pseudo sine wave generating circuit 60 includes a counter 6
1, a read-only memory (ROM) 62 and a D / A converter 63. The counter 61 is a 32-bit counter, counts the signal SN, and applies the count value SO to the address terminal of the read-only memory 62. The read-only memory 62 stores waveform data of one cycle of a sine wave at 32 types of addresses. That is, the value of the waveform level at each phase obtained by dividing one cycle into 32 equal parts is held in 32 consecutive addresses. Therefore, the address terminals of the read-only memory 62 are provided with 0, 1, 2, 3,.
By sequentially giving address values to 0, data for one cycle of a waveform similar to a sine wave is sequentially read, and the data is applied to the D / A converter 63. Therefore, D
The signal SP output from the / A converter 63 is a pseudo sine wave as shown in FIG. Signal S output from PLL circuit 20
Since a pseudo sine wave for one cycle appears in the signal SP for every 32 waves of N, the pseudo sine wave generation circuit 60 also functions as a frequency divider. That is, the cycle of the signal SP is 32 times the cycle of the signal SN.

The low-pass filters 12 and 14 remove harmonic components contained in the input signal and extract only the fundamental wave (sine wave having a frequency coincident with the resonance frequency of the cylindrical piezoelectric body 2). is there. The low-pass filter 13 is a low-pass filter.
It is provided to cancel the effect of the phase shift caused by the pass filter 12. The low-pass filters 12, 13 and 14 have a cutoff frequency slightly higher than the resonance frequency of the cylindrical piezoelectric body 2. The resonance frequency of the cylindrical piezoelectric body 2 slightly changes with a change in temperature or the like, but does not greatly change. Therefore, the cutoff frequencies of the low-pass filters 12, 13 and 14 are fixed. Further, since the harmonic component contained in the signal SP output from the pseudo sine wave generating circuit 60 is very small, the low-pass filter 14 having a relatively small harmonic attenuation rate is used. Therefore, the phase change between the input and output of the low-pass filter 14 is very small. It should be noted that omitting the low-pass filter 14 only slightly increases the noise, and does not cause any particular problem.

The PLL circuit 20 comprises a phase comparator 21, a loop filter 22, and a VCO (voltage controlled oscillator) 23, as shown in FIG. The phase comparator 21
A pulse signal having a pulse width corresponding to the phase difference between the pulse signals input to the two input terminals is output. The loop filter 22 outputs an analog voltage signal corresponding to the pulse width of the signal output from the phase comparator 21. This signal is input to the VCO 23. The VCO 23 outputs a triangular wave signal having a frequency according to the input voltage. Therefore, the PLL circuit 20 automatically adjusts the frequency of the triangular wave signal output from the PLL circuit 20 so that the phase difference between the pulse signals input to the two input terminals becomes zero.

As shown in FIG. 2, the 90-degree phase shift circuit 40 includes a phase comparator 41, a loop filter 42, a VCO 4
3, a frequency divider 44 and flip-flops 45 and 46. Among them, the phase comparator 41, the loop filter 42, the VCO 43 and the frequency divider 44 constitute a multiplication circuit. As in the case of the PLL circuit 20, the phase comparator 41 outputs a pulse signal having a pulse width corresponding to the phase difference between the pulse signals input to its two input terminals.
The loop filter 42 outputs an analog voltage signal corresponding to the pulse width of the signal output from the phase comparator 41. This signal is input to the VCO 43. The VCO 43 outputs a triangular wave signal having a frequency according to the input voltage. VCO4
The frequency of the output signal of No. 3 is divided by a frequency divider 44 to 1/4 and fed back to one input terminal of the phase comparator 41. Therefore, in this multiplying circuit, when the VCO 43 outputs a signal having a frequency four times the frequency f of the signal input to the 90-degree phase shift circuit 40, the phase comparator 4
The phase difference between the pulse signals input to the two input terminals 1 is zero and locked. That is, the frequency of the output signal of the VCO 43 is 4 · f.

The output signal of the VCO 43 is applied to flip-flops 45 and 46 as clock pulses. The output terminal (Q) of the flip-flop 46 has VC
The phase of the output signal S43 of O43 is delayed by one cycle, and a signal S42 whose cycle is four times that of the signal S43 is obtained. That is, the output signal S42 of the 90-degree phase shift circuit 40 has the same frequency as the input signal S41 and has a phase delayed by 90 degrees. Since the phase shift amount in the 90-degree phase shift circuit 40 is one cycle of a frequency four times the frequency of the input signal S41, the phase shift amount is always 90 degrees even when the frequency of the input signal S41 fluctuates. Will be maintained.

The description will be continued with reference to FIG. When the cylindrical piezoelectric body 2 is vibrating at its resonance frequency, the signals appearing on the feedback electrodes 4a, 4b have a phase difference of 90 degrees with respect to the signals applied to the excitation electrodes 5a, 5b. However, when the frequency of the signal deviates from the resonance frequency, the phase difference changes. A signal SE obtained by delaying a signal to be applied to the excitation electrodes 5a and 5b by 90 degrees by a 90-degree phase shift circuit 40 is applied to one input terminal of the PLL circuit 20.
The other input terminal of the circuit 20 has a feedback electrode 4
Since the signal SF generated from the signals appearing at a and 4b is applied, when the cylindrical piezoelectric body 2 is vibrating at its resonance frequency, the PLL circuit 20 is locked and the vibration frequency is constant. For example, if the resonance frequency deviates from the oscillation frequency due to a temperature change,
Since the phases of the two input signals are shifted, the PLL circuit 20 adjusts the oscillation frequency so that the shift is eliminated. Therefore, the cylindrical piezoelectric body 2 is driven so as to always vibrate at its resonance frequency.

Each of the low-pass filters 12, 13 and 14 is a time constant circuit, and a phase difference occurs between the input and the output. The phase difference changes according to the frequency of the signal. However, the phase shift caused by the low-pass filter 14 is very small, and the signals SE and SF
Affects in common. Further, the influence of the phase shift caused by the low-pass filter 12 on the signal SF,
Since the effect of the phase shift caused by the pass filter 13 on the signal SE is substantially the same, the effects of both are affected by the PLL.
The circuits 20 cancel each other out. That is, the phase shift caused by the low-pass filters 12, 13 and 14 does not substantially affect the PLL circuit 20, so that
Even if the vibration frequency fluctuates, the cylindrical piezoelectric body 2 is always maintained in a resonance state.

Next, a circuit for measuring the rotational angular velocity will be described. Signals appearing on the detection electrodes 6a and 6b of the cylindrical piezoelectric body 2 pass through the low-pass filter 11 and are applied to an inverter 15 with a Schmitt trigger to be converted into a binary signal SG. This signal SG is the output signal
The input is applied to one input terminal of the gate 51. Further, a signal SF generated from signals appearing on the feedback electrodes 4a and 4b is applied to the other input terminal of the exhaust gate 51. The output signal SH of the exclusive gate 51 is applied to one input terminal of the NAND gate 52. The other input terminal of the NAND gate 52 has
The output signal SI of the multiplier 30 is applied. Multiplication circuit 3
The output signal of the frequency divider 56 is applied to the input of 0. An output signal SN of the PLL circuit 20 is applied to an input terminal of the frequency divider 56. This signal SN is output from the counter 5
5 is applied as a clock pulse. The carry signal SJ output from the counter 55 is applied to the clear terminal of the counter 53 and the clock terminal of the latch 54. The output signal SK of the NAND gate 52 is applied to the counter 53 as a clock pulse (counting signal). The count value SL of the counter 53 is applied to the input terminal of the latch 54.

In this embodiment, the pseudo sine wave generation circuit 60
Outputs a signal whose cycle is 32 times that of the input signal. The frequency divider 56 outputs a signal whose cycle is 31 times that of the input signal. Further, the multiplying circuit 30 outputs a signal whose frequency is 1024 times that of the input signal. The counter 55
It is a 992 binary counter. Therefore, assuming that the period and frequency of the signal SA are T and f, respectively, the period and frequency of each signal are as follows.

SA, SB, SC: T, f SN: T / 32, 32f SJ: 31T, f / 31 SI: 31T / (32 × 1024), (32 × 1024) f / 31 Signal SA, SB, SC , SD, SE, SF, SG and S
An example of the timing of H is shown in FIG. The phase difference between the signals SA and SB is always maintained at 90 degrees by the control of the PLL circuit 20. The phase difference between the signal SB (SF) and the signal SC (SG) changes in proportion to the rotational angular velocity applied to the cylindrical piezoelectric body 2. Assuming that the pulse width of the signal SH output by the exhaust gate 51 is .DELTA.T, .DELTA.T / T changes in proportion to the phase difference between the signal SF and the signal SG, that is, the angular velocity. Therefore, if ΔT / T is measured, information indicating the angular velocity can be obtained.

As shown in FIG. 2, the multiplying circuit 30 comprises a phase comparator 31, a loop filter 32, a VCO 33 and a frequency divider 34. The frequency division ratio of the frequency divider 34 in the multiplication circuit 30 is 1024. Therefore, a signal having a frequency of 1024 times that of the input signal is obtained at the output of the multiplying circuit 30.

As shown in FIG. 6, the signal SH goes high by ΔT every period T. Then, while the signal SH is at a high level, a pulse of the signal SI appears in the signal SK. The counter 53 counts the number of pulses of the signal SK, that is, the time corresponding to ΔT corresponding to the angular velocity. Since the period of the signal SJ for clearing the counter 53 is 31T,
The counter 53 calculates a time integrated value of ΔT × 31 during 31T, and the integrated value is held in the latch 54 and the signal S
Output as M.

By the way, in the circuit shown in FIG. 1, there is a special reason why the division ratio of the pseudo sine wave generation circuit 60 and the division ratio of the divider 56 are set to different values. That is,
The frequency of the signal SI that becomes the count pulse of the counter 53 is
By deviating from the integral multiple of the vibration cycle number (1 / T) of the cylindrical piezoelectric body 2, the measurement accuracy can be increased without increasing the frequency of the signal SI too much.

In the circuit shown in FIG.
If the frequency division ratio of 6 is changed to 1/32, the frequency of the signal SI becomes 1024f, so that the resolution in measuring the phase difference (ΔT / T) becomes 1/1024, and a subtle change in angular velocity is measured. Can not do it. If the frequency of the signal SI is increased in order to increase the resolution, the measuring circuit such as the counter 53 must be constituted by a special circuit that operates at high speed, which is very expensive.

In the actual circuit shown in FIG.
Since the frequency of I is (32 × 1024) f / 31, for example, the number of SI pulses during the time T is 32 × 1024/31. In a digital circuit, since the decimal part of the pulse number is usually rounded down or rounded up, it becomes an error. However, in the circuit of FIG. 1, since the frequency division ratio of the pseudo sine wave generation circuit 60 and the frequency divider 56 is different, S
The phase at which the pulse of I appears slightly shifts with time, and the fraction of the number of pulses of SI counted in the time T is discarded in a certain cycle, but the fraction of the time T is discarded in another certain cycle. S counted in
The decimal part of the pulse number of I is rounded up. Therefore,
The error is reduced by averaging the number of pulses counted in a plurality of cycles.

Actually, since the period of the signal SJ that determines the counting period of the counter 53 is 31T, the measurement of the time with respect to ΔT is repeated 31 times, and the integrated value of ΔT during the period of 31T, that is, the error of rounding down and rounding up. Is smoothed by the counter 53, and is held in the latch 54. That is, the number of SI pulses during the period of 31T is 32 ×
Since it is 1024, the measurement resolution of the phase difference (ΔT / T) is 1 / (32 × 1024). Therefore, the resolution becomes 32 times as compared with the case where the frequency division ratio of the pseudo sine wave generation circuit 60 frequency divider 56 is made the same. Thereby, even when the frequency of the signal SJ is low, the angular velocity can be measured with high accuracy.

For example, when the vibration frequency of the cylindrical piezoelectric body 2 is 8
In the case of KHz, in order to detect a phase difference with a resolution of 0.02 degrees, a general circuit must count clock pulses of 144 MHz, which makes the configuration of the circuit extremely difficult. In this case, since the frequency of the clock pulse (SI) can be reduced to about 4.8 MHz, the circuit configuration becomes very simple.

In the above embodiment, a signal obtained by shifting the signal SA by 90 degrees using the 90-degree
Although the voltage is applied to one input of the LL circuit 20, the position where the 90 ° phase shift circuit 40 is inserted is changed, and a signal obtained by shifting the signal SB by 90 degrees is applied to the other input of the PLL circuit 20. Good.

FIG. 8 shows the configuration of one modified embodiment. The changed portion will be described with reference to FIG. In this embodiment, a signal SQ obtained by dividing the signal SN output from the PLL circuit 20 using a frequency divider 71 is generated, and the low-pass filter 13 and the inverter 17 are derived from the signal SQ.
To generate the signal SE. The signal SQ output from the frequency divider 71 is applied to the clear terminal of the counter 61B of the pseudo sine wave generation circuit 60B. Further, the signal SP
Read-only memory 62 so that the phase of
The correspondence between addresses and data in B is different from that of the above-described embodiment. In this example, considering that 0 to 31 of addresses are each phase obtained by dividing one cycle into 32, the waveform data is cosine wave pattern. Is turned on.

As shown in FIG. 9, at the rising point of the signal SQ, the counter 61B is cleared and the address value is reset to 0, so that the pseudo sine wave generation circuit 60B
Is synchronized with the signal SQ output from the frequency divider 71. Then, a phase difference of 90 degrees always occurs between the signals SQ and SP. Therefore, the 90-degree phase circuit 40 in the embodiment of FIG. 1 is omitted in the embodiment of FIG.

In the present invention, a predetermined amount of phase difference is provided between the signal of the first terminal and the signal of the second terminal so that the vibration state of the vibrator is always in a resonance state. The case where the predetermined amount of the phase difference is 90 degrees has been described as the embodiment. This predetermined amount of phase difference may be changed to the value of any other phase difference that resonates. In practice, the phase difference is slightly deviated from the theoretical value due to circuit constants, variations in the vibrator, and the like (for example, when the theoretical value of the phase difference is 90 degrees, 80 to 10 degrees).
(In the range of about 0 degrees). Also, even if the vibration frequency does not completely match the resonance frequency,
If it is near the resonance frequency, it is possible to prevent the generation of noise to some extent.

[0046]

According to the present invention, the signal (S) having a waveform close to a sine wave is obtained by the address counter means (61), the waveform data output means (62) and the D / A conversion means (63).
Since P) is obtained, even when the signal output from the D / A conversion means (63) is applied directly to the excitation electrode of the vibrator, unnecessary mode vibration due to harmonics does not occur much.
Even when a low-pass filter is used, the required harmonic attenuation is relatively small, so that the phase shift caused by the low-pass filter is small. For example, although the frequency of the drive signal of the vibrator fluctuates with a change in temperature, in the present invention, the phase shift caused by the low-pass filter is small, so that even if the frequency fluctuates, The phase hardly changes. For this reason, the PLL control means can always maintain the vibrator in the resonance state.

According to the third aspect of the present invention, the synchronization control means (71, SQ) synchronizes the signal applied to one input of the phase comparison means with the count value of the address counter means. By changing the correspondence between the address of the data output means (62) and the waveform data, the signal (SE) applied to one input of the phase comparison means can be changed.
The phase of the signal (SP) applied to the first terminals (5a, 5b) can be freely adjusted. Therefore, the installation of the phase shift means can be omitted.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a rotation angular velocity detection device according to an embodiment.

FIG. 2 is a block diagram showing a detailed configuration of some blocks of the apparatus shown in FIG.

FIG. 3 is a front view showing the appearance and a partial cross section of the sensor element 10;

FIG. 4 is a plan view showing a vibration state of the cylindrical piezoelectric body 2.

FIG. 5 is a time chart showing an example of a signal of each section of the circuit of FIG. 1;

FIG. 6 is a time chart showing an example of a signal of each section of the circuit of FIG. 1;

FIG. 7 is a time chart showing an example of a signal of each section of the circuit of FIG. 1;

FIG. 8 is a block diagram showing a configuration of a modified example.

9 is a time chart showing an example of a signal of each section of the circuit of FIG. 8;

[Explanation of symbols]

1: Element base 2: Cylindrical piezoelectric body 3: Reference potential electrode 4a, 4b: Feedback electrode 5a, 5b: Excitation electrode 6a, 6b: Detection electrode 4a, 4b, 5a, 5b, 6a, 6b, 7a, 7b : Electrode segment 10: sensor element 12, 13, 14: low-pass filter 16, 17: inverter 18, 56: frequency divider 20: PLL circuit 30: frequency multiplier circuits 21, 31, 41: phase comparator 22, 32, 42: Loop filters 23, 33, 43: VCO (Voltage Controlled Oscillator) 34, 44, 56: Divider 40: 90 degree phase shift circuit 45, 46: Flip-flop 51: Excitation or gate 52: NAND gates 53, 55: counter 54: latch 60, 60B: pseudo sine wave generating circuits 61, 61B: counters 62, 62B: read-only memory 63: D / A converter 7 : Divider SA, SB, SC, SD, SE, SF, SG, SH, S
I, SJ, SK, SL, SM, SN, SO, SP, SQ, S41, S4
2, S43: signal

Continuation of the front page (56) References JP-A-6-18545 (JP, A) JP-A-6-281661 (JP, A) JP-A-6-249665 (JP, A) JP-A-8-61196 (JP) , A) Special Table Hei 8-542238 (JP, A) (58) Fields surveyed (Int. Cl. ⁷ , DB name) G01C 19/56 G01P 9/04

Claims (3)

(57) [Claims] A vibrating body, a vibrating body for vibrating the vibrating body.
A first terminal drive signal for moving is supplied, and, the vibrating
In the resonant state of the body to vibrate at the natural frequency by the vibration signal, the oscillator comprising a second pin, the feedback signal appears shifted a predetermined amount of phase relative to the drive signal supplied to the first terminal of the drive signal and the feedback
Phase comparing means for outputting a signal corresponding to the phase difference between the click signal, Le outputs a voltage corresponding to the signal outputted from the phase comparison means - loop filter means, and該Ru - corresponding to the output voltage of the loop filter means PLL control means including voltage-controlled oscillating means for generating a signal of a frequency; address counter means for counting the number of signals output by the PLL control means; sine wave or data having a waveform close to the sine wave are stored at a plurality of addresses. Waveform data output means for applying the count value of the address counter means to its address terminal; converting the data of the waveform output by the waveform data output means into an analog signal; D / A Conversion means; means for applying a signal corresponding to the signal output by the D / A conversion means to a first terminal of the vibrator; signal corresponding to a signal applied to a first terminal of the vibrator To one input of the phase comparing means; and a means for applying a signal corresponding to a signal appearing at a second terminal of the vibrator to the other input of the phase comparing means. . 2. A signal between a first terminal of the vibrator and one input of the phase comparing means, or between a second terminal of the vibrator and the other input of the phase comparing means. 2. The vibrator drive circuit according to claim 1, further comprising a phase shifter for shifting the phase of the phase by the predetermined amount. 3. The vibrator driving circuit according to claim 1, further comprising a synchronization control means for synchronizing a signal applied to one input of said phase comparison means with a count value of said address counter means. .