JP4011404B2 - Method for manufacturing semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device using a crystalline semiconductor and a manufacturing method thereof.
[0002]
[Prior art]
A thin film transistor (hereinafter referred to as TFT) using a thin film semiconductor is known. This TFT is formed by forming a thin film semiconductor on a substrate and using this thin film semiconductor. This TFT is used in various integrated circuits, and is particularly attracting attention as a switching element provided with each pixel of an electro-optical device, particularly an active matrix liquid crystal display device, and a driver element formed in a peripheral circuit portion. .
[0003]
As a thin film semiconductor used for a TFT, it is easy to use an amorphous silicon film, but there is a problem that its electrical characteristics are low. To obtain a characteristic improvement of the TFT Bayoi is to utilize a crystalline silicon thin film. The crystalline silicon film is called polycrystalline silicon, polysilicon, microcrystalline silicon, or the like. To obtain a silicon film having crystallinity, an amorphous silicon film is first formed, it Re be crystallized by heating thereafter.
[0004]
However, crystallization by heating requires a heating temperature of 600 ° C. or more and a time of 10 hours or more, and there is a problem that it is difficult to use a glass substrate as a substrate. For example, Corning 7059 glass used for an active type liquid crystal display device has a glass strain point of 593 ° C., and there is a problem with heating at 600 ° C. or higher in consideration of an increase in area of the substrate.
[0005]
BACKGROUND OF THE INVENTION
As means for solving these problems, an invention by the present inventors and Japanese Patent Application No. 05-294633 can be cited. This is a method in which a crystalline silicon film is obtained by adding a catalytic element, particularly nickel, to an amorphous silicon film using a solution and performing a heat treatment at a low temperature for a short time.
[0006]
[Problems to be solved by the invention]
The present invention has a higher controllability and a larger margin in the preparation of a thin film silicon semiconductor having crystallinity by heat treatment at 600 ° C. or lower using a catalyst element, on the premise of the aforementioned Japanese Patent Application No. 05-294633. The object is to provide a highly productive method. That is, an object is to provide a method for obtaining a crystalline silicon film by a more stable and highly reproducible process.
[0007]
[Means for Solving the Problems]
In the above-mentioned Japanese Patent Application No. 05-294633, a case where a region (hereinafter abbreviated as a vertical growth region) in which crystal growth is performed in a direction substantially perpendicular to the substrate in a region directly added with a catalytic element is used as an element formation region, Two crystallization methods have been proposed in the case where a region (hereinafter abbreviated as a lateral growth region) that is selectively added and is grown in a substantially horizontal direction around the added portion is used.
[0008]
As a result of detailed examination of these two crystallization methods, it has been concluded that it is desirable in terms of characteristics to use lateral growth in order to create an element formation region. Further studies were made on the crystallization method by lateral growth.
[0009]
To briefly summarize the lateral growth method in Japanese Patent Application No. 05-294633, the process is as follows. (See Figure 1)
First, a base film made of silicon oxide is formed on a glass substrate such as a Corning 7059 substrate. An amorphous silicon film 12 is formed on these substrates 11 by plasma CVD or low pressure thermal CVD to a thickness of 100 to 5000 mm, preferably 500 to 800 mm.
Further, a mask material 21 typically made of a silicon oxide film is formed thereon, and an opening for adding nickel is formed therein to expose the underlying amorphous silicon film. Thereafter, if necessary, the surface of the amorphous silicon film exposed in the opening is thinly oxidized (indicated by 20 in FIG. 1), and nickel is added using a solution 14 containing nickel. The crystallinity in which the substrate added with nickel by the above method is crystal-grown in the lateral direction by heat treatment at 450 to 600 ° C., typically about 550 ° C., in an inert atmosphere such as N ₂ or in an oxidizing atmosphere. A silicon film 25 is obtained.
[0010]
In the above series of processes, an attempt was made to change the mask material from a silicon oxide film to a silicon nitride film.
As a result, it was confirmed that when the mask material is a silicon oxide film, nickel permeates the silicon oxide film and reaches the amorphous silicon film when heat treatment is performed for a long time. As a phenomenon, it was observed that vertical growth due to the passing nickel occurred and the lateral growth was inhibited. On the other hand, such a phenomenon was not observed when a silicon nitride film was used as a mask material. However, it was observed that the amount of lateral growth was slightly less than that of the silicon oxide mask. As a result of subsequent experiments, it was found that this small amount of lateral growth can be avoided by performing hydrogen extraction beforehand. That is, it is necessary for hydrogen to escape from the amorphous silicon film as a preparation for crystallization. However, when the silicon nitride film is used as a mask, it is difficult to escape. It turns out.
[0011]
Next, the case where the base film, amorphous silicon, and mask material were continuously formed without being exposed to the atmosphere, or the case where they were separately formed by being exposed to the atmosphere were compared. Then, it was found that the lateral growth distance is longer and the crystallinity is higher in the case of continuous film formation even though the film qualities are set to be the same. This is considered to mean that the process of lateral growth in which crystal growth is performed substantially parallel to the substrate is greatly influenced by the state of the interface.
[0012]
Therefore, from the above series of experiments, the crystal growth method using lateral growth with excellent reproducibility and controllability is
A step of continuously forming a silicon oxide film and an amorphous silicon film on a glass substrate;
A step of continuously performing a heat treatment without exposing the film-formed substrate to the atmosphere;
Forming a silicon nitride film continuously on the substrate from which hydrogen has been removed; and
Patterning and etching the silicon nitride film on the substrate on which the three-layer film is formed, and partially exposing the amorphous silicon film;
Applying a solution containing nickel to the substrate and adding nickel to the selectively exposed amorphous silicon film;
And a step of crystallizing the nickel-coated substrate by heat treatment.
As a multipurpose substrate processing apparatus necessary for adopting such a configuration, it is possible to continuously form a silicon oxide film, an amorphous silicon film, and a silicon nitride film, and heat treatment without exposure to the atmosphere ( It can be seen that there is a need for an apparatus having a configuration capable of the hydrogen extraction step.
[0013]
In particular,
A plurality of pressure-reducing processing chambers;
The plurality of processing chambers are connected through a common chamber that can be decompressed,
The common chamber has means for transporting the substrate between the processing chambers,
At least one of the plurality of treatment chambers in the previous period can form a silicon oxide film using plasma CVD,
At least one of the plurality of treatment chambers in the previous period can form a silicon nitride film using plasma CVD,
At least one of the plurality of processing chambers in the previous period can form an amorphous silicon film using plasma CVD,
At least one of the plurality of treatment chambers in the previous period can be subjected to heat treatment at 400 ° C. or more on a plurality of substrates at the same time.
What is needed is a multipurpose substrate processing apparatus.
[0014]
An outline of such an apparatus is shown in FIGS.
The apparatus shown in FIG. 2 can be used for various purposes, and can be combined in a required number of processing chambers for performing required film formation and annealing. As a substrate processed by the apparatus shown in FIG. 2, a glass substrate, a silicon substrate, other insulating substrates, or a semiconductor substrate can be used. That is, any substrate having an insulating surface can be used. For example, an inexpensive glass substrate is generally used for an electro-optical device such as an active matrix liquid crystal display device or an image sensor.
[0015]
For example, 301 is a substrate transfer chamber which is a common chamber, and 306 and 307 are spare chambers among processing chambers for processing various substrates, and one is used for loading a substrate, and the other is used for carrying a substrate. Used for. 302 is a plasma CVD apparatus for forming an insulating film, 303 is a plasma CVD apparatus for forming amorphous silicon, 304 is a plasma CVD apparatus for forming a silicon nitride film, and 305 is A configuration such as a heat treatment furnace for performing hydrogen removal can be employed. Among them, only the heat treatment process is a process that takes several hours to process, and causes a reduction in the overall throughput. Therefore, a plurality of substrates 322 are simultaneously heated by the heater 323 , and if necessary, the stage 315 Therefore, it is important that the robot is transported to the substrate transport position, transported by the robot arm 314, and transferred to the next process. Note that the preliminary chamber can also be referred to as a processing chamber in the sense that it has a function of loading and unloading substrates. Further, the processing chambers are partitioned by gate valves 308 to 313, and can be evacuated independently by the vacuum pumps 319 to 321 to prevent contamination by gases during each processing. The substrate 322 is transferred by the robot arm 314, and throughput can be improved by multitasking.
[0016]
Such a combination can be arbitrarily performed. Elements that can be combined are plasma CVD, low pressure thermal CVD (hereinafter abbreviated as LPCVD), photo CVD, microwave CVD, heating furnace, annealing furnace by light irradiation, sputtering, plasma annealing, plasma etching. (Anisotropic or isotropic) can be mentioned, but at least the above-described configuration is necessary to achieve the configuration of the present invention.
[0017]
In the present invention, the most prominent effect can be obtained when nickel is used as the catalyst element, but the other usable catalyst elements are preferably Ni, Pd, Pt, Cu, Ag, Au, In, and the like. One or more elements selected from Sn , P, As, and Sb can be used.
[0018]
The structure of the invention disclosed in this specification will be described below. The first invention disclosed in this specification is:
Forming a silicon oxide film and an amorphous silicon film over a substrate having an insulating surface;
A step of continuously performing a heat treatment without exposing the film-formed substrate to the atmosphere;
Forming a silicon nitride film continuously on the substrate from which hydrogen has been removed; and
Patterning the silicon nitride film and selectively exposing the amorphous silicon film;
Introducing a metal element in contact with the exposed amorphous silicon film to promote crystallization of the amorphous silicon film;
Heat-treating and crystal growing the amorphous silicon film in a direction parallel to the substrate from the region where the metal element is introduced;
It is characterized by having.
[0019]
Other inventions are:
A first treatment chamber for forming a silicon oxide film and an amorphous silicon film over a substrate having an insulating surface;
A second processing chamber for continuously performing a heat treatment without exposing the film-formed substrate to the atmosphere;
A third processing chamber for continuously forming a silicon nitride film on the substrate from which hydrogen has been removed;
A common chamber connected in common to the first processing chamber, the second processing chamber, and the third processing chamber;
Have
The first processing chamber, the second processing chamber, and the third processing chamber have a sealed structure,
The common chamber has means for transporting a substrate or a sample.
[0020]
Examples of the above configuration include the configurations shown in FIGS. 2 and 3.
[0021]
Other inventions are:
Forming a silicon oxide film and an amorphous silicon film over a substrate having an insulating surface;
A step of continuously performing a heat treatment without exposing the film-formed substrate to the atmosphere;
Forming a silicon nitride film continuously on the substrate from which hydrogen has been removed; and
Patterning the silicon nitride film into the shape of an active layer and selectively exposing the amorphous silicon film;
Introducing a metal element in contact with the exposed amorphous silicon film to promote crystallization of the amorphous silicon film;
Heat-treating and crystal growing the amorphous silicon film in a direction parallel to the substrate from the region where the metal element is introduced;
Patterning the crystal-grown silicon film using the remaining silicon nitride film as a mask to form an active layer;
It is characterized by having.
[0022]
Other inventions are:
Forming a silicon nitride film as a mask for forming an active layer on an amorphous silicon film formed on a substrate having an insulating surface;
Introducing a metal element that promotes crystallization of the amorphous silicon film using the silicon nitride film as a mask;
Applying heat treatment to crystallize the amorphous silicon film;
Forming an active layer using the silicon nitride film as a mask;
It is characterized by having.
[0023]
【Example】
[Example 1]
In this embodiment, a 500-nm silicon nitride film is selectively provided, and nickel is selectively introduced using the silicon nitride film as a mask.
[0024]
FIG. 1 used in the above description is reprinted into this embodiment, and an outline of a manufacturing process in this embodiment is shown. First, on a glass substrate (Corning 7059, 10 cm square), using the apparatus shown in FIGS. 2 and 3, the silicon oxide film is 2000 Å and the amorphous silicon film 12 is 100˜1500 Å using a plasma CVD method. Form. Here, the amorphous silicon film 12 is formed to a thickness of 1000 mm. The film formation conditions for the silicon oxide film are as follows: film formation pressure of 0.1 to 1 torr, 0.3 torr in this embodiment, TEOS: O ₂ at a ratio of 1:10, RF power of 1 to 500 W, and 300 W in this embodiment. Film formation was performed at a substrate temperature of 100 to 500 ° C., and 400 ° C. in this example. The film formation conditions for the amorphous silicon film are a film formation pressure of 0.1 to 1 torr, 0.3 torr in this example, monosilane as a film forming gas, RF power of 1 to 100 W, and 35 W in this example. The film was formed at 100 to 300 ° C., and 160 ° C. in this example. (FIG. 1A) Next, the substrate was transferred to a heat treatment furnace 305 without being exposed to the atmosphere, and was subjected to heat treatment in N ₂ at 350 to 550 ° C., here, 400 ° C. for 1 hour to form a film by plasma CVD. Hydrogen is released from the amorphous silicon film 12.
After that, the substrate 322 is transferred to the processing chamber 304 without being exposed to the atmosphere again, and the silicon nitride film 21 serving as a mask is formed to a thickness of 200 mm or more, here 500 mm. The film forming conditions are film forming pressure 0.1 to 1 torr, 0.3 torr in this embodiment, monosilane: ammonia at a ratio of 1: 4, RF power 100 to 500 W, 300 W in this embodiment, and substrate temperature 200. Film formation was performed at ˜500 ° C. and 400 ° C. in this example. Regarding the film thickness of the silicon nitride film 21, it has been confirmed that there is no problem even if it is 100 mm according to experiments by the inventors and the like.
[0025]
Then, the silicon nitride film 21 is panned into a required pattern by a normal photolithography patterning process. Then, a thin silicon oxide film 20 is formed by irradiation with ultraviolet rays in an oxygen atmosphere. The silicon oxide film 20 is produced by irradiating UV light for 5 minutes in an oxygen atmosphere. The thickness of the silicon oxide film 20 is considered to be about 20 to 50 mm (FIG. 1A). Note that the silicon oxide film for improving the wettability may be added just well depending on the hydrophilicity of the silicon oxide film of the mask when the size of the solution and the pattern match. However, such an example is special, and it is generally safer to use the silicon oxide film 20.
[0026]
In this state, 5 ml of an acetate solution containing 100 ppm of nickel is dropped (in the case of a 10 cm square substrate). At this time, it is possible to prevent the spinner from wrapping around the back surface by applying the spinner while rotating it at 150 rpm. Furthermore, after maintaining for 5 minutes in this state, spin drying is performed at 2000 rpm for 60 seconds using a spinner. (Fig. 1 (B))
[0027]
Then, the amorphous silicon film 12 is crystallized by performing a heat treatment at 550 ° C. (nitrogen atmosphere) for 8 hours. At this time, as indicated by 23 from the region of the portion 22 where nickel is introduced, crystal growth of about 40 μm is performed in the lateral direction from the region where nickel is not introduced. In FIG. 1C, 24 is a region where nickel is directly introduced and crystallization is performed, and 25 is a region where crystallization is performed in the lateral direction. In addition, it has been confirmed that in the 25 region, crystal growth is performed substantially in the <111> axis direction.
[0028]
In this embodiment, the concentration of nickel in the region where nickel is directly introduced can be controlled in the range of 1 × 10 ¹⁶ atoms cm ⁻³ to 1 × 10 ¹⁹ atoms cm ⁻³ by changing the solution concentration and holding time. Similarly, the concentration of the lateral growth region can be controlled to be lower than that.
[0029]
When forming a device after that, it is necessary to peel off the mask material. At this time, when the previous silicon oxide mask was used, a hydrofluoric acid-based etchant or a fluorine-based gas was used. Dry etching must be used, and damage to glass and underlying silicon oxide was significant. In contrast, in the case of a silicon nitride film, it is possible to use hot phosphoric acid, which has the advantage that the crystalline silicon film, silicon oxide, and glass are less damaged.
[0030]
As described above, the region where the crystal grows in the lateral direction has a low concentration of the catalytic element and good crystallinity. Therefore, it is useful to use this region as the active region of the semiconductor device. For example, it is extremely useful to use as a channel formation region of a thin film transistor.
[0031]
[Example 2]
In this embodiment, as shown in Embodiment 1, nickel is selectively introduced, and an example is shown in which an electronic device is formed using a region in which crystal growth has occurred in the lateral direction (direction parallel to the substrate). When such a configuration is adopted, the nickel concentration in the active layer region of the device can be further reduced, and a very preferable configuration can be obtained from the viewpoint of electrical stability and reliability of the device.
[0032]
This embodiment relates to a manufacturing process of a TFT used for controlling an active matrix pixel. FIG. 4 shows a manufacturing process of this example. First, the substrate 201 is cleaned, and a silicon oxide base film 202 having a thickness of 2000 mm is formed by plasma CVD using TEOS (tetra-ethoxy silane) and oxygen as source gases by a multipurpose substrate processing apparatus shown in FIGS. Form. Then, an intrinsic (I-type) amorphous silicon film 203 having a thickness of 500 to 1500 mm, for example, 1000 mm is formed by plasma CVD. Next, a heat treatment is performed in a heat treatment furnace 305 at 450 ° C. for 1 hour to perform hydrogen removal. Thereafter, a silicon nitride film 205 having a thickness of 500 to 2000 mm, for example 1000 mm, is continuously formed in the same apparatus by a plasma CVD method. Then, the silicon nitride film 205 is selectively etched to form an exposed region 206 of amorphous silicon. If patterning of this region is performed so that the silicon nitride film remains on the region where subsequent island formation is performed, the crystalline silicon film can be patterned using the silicon nitride film as a mask after the crystallization step. It is useful in the process.
[0033]
Then, a solution (here, an acetate solution) containing nickel element as a catalytic element for promoting crystallization is applied by the method shown in Example 1. The concentration of nickel in the acetic acid solution is 100 ppm. In addition, the detailed process sequence and conditions are the same as those shown in the first embodiment.
[0034]
Thereafter, heat annealing is performed in a nitrogen atmosphere at 500 to 620 ° C., for example, 550 ° C. for 4 hours to crystallize the silicon film 303. In crystallization, crystal growth proceeds in a direction parallel to the substrate as indicated by an arrow starting from a region 206 where nickel and a silicon film are in contact with each other. In the figure, a region 204 indicates a portion crystallized by direct introduction of nickel, and a region 203 indicates a portion crystallized in the lateral direction. The crystal in the horizontal direction indicated by 203 is about 25 μm. Further, it has been confirmed that the crystal growth direction is approximately the <111> axis direction. (Fig. 4 (A))
[0035]
Next, using the silicon nitride film 205 as a mask, the crystalline silicon film 204 is formed by dry etching. By this step, the directly added region 206 having a high nickel concentration can be etched off. As a result, in the present embodiment, in the active layer 208, these regions having a high nickel concentration are not overlapped with the channel forming region. Thereafter, the silicon nitride film 205 is etched using hot phosphoric acid to form an island-shaped active layer region 208.
[0036]
Then, the surface of the active layer (silicon film) 208 is oxidized by leaving it in an atmosphere of 10 atm and 500 to 600 ° C., typically 550 ° C. containing 100% by volume of water vapor, to oxidize the surface of the active layer (silicon film) 208. A silicon film 209 is formed. The thickness of the silicon oxide film is 1000 mm. After the silicon oxide film 209 is formed by thermal oxidation, the substrate is held at 400 ° C. in an ammonia atmosphere (1 atm, 100%). In this state, the substrate is irradiated with infrared light having a peak at a wavelength of 0.6 to 4 μm, for example, 0.8 to 1.4 μm for 30 to 180 seconds, and the silicon oxide film 209 is nitrided. Apply. At this time, 0.1 to 10% HCl may be mixed in the atmosphere.
[0037]
A halogen lamp is used as the infrared light source. The intensity of the infrared light is adjusted so that the temperature on the single crystal silicon wafer of the monitor is between 900-1200 ° C. Specifically, the temperature of the thermocouple embedded in the silicon wafer is monitored, and this is fed back to the infrared light source. In this embodiment, the temperature rise is constant, the speed is 50 to 200 ° C./second, and the temperature drop is natural cooling to 20 to 100 ° C. Since this infrared light irradiation selectively heats the silicon film, heating of the glass substrate can be minimized. (Fig. 4 (B))
[0038]
Subsequently, an aluminum film (including 0.01 to 0.2% scandium) having a thickness of 3000 to 8000 mm, for example, 6000 mm is formed by a sputtering method. Then, the gate electrode 210 is formed by patterning the aluminum film. (Fig. 2 (C))
[0039]
Further, the surface of the aluminum electrode is anodized to form an oxide layer 211 on the surface. This anodization is performed in an ethylene glycol solution containing 1 to 5% tartaric acid. The thickness of the resulting oxide layer 211 is 2000 mm. Note that the oxide 211 has a thickness for forming an offset gate region in a subsequent ion doping step, and thus the length of the offset gate region can be determined by the anodic oxidation step. (Fig. 4 (D))
[0040]
Next, by an ion doping method (also called plasma doping method), self-alignment is performed in the active layer region (which constitutes the source / drain and channel) using the gate electrode portion, that is, the gate electrode 210 and the surrounding oxide layer 211 as a mask. In particular, an impurity imparting N conductivity type (here, phosphorus) is added. As the doping gas, phosphine (PH ₃ ) is used, and the acceleration voltage is set to 60 to 90 kV, for example, 80 kV. The dose amount is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 4 × 10 ¹⁵ cm ⁻² . As a result, N-type impurity regions 212 and 213 can be formed. As is apparent from the figure, the impurity region and the gate electrode are in an offset state separated by a distance x. Such an offset state is particularly effective in reducing leakage current (also referred to as off-current) when a reverse voltage (minus in the case of an N-channel TFT) is applied to the gate electrode. In particular, in the TFT for controlling the pixels of the active matrix as in this embodiment, it is desired that the leakage current is low so that the charge accumulated in the pixel electrode does not escape in order to obtain a good image. It is effective.
[0041]
Thereafter, annealing was performed by laser light irradiation. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) is used, but other lasers may be used. The laser light was irradiated at an energy density of 200 to 400 mJ / cm ² , for example, 250 mJ / cm ^2, and ² to 10 shots, for example, 2 shots were irradiated at one place. The effect may be increased by heating the substrate to about 200 to 450 ° C. during the laser light irradiation. (Fig. 4 (E))
[0042]
Subsequently, a silicon oxide film 214 having a thickness of 6000 mm is formed as an interlayer insulator by a plasma CVD method. Further, a transparent polyimide film 215 is formed by spin coating to flatten the surface. A transparent conductive film (ITO film) having a thickness of 800 mm is formed on the plane formed in this manner by sputtering, and this is patterned to form a pixel electrode 216.
[0043]
Then, contact holes are formed in the interlayer insulators 214 and 215, and TFT electrodes and wirings 217 and 218 are formed of a multilayer film of a metal material, for example, titanium nitride and aluminum. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm to complete an active matrix pixel circuit having TFTs. (Fig. 4 (F))
[0044]
Example 3
FIG. 5 shows a cross-sectional view of the manufacturing process of this example. First, a silicon oxide base film 502 having a thickness of 2000 mm was formed on a substrate (Corning 7059) 501 by sputtering. The substrate is annealed at a temperature higher than the strain temperature before or after the formation of the base film, and then slowly cooled to below the strain temperature at 0.1 to 1.0 ° C./min. There is little shrinkage of the substrate in the accompanying processes (including the thermal oxidation process of the present invention and the subsequent thermal annealing process), and mask alignment becomes easy . In the Corning 7059 substrate, after annealing at 620 to 660 ° C. for 1 to 4 hours, 0.03 to 1.0 ° C./min, preferably 0.1 to 0.3 ° C./min, and then slowly cooled to 400 to 500 It is good to take it out when the temperature drops to ℃.
[0045]
Next, a silicon oxide film, an amorphous silicon film, and a silicon nitride film were successively formed by plasma CVD as in Example 2. Then, the amorphous silicon film was crystallized by the method shown in Example 2. Then, it was crystallized by annealing at 600 ° C. for 48 hours in a nitrogen atmosphere (atmospheric pressure), and the silicon film was patterned to a size of 10 to 1000 μm square to form an island-like silicon film (TFT active layer) 503. . (Fig. 5 (A))
[0046]
Thereafter, an atmosphere of oxygen containing 70 to 90% of water vapor, 1 atmosphere, 500 to 750 ° C., typically 600 ° C. is formed using a pyrogenic reaction method at a ratio of hydrogen / oxygen = 1.5 to 1.9. did. The silicon film surface was oxidized by leaving it in this atmosphere for 3 to 5 hours to form a silicon oxide film 504 having a thickness of 500 to 1500 mm, for example, 1000 mm. Notable teeth, due to such oxidation, the surface of the initial silicon film was reduced by 50 mm or more, and as a result, the contamination of the outermost surface portion of the silicon film did not reach the silicon-silicon oxide interface. That is, a clean silicon-silicon oxide interface was obtained. Since the thickness of the silicon oxide film is twice that of the silicon film to be oxidized, a silicon oxide film having a thickness of 1000 mm is oxidized to obtain a silicon oxide film having a thickness of 1000 mm. The thickness will be 500 mm.
[0047]
In general, the thinner the silicon oxide film (gate insulating film) and the active layer, the better the characteristics of improving mobility and reducing off-current. On the other hand, the initial amorphous silicon film is easily crystallized as the film thickness increases. Therefore, conventionally, there has been a contradiction in terms of characteristics and process regarding the thickness of the active layer. The present invention solves this contradiction for the first time. That is, a thick amorphous silicon film is formed before crystallization to obtain a good crystalline silicon film. Next, by oxidizing the silicon film, the silicon film is thinned to improve the characteristics as a TFT. Further, this thermal oxidation has a feature that the amorphous component and the crystal grain boundary in which recombination centers are likely to exist are easily oxidized, and as a result, the number of recombination centers in the active layer is reduced. This increases the product yield.
[0048]
After the silicon oxide film 504 was formed by thermal oxidation, the substrate was annealed at 600 ° C. for 2 hours in a dinitrogen monoxide atmosphere (1 atm, 100%). (Fig. 5 (B))
Subsequently, a polycrystalline silicon film (containing 0.01 to 0.2% phosphorus) having a thickness of 3000 to 8000 mm, for example, 6000 mm was formed by low pressure CVD. Then, the gate electrode 505 was formed by patterning the silicon film. Further, an impurity (in this case, phosphorus) is given to the active layer region (which constitutes a source / drain and a channel) by an ion doping method (also called a plasma doping method) in a self-aligning manner using this silicon film as a mask. ) Was added. As the doping gas, phosphine (PH ₃ ) was used, and the acceleration voltage was set to 60 to 90 kV, for example, 80 kV. The dose was 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 5 × 10 ¹⁵ cm ⁻² . As a result, N-type impurity regions 506 and 507 were formed.
[0049]
Thereafter, annealing was performed by laser light irradiation. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used, but other lasers may be used. The laser light was irradiated at an energy density of 200 to 400 mJ / cm ² , for example, 250 mJ / cm ^2, and ² to 10 shots, for example, 2 shots were irradiated at one place. The effect may be increased by heating the substrate to about 200 to 450 ° C. during the laser light irradiation. (Fig. 5 (C))
[0050]
Further, this step may be a method by lamp annealing using near infrared light. Near-infrared rays are more easily absorbed by crystallized silicon than amorphous silicon, and effective annealing comparable to thermal annealing at 1000 ° C. or higher can be performed. On the other hand, the glass substrate (far infrared light is absorbed by the glass substrate, but visible / near infrared light (wavelength 0.5 to 4 μm) is hardly absorbed) is hardly absorbed. Since it is not heated and only a short time is required, it can be said that it is an optimal method in a process where shrinkage of the glass substrate is a problem.
[0051]
Subsequently, a silicon oxide film 508 having a thickness of 6000 mm was formed as an interlayer insulator by a plasma CVD method. Polyimide may be used as the interlayer insulator. Further, contact holes were formed, and TFT electrodes and wirings 509 and 510 were formed of a metal material, for example, a multilayer film of titanium nitride and aluminum. Finally, annealing was performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm to complete the TFT. (Fig. 5 (D))
[0052]
The mobility of the TFT obtained by the method described above was 110 to 150 cm ² / Vs, and the S value was 0.2 to 0.5 V / digit. Further, when a P-channel TFT in which boron is doped in the source / drain by a similar method is also produced, the mobility is 90 to 120 cm ² / Vs, the S value is 0.4 to 0.6 V / digit, Compared with the case where the gate insulating film is formed by the PVD method or the CVD method, the mobility is 20% or more higher and the S value is reduced by 20% or more.
Also, from the viewpoint of reliability, the TFT manufactured in this example showed a good result that is not inferior to a TFT manufactured by high-temperature thermal oxidation at 1000 ° C.
[0053]
Example 4
This embodiment shows an example in which the present invention is applied to an active matrix liquid crystal display device. FIG. 7 is a top view showing an outline of one substrate of the active matrix liquid crystal display device of FIG. 6.
[0054]
In the figure, 61 is a glass substrate, 62 is a pixel region configured in a matrix, and several hundreds of pixels are formed in the pixel region. Each of the pixels is provided with a TFT as a switching element. A driver TFT for driving the TFT in the pixel region is arranged in the peripheral driver region 62. The pixel region 63 and the driver region 62 are integrally formed on the same substrate 61.
[0055]
The TFT disposed in the driver region 62 needs to pass a large current, and high mobility is required. In addition, since the TFT arranged in the pixel region 63 needs to solidify the charge of the pixel electrode, the TFT needs to have a characteristic with low off-state current (leakage current). For example, the TFT disposed in the pixel region 63 may be a TFT obtained by simple laser crystallization without using nickel. In this case, laser annealing is performed with the same energy as that of crystallization in the vicinity of nickel. The crystalline silicon film that does not use nickel crystallized with low energy in this way has a feature that the off-current is generally low although the mobility is low because the crystallinity is poor compared to the case where nickel is used. When used as a pixel, no particular problem occurs.
[0056]
【effect】
By manufacturing a semiconductor device using a crystalline silicon film that is crystallized at a low temperature in a short time by introducing a catalytic element, a device with high productivity and good characteristics can be obtained.
[Brief description of the drawings]
FIG. 1 shows a process of an embodiment. FIG. 2 shows a manufacturing apparatus of a semiconductor device.
FIG. 3 illustrates a manufacturing apparatus of a semiconductor device.
FIG. 4 shows a manufacturing process of the example.
FIG. 5 shows a manufacturing process of the example.
FIG. 6 shows a configuration of an example.
[Explanation of symbols]
11... Glass substrate 12... Amorphous silicon film 13... Silicon oxide film 14... Nickel-containing acetic acid solution film 15. Silicon oxide film 20... Silicon oxide film

Claims (6)

A first processing chamber;
A second processing chamber;
A third processing chamber;
A method for manufacturing a semiconductor device using a common chamber connected in common to the first processing chamber, the second processing chamber, and the third processing chamber and having a means for transporting a substrate. ,
Forming a silicon oxide film on the substrate in the first processing chamber;
Continuously forming an amorphous silicon film on the silicon oxide film in the first processing chamber;
Moving the substrate from the first processing chamber to the second processing chamber without exposing to the atmosphere through the common chamber;
Heating the amorphous silicon film in the second treatment chamber to perform hydrogen extraction from the amorphous silicon film;
Moving the substrate from the second processing chamber to the third processing chamber without exposure to the atmosphere through the common chamber;
A method for manufacturing a semiconductor device, comprising forming a silicon nitride film over the amorphous silicon film from which hydrogen has been extracted in the third treatment chamber. A first processing chamber;
A second processing chamber;
A third processing chamber;
A method for manufacturing a semiconductor device using a common chamber connected in common to the first processing chamber, the second processing chamber, and the third processing chamber and having a means for transporting a substrate. ,
Forming a silicon oxide film on the substrate in the first processing chamber;
Continuously forming an amorphous silicon film on the silicon oxide film in the first processing chamber;
Moving the substrate from the first processing chamber to the second processing chamber without exposing to the atmosphere through the common chamber;
Heating the amorphous silicon film in the second treatment chamber to perform hydrogen extraction from the amorphous silicon film;
Moving the substrate from the second processing chamber to the third processing chamber without exposure to the atmosphere through the common chamber;
Forming a silicon nitride film on the amorphous silicon film from which the hydrogen has been removed in the third processing chamber;
Patterning the silicon nitride film to selectively expose the amorphous silicon film;
A metal element that promotes crystallization of amorphous silicon is selectively added to the amorphous silicon film using the patterned silicon nitride film as a mask,
A method for manufacturing a semiconductor device, wherein the amorphous silicon film is crystallized from a region to which the metal element is added by performing heat treatment. A first processing chamber;
A second processing chamber;
A third processing chamber;
Fabrication of a semiconductor device using a fabrication apparatus having a common chamber that is commonly connected to the first processing chamber, the second processing chamber, and the third processing chamber and that has a means for transporting a substrate. A method,
Forming a silicon oxide film on the substrate in the first processing chamber;
Continuously forming an amorphous silicon film on the silicon oxide film in the first processing chamber;
Moving the substrate from the first processing chamber to the second processing chamber without exposing to the atmosphere through the common chamber;
Heating the amorphous silicon film in the second treatment chamber to perform hydrogen extraction from the amorphous silicon film;
Moving the substrate from the second processing chamber to the third processing chamber without exposure to the atmosphere through the common chamber;
Forming a silicon nitride film on the amorphous silicon film from which the hydrogen has been removed in the third processing chamber;
Patterning the silicon nitride film to selectively expose the amorphous silicon film;
Forming a silicon oxide film on the silicon nitride film and the exposed amorphous silicon film;
A metal element that promotes crystallization of amorphous silicon is selectively added on the silicon oxide film using the patterned silicon nitride film as a mask,
A method for manufacturing a semiconductor device, wherein the amorphous silicon film is crystallized from a region to which the metal element is added by performing heat treatment. In any one of Claim 1 thru | or 3,
The method for manufacturing a semiconductor device, wherein the silicon oxide film and the amorphous silicon film are formed by a plasma CVD method. In any one of Claims 1 thru | or 4,
The method for manufacturing a semiconductor device, wherein the silicon nitride film is formed by a plasma CVD method. In any one of Claims 1 thru | or 5,
The method of manufacturing a semiconductor device, wherein the metal element is one or more kinds of elements selected from Ni, Pd, Pt, Cu, Ag, Au, P, As.

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