JP2003031499A - Preparation apparatus of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a preparation technique of high controllability, large margin and high producibility. SOLUTION: The apparatus has a first treatment chamber for forming a silicon oxide film and an amorphous silicon film on a substrate with an insulation surface, a second treatment chamber for dehydrogenization by performing heat treatment continuously without exposing the substrate subjected to film formation to the air, a third treatment chamber for forming a silicon nitride film continuously in the dehydrogenized substrate and a common chamber connected commonly to the first treatment chamber, the second treatment chamber and the third treatment chamber. The first treatment chamber, the second treatment chamber and the third treatment chamber have an air-tight structure. The common chamber has a means for carrying a substrate. After a substrate is subjected to heat treatment in the second treatment chamber, treatment is carried out in each treatment chamber.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device using a crystalline semiconductor and a manufacturing method thereof.

[0002]

2. Description of the Related Art A thin film transistor (hereinafter referred to as TFT) using a thin film semiconductor is known. This TFT is formed by forming a thin film semiconductor on a substrate and using this thin film semiconductor. This TFT is used in various integrated circuits, and is particularly noted as a switching element provided in each pixel of an electro-optical device, particularly an active matrix type liquid crystal display device, and a driver element formed in a peripheral circuit portion. .

As a thin film semiconductor used for TFT,
Although it is easy to use an amorphous silicon film, there is a problem in that its electrical characteristics are low. In order to improve the characteristics of the TFT, a crystalline silicon thin film may be used. A crystalline silicon film is referred to as polycrystalline silicon, polysilicon, microcrystalline silicon, or the like. In order to obtain this crystalline silicon film, an amorphous silicon film may first be formed and then crystallized by heating.

However, crystallization by heating requires heating at a temperature of 600 ° C. or higher for 10 hours or longer, which makes it difficult to use a glass substrate as a substrate. For example, Corning 7059 glass used in an active type liquid crystal display device has a glass strain point of 593 ° C., and there is a problem in heating at 600 ° C. or higher in consideration of increasing the area of a substrate.

[Background of the Invention] As a means for solving the above problems, an invention by the present inventors, Japanese Patent Application No. 05-2
94633 can be mentioned. This is a method in which a catalytic element, especially nickel, is added to an amorphous silicon film using a solution and a crystalline silicon film is obtained by heat treatment at low temperature for a short time.

[0006]

DISCLOSURE OF THE INVENTION The present invention is directed to the production of a thin film silicon semiconductor having crystallinity by heat treatment at 600 ° C. or lower using a catalytic element, as described in Japanese Patent Application No. 05-29.
Based on 4633, it is an object of the present invention to provide a method with high controllability and a large margin and high productivity. That is, an object is to provide a method for obtaining a crystalline silicon film by a more stable and highly reproducible process.

[0007]

[Means for Solving the Problems] Japanese Patent Application No. 05-2
In 94633, a case where a region in which a catalytic element is directly added in a region in which crystal growth is performed in a direction substantially perpendicular to the substrate (hereinafter referred to as a vertical growth region) is used as an element formation region, Two crystallization methods have been proposed in the case of using a region (hereinafter, abbreviated as a lateral growth region) grown substantially horizontally on the substrate around the added portion.

As a result of detailed examination of these two crystallization methods, it was concluded that lateral growth is preferable in terms of characteristics in order to form an element formation region.
Then, the crystallization method by the lateral growth was further examined.

The lateral growth method in Japanese Patent Application No. 05-294633 is briefly summarized as follows. (See FIG. 1) First, a base film made of silicon oxide is formed on a glass substrate such as a Corning 7059 substrate.
An amorphous silicon film 12 having a thickness of 100Å to 50 is formed on the base 11.
The film is formed by plasma CVD or reduced pressure thermal CVD to a thickness of 00Å, preferably 500Å to 800Å. Further, a mask material 21 typically made of a silicon oxide film is formed thereon, and an opening portion for adding nickel is formed therein to expose the underlying amorphous silicon film. Then, if necessary, the surface of the amorphous silicon film exposed in the openings is thinly oxidized (indicated by 20 in FIG. 1), and nickel is added using a solution 14 containing nickel. The substrate to which nickel is added by the above method is heated in an inert atmosphere such as N ₂ or an oxidizing atmosphere at 450 to 600 ° C., typically 55
By performing a heat treatment at about 0 ° C., a crystalline silicon film 25 is obtained which has grown laterally.

With respect to the above series of processes, an attempt was made to change the mask material from a silicon oxide film to a silicon nitride film.
As a result, it was confirmed that when the mask material was a silicon oxide film, nickel would permeate the silicon oxide film and reach the amorphous silicon film when heat treatment was performed for a long time. As a phenomenon, it was observed that vertical growth was caused by the nickel that had passed therethrough, and lateral growth was hindered. On the other hand, when a silicon nitride film was used as a mask material, such a phenomenon was not observed. However, it was observed that the lateral growth amount was slightly smaller than that of the silicon oxide mask. As a result of subsequent experiments, it was found that this small amount of lateral growth can be avoided by performing hydrogen discharge in advance. That is, it is necessary for hydrogen to escape from the amorphous silicon film as a preparation for crystallization, but when the silicon nitride film is used as a mask, it becomes difficult for it to escape. It turned out.

Next, a comparison was made between the case where the underlayer, the amorphous silicon, and the mask material are continuously formed without being exposed to the atmosphere at all, or the case where they are separately exposed to the atmosphere. Then, it was found that although the film quality was set to be the same, the lateral growth distance was longer and the crystallinity was higher when the films were continuously formed. It is considered that this means that the process of lateral growth in which crystals grow substantially parallel to the substrate is greatly affected by the state of the interface.

Therefore, from the above series of experiments, according to the crystal growth method using lateral growth excellent in reproducibility and controllability, a silicon oxide film and an amorphous silicon film are continuously formed on a glass substrate. A step of continuously heat-treating the formed substrate without exposing the formed substrate to the atmosphere to form hydrogen, and a step of continuously forming a silicon nitride film on the substrate from which the hydrogen is formed. Patterning and etching of the silicon nitride film are performed on the substrate having the three-layer film formed thereon to partially expose the amorphous silicon film, and a solution containing nickel is applied to the substrate. And a step of adding nickel to the selectively exposed amorphous silicon film and a step of crystallizing the substrate coated with nickel by heat treatment. Then, as a multipurpose substrate processing apparatus required to have such a configuration, a silicon oxide film, an amorphous silicon film, and a silicon nitride film can be continuously formed, and a heat treatment (exposure) is performed without being exposed to the atmosphere even once. It is understood that an apparatus having a structure capable of performing the hydrogen discharging step) is required.

Specifically, there are a plurality of depressurizable processing chambers, and the plurality of processing chambers are connected via a depressurizable common chamber, and a substrate is placed between the processing chambers in the common chamber. At least one of the plurality of processing chambers is capable of forming a silicon oxide film by using plasma CVD, and at least one of the plurality of processing chambers is provided with a means for transferring. A silicon nitride film can be formed using CVD, and an amorphous silicon film can be formed using plasma CVD in at least one of the plurality of processing chambers in the previous period. At least one of the above needs a multipurpose substrate processing apparatus characterized in that it is possible to simultaneously perform heat treatment at 400 ° C. or higher on a plurality of substrates.

An overview of such a device is shown in FIGS. The apparatus shown in FIG. 2 can be used for various purposes, and it is possible to combine the required number of processing chambers for performing required film formation and annealing processing. Substrates processed by the apparatus shown in FIG. 2 include glass substrates, silicon substrates,
Alternatively, an insulating substrate or a semiconductor substrate can be used. That is, any substrate having an insulating surface can be used. For example, an inexpensive glass substrate is generally used for an electro-optical device such as an active matrix type liquid crystal display device or an image sensor.

For example, 301 is used as a substrate transfer chamber which is a common chamber, and 306 and 3 are provided in the processing chambers for performing various types of substrate processing.
07 is a spare chamber, one is used for loading a substrate, and the other is used for unloading the substrate. Further, 302 is a plasma CVD apparatus for forming an insulating film, 303 is a plasma CVD apparatus for forming amorphous silicon, and 30
4 may be a plasma CVD apparatus for forming a silicon nitride film, and 305 may be a heat treatment furnace for discharging hydrogen. Of these, only the heat treatment step is a process that takes several hours to process, which causes a decrease in the overall throughput. Therefore, the plurality of substrates 322 are simultaneously subjected to heat treatment by the heater 310,
It is important that the stage 315 carries the substrate to the substrate carrying position, the robot arm 314 carries the substrate to the next step, if necessary. The preliminary chamber can also be called a processing chamber in the sense that it has a function of loading and unloading substrates. The process chambers are partitioned by gate valves 308 to 313, and vacuum pumps 319 to 321 can be independently evacuated to prevent contamination by gas during each process.
The substrate 322 is transferred by the robot arm 314, and the throughput can be improved by multitasking.

Such a combination can be arbitrarily performed. Elements that can be combined are plasma CVD, low pressure thermal CVD (hereinafter abbreviated as LPCVD in the present specification), photo CVD, and microwave CV.
D, heating furnace, annealing furnace by light irradiation, sputtering, plasma annealing, plasma etching (anisotropic or isotropic) can be mentioned, but in order to achieve the constitution of the present invention, the constitution as described above is used. At least necessary.

In the present invention, the most remarkable effect can be obtained when nickel is used as the catalyst element, but the other usable catalyst elements are preferably Ni, Pd, Pt, Cu and Ag. Au, In, S
One or more kinds of elements selected from n, Pd, Sn, Pd, P, As and Sb can be used.

The structure of the invention disclosed in the present specification will be shown below. A first invention disclosed in this specification includes a step of forming a silicon oxide film and an amorphous silicon film over a substrate having an insulating surface, and the step of continuously forming the formed substrate without exposing the formed substrate to the atmosphere. And heat treatment to dehydrogenate, a step of continuously forming a silicon nitride film on the substrate degassed with hydrogen, and a patterning of the silicon nitride film to selectively expose the amorphous silicon film. And a step of introducing a metal element in contact with the exposed amorphous silicon film to promote crystallization of the amorphous silicon film, and performing a heat treatment to introduce the metal element into the amorphous silicon film. And a step of growing crystals from the formed region in a direction parallel to the substrate.

According to another aspect of the invention, there is provided a first processing chamber for forming a silicon oxide film and an amorphous silicon film on a substrate having an insulating surface, and without exposing the formed substrate to the atmosphere. A second processing chamber for continuously performing heat treatment to discharge hydrogen, a third processing chamber for continuously forming a silicon nitride film on the substrate from which hydrogen has been discharged, and the first processing chamber. Processing chamber, a second processing chamber, and a common chamber commonly connected to the third processing chamber, the first processing chamber, the second processing chamber, and the third processing chamber. The processing chamber has a closed structure, and the common chamber has means for transferring a substrate or a sample.

As an example of the above structure, the structures shown in FIGS. 2 and 3 can be cited.

In another invention, a step of forming a silicon oxide film and an amorphous silicon film on a substrate having an insulating surface, and a heat treatment of the formed substrate continuously without exposing to the atmosphere. Dehydrogenating, forming a silicon nitride film continuously on the substrate dehydrogenated, and patterning the silicon nitride film into an active layer shape to selectively form an amorphous silicon film. Exposing the amorphous silicon film to the exposed amorphous silicon film; and introducing a metal element that promotes crystallization of the amorphous silicon film into the exposed amorphous silicon film. The method further comprises the steps of growing crystals from the introduced region in a direction parallel to the substrate, and patterning the grown silicon film using the remaining silicon nitride film as a mask to form an active layer. To do.

Another invention is a step of forming a silicon nitride film as a mask for forming an active layer on an amorphous silicon film formed on a substrate having an insulating surface, and using the silicon nitride film as a mask. A step of introducing a metal element that promotes crystallization of the amorphous silicon film, a step of crystallizing the amorphous silicon film by applying heat treatment, and a step of forming an active layer using the silicon nitride film as a mask , Are included.

[0023]

[Embodiment 1] This embodiment is an example in which a 500 Å silicon nitride film is selectively provided and nickel is selectively introduced using this silicon nitride film as a mask.

FIG. 1 used in the above description is reprinted in this embodiment to show the outline of the manufacturing process in this embodiment. First,
On a glass substrate (Corning 7059, 10 cm square),
Using the apparatus shown in FIGS. 2 and 3, the silicon oxide film has a thickness of 2000 Å and the amorphous silicon film 12 has a thickness of 100 to 1500 Å plasma C.
It is formed continuously using the VD method. Here, the amorphous silicon film 12 is formed to a thickness of 1000Å. The film formation conditions for the silicon oxide film are as follows: film formation pressure of 0.1 to 1 torr, 0.3 torr in this embodiment, TEOS: O ₂ ratio of 1:10, RF power of 1 to 500 W, 300 W in this embodiment.
And the substrate temperature is 100 to 500 ° C., 400 in this embodiment.
Film formation was performed at ° C. The film forming conditions for the amorphous silicon film are a film forming pressure of 0.1 to 1 torr, and 0.3 tor in this embodiment.
RF power of 1 to 100 using r and monosilane as a film forming gas
W, 35 W in this embodiment, and the substrate temperature is 100 to 300.
C., in this example, the film was formed at 160.degree. (Fig. 1
(A)) Next, the substrate is transferred to the heat treatment furnace 305 without being exposed to the atmosphere, and 350 to 550 ° C., here, 400 ° C. 1
Hydrogen is released from the amorphous silicon film 12 formed by plasma CVD by performing heat treatment for a time N ₂ . After that, the substrate 322 is transferred to the processing chamber 304 without being exposed to the atmosphere again,
The silicon nitride film 21 serving as a mask is formed to a thickness of 200 Å or more, here 500 Å. The film forming condition is that the film forming pressure is 0.
1 to 1 torr, 0.3 torr in this embodiment, the ratio of monosilane: ammonia is 1: 4, and the RF power is 10
0 to 500 W, 300 W in this embodiment, the substrate temperature is 2
The film formation was performed at 00 to 500 ° C., 400 ° C. in this example. Regarding the film thickness of the silicon nitride film 21, it has been confirmed by experiments by the inventors that there is no problem even if the film thickness is 100 Å, and it is considered that the film thickness may be further reduced if the film quality is dense.

Then, the silicon nitride film 21 is patterned into a required pattern by a normal photolithographic patterning process. Then, a thin silicon oxide film 20 is formed by irradiation of ultraviolet rays in an oxygen atmosphere. This silicon oxide film 2
Production of 0 is performed by irradiating UV light for 5 minutes in an oxygen atmosphere. The thickness of the silicon oxide film 20 is considered to be about 20 to 50Å (FIG. 1 (A)). still,
The silicon oxide film for improving the wettability may be added just by the hydrophilicity of the silicon oxide film of the mask only when the size of the solution and the pattern match. However, such an example is special, and it is generally safer to use the silicon oxide film 20.

In this state, 5 ml of an acetate solution containing 100 ppm of nickel is dropped (for a 10 cm square substrate). Further, at this time, it is possible to prevent wraparound to the back surface by applying while applying a spinner at 150 rpm. Further, in this state, after holding for 5 minutes, spin drying is performed at 2000 rpm for 60 seconds using a spinner. (Fig. 1 (B))

Then, the amorphous silicon film 12 is crystallized by performing a heat treatment at 550 ° C. (nitrogen atmosphere) for 8 hours. At this time, as indicated by 23 from the region of the portion 22 into which nickel is introduced, crystal growth of about 40 μm is performed in the lateral direction from the region into which nickel is not introduced. In FIG. 1C, 24 is a region where nickel is directly introduced and crystallized, and 25 is a region where lateral crystallization is performed. The 25 areas are roughly <11.
It has been confirmed that crystal growth is performed in the 1> axis direction.

In this embodiment, the concentration of nickel in the region into which nickel was directly introduced was changed from 1 × 10 ¹⁶ atoms cm ⁻³ to 1 by changing the solution concentration and the holding time.
The concentration can be controlled in the range of × 10 ¹⁹ atoms cm ⁻³ , and similarly, the concentration of the lateral growth region can be controlled to be lower than that.

When forming a device thereafter, the mask material needs to be peeled off. If a silicon oxide mask used before is used at this time, a hydrofluoric acid-based etchant is used, or a fluorine-based gas is used. It was necessary to use dry etching using a glass, and there was a great deal of damage to glass and underlying silicon oxide. On the other hand, in the case of a silicon nitride film, hot phosphoric acid can be used, which has an advantage that the crystalline silicon film, silicon oxide and glass are less damaged.

As described above, the region where the crystal has grown in the lateral direction has a low concentration of the catalyst element and has good crystallinity, and therefore it is useful to use this region as the active region of the semiconductor device. For example, it is extremely useful to use it as a channel formation region of a thin film transistor.

[Embodiment 2] In this embodiment, as shown in Embodiment 1, nickel is selectively introduced, and electrons are emitted from the portion where crystals are grown laterally (direction parallel to the substrate). An example of forming a device is shown. When such a structure is adopted, the nickel concentration in the active layer region of the device can be further lowered, and the structure can be made extremely preferable in terms of electrical stability and reliability of the device.

The present embodiment relates to a manufacturing process of a TFT used for controlling pixels of an active matrix. FIG. 4 shows the manufacturing process of this embodiment. First, the substrate 20
1 is washed, and TEOS (tetra-ethoxy-silane) and oxygen are used as source gases by the multipurpose substrate processing apparatus shown in FIGS.
A base film 202 of silicon oxide of 00Å is formed. And
The thickness is 500 to 15 continuously by the plasma CVD method.
An intrinsic (I-type) amorphous silicon film 203 of 00Å, for example, 1000Å is formed. Next, 450 by the heat treatment furnace 305
Heat treatment is performed at 1 ° C. for 1 hour to discharge hydrogen. After that, the thickness is continuously 500 to 2000Å, for example 100 in the same device.
A 0Å silicon nitride film 205 is formed by a plasma CVD method. Then, the silicon nitride film 205 is selectively etched to form an exposed region 206 of amorphous silicon.
If the patterning of this region is performed so that the silicon nitride film remains on the region where the islands are to be formed thereafter, after the crystallization step, the crystalline silicon film can be patterned using the silicon nitride film as a mask. , Useful in the process.

Then, according to the method described in Example 1, a solution containing nickel element which is a catalytic element for promoting crystallization (here, an acetate solution) is applied. The concentration of nickel in the acetic acid solution is 100 ppm. In addition, the detailed process order and conditions are the same as those shown in the first embodiment.

After this, 500 to 620 under a nitrogen atmosphere.
The silicon film 303 is crystallized by performing heat anneal at 4 ° C., for example, 550 ° C. for 4 hours. Crystallization proceeds from a region 206 where the nickel film and the silicon film are in contact with each other as a starting point, and crystal growth proceeds in a direction parallel to the substrate as indicated by an arrow. In the figure, a region 204 shows a portion crystallized by direct introduction of nickel, and a region 203 shows a portion crystallized laterally. The crystal in the lateral direction indicated by 203 is 2
It is about 5 μm. The crystal growth direction is roughly <11.
It has been confirmed that the direction is 1> axial. (Fig. 4
(A))

Next, using the silicon nitride film 205 as a mask,
An island is formed in the crystalline silicon film 204 by dry etching. By this step, the direct addition region 206 having a high nickel concentration can be etched off. As a result, in the present embodiment, these regions having a high nickel concentration are prevented from overlapping the channel forming region in the active layer 208. After that, the silicon nitride film 205 is etched using hot phosphoric acid to form an island-shaped active layer region 208.

Thereafter, 10 containing 100% by volume of water vapor.
The surface of the active layer (silicon film) 208 is oxidized by leaving it in the atmosphere of 500 to 600 ° C., typically 550 ° C. for 1 hour to oxidize the surface of the silicon oxide film 209.
To form. The thickness of the silicon oxide film is 1000Å. After forming the silicon oxide film 209 by thermal oxidation, the substrate is placed in an ammonia atmosphere (1 atm, 100%) at 400 ° C.
To hold. Then, in this state, the substrate is irradiated with infrared light having a peak at a wavelength of 0.6 to 4 μm, for example, 0.8 to 1.4 μm for 30 to 180 seconds, and the silicon oxide film 20 is irradiated.
A nitriding process is performed on 9. At this time, the atmosphere was 0.
1-10% HCl may be mixed.

A halogen lamp is used as the infrared light source. The intensity of infrared light is adjusted so that the temperature on the monitor's single crystal silicon wafer is between 900 and 1200 ° C. Specifically, the temperature of the thermocouple embedded in the silicon wafer is monitored, and this is fed back to the infrared light source. In this embodiment, the temperature rise is constant, the speed is 50 to 200 ° C./sec, and the temperature fall is 20 to 100 by natural cooling.
℃. Since this infrared light irradiation selectively heats the silicon film, the heating of the glass substrate can be minimized. (Fig. 4 (B))

Subsequently, by the sputtering method,
A film of aluminum (containing 0.01 to 0.2% scandium) having a thickness of 3000 to 8000Å, for example, 6000Å is formed. Then, the aluminum film is patterned to form the gate electrode 210. (Fig. 2 (C))

Further, the surface of the aluminum electrode is anodized to form an oxide layer 211 on the surface. This anodic oxidation is performed in an ethylene glycol solution containing 1-5% tartaric acid. The resulting oxide layer 211 has a thickness of 2
It is 000Å. Since the oxide 211 has a thickness to form the offset gate region in the subsequent ion doping process, the length of the offset gate region can be determined by the anodic oxidation process. (Fig. 4
(D))

Next, the gate electrode portion, that is, the gate electrode 210 and the oxide layer 211 around it is used as a mask in the active layer region (which constitutes the source / drain and the channel) by the ion doping method (also called plasma doping method). An impurity (here, phosphorus) that imparts the N conductivity type is added in a self-aligning manner. Phosphine (PH ₃ ) is used as the doping gas, and the acceleration voltage is set to 60 to 90 kV, for example, 80 kV. Dose amount is 1 × 10 ¹⁵ to 8 × 10
^{It is set to 15} cm ^-2 , for example, 4 × 10 ¹⁵ cm ^-2 . As a result, N-type impurity regions 212 and 213 can be formed. As is clear from the figure, the impurity region and the gate electrode are in an offset state separated by a distance x. Such an offset state is particularly effective in reducing a leak current (also referred to as an off current) when a reverse voltage (negative in the case of an N-channel TFT) is applied to the gate electrode.
In particular, in the TFT for controlling the pixels of the active matrix as in the present embodiment, it is desired that the leak current is low so that the charges accumulated in the pixel electrode do not escape in order to obtain a good image, and therefore an offset is provided. That is valid.

After that, annealing was performed by irradiation with laser light. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) is used, but other laser may be used. The laser light irradiation condition is that the energy density is 200 to 400 mJ / c.
m ² , for example, 250 mJ / cm ^2, and 2 per place
Irradiation was performed for 10 shots, for example, 2 shots. The effect may be increased by heating the substrate to about 200 to 450 ° C. during the irradiation of the laser light. (Fig. 4
(E))

Subsequently, a silicon oxide film 21 having a thickness of 6000Å is formed.
4 as an interlayer insulator is formed by the plasma CVD method. Further, a transparent polyimide film 215 is formed by spin coating to flatten the surface. A thickness of 80 is formed on the flat surface thus formed by the sputtering method.
A 0 Å transparent conductive film (ITO film) is formed and patterned to form a pixel electrode 216.

Then, contact holes are formed in the interlayer insulators 214 and 215, and electrodes / wirings 217 and 218 of the TFT are formed by a metal material, for example, a multilayer film of titanium nitride and aluminum. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm to complete an active matrix pixel circuit having TFTs. (Fig. 4
(F))

[Embodiment 3] FIG. 5 shows a cross-sectional view of a manufacturing process of this embodiment. First, the substrate (Corning 7059) 50
A base film 102 of silicon oxide having a thickness of 2000 Å was formed on 1 by a sputtering method. The substrate is annealed at a temperature higher than the strain temperature before or after the formation of the base film, and then gradually cooled to the strain temperature or less at 0.1 to 1.0 ° C./min. The shrinkage of the substrate in the accompanying steps (including the thermal oxidation step of the present invention and the subsequent thermal annealing step) is small, and mask alignment is ready. For Corning 7059 substrates, 1-4 at 620-660 ° C
After annealing for an hour, it is gradually cooled at 0.03 to 1.0 ° C./min, preferably 0.1 to 0.3 ° C./min, and 400 to 500.
It is recommended to take out when the temperature has dropped to ℃.

Then, a silicon oxide film, an amorphous silicon film, and a silicon nitride film were successively formed by the plasma CVD method as in the second embodiment. Then, the amorphous silicon film was crystallized by the method shown in Example 2. Then, it is annealed at 600 ° C. for 48 hours in a nitrogen atmosphere (atmospheric pressure) to be crystallized, and the silicon film is patterned into a size of 10 to 1000 μm square to form an island-shaped silicon film (active layer of TFT) 503. . (Figure 5 (A))

Thereafter, the pyrogenic reaction method was carried out in an oxygen atmosphere containing 70 to 90% of steam at 500 to 750 ° C., typically 600 ° C. at a hydrogen / oxygen ratio of 1.5 to 1.9. Formed using. By leaving it in such an atmosphere for 3 to 5 hours, the surface of the silicon film was oxidized to form a silicon oxide film 504 having a thickness of 500 to 1500 Å, for example, 1000 Å. Notable teeth, such oxidation reduces the surface of the initial silicon film by 50 Å or more, and as a result, the contamination of the outermost surface portion of the silicon film is
This means that the silicon oxide interface was not reached, that is, a clean silicon-silicon oxide interface was obtained. Since the thickness of the silicon oxide film is twice that of the silicon film to be oxidized, 10
When a silicon film having a thickness of 00Å is oxidized to obtain a silicon oxide film having a thickness of 1000Å, the remaining silicon film has a thickness of 500.
It means Å.

Generally, the thinner the silicon oxide film (gate insulating film) and the active layer are, the better the characteristics of improving the mobility and reducing the off-current can be obtained. On the other hand, in the initial crystallization of the amorphous silicon film, the thicker the film, the easier the crystallization. Therefore, conventionally, regarding the thickness of the active layer, there is a contradiction in terms of characteristics and processes. The present invention solves this contradiction for the first time, that is, a thick amorphous silicon film is formed before crystallization to obtain a good crystalline silicon film. Then, next, the silicon film is thinned by oxidizing the silicon film to improve the characteristics as a TFT. Further, in this thermal oxidation, the amorphous component in which recombination centers are likely to exist and the crystal grain boundaries are easily oxidized, and as a result, the recombination centers in the active layer are reduced. Therefore, the product yield is increased.

After the silicon oxide film 504 is formed by thermal oxidation, the substrate is placed in an atmosphere of dinitrogen monoxide (1 atm, 100 atm).
%), And annealed at 600 ° C. for 2 hours. (Fig. 5 (B))
Subsequently, a thickness of 3000 to 8 is obtained by a low pressure CVD method.
000Å, for example, 6000Å polycrystalline silicon (0.01 to
(Containing 0.2% phosphorus). Then, the silicon film was patterned to form a gate electrode 505. Further, by using the silicon film as a mask, an impurity (phosphorus in this case) which imparts N conductivity type to the active layer region (which constitutes a source / drain and a channel) is self-aligned by an ion doping method (also referred to as plasma doping method). ) Was added. Phosphine (PH ₃ ) as doping gas
And the acceleration voltage was set to 60 to 90 kV, for example, 80 kV. The dose amount was set to 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 5 × 10 ¹⁵ cm ⁻² . As a result, N-type impurity regions 506 and 507 were formed.

After that, annealing was performed by irradiation with laser light. As the laser light, a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec) was used, but another laser may be used. The laser light irradiation conditions are energy density of 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ² and ² to 10 per place
Shot, for example, 2 shots were irradiated. The effect may be increased by heating the substrate to about 200 to 450 ° C. during the irradiation of the laser light. (Fig. 5 (C))

Further, this step may be performed by lamp annealing with near infrared light. Near-infrared rays are more easily absorbed by crystallized silicon than by amorphous silicon, and effective annealing comparable to thermal annealing at 1000 ° C. or higher can be performed. On the other hand, a glass substrate (far infrared light is absorbed by the glass substrate, but visible / near infrared light (wavelength 0.5 to 4
(μm) is hard to be absorbed to), so the glass substrate does not have to be heated to a high temperature and can be processed in a short time, so it is an optimal method in the process where shrinkage of the glass substrate is a problem. Can be said.

Then, a silicon oxide film 50 having a thickness of 6000Å is formed.
8 was formed by the plasma CVD method as an interlayer insulator. Polyimide may be used as the interlayer insulator. Further, a contact hole is formed, and TF is formed by a metal material, for example, a multilayer film of titanium nitride and aluminum.
T electrodes / wirings 509 and 510 were formed. Finally, 1
The TFT was completed by annealing at 350 ° C. for 30 minutes in a hydrogen atmosphere at atmospheric pressure. (Figure 5 (D))

The TFT obtained by the above method has a mobility of 110 to 150 cm ² / Vs and an S value of 0.2 to 0.5.
It was V / digit. Further, when a P-channel TFT in which the source / drain is doped with boron was manufactured by the same method, the mobility was 90 to 120 cm ² / Vs,
The S value is 0.4 to 0.6 V / digit, and the mobility is 20% or more higher than the case where the gate insulating film is formed by the known PVD method or the CVD method, and the S value is 20% or more. Diminished. In addition, in terms of reliability, the T
FT is a TF produced by high temperature thermal oxidation at 1000 ° C.
It showed good results comparable to T.

[Embodiment 4] This embodiment shows an example in which the present invention is applied to an active matrix type liquid crystal display device. FIG. 7 is a top view showing an outline of one substrate of the active matrix type liquid crystal display device of FIG. 6.

In the figure, 61 is a glass substrate, and 6
Reference numeral 2 is a pixel region configured in a matrix, and several hundreds × several hundreds of pixels are formed in the pixel region. A TFT is arranged as a switching element in each of the pixels. The driver TFT for driving the TFT in this pixel area is arranged in the peripheral driver area 6
It is 2. The pixel region 63 and the driver region 62 are integrally formed on the same substrate 61.

The TFT arranged in the driver region 62 needs to flow a large current, and high mobility is required.
Further, since the TFT arranged in the pixel region 63 needs to have a fixed retention rate for the charge of the pixel electrode, a characteristic that the off current (leakage current) is small is required. For example, the TFT arranged in the pixel region 63 may be a TFT obtained by simple laser crystallization without using nickel. In this case, laser annealing is performed with the same energy as the crystallization of the periphery to which nickel is added. Such a crystalline silicon film that does not use nickel and is crystallized with low energy has poor crystallinity as compared with the case of using nickel, and thus has low mobility but generally has low off-current. When used as a pixel, no particular problem occurs.

[0056]

[Effect] By manufacturing a semiconductor device using a crystalline silicon film in which a catalytic element is introduced and crystallized at low temperature in a short time, a device with high productivity and excellent characteristics can be obtained.

[Brief description of drawings]

FIG. 1 shows a process of an example.

FIG. 2 illustrates a semiconductor device manufacturing apparatus.

FIG. 3 illustrates a manufacturing device of a semiconductor device.

FIG. 4 shows a manufacturing process of an example.

FIG. 5 shows a manufacturing process of an example.

FIG. 6 shows a configuration of an example.

[Explanation of symbols]

11 ... Glass substrate 12 ... Amorphous silicon film 13 ··· Silicon oxide film 14 ... Acetic acid solution film containing nickel 15 ... Zpiner 21..Silicon oxide film for mask 20 ... Silicon oxide film

   ─────────────────────────────────────────────────── ─── Continued front page    F-term (reference) 5F052 AA11 AA17 BB07 CA02 DA02                       DB03 EA02 EA15 FA06 FA24                       JA01                 5F110 AA01 BB01 CC02 DD02 DD13                       EE03 EE09 EE34 EE44 EE45                       FF02 FF04 FF22 FF26 GG02                       GG13 GG45 GG58 HJ01 HJ12                       HJ23 HL01 HL03 HL11 HM14                       NN02 NN03 NN23 NN72 PP10                       PP23 PP34 PP35 QQ24

Claims (3)

[Claims] 1. A first processing chamber for forming a silicon oxide film and an amorphous silicon film on a substrate having an insulating surface, and the substrate thus formed is continuously heat-treated without being exposed to the atmosphere. A second treatment chamber for performing hydrogen discharge by means of a hydrogen treatment, a third treatment chamber for continuously forming a silicon nitride film on the substrate subjected to hydrogen discharge, the first treatment chamber and the second treatment. Chamber and a common chamber commonly connected to the third processing chamber, wherein the first processing chamber, the second processing chamber and the third processing chamber have a sealed structure. An apparatus for manufacturing a semiconductor device, characterized in that the common chamber has means for transferring a substrate, and the substrate is heat-treated in the second processing chamber and then processed in each processing chamber. 2. The method according to claim 1, wherein the first processing chamber, the second processing chamber, and the third processing chamber each have a means for independently performing vacuuming by a vacuum pump. Characteristic semiconductor device manufacturing apparatus. 3. A semiconductor device manufacturing apparatus according to claim 1, wherein a plurality of substrates are simultaneously heat-treated in the second processing chamber.