JP4003769B2 - Circuit forming substrate manufacturing method and circuit forming substrate manufacturing material - Google Patents

Circuit forming substrate manufacturing method and circuit forming substrate manufacturing material Download PDF

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JP4003769B2
JP4003769B2 JP2004269599A JP2004269599A JP4003769B2 JP 4003769 B2 JP4003769 B2 JP 4003769B2 JP 2004269599 A JP2004269599 A JP 2004269599A JP 2004269599 A JP2004269599 A JP 2004269599A JP 4003769 B2 JP4003769 B2 JP 4003769B2
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substrate material
circuit
substrate
stage state
conductive paste
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JP2005051263A (en
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利浩 西井
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Panasonic Corp
Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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本発明は、各種電子機器に利用される回路形成基板の製造方法および回路形成基板の製造用材料に関する。   The present invention relates to a method for manufacturing a circuit-formed substrate used in various electronic devices and a material for manufacturing the circuit-formed substrate.

近年の電子機器の小型化・高密度化に伴って、電子部品を搭載する回路形成基板も従来の片面基板から両面、多層基板の採用が進み、より多くの回路および部品を基板上に集積可能な高密度基板が開発されている(たとえば、日刊工業新聞社発行の「表面実装技術」1997年1月号、高木清著;“目覚ましいビルドアップ多層PWBの開発動向”)。   As electronic devices have become smaller and more dense in recent years, more and more circuits and components can be integrated on a circuit-forming board on which electronic components are mounted. High-density substrates have been developed (for example, “Surface mount technology” published by Nikkan Kogyo Shimbun, January 1997 issue, Kiyoshi Takagi; “Remarkable development trend of build-up multilayer PWB”).

図6(A)〜図6(G)を用いて従来技術を説明する。   The prior art will be described with reference to FIGS. 6 (A) to 6 (G).

図6(A)に示す基板材料61は回路形成基板に用いられるガラス繊維織布に熱硬化性のエポキシ樹脂等を含浸し乾燥等の方法によりBステージ状態としたプリプレグである。基板材料61には熱ロール等を用いたラミネート法によりフィルム62を両面に貼り付ける。   A substrate material 61 shown in FIG. 6A is a prepreg in which a glass fiber woven fabric used for a circuit-forming substrate is impregnated with a thermosetting epoxy resin or the like to be in a B-stage state by a method such as drying. A film 62 is attached to both surfaces of the substrate material 61 by a laminating method using a hot roll or the like.

次に、図6(B)に示すようにレーザ等の加工法により基板材料61にビア穴63を形成する。そして図6(C)に示すように銅粉等の導電性粒子と熱硬化性樹脂、硬化剤、溶剤などを混練しペースト状にした導電性ペースト64をビア穴63に充填する。その後にフィルム62を剥離すると図6(D)に示すような導電性ペースト64が突出した形状になる。その両側に銅箔65を配置して熱プレス装置(図示せず)によって加熱加圧すると図6(E)に示すように基板材料61は熱硬化し、導電性ペースト64は圧縮されて表裏の銅箔65が電気的に接続される。その際に、基板材料61に含浸したエポキシ樹脂は流動し外側に流出し、流れ出し部66を形成する。その後に端部の余分な部分を切り落として図6(F)のような形状とし、さらにエッチングなどの方法で銅箔65を所望のパターンに加工して回路67とし、図6(G)に示すような両面の回路形成基板を得る。
高木清、“目覚ましいビルドアップ多層PWBの開発動向”「表面実装技術」1月号、日刊工業新聞社、1997年
Next, as shown in FIG. 6B, via holes 63 are formed in the substrate material 61 by a processing method such as laser. Then, as shown in FIG. 6C, conductive holes 64 filled with conductive particles such as copper powder and a thermosetting resin, a curing agent, a solvent, etc. are filled in the via holes 63. Thereafter, when the film 62 is peeled off, the conductive paste 64 protrudes as shown in FIG. When copper foils 65 are arranged on both sides and heated and pressed by a hot press apparatus (not shown), the substrate material 61 is thermally cured as shown in FIG. 6E, and the conductive paste 64 is compressed to be front and back. Copper foil 65 is electrically connected. At that time, the epoxy resin impregnated in the substrate material 61 flows and flows out to form a flow-out portion 66. Thereafter, excess portions of the end portions are cut off to form the shape as shown in FIG. 6F, and the copper foil 65 is processed into a desired pattern by a method such as etching to form a circuit 67, which is shown in FIG. 6G. Such a double-sided circuit forming substrate is obtained.
Kiyoshi Takagi, “Development Trend of Remarkable Build-Up Multilayer PWB” “Surface Mount Technology” January issue, Nikkan Kogyo Shimbun, 1997

しかしながら、上記のような製造法では、回路形成基板の表と裏で電気的接続は不十分なものになる場合がある。また多層回路形成基板を上記のような製造法で形成した場合には表層と内層の回路について同様の不良が発生することがある。   However, in the manufacturing method as described above, electrical connection may be insufficient between the front and back sides of the circuit forming substrate. Further, when the multilayer circuit forming substrate is formed by the above manufacturing method, the same defect may occur in the surface layer and inner layer circuits.

その主な原因は図6(E)に示すような導電性ペースト64中の導電性粒子がビア穴63の外部に流れ出す流出粒子610が発生することである。理想的な電気的接続の実現には、導電性ペースト64は図6(E)の上下方向に圧縮され、効率的に導電性ペースト中の導電性粒子同士が強固に接触し、銅箔65とも強固に接触する必要がある。しかしながら、図6(D)から図6(E)に至る工程中で流れ出し部66が形成されることからも解るように、基板材料61中の熱硬化性樹脂は外側に向かって流動する。その際に、導電性ペースト64中の導電性粒子が図6(E)の横方向に押し流され、結果として効率的な導電性ペースト64の圧縮が実現出来ず、導電性ペースト64による電気的接続は不安定になる。以上の説明では、ガラス織布と熱硬化性樹脂を用いて基板材料の場合を述べたが、ガラス以外の無機繊維やアラミド等の有機繊維、織布以外の不織布の補強材を用いた場合でも同様である。   The main cause is the generation of outflow particles 610 in which conductive particles in the conductive paste 64 flow out of the via holes 63 as shown in FIG. In order to realize an ideal electrical connection, the conductive paste 64 is compressed in the vertical direction of FIG. 6 (E), and the conductive particles in the conductive paste are efficiently brought into firm contact with each other. It is necessary to make a strong contact. However, as can be seen from the formation of the flow-out portion 66 in the process from FIG. 6D to FIG. 6E, the thermosetting resin in the substrate material 61 flows outward. At that time, the conductive particles in the conductive paste 64 are washed away in the lateral direction of FIG. 6E, and as a result, the compression of the conductive paste 64 cannot be realized efficiently, and the electrical connection by the conductive paste 64 is performed. Becomes unstable. In the above description, the case of a substrate material using a glass woven fabric and a thermosetting resin has been described. However, even when inorganic fibers other than glass, organic fibers such as aramid, and non-woven reinforcing materials other than woven fabric are used. It is the same.

しかし、織布を用いた場合には特に織布中の流動抵抗が小さいため、上述した熱硬化性樹脂の流動は顕著になり、導電性ペーストによる電気的接続は困難である。さらに、織布を構成する繊維がずれる現象が悪影響を及ぼしている。図7(A)〜図7(C)を用いてその現象を説明する。図7(A)に示すようにガラス繊維織布68を用いた基板材料61にレーザを用いてビア穴63を形成する。その部分は上方より見ると図7(B)に示すようにガラス繊維織布68を切断してビア穴63が加工される。その後に図6(C)〜図6(E)を用いて説明したような工程を実施する。その後の回路形成基板のビア穴63部分を観察すると、図7(C)に示すように熱プレス時の加圧力や含浸樹脂の流動等によって導電性ペースト64が周囲に広がりガラス繊維織布68も当初の規則正しい配列からビア穴63の外側方向に動かされている。このような現象が発生すると導電性ペースト64の圧縮が非効率になる。こうした現象は電気的接続の抵抗値ばらつきや信頼性の点で、このような回路形成基板の製造における課題である。   However, when the woven fabric is used, the flow resistance in the woven fabric is particularly small, so that the flow of the thermosetting resin becomes remarkable and it is difficult to electrically connect with the conductive paste. Furthermore, the phenomenon that the fibers constituting the woven fabric are shifted has an adverse effect. The phenomenon will be described with reference to FIGS. As shown in FIG. 7A, a via hole 63 is formed in a substrate material 61 using a glass fiber woven fabric 68 by using a laser. When the portion is viewed from above, the glass fiber woven fabric 68 is cut and the via hole 63 is processed as shown in FIG. Thereafter, the steps described with reference to FIGS. 6C to 6E are performed. When the via hole 63 portion of the circuit forming substrate thereafter is observed, the conductive paste 64 spreads around due to the pressure applied during hot pressing, the flow of the impregnating resin, etc., as shown in FIG. It is moved in the outward direction of the via hole 63 from the original regular arrangement. When such a phenomenon occurs, compression of the conductive paste 64 becomes inefficient. Such a phenomenon is a problem in the manufacture of such a circuit-formed substrate in terms of variation in resistance value of electrical connection and reliability.

近年、回路形成基板として薄いものが要望されているので、ガラス繊維織布にも薄い材料が多用される。しかしそのような材料ではガラス繊維の充填度が低く、繊維間の隙間が比較的大きいので上記のような問題が顕著になる。特にガラス繊維織布の厚みが100μm以下の場合に上記した現象が重大な問題となる。   In recent years, since a thin circuit forming substrate has been demanded, a thin material is often used for a glass fiber woven fabric. However, in such materials, the glass fiber filling degree is low and the gaps between the fibers are relatively large, so the above-described problems become significant. In particular, when the thickness of the glass fiber woven fabric is 100 μm or less, the above phenomenon becomes a serious problem.

また、導電性ペースト64の圧縮量を決める主要因は、図6(D)から図6(E)における熱プレス工程で基板材料61が厚み方向に圧縮される量と、図6(D)で基板材料61から導電性ペースト64が突出している量である。高密度回路形成基板ではビア穴63を通じて層間の接続を行う箇所が膨大な点数であるため、上記した2つの主要因を制御する以外に導電性ペースト64に圧縮作用を与える要素が必要である。   The main factors that determine the amount of compression of the conductive paste 64 are the amount by which the substrate material 61 is compressed in the thickness direction in the hot press process in FIGS. 6D to 6E, and FIG. 6D. This is the amount by which the conductive paste 64 protrudes from the substrate material 61. In the high-density circuit forming substrate, the number of points where the layers are connected through the via holes 63 is enormous, so an element that gives a compressive action to the conductive paste 64 is necessary in addition to controlling the two main factors described above.

本発明の回路形成基板の製造方法においては、熱プレス工程での樹脂流動を制限する。これにより、導電性ペースト等の層間接続部による電気的接続を効率的に行う。   In the method for producing a circuit-formed substrate of the present invention, resin flow in the hot press process is limited. Thereby, the electrical connection by interlayer connection parts, such as an electrically conductive paste, is performed efficiently.

また、本発明の回路形成基板の製造用材料においては、熱プレス工程での流動を制御した樹脂を用いる。これにより、導電性ペースト等の層間接続部による電気的接続を効率的に行う。   Moreover, in the material for manufacturing the circuit forming substrate of the present invention, a resin whose flow in the hot press process is controlled is used. Thereby, the electrical connection by interlayer connection parts, such as an electrically conductive paste, is performed efficiently.

以上の結果として、導電性ペースト等を用いた層間の電気的接続の信頼性が大幅に向上し、高密度で品質の優れた回路形成基板を提供できる。   As a result, the reliability of the electrical connection between layers using a conductive paste or the like is greatly improved, and a high-density and high-quality circuit forming substrate can be provided.

本発明の回路形成基板の製造方法においては、以下のいずれかの構成とする。A)熱プレス工程での樹脂流動を制限する。B)補強繊維同士を融着もしくは接着する。C)充填工程の後に基板材料の厚みを減少させる。D)基板材料中に混在するフィラーで低流動層を形成する。また、本発明の回路形成基板の製造用材料においては、熱プレス工程での樹脂流動が制御される物性値を付与する、あるいは充填工程の後に基板材料の厚みが効率的に減少できるよう揮発成分を含む構成とする。この本発明によれば、導電性ペースト等の層間接続部による電気的接続の発現が効率的に行える。   In the manufacturing method of the circuit formation board | substrate of this invention, it is set as either of the following structures. A) Restrict resin flow in the hot press process. B) The reinforcing fibers are fused or bonded together. C) Decrease the thickness of the substrate material after the filling step. D) A low fluidized bed is formed with filler mixed in the substrate material. In addition, in the material for manufacturing a circuit-formed board according to the present invention, a volatile component is provided so that a physical property value for controlling resin flow in the hot pressing process is given or the thickness of the board material can be efficiently reduced after the filling process. It is set as the structure containing. According to the present invention, it is possible to efficiently develop an electrical connection by an interlayer connection portion such as a conductive paste.

特に、基板材料の補強材に織布を用いた場合には、織布の持つ寸法安定性などの利点を生かしながら、層間の接続を安定化できるという格別の効果を発揮する。これは流動性の制御あるいは層間接続を行う部分に対して繊維の動きを局所的に防止する処理を穴加工と同時に施す、あるいは基板材料の厚みを減少させる等の処理による。   In particular, when a woven fabric is used as a reinforcing material for the substrate material, the special effect of stabilizing the connection between layers while taking advantage of the dimensional stability of the woven fabric is exhibited. This is due to processing such as controlling the fluidity or locally preventing the movement of the fibers at the portion where the interlayer connection is performed, or performing processing such as reducing the thickness of the substrate material.

以上の結果として、導電性ペースト等の層間接続部を用いた層間の電気的接続の信頼性が向上し、高品質の高密度回路形成基板を提供できる。   As a result, the reliability of electrical connection between layers using an interlayer connection portion such as a conductive paste is improved, and a high-quality high-density circuit formation substrate can be provided.

以下、図面を参照しながら本発明の実施の形態を説明する。なお、同様の構成をなすものには同じ符号を付け、詳細な説明は省略する。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, the same code | symbol is attached | subjected to what makes the same structure, and detailed description is abbreviate | omitted.

(実施の形態1)
図1(A)〜図1(G)は本発明の第1の実施の形態における回路形成基板の製造方法および回路形成基板の製造用材料を示す工程断面図である。
(Embodiment 1)
FIGS. 1A to 1G are process cross-sectional views illustrating a method for manufacturing a circuit forming substrate and a material for manufacturing the circuit forming substrate in the first embodiment of the present invention.

図1(A)に示すようにまず、ガラス繊維織布を補強材とし、熱硬化性のエポキシ樹脂を含浸した厚み100μmのプリプレグからなる基板材料11の両面に厚み20μmのフィルム12を貼り合わせる。フィルム12にはポリエチレンテレフタレート(PET)を用いる。必要に応じてフィルム12にはエポキシ樹脂等の熱硬化性樹脂をコーティングしてもよい。   As shown in FIG. 1A, first, a film 12 having a thickness of 20 μm is bonded to both surfaces of a substrate material 11 made of a prepreg having a thickness of 100 μm impregnated with a thermosetting epoxy resin using a glass fiber woven fabric as a reinforcing material. Polyethylene terephthalate (PET) is used for the film 12. If necessary, the film 12 may be coated with a thermosetting resin such as an epoxy resin.

その後に、図1(B)に示すように炭酸ガスレーザを用いて直径約200μmのビア穴13を加工する。   Thereafter, as shown in FIG. 1B, a via hole 13 having a diameter of about 200 μm is processed using a carbon dioxide laser.

その後に、図1(C)に示すように導電性ペースト14をスクリーン印刷等の方法でビア穴13に充填する。導電性ペースト14は約5μm径の銅粉と熱硬化性樹脂と硬化剤とを混練したものである。粘度調整等の目的で導電性ペースト14には溶剤などを添加してもよい。   Thereafter, as shown in FIG. 1C, the conductive paste 14 is filled into the via holes 13 by a method such as screen printing. The conductive paste 14 is obtained by kneading copper powder having a diameter of about 5 μm, a thermosetting resin, and a curing agent. A solvent or the like may be added to the conductive paste 14 for the purpose of adjusting the viscosity.

次に、図1(D)に示すように基板材料11の両面のフィルム12を剥離すると、基板材料11からフィルム12の厚み程度に導電性ペースト14が突出する。その両面に銅箔15を配置する。   Next, as shown in FIG. 1D, when the films 12 on both sides of the substrate material 11 are peeled off, the conductive paste 14 protrudes from the substrate material 11 to the thickness of the film 12. Copper foil 15 is arranged on both sides.

次に、図中上下方向に加熱加圧する熱プレス工程を実施すると図1(E)に示すような形状になる。その際に基板材料11中の熱硬化性樹脂は流動し流れ出し部16を形成する。   Next, when a hot press step of heating and pressing in the vertical direction in the figure is performed, a shape as shown in FIG. At that time, the thermosetting resin in the substrate material 11 flows and forms a flow-out portion 16.

次に、図1(F)に示すように基板材料11の周辺部を所望のサイズに切断する。銅箔15をエッチング等の方法でパターン形成して回路17を形成し、図1(G)に示すような両面回路形成基板を得る。   Next, as shown in FIG. 1F, the peripheral portion of the substrate material 11 is cut into a desired size. A circuit 17 is formed by patterning the copper foil 15 by a method such as etching to obtain a double-sided circuit forming substrate as shown in FIG.

以上のような工程にて熱プレス前の基板材料11の質量に対して熱プレス工程で流動し基板材料11の周辺に流れ出した樹脂の質量、すなわち図1(E)の流れ出し部16の質量の割合を樹脂流れ量とする。背景技術で述べた、導電性ペースト14による電気的接続が不十分となる課題を解決するためには、樹脂流れ量が少なくとも20%以下でなければならない。   The mass of the resin that flows in the vicinity of the substrate material 11 by flowing in the hot press process with respect to the mass of the substrate material 11 before the hot press in the above process, that is, the mass of the flow-out portion 16 in FIG. The ratio is the resin flow rate. In order to solve the problem of insufficient electrical connection by the conductive paste 14 described in the background art, the resin flow rate must be at least 20% or less.

表1に樹脂流れ量について発明者が検討した実験結果の例を示す。表1には以下の測定結果をまとめている。
1)熱プレス工程前後の基板材料厚み
2)熱プレス工程で周辺部に発生した流れ出し部の重量と熱プレス工程前の基板材料重量より算出した樹脂流れ量
3)500個のビア穴が基板表裏の銅箔により直列回路になるようなテストパターン回路の電気抵抗値より求めた1ヵ所あたりのビア接続抵抗値(平均値)
実験番号1のサンプルでは、樹脂流れ量が22.8%となり、ビアの接続抵抗は数Ωから数百Ωにばらつき、電気的接続の無いビアも存在する。
Table 1 shows examples of experimental results examined by the inventor regarding the resin flow rate. Table 1 summarizes the following measurement results.
1) Substrate material thickness before and after the hot press process 2) Amount of resin flow calculated from the weight of the flow-out part generated in the peripheral part in the hot press process and the substrate material weight before the hot press process 3) 500 via holes on the front and back of the substrate Via connection resistance value (average value) per location obtained from the electrical resistance value of a test pattern circuit that forms a series circuit with copper foil
In the sample of Experiment No. 1, the resin flow rate is 22.8%, the via connection resistance varies from several Ω to several hundred Ω, and there are also vias without electrical connection.

また、実験番号1のサンプルについてビア部の断面を観察すると導電性ペースト14中の導電粒子が流出している。   Moreover, when the cross section of a via part is observed about the sample of experiment number 1, the electrically-conductive particle in the electrically conductive paste 14 has flowed out.

しかし、樹脂流れ量を小さくするように熱プレスの条件等を検討した実験番号2から7のサンプルではビア接続抵抗値は低下し、20%以下の樹脂流れ量に制御することで実用的なビア接続抵抗値が得られる。   However, in the samples of Experiment Nos. 2 to 7 in which the conditions of the hot press were studied so as to reduce the resin flow rate, the via connection resistance value decreased, and a practical via was controlled by controlling the resin flow rate to 20% or less. Connection resistance value is obtained.

また、サンプルを高温高湿中等に長期間保存してビア接続抵抗の経時変化を測定する等の信頼性評価でも20%以下の樹脂流れ量の場合は良好な特性を示す。   In addition, even when the reliability of the sample is stored in high temperature and high humidity for a long period of time and the change in via connection resistance with time is measured, the resin flow rate of 20% or less shows good characteristics.

また、表1の結果から明らかなように10%以下の樹脂流れ量が初期のビア接続抵抗値が得られる。この場合、信頼性についてもより良好な結果が得られる。   Further, as is apparent from the results of Table 1, an initial via connection resistance value can be obtained with a resin flow amount of 10% or less. In this case, better results can be obtained with regard to reliability.

電気的接続をより良好にするには樹脂流れ量をより低く抑えることが有効である一方、実験番号7の結果からもわかるように、熱プレス工程で基板材料11を良好に成型するには1%以上の樹脂流れ量が必要である。表1において埋まり性不良と記載しているのは、以下のような現象である。熱プレス工程後の実験番号7の基板には白く見える部分があり、拡大すると気泡や基板材料表面が凹凸状になっている箇所が観察される。これは樹脂の流動が少ないために、内層回路の凹凸を埋められずに気泡や凹凸が生じるもので、プリント配線板等の製造における白化現象と呼ばれる不良モードである。白化が発生した場合、銅箔の引き剥がし強度や半田耐熱性等の特性が低下する。   In order to improve electrical connection, it is effective to keep the resin flow rate lower. On the other hand, as can be seen from the result of Experiment No. 7, it is 1 to mold the substrate material 11 well in the hot press process. % Resin flow is required. In Table 1, the following phenomenon is described as poor fillability. The substrate of Experiment No. 7 after the hot pressing step has a portion that looks white, and when enlarged, a portion where the bubbles and the surface of the substrate material are uneven is observed. This is a failure mode called whitening phenomenon in the production of printed wiring boards and the like because the resin flow is small and the irregularities of the inner layer circuit are not filled and bubbles and irregularities are generated. When whitening occurs, characteristics such as the peel strength of the copper foil and solder heat resistance deteriorate.

Figure 0004003769
Figure 0004003769

上記した樹脂流れ量20%以下を達成する手段として、熱プレス工程での温度プロファイルにおいて、昇温速度を毎分3℃以下に制御することが有効である。   As a means for achieving the above resin flow rate of 20% or less, it is effective to control the rate of temperature rise to 3 ° C. or less per minute in the temperature profile in the hot press process.

しかし、熱プレス工程の所要時間が非常に長時間になる、あるいは昇温速度を下げすぎて樹脂の成型性に悪影響を及ぼすことも考慮して、昇温速度は毎分0.5℃以上にすることが好ましい。   However, considering the fact that the time required for the hot pressing process is very long, or the temperature rise rate is lowered too much to adversely affect the moldability of the resin, the temperature rise rate should be 0.5 ° C. or more per minute. It is preferable to do.

また、基板材料11に含まれる樹脂等の加温時における粘度変化を考慮して、熱プレス工程中で流動性が高まる範囲の時間帯のみ昇温速度を毎分3℃以下に制御し他の時間帯はそれより速い速度で昇温してもよい。   Further, in consideration of the viscosity change during heating of the resin or the like contained in the substrate material 11, the temperature rising rate is controlled to 3 ° C./min or less only in the time zone in which the fluidity is increased in the hot press process. In the time zone, the temperature may be increased at a faster rate.

また、基板材料11の特性を制御して上記の効果を得ることも可能である。そのためには、未硬化のエポキシ樹脂を加熱乾燥し、揮発成分、残留溶剤量、熱硬化の進行度を加熱温度、時間によってコントロールし、硬化時間を変化させる。このような方法により、熱プレス時の基板材料の溶融や硬化の特性を表す硬化時間を110秒以下とする。このような樹脂材料を含む基板材料を用いることにより樹脂流れ量を20%以下とし、導電性ペーストによる層間の電気的接続を良好なものとできる。   It is also possible to obtain the above effect by controlling the characteristics of the substrate material 11. For this purpose, the uncured epoxy resin is heated and dried, and the curing time is changed by controlling the volatile components, the amount of residual solvent, and the degree of thermosetting by the heating temperature and time. By such a method, the curing time representing the characteristics of melting and curing of the substrate material during hot pressing is set to 110 seconds or less. By using a substrate material containing such a resin material, the amount of resin flow can be reduced to 20% or less, and electrical connection between layers using a conductive paste can be improved.

なお前述した埋まり性不良の発生を避けるため、硬化時間は10秒以上とすることが好ましい。さらに図1(E)における銅箔15と基板材料11との接着性、あるいは樹脂量のバラツキを吸収する等の観点から、50秒以上とすることがより好ましい。   In addition, in order to avoid generation | occurrence | production of the embedding defect mentioned above, it is preferable that hardening time shall be 10 second or more. Furthermore, from the viewpoint of absorbing the adhesiveness between the copper foil 15 and the substrate material 11 shown in FIG.

(実施の形態2)
実施の形態1は両面回路形成基板の例であったが、図2(A)〜図2(E)に示すように多層回路形成基板を製造する際にも本発明を適用すると好適である。
(Embodiment 2)
Although Embodiment 1 is an example of a double-sided circuit formation substrate, it is preferable to apply the present invention also when manufacturing a multilayer circuit formation substrate as shown in FIGS. 2 (A) to 2 (E).

まず、図2(A)に示すような両面回路形成基板を用意する。次に図2(B)に示すように導電性ペースト14を充填した基板材料11と銅箔15を両面回路形成基板の表裏に位置合わせして配置し、熱プレス装置等で加熱加圧する。これにより図2(C)のように基板材料11を成型、硬化させる。その際、流動した基板材料11の成分が流れ出し部26を形成する。   First, a double-sided circuit forming substrate as shown in FIG. Next, as shown in FIG. 2 (B), the substrate material 11 filled with the conductive paste 14 and the copper foil 15 are arranged in alignment with the front and back of the double-sided circuit-formed substrate, and heated and pressed by a hot press device or the like. Thus, the substrate material 11 is molded and cured as shown in FIG. At that time, the flowing component of the substrate material 11 forms the flow-out portion 26.

このような工程において、実施の形態1で説明したような手法により、2枚の基板材料11の重量に対して流れ出し部26の重量(樹脂流れ量)が20%以下になるようにする。   In such a process, the weight of the flow-out portion 26 (resin flow amount) is set to 20% or less with respect to the weight of the two substrate materials 11 by the method described in the first embodiment.

次に、周辺の余分な部分を切断して図2(D)のような形状を得た後に、銅箔15をエッチング等の方法でパターン形成して回路27を形成し、図2(E)に示すような4層回路形成基板を得る。   Next, after cutting off an excess part of the periphery to obtain a shape as shown in FIG. 2D, the copper foil 15 is patterned by a method such as etching to form a circuit 27, and FIG. A four-layer circuit forming substrate as shown in FIG.

このような多層回路形成基板の製造においても、本発明の回路形成基板の製造方法および製造用材料を適用することで、層間の電気的接続が良好に形成できる。   Also in the manufacture of such a multilayer circuit forming substrate, the electrical connection between the layers can be satisfactorily formed by applying the manufacturing method and manufacturing material of the circuit forming substrate of the present invention.

なお、多層回路形成基板を製造する際の内層回路形成基板の回路凹凸を埋め込むためには1%以上の樹脂流れ量が必要である。また基板材料11に含まれる樹脂の硬化時間の制御により樹脂流れ量を20%以下とする場合には、内層回路の埋め込み性を考慮すると、硬化時間は50秒以上110秒以下とすることが好ましい。   Note that a resin flow amount of 1% or more is required to embed circuit irregularities of the inner layer circuit formation substrate when manufacturing the multilayer circuit formation substrate. When the resin flow rate is controlled to 20% or less by controlling the curing time of the resin contained in the substrate material 11, the curing time is preferably 50 seconds or more and 110 seconds or less considering the embedding property of the inner layer circuit. .

なお、本実施の形態で用いた両面回路形成基板は実施の形態1で説明したものでも、通常のめっき法等で層間の接続を形成した基板でもよい。また図2(B)に示す工程で両面回路形成基板に基板材料11が仮圧着されたような構成にしてもよい。   Note that the double-sided circuit formation substrate used in the present embodiment may be the one described in the first embodiment or a substrate in which interlayer connection is formed by a normal plating method or the like. Further, the substrate material 11 may be temporarily bonded to the double-sided circuit formation substrate in the step shown in FIG.

(実施の形態3)
本発明の第3の実施の形態について図3(A)〜図3(C)を用いて以下に説明する。
(Embodiment 3)
A third embodiment of the present invention will be described below with reference to FIGS. 3 (A) to 3 (C).

図3(A)に示すようにガラス繊維織布38を用いたプリプレグ状態の基板材料11にレーザを用いてビア穴13を形成する。   As shown in FIG. 3A, via holes 13 are formed in a prepreg substrate material 11 using a glass fiber woven fabric 38 using a laser.

その部分は上方より見ると図3(B)に示すようにガラス繊維織布38を切断してビア穴13が加工される。この際、特定の加工法により図3(B)に示すような溶着部39が形成される。   When the portion is viewed from above, the glass fiber woven fabric 38 is cut and the via hole 13 is processed as shown in FIG. At this time, a welded portion 39 as shown in FIG. 3B is formed by a specific processing method.

溶着部39が形成された後にビア穴13に導電性ペースト14を充填し、熱プレス工程を実施する場合は、図3(C)に示すように導電性ペースト14のビア穴13周囲への広がりは防止されている。したがって導電性ペースト14による電気的層間接続は良好である。   When the via hole 13 is filled with the conductive paste 14 after the welded portion 39 is formed and a hot pressing process is performed, the conductive paste 14 spreads around the via hole 13 as shown in FIG. Is prevented. Therefore, the electrical interlayer connection by the conductive paste 14 is good.

溶着部39の形成はビア穴13をドリル加工で形成する場合に加工時の摩擦熱等で基板材料11中の樹脂成分等を変質させて固形化し、ガラス繊維織布38をビア穴13の周辺で固定することでも実現可能である。このように溶着部39はガラス繊維等の補強材のみで構成される必要は無く、基板材料11中の樹脂成分等が加工時の熱等により硬化あるいは変質して、後の熱プレス工程での流動性が無くなれば同様の効果が得られる。しかしレーザを用いてビア穴13を形成する際にガラス繊維織布38を溶融あるいは変質させてガラス繊維織布38を主体とする溶着部39を形成することが好ましい。   When the via hole 13 is formed by drilling, the welded portion 39 is solidified by changing the resin component in the substrate material 11 by frictional heat at the time of processing and solidifying the glass fiber woven fabric 38 around the via hole 13. It can also be realized by fixing with. Thus, the welded portion 39 does not need to be composed only of a reinforcing material such as glass fiber, and the resin component or the like in the substrate material 11 is hardened or denatured by heat at the time of processing or the like in the subsequent hot press process. The same effect can be obtained if the fluidity is lost. However, when the via hole 13 is formed using a laser, it is preferable to form the welded portion 39 mainly composed of the glass fiber woven fabric 38 by melting or modifying the glass fiber woven fabric 38.

表2に発明者の検討結果の例を示す。   Table 2 shows an example of the inventor's examination results.

3種類のレーザ発振機を用いて種々の条件でビア穴13の加工を行い両面回路形成基板を作製して、実施の形態1で説明した内容と同じくビア接続抵抗値を比較した結果をまとめている。   The via hole 13 is processed under various conditions using three types of laser oscillators to produce a double-sided circuit-formed substrate, and the results of comparing the via connection resistance values as described in the first embodiment are summarized. Yes.

この結果からもわかるようにビア接続抵抗値はレーザの波長に関連している。ビア穴13を加工した基板材料を詳細に観察すると10.6μmの発振波長では溶着部の形成が確認されるが、9.4μmの発振波長を用いた場合には溶着部は確認されない。   As can be seen from this result, the via connection resistance value is related to the wavelength of the laser. When the substrate material in which the via hole 13 is processed is observed in detail, formation of a welded portion is confirmed at an oscillation wavelength of 10.6 μm, but no welded portion is confirmed when an oscillation wavelength of 9.4 μm is used.

Figure 0004003769
Figure 0004003769

エキシマレーザ、YAG高調波、炭酸ガスレーザ等の各種のレーザを用いる場合、加工条件によっては溶着部の形成が可能であるが、エキシマレーザ等の加熱を伴わないアブレーション加工よりも炭酸ガスレーザの加熱加工が溶着部の形成に好ましい。   When using various lasers such as excimer laser, YAG harmonic, carbon dioxide laser, etc., the welded part can be formed depending on the processing conditions, but carbon dioxide laser heating is more effective than ablation without heating such as excimer laser. It is preferable for forming the welded portion.

さらに、上記したように10μm以上の波長を持つレーザを用いることが溶着部39の形成に効率的である。実用的にも炭酸ガスレーザの使用が加工スピード、コストの面から有利である。またA)加工効率、発振効率、B)発生したレーザビームに複数の発振波長が含まれること、C)微細加工への適用つまり光学系による集光性等の観点から10〜11μmの範囲のレーザを主体とする加工法がより好ましい。   Furthermore, as described above, using a laser having a wavelength of 10 μm or more is efficient in forming the welded portion 39. In practical use, the use of a carbon dioxide laser is advantageous in terms of processing speed and cost. In addition, A) processing efficiency, oscillation efficiency, B) generated laser beam includes a plurality of oscillation wavelengths, and C) laser in the range of 10 to 11 μm from the viewpoint of application to fine processing, that is, light condensing by an optical system. A processing method mainly composed of is more preferable.

(実施の形態4)
図4(A)〜図4(H)を参照しながら実施の形態4を説明する。
(Embodiment 4)
Embodiment 4 will be described with reference to FIGS. 4 (A) to 4 (H).

図4(A)に示すように基板材料41はガラス繊維織布を補強材として両面にポリエチレンテレフタレート(PET)からなる厚み20μmのフィルム12を貼り合わせた厚み100μmのプリプレグである。必要に応じてフィルム12にはエポキシ樹脂等の熱硬化性樹脂をコーティングしても良い。この基板材料41は実施の形態1における基板材料11と異なり、プリプレグを製造する際に残留する揮発成分を多く残している。160℃1時間の乾燥前後の重量変化から、揮発分は3%である。   As shown in FIG. 4A, the substrate material 41 is a prepreg having a thickness of 100 μm in which a glass fiber woven fabric is used as a reinforcing material and a film 12 having a thickness of 20 μm made of polyethylene terephthalate (PET) is bonded to both sides. If necessary, the film 12 may be coated with a thermosetting resin such as an epoxy resin. Unlike the substrate material 11 in the first embodiment, the substrate material 41 leaves a large amount of volatile components remaining when the prepreg is manufactured. From the weight change before and after drying at 160 ° C. for 1 hour, the volatile content is 3%.

その後に続く、図4(B)〜図4(D)に示す工程は実施の形態1と同様である。   Subsequent steps shown in FIGS. 4B to 4D are the same as those in the first embodiment.

次に、真空乾燥装置(図示せず)に基板材料41を導入し、133Pa程度の真空中で1時間乾燥させる。乾燥中は基板材料41の温度低下を防止するために50℃の温風を真空乾燥装置内に導入し再度減圧する工程を3回実施する。この工程で図4(E)に示すように基板材料41は厚みが減少し、その減少量は約2μmである。その結果として乾燥前には約20μmの基板材料41からの導電性ペースト14の突出部の高さは基板材料の表裏で各々1μm程度増加し、22μm程度となる。   Next, the substrate material 41 is introduced into a vacuum drying apparatus (not shown) and dried in a vacuum of about 133 Pa for 1 hour. During the drying, in order to prevent the temperature of the substrate material 41 from decreasing, hot air of 50 ° C. is introduced into the vacuum drying apparatus and the pressure is reduced again three times. In this step, as shown in FIG. 4E, the thickness of the substrate material 41 is reduced, and the reduction amount is about 2 μm. As a result, before drying, the height of the protruding portion of the conductive paste 14 from the substrate material 41 of about 20 μm increases by about 1 μm on the front and back sides of the substrate material to about 22 μm.

次に図4(F)に示すように基板材料41の両面に銅箔15を配置し、図中上下方向に加熱加圧する熱プレス工程を実施し、周辺部を切断すると図4(G)に示すような形状になる。   Next, as shown in FIG. 4 (F), the copper foil 15 is disposed on both surfaces of the substrate material 41, and a hot pressing process is performed in which heat and pressure are applied in the vertical direction in the figure. The shape is as shown.

さらに銅箔15をエッチング等の方法でパターン形成して回路17を形成し、図1(H)に示すような両面回路形成基板を得る。   Further, the copper foil 15 is patterned by a method such as etching to form a circuit 17 to obtain a double-sided circuit forming substrate as shown in FIG.

以上のような工程にて回路形成基板を製造した場合に、わずか2μmであるが熱プレス前に導電性ペースト14の突出部高さを増加させておくことが、導電性ペーストによる層間の電気的接続を良好にする。   When the circuit forming substrate is manufactured through the above-described steps, the height of the protruding portion of the conductive paste 14 is increased before the hot pressing, although it is only 2 μm. Make the connection good.

通常の熱プレス工程は真空プレスを用いるので基板材料中の揮発分の多くは熱プレス工程中に取り除かれると考えられる。そのような製造法では熱プレス工程中に基板材料の成分が流動する量が比較的大きく、導電性ペーストを基板厚み方向に圧縮して電気的接続を発現させるには不利となる。   Since a normal hot press process uses a vacuum press, it is considered that most of the volatile components in the substrate material are removed during the hot press process. In such a manufacturing method, the amount of the component of the substrate material that flows during the hot pressing process is relatively large, which is disadvantageous for compressing the conductive paste in the thickness direction of the substrate to develop an electrical connection.

本実施の形態では熱プレス工程前に基板材料41中の揮発成分を真空乾燥により取り除き、熱プレス時の流動を制御する。また揮発成分の除去により導電性ペースト14の基板材料41からの突出高さを増加させ、実効的な圧縮量を増加させている。これらにより、導電性ペースト14の熱プレス工程での圧縮が極めて効率的となり、回路形成基板表裏の回路17の電気的接続が十分なものとなる。   In the present embodiment, the volatile components in the substrate material 41 are removed by vacuum drying before the hot pressing step, and the flow during hot pressing is controlled. Further, removal of volatile components increases the protruding height of the conductive paste 14 from the substrate material 41, thereby increasing the effective compression amount. As a result, the compression of the conductive paste 14 in the hot press process becomes extremely efficient, and the electrical connection between the circuits 17 on the front and back of the circuit forming substrate becomes sufficient.

以上述べた手法は、実施の形態2で説明したような多層回路形成基板を製造する際の基板材料11に適用しても好適である。   The method described above is also suitable for application to the substrate material 11 when manufacturing a multilayer circuit forming substrate as described in the second embodiment.

本実施の形態の効果は実験の結果から、基板材料41の揮発分が0.5%以上で有効性が顕著であるが、揮発分が多すぎると基板材料41の保存性が低下する場合もあり、5%以下にとどめることが好ましい。   The effect of the present embodiment is remarkable when the volatile content of the substrate material 41 is 0.5% or more from the results of the experiment. However, if the volatile content is too large, the storage stability of the substrate material 41 may decrease. Yes, preferably 5% or less.

また、揮発分としてはBCA(ブチルカルビトールアセテート)等の高沸点の溶剤を基板材料41の製作過程で含有させておくことが好ましい。   Moreover, it is preferable to contain a high boiling point solvent such as BCA (butyl carbitol acetate) in the production process of the substrate material 41 as a volatile component.

なお、基板材料41の厚みを減少させる工程は真空乾燥法を用いて説明したが、基板材料41の物性に問題が発生しない条件での、加熱を伴う通常の乾燥法で行ってもよい。   Although the process of reducing the thickness of the substrate material 41 has been described using a vacuum drying method, it may be performed by a normal drying method that involves heating under conditions that do not cause a problem with the physical properties of the substrate material 41.

また、基板材料の厚みを減少させる工程において、プラズマやエキシマレーザを用いた乾式あるいは湿式のエッチング法により選択的に基板材料をエッチングする方法を用いても層間接続部が基板材料より突出する量を確保できる。またこの場合、基板材料の厚み減少量が安定する等の効果もある。   In addition, in the process of reducing the thickness of the substrate material, the amount of protrusion of the interlayer connection portion from the substrate material can be reduced even if the substrate material is selectively etched by a dry or wet etching method using plasma or excimer laser. It can be secured. In this case, there is an effect that the thickness reduction amount of the substrate material is stabilized.

(実施の形態5)
本発明の第5の実施の形態について図5(A)〜図5(C)を用いて以下に説明する。
(Embodiment 5)
A fifth embodiment of the present invention will be described below with reference to FIGS. 5 (A) to 5 (C).

図5(A)に示すようにガラス繊維織布38を用いたプリプレグ状態の基板材料51にレーザを用いてビア穴13を形成する。基板材料51には固形分としてのフィラー510が含まれている。   As shown in FIG. 5A, via holes 13 are formed in a prepreg substrate material 51 using a glass fiber woven fabric 38 using a laser. The substrate material 51 includes a filler 510 as a solid content.

通常の基板材料はガラス繊維織布38に熱硬化性樹脂を溶剤等で希釈したワニスと呼ばれる液状材料を含浸した後に乾燥工程にて溶剤等の揮発分を揮発させ熱硬化性樹脂の硬化度を調整する方法で製造される。このワニス中にフィラーを分散させておくことで本実施の形態で使用するような基板材料51を製造する。本実施の形態では直径約1〜2μmのシリカ(SiO2)を用いたシリカ系フィラーを用いる。 A normal substrate material is a glass fiber woven fabric 38 impregnated with a liquid material called a varnish obtained by diluting a thermosetting resin with a solvent or the like, and then volatilizing a volatile component such as a solvent or the like in a drying process to increase the degree of curing of the thermosetting resin. Manufactured by adjusting method. A substrate material 51 used in the present embodiment is manufactured by dispersing filler in the varnish. In the present embodiment, a silica-based filler using silica (SiO 2 ) having a diameter of about 1 to 2 μm is used.

図5(A)に示すように、ビア穴13の周囲には低流動層511が形成されている。この低流動層511はレーザ加工時に加工エネルギーがフィラー510に吸収され熱に変換され周囲の熱硬化性樹脂が変性する現象と、変性した熱硬化性樹脂が固形分としてのフィラー510を核として層となる現象等により形成される。フィラー510が無い場合よりもその形成効率ははるかに高い。また低流動層511にはガラス繊維織布38が成分として含まれることも当然あり得る。   As shown in FIG. 5A, a low fluidized bed 511 is formed around the via hole 13. The low fluidized layer 511 is a layer in which processing energy is absorbed by the filler 510 and converted into heat during laser processing, and the surrounding thermosetting resin is denatured, and the denatured thermosetting resin is a layer having the filler 510 as a solid as a core. It is formed by the phenomenon etc. which become. The formation efficiency is much higher than that without the filler 510. The low fluidized bed 511 may naturally include the glass fiber woven fabric 38 as a component.

低流動層511が形成された後、ビア穴13に導電性ペースト14を充填し、熱プレス工程を実施する場合は、図5(C)に示すように導電性ペースト14のビア穴13周囲への広がりは防止されている。したがって導電性ペースト14による電気的層間接続は良好である。   After the low fluidized bed 511 is formed, when the via hole 13 is filled with the conductive paste 14 and the hot press process is performed, as shown in FIG. The spread of is prevented. Therefore, the electrical interlayer connection by the conductive paste 14 is good.

低流動層511の形成はドリル加工でビア穴13を形成する場合の摩擦熱等で基板材料51中の樹脂成分等を変質させてフィラー510とともに固形化することでも実現可能である。しかしレーザを用いてビア穴13を形成する際にフィラー510にエネルギーを吸収させて熱変換し低流動層511を形成することが好ましい。   The formation of the low fluidized bed 511 can also be realized by solidifying together with the filler 510 by changing the resin component or the like in the substrate material 51 by frictional heat or the like when the via hole 13 is formed by drilling. However, when forming the via hole 13 using a laser, it is preferable that the filler 510 absorb energy and convert it into heat to form the low fluidized bed 511.

なお、この工程で用いるレーザの波長に関して、炭酸ガスレーザによって9μm以上の発振波長を用いた場合に低流動層511の形成が効率的である。また、フィラー510の材質としてシリカ以外の材料を用いてもよく、タルク、石膏粉等あるいは金属の水酸化物等(水酸化アルミ等)でも同様の効果が得られる。   Regarding the wavelength of the laser used in this step, the formation of the low fluidized bed 511 is efficient when an oscillation wavelength of 9 μm or more is used with a carbon dioxide gas laser. Further, a material other than silica may be used as the material of the filler 510, and the same effect can be obtained by using talc, gypsum powder, or a metal hydroxide (aluminum hydroxide, etc.).

以上述べた全ての実施の形態で基板材料は、ガラス繊維織布に熱硬化性樹脂を含浸しBステージ化したものとして説明したが、ガラス繊維織布の代わりに不織布を用いてもよい。ガラス繊維の代わりにアラミド等の有機繊維を用いてもよい。   In all the embodiments described above, the substrate material is described as a glass fiber woven fabric impregnated with a thermosetting resin to form a B-stage, but a nonwoven fabric may be used instead of the glass fiber woven fabric. Organic fibers such as aramid may be used instead of glass fibers.

また発明の形態1,2,4では基板材料にプリプレグに代えてBステージフィルムを用いてもよい。   In the first, second, and fourth aspects of the invention, a B stage film may be used instead of the prepreg as the substrate material.

また、織布と不織布を混成した材料、たとえば2枚のガラス繊維の間にガラス繊維不織布を挟み込んだような材料を補強材として用いてもよい。   Further, a material in which a woven fabric and a nonwoven fabric are mixed, for example, a material in which a glass fiber nonwoven fabric is sandwiched between two glass fibers, may be used as the reinforcing material.

また、本発明の全ての実施の形態における熱硬化性樹脂はエポキシ系樹脂として説明したが、以下のようなものを用いてもよい。エポキシ・メラミン系樹脂、不飽和ポリエステル系樹脂、フェノール系樹脂、ポリイミド系樹脂、シアネート系樹脂、シアン酸エステル系樹脂、ナフタレン系樹脂、ユリア系樹脂、アミノ系樹脂、アルキド系樹脂、ケイ素系樹脂、フラン系樹脂、ポリウレタン系樹脂、アミノアルキド系樹脂、アクリル系樹脂、フッ素系樹脂、ポリフェニレンエーテル系樹脂、シアネートエステル系樹脂等の単独、あるいは2種以上混合した熱硬化性樹脂組成物あるいは熱可塑性樹脂で変性された熱硬化性樹脂組成物、必要に応じて難燃剤や無機充填剤の添加も可能である。   Moreover, although the thermosetting resin in all the embodiments of the present invention has been described as an epoxy resin, the following may be used. Epoxy / melamine resins, unsaturated polyester resins, phenol resins, polyimide resins, cyanate resins, cyanate ester resins, naphthalene resins, urea resins, amino resins, alkyd resins, silicon resins, Furan resin, polyurethane resin, amino alkyd resin, acrylic resin, fluorine resin, polyphenylene ether resin, cyanate ester resin, etc., or a mixture of two or more thermosetting resin compositions or thermoplastic resins It is also possible to add a thermosetting resin composition modified with, and if necessary, a flame retardant or an inorganic filler.

また、銅箔の代わりに支持体に仮止めされた金属箔等からなる回路を用いることもできる。   Further, a circuit made of metal foil or the like temporarily fixed to a support can be used instead of copper foil.

また、層間接続部として銅粉等の導電性粒子と硬化剤と熱硬化性樹脂とを混練した導電性ペーストを用いて説明した。代わりに熱プレス時に基板材料中に排出されてしまうような適当な粘度の高分子材料と導電性粒子を混練したもの、あるいは溶剤等を添加したものなど多種の組成が利用可能である。さらに、導電性ペースト以外にめっき等により形成したポスト状の導電性突起や、ペースト化していない比較的大きな粒径の導電性粒子を単独で層間接続部として用いることも可能である。   Moreover, it demonstrated using the electrically conductive paste which knead | mixed electrically conductive particles, such as copper powder, a hardening | curing agent, and a thermosetting resin as an interlayer connection part. Instead, various compositions such as a kneaded polymer material having an appropriate viscosity and conductive particles that are discharged into the substrate material at the time of hot pressing, or a solvent added may be used. Furthermore, post-shaped conductive protrusions formed by plating or the like other than the conductive paste, or conductive particles having a relatively large particle size that are not made into a paste can be used alone as an interlayer connection portion.

(A)〜(G)は本発明の第1の実施の形態の回路形成基板の製造方法を示す工程断面図(A)-(G) is process sectional drawing which shows the manufacturing method of the circuit formation board | substrate of the 1st Embodiment of this invention. (A)〜(E)は本発明の第2の実施の形態の回路形成基板の製造方法を示す工程断面図(A)-(E) is process sectional drawing which shows the manufacturing method of the circuit formation board | substrate of the 2nd Embodiment of this invention. (A)は本発明の第3の実施の形態の回路形成基板の製造方法におけるビア形成工程の断面模式図、(B)は本発明の第3の実施の形態の回路形成基板の製造方法における導電性ペースト充填前のビア部上面図、(C)は本発明の第3の実施の形態の回路形成基板の製造方法における導電性ペースト充填後のビア部上面図(A) is a cross-sectional schematic diagram of the via formation process in the manufacturing method of the circuit formation board | substrate of the 3rd Embodiment of this invention, (B) is in the manufacturing method of the circuit formation board | substrate of the 3rd Embodiment of this invention. Via portion top view before filling with conductive paste, (C) is a via portion top view after filling with conductive paste in the circuit forming substrate manufacturing method of the third embodiment of the present invention. (A)〜(H)は本発明の第4の実施の形態の回路形成基板の製造方法を示す工程断面図(A)-(H) is process sectional drawing which shows the manufacturing method of the circuit formation board | substrate of the 4th Embodiment of this invention. (A)は本発明の第5の実施の形態の回路形成基板の製造方法におけるビア形成工程の断面模式図、(B)は本発明の第5の実施の形態の回路形成基板の製造方法における導電性ペースト充填前のビア部上面図、(C)は本発明の第5の実施の形態の回路形成基板の製造方法における導電性ペースト充填後のビア部上面図(A) is a cross-sectional schematic diagram of the via | veer formation process in the manufacturing method of the circuit formation board | substrate of the 5th Embodiment of this invention, (B) is in the manufacturing method of the circuit formation board | substrate of the 5th Embodiment of this invention. Via portion top view before filling with conductive paste, (C) is a via portion top view after filling with conductive paste in the circuit forming substrate manufacturing method of the fifth embodiment of the present invention. (A)〜(G)は従来技術における回路形成基板の製造方法を示す工程断面図(A)-(G) is process sectional drawing which shows the manufacturing method of the circuit formation board in a prior art. (A)は従来技術の回路形成基板の製造方法におけるビア形成工程の断面模式図、(B)は従来技術の回路形成基板の製造方法における導電性ペースト充填前のビア部上面図、(C)は従来技術の回路形成基板の製造方法における導電性ペースト充填後のビア部上面図(A) is a schematic cross-sectional view of a via formation step in a conventional method for manufacturing a circuit-formed substrate, (B) is a top view of a via portion before filling with a conductive paste in a conventional method for manufacturing a circuit-formed substrate, (C). Is a top view of a via portion after filling with a conductive paste in a conventional method of manufacturing a circuit forming substrate

符号の説明Explanation of symbols

11 基板材料
12 フィルム
13 ビア穴
14 導電性ペースト
15 銅箔
16,26 流れ出し部
17,27 回路
38 ガラス繊維織布
39 溶着部
41 基板材料
51 基板材料
510 フィラー
511 低流動層
61 基板材料
62 フィルム
63 ビア穴
64 導電性ペースト
65 銅箔
66 流れ出し部
67 回路
68 ガラス繊維織布
610 流出粒子
DESCRIPTION OF SYMBOLS 11 Substrate material 12 Film 13 Via hole 14 Conductive paste 15 Copper foil 16, 26 Flow-out part 17, 27 Circuit 38 Glass fiber woven fabric 39 Welded part 41 Substrate material 51 Substrate material 510 Filler 511 Low fluidized layer 61 Substrate material 62 Film 63 Via hole 64 Conductive paste 65 Copper foil 66 Outflow portion 67 Circuit 68 Glass fiber woven fabric 610 Outflow particle

Claims (2)

(1)金属箔、もしくは支持体に張り付けられた金属箔、もしくは支持体に張り付けられ回路パターンを形成された金属箔
(2)層間接続手段を設けたBステージ状態基板材料
(3)回路もしくは金属箔と層間接続手段を備えたBステージ状態基板材料
(4)回路もしくは金属箔を備えたCステージ状態基板材料
のうち、
少なくとも1つを層間接続手段を設けたBステージ状態基板材料とともに積層する積層工程と、
前記積層工程に加熱および加圧を伴う熱プレス工程と
を備え、
前記Bステージ状態基板材料はガラス繊維織布と熱硬化性樹脂と固形分としてのフィラーからなり、
前記層間接続部の形成は、前記Bステージ状態基板材料にビア穴を特定の波長を有するレーザ加工により施す穴形成工程と前記ビアの穴に導電性物質を充填する充填工程を含み、
前記穴形成工程においてレーザの加工エネルギーが前記Bステージ状態基板材料中の前記フィラーに吸収され熱に変換されることにより熱硬化性樹脂を変性し、
核としての前記フィラーと層としての前記変性した熱硬化性樹脂とにより形成される低流動層をビア穴周辺に形成することであり、
前記低流動層は、前記積層工程での加熱および加圧の際に前記ガラス繊維織布に含浸された熱硬化性樹脂の流動を制限するものであることを特徴とする回路形成基板の製造方法。
(1) Metal foil or metal foil affixed to a support or metal foil affixed to a support and formed with a circuit pattern (2) B stage state substrate material provided with interlayer connection means (3) Circuit or metal B stage state substrate material with foil and interlayer connection means (4) C stage state substrate material with circuit or metal foil,
A laminating step of laminating at least one together with a B-stage state substrate material provided with an interlayer connection means;
A heat pressing step involving heating and pressurization in the laminating step,
The B stage state substrate material consists of a glass fiber woven fabric, a thermosetting resin, and a filler as a solid content,
The formation of the interlayer connection portion includes a hole forming step for forming a via hole in the B stage state substrate material by laser processing having a specific wavelength, and a filling step for filling the via hole with a conductive substance,
In the hole forming step, the laser processing energy is absorbed by the filler in the B-stage state substrate material and converted into heat, thereby modifying the thermosetting resin,
Forming a low fluidized layer formed by the filler as a core and the modified thermosetting resin as a layer around a via hole,
The method of manufacturing a circuit forming substrate, wherein the low fluidized layer restricts the flow of the thermosetting resin impregnated in the glass fiber woven fabric during heating and pressurizing in the laminating step .
レーザ加工は、9μm以上の発振波長を有する炭酸ガスレーザで行うことを特徴とする請求項1に記載の回路形成基板の製造方法。 The method of manufacturing a circuit forming substrate according to claim 1, wherein the laser processing is performed with a carbon dioxide gas laser having an oscillation wavelength of 9 μm or more.
JP2004269599A 2001-07-18 2004-09-16 Circuit forming substrate manufacturing method and circuit forming substrate manufacturing material Expired - Fee Related JP4003769B2 (en)

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