JP3997665B2 - Connection method between semiconductor element and circuit board - Google Patents

Connection method between semiconductor element and circuit board Download PDF

Info

Publication number
JP3997665B2
JP3997665B2 JP24017799A JP24017799A JP3997665B2 JP 3997665 B2 JP3997665 B2 JP 3997665B2 JP 24017799 A JP24017799 A JP 24017799A JP 24017799 A JP24017799 A JP 24017799A JP 3997665 B2 JP3997665 B2 JP 3997665B2
Authority
JP
Japan
Prior art keywords
wire
circuit board
bonding
land
semiconductor element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP24017799A
Other languages
Japanese (ja)
Other versions
JP2001068497A (en
Inventor
俊夫 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Corp
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Priority to JP24017799A priority Critical patent/JP3997665B2/en
Publication of JP2001068497A publication Critical patent/JP2001068497A/en
Application granted granted Critical
Publication of JP3997665B2 publication Critical patent/JP3997665B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
    • H01L2224/45012—Cross-sectional shape
    • H01L2224/45015—Cross-sectional shape being circular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
    • H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
    • H01L2224/48477—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding)
    • H01L2224/48478—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball
    • H01L2224/4848—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being a pre-ball (i.e. a ball formed by capillary bonding) the connecting portion being a wedge bond, i.e. wedge on pre-ball outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48475—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball
    • H01L2224/48476—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area
    • H01L2224/48491—Connecting portions connected to auxiliary connecting means on the bonding areas, e.g. pre-ball, wedge-on-ball, ball-on-ball between the wire connector and the bonding area being an additional member attached to the bonding area through an adhesive or solder, e.g. buffer pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/485—Material
    • H01L2224/48505—Material at the bonding interface
    • H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
    • H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/48617—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
    • H01L2224/48624—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494—Connecting portions
    • H01L2224/4943—Connecting portions the connecting portions being staggered
    • H01L2224/49433—Connecting portions the connecting portions being staggered outside the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/494—Connecting portions
    • H01L2224/4945—Wire connectors having connecting portions of different types on the semiconductor or solid-state body, e.g. regular and reverse stitches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301—Capillary
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78—Apparatus for connecting with wire connectors
    • H01L2224/7825—Means for applying energy, e.g. heating means
    • H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78313—Wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85009—Pre-treatment of the connector or the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85009—Pre-treatment of the connector or the bonding area
    • H01L2224/8503—Reshaping, e.g. forming the ball or the wedge of the wire connector
    • H01L2224/85035—Reshaping, e.g. forming the ball or the wedge of the wire connector by heating means, e.g. "free-air-ball"
    • H01L2224/85045—Reshaping, e.g. forming the ball or the wedge of the wire connector by heating means, e.g. "free-air-ball" using a corona discharge, e.g. electronic flame off [EFO]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85009—Pre-treatment of the connector or the bonding area
    • H01L2224/85051—Forming additional members, e.g. for "wedge-on-ball", "ball-on-wedge", "ball-on-ball" connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85053—Bonding environment
    • H01L2224/85095—Temperature settings
    • H01L2224/85099—Ambient temperature
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512—Aligning
    • H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518—Translational movements
    • H01L2224/85181—Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512—Aligning
    • H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518—Translational movements
    • H01L2224/85191—Translational movements connecting first both on and outside the semiconductor or solid-state body, i.e. regular and reverse stitches
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/85201—Compression bonding
    • H01L2224/85205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/85417—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/85424—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/201—Temperature ranges
    • H01L2924/20102—Temperature range 0 C=<T<60 C, 273.15 K =<T< 333.15K
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/207—Diameter ranges
    • H01L2924/20753—Diameter ranges larger or equal to 30 microns less than 40 microns
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/207—Diameter ranges
    • H01L2924/20755—Diameter ranges larger or equal to 50 microns less than 60 microns
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/20—Parameters
    • H01L2924/207—Diameter ranges
    • H01L2924/2076—Diameter ranges equal to or larger than 100 microns

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体素子の電極と回路基板の配線とをワイヤボンディングで形成されたＡｕよりなる導線によって電気的に接続する方法に関する。
【０００２】
【従来の技術】
半導体製品の高機能化とともに、例えばハイブリッドＩＣに実装される半導体素子（ベアチップＩＣ）の電極は、狭ピッチおよび多端子化の傾向にある。このため、半導体素子の電極と回路基板上の配線との間を狭ピッチ化に対応できるＡｕ（金）ワイヤボールボンディング手法を用いる必要性がでてきた。また、回路基板の低コスト化のために回路基板の配線にはコストの高いＡｕ等の貴金属ではなく、Ｃｕ（銅）等の卑金属を用いる必要性がある。
【０００３】
しかし、回路基板上のＣｕ配線にＡｕワイヤボールボンディング手法を実施する場合は回路基板を加熱する必要性があり、この加熱によりＣｕ配線が酸化してＡｕワイヤのボンディング接合性が低下するといった不具合がある。そこで、このような不具合に対して、回路基板上のＡｕワイヤをボンディングする部分（ボンディングランド部）を工夫することにより上述の不具合を解決する様々な提案がなされている。
【０００４】
例えば、特開昭５７−１３０４４３号公報に記載の発明においては、この発明の接続方法を用いた回路基板の模式的な断面図である図６に示すように、回路基板Ｊ１上のＣｕ配線Ｊ２のうちボンディングランド部Ｊ３をＡｕ厚膜などの貴金属を用いて予め形成しておく。そして、その後、上述の半導体素子Ｊ４の電極部Ｊ４ａと回路基板Ｊ１のボンディングランド部Ｊ３とを、Ａｕワイヤを用いてワイヤボンディングすることにより、半導体素子Ｊ４と回路基板Ｊ１とを導線Ｊ５によって電気的に接続するという手法を用いている。
【０００５】
また、特開平３−９１２５１号公報に記載の発明の接続方法を用いた回路基板の模式的な断面図を図７（ａ）に示す。この発明では、Ａｕ厚膜などを回路基板Ｊ１上に形成せずに、予め回路基板Ｊ１のＣｕ配線Ｊ２上にＡｕパッドＪ６を溶接してボンディングランド部を形成する。その後、特開昭５７−１３０４４３号公報と同様にＡｕワイヤからなる導線Ｊ５によって接続する。
【０００６】
さらに、特開平１０−１１２４７１号公報に記載の発明では、この発明の接続方法を用いた回路基板の模式的な断面図である図８（ａ）に示すように、予め回路基板Ｊ１のＣｕ配線Ｊ２上にＡｕワイヤボールボンディングを行ってボール状のバンプＪ７を形成しておき、その後は、特開昭５７−１３０４４３号公報と同様にＡｕワイヤからなる導線Ｊ５によって接続するという手法が提案されている。
【０００７】
【発明が解決しようとする課題】
しかしながら、上述の特開昭５７−１３０４４３号公報に記載の発明では、Ａｕ厚膜等の貴金属を用いるため回路基板のコストが高くなるという不具合がある。また、特開平３−９１２５１号公報に記載の発明では、ＡｕリボンからなるＡｕパッドＪ６をパラレルギャップ溶接等の手法で溶接する場合、このＡｕパッドＪ６の寸法は少なくとも１ｍｍ×１ｍｍ程度の大きさが必要である。図７（ｂ）はこの発明を用いた場合の回路基板の模式的な上面図である。
【０００８】
このＡｕパッドＪ６の大きさで、例えば、１００をこえる電極端子数をもつ半導体素子Ｊ４を回路基板Ｊ１に組み付け、ＡｕパッドＪ６を回路基板Ｊ１上にレイアウトした場合には、図７（ｂ）に示す様に、ワイヤボンディング部の実装面積が大きくなってしまう。そして、それにより、Ａｕワイヤからなる導線Ｊ５のボンディング長が長くなりすぎてＡｕワイヤボンディングができないといった不具合も生じる。従って、本公報に記載の発明では、近年の半導体素子の電極の狭ピッチ化および多端子化に対応できない。
【０００９】
一方、特開平１０−１１２４７１号公報に記載の発明を用いた場合、回路基板の模式的な上面図である図８（ｂ）に示す様に、Ａｕワイヤの接合性を確保し、かつ、例えば３００μｍピッチ程度の狭ピッチなＡｕワイヤボンディング用のランドを形成することができる。しかし、最初にＣｕ配線Ｊ２上にバンプＪ７を形成する手法はＡｕワイヤボールボンディングであるため、ボンディング時に回路基板Ｊ１を加熱する必要がある。これにより、回路基板Ｊ１上へのＡｕワイヤボンディングの本数が多い場合には、加熱時間が長くなるためにＣｕ配線Ｊ２の酸化が生じてしまい、バンプＪ７をうまく接合することができないといった不具合がある。
【００１０】
本発明は、上記問題点に鑑み、半導体素子と回路基板上に形成された複数個の配線とをワイヤボンディングで形成されたＡｕよりなる導線によって電気的に接続する方法において、回路基板に形成された卑金属よりなる配線の酸化により、Ａｕワイヤボンディングの接合性が低下することを回避するとともに、狭ピッチ化に対応したワイヤボンディング用のランドを提供することを目的とする。
【００１１】
【課題を解決するための手段】
上記目的を達成するため、請求項１に記載の発明では、回路基板（１）上に形成された複数個の配線（４）のワイヤボンディングを行う全ての部分に、回路基板（１）の加熱を伴わずにウェッジボンディングを行ってＡｕよりなるランド（５）を形成し、その後、ボールボンディング用のワイヤボンダを用いて半導体素子（３）とランド（５）との間をワイヤボンドすることによりＡｕよりなる導線（１０）を形成することを特徴としている。
【００１２】
本発明によれば、回路基板（１）の加熱を伴わずにウェッジボンディングを行ってランド（５）を形成しているので、回路基板（１）の配線（４）上にランド（５）を形成する際に配線（４）が酸化することを防ぎ、適切にランド（５）を形成することができる。また、ウェッジボンディングによりランド（５）を形成したことにより、ランド（５）の大きさはＡｕワイヤ（６）を少しつぶした程度の大きさにすることができる。そのため、複数個の配線（４）を狭ピッチ化しても、それに対応してランド（５）を形成できる。従って、回路基板に形成された卑金属よりなる配線の酸化により、Ａｕワイヤボンディングの接合性が低下することを回避するとともに、狭ピッチ化に対応したワイヤボンディング用のランドを提供することができる。
【００１３】
請求項２に記載の発明では、請求項１に記載の発明において、ランド（５）を形成した後、回路基板（１）を加熱することにより、ランド（５）を構成するＡｕと配線（４）を構成する金属とを相互に拡散させることを特徴としている。これにより、ランド（５）と配線（４）との接合性を向上させることができる。
【００１４】
なお、上記各手段の括弧内の符号は、後述する実施形態に記載の具体的手段との対応関係を示すものである。
【００１５】
【発明の実施の形態】
本発明は、回路基板上に対するＡｕワイヤを用いたワイヤボンディングの方法であり、主にハイブリッドＩＣの実装に用いて好適である。図１および図２は、本発明の第１実施形態に係る半導体素子と回路基板との接続方法を示す工程図であり、本接続方法は、図３に示す本実施形態のフローチャートに示すように、ウェッジボンディングを行った後に、ボールボンディングを行うものことにより、最終的に図２（ｄ）に示す接続構造（部分断面図）を得るものである。なお、図１および図２（ａ）〜（ｃ）は、図２（ｄ）に対応した断面にて各接続工程の状態を示している。以下、接続工程順に説明する。
【００１６】
まず、図１（ａ）に示す様に、回路基板（セラミック基板やプリント基板などの基板もしくはリードフレーム）１を用意する。この回路基板１の一面上には、ダイマウント材（例えばはんだやＡｇペースト）２により半導体素子３がダイマウントされ、半導体素子３上には、半導体素子３の内部回路と電気的に接続された複数の電極３ａが設けられている。一方、回路基板１の一面上のうち半導体素子３の設置領域と異なる部分には、Ｃｕ等の卑金属からなる配線材料を用いた複数の配線４が形成されており、本実施形態ではＣｕを用いている。
【００１７】
そして、ウェッジボンディング用のワイヤボンダを用いて、図１（ａ）〜（ｃ）に示す様に、この配線４上に、Ａｕよりなる複数個のＡｕランド５を、Ａｕワイヤ６を用いて室温において、つまり、回路基板１を加熱することなくウェッジボンディングにより形成する。ここで、本発明でいうウェッジボンディングとは、周知の様に、超音波振動をするウェッジボンディング用のワイヤボンドツール（以下、ウェッジツールとする）先端で、ボンディングワイヤを非接触物に押し付け、超音波振動と荷重により接合するという手法である。初めに、図１（ａ）に示す様に、ウェッジツール７の先端にボンディングワイヤとしてのＡｕワイヤ６があるような状態にする。ここで用いるＡｕワイヤ６の直径は、例えば、３０μｍ、５０μｍあるいは１００μｍ程度のものである。
【００１８】
次に、図１（ｂ）に示す様に、ウェッジツール７を配線４上に位置させてウェッジボンディングを行いＡｕランド５を形成する。具体的には、Ａｕワイヤ６をウェッジボンドした後、Ａｕワイヤ６をクランプして、図１（ｂ）のＡの部分で引きちぎるか、あるいは、カッター等で切ることによりＡｕランド５を形成することができる。ここで、Ａｕランド５の幅は、後述のボールボンディングを行う時に用いるＡｕワイヤ６の直径の１．５倍程度以上あるようにする。次に、図１（ｃ）に示す様に、次のＡｕランド５の形成に備える。以上これら図１（ａ）〜（ｃ）の工程を順次繰り返し、必要とされる全てのＡｕランド５を形成する。ここまでが、図３に示すＡｕワイヤウェッジボンディング工程Ｓ１である。
【００１９】
次に、図２（ａ）〜（ｄ）に示す様に、ボールボンディング用のワイヤボンダを用いて、回路基板１を加熱しつつ、半導体素子３の複数の電極３ａを１次側、回路基板１の配線４上に形成された複数のＡｕランド５を２次側として、ボールボンディングによって半導体素子３と回路基板１とをワイヤボンドする。まず、図２（ａ）に示すように、キャピラリ８の貫通孔にＡｕワイヤ６を挿通した状態で、トーチ電極９からの放電によりキャピラリ８から突出したＡｕワイヤ６の先端にＡｕボール６ａを形成する。ここで用いるＡｕワイヤ６の直径は、例えば、３０μｍ、５０μｍあるいは１００μｍ程度のものを用いることができる。
【００２０】
そして、図２（ｂ）に示すように、キャピラリ８を半導体素子３の電極３ａ上に位置させ、１次ボンディングを行う。次に、図２（ｃ）に示すように、Ａｕワイヤ６をルーピングしてキャピラリ８をＡｕランド５上に位置させ２次ボンディングを行い、Ａｕよりなる導線１０を形成する。そして、図２（ａ）〜（ｃ）の工程を順次繰り返し、全てのＡｕランド５と対応する半導体素子３の電極３ａとを導線１０によって接続する。ここまでが、図３に示すＡｕワイヤボールボンディング工程Ｓ２である。以上、各工程Ｓ１およびＳ２を行うことにより、図２（ｄ）に示すように、半導体素子３の電極３ａと回路基板１の全てのＡｕランド５との間にＡｕワイヤ６よりなる導線１０が形成され、半導体素子３と回路基板１とが電気的に接続される。
【００２１】
ところで、本実施形態によれば、Ａｕランド５の形成をウェッジボンディングによって行っており、ウェッジボンディングは回路基板１の加熱を伴わずに行うことができるため、回路基板１の配線４上にＡｕランド５を形成する際に配線４が酸化することを防ぎ、適切にＡｕランド５を形成することができる。また、予め必要とされる全てのＡｕランド５を形成し、その後、そのＡｕランド５を２次側としてＡｕワイヤ６を用いてボールボンディングを行っており、２次ボンディングはＡｕどうしの接合であるため、Ａｕワイヤ６を用いたワイヤボンディングの接合性が低下することはない。
【００２２】
また、ウェッジボンディングによりＡｕランド５を形成するため、Ａｕワイヤ６を少しつぶした程度の大きさである小さなＡｕランド５を形成することができる。詳しくは、Ａｕランド５の上面図である図４に示すように、つぶれ幅ＷをＡｕワイヤ６のワイヤ径の１．５〜３倍程度にし、つぶれ長さＬをＡｕワイヤ６のワイヤ径の２〜５倍程度にすることができる。従って、回路基板に形成された卑金属よりなる配線の酸化により、Ａｕワイヤボンディングの接合性が低下することを回避するとともに、狭ピッチ化に対応したワイヤボンディング用のランドを提供することができる。
【００２３】
なお、Ａｕランド５を形成するのに用いるＡｕワイヤ６と、その後ボールボンディングを行うのに用いるＡｕワイヤ６との直径は同じであってもよいし異なっていてもよいが、Ａｕランド５に対して２次ボンディングを行った際にＡｕワイヤがＡｕランド５からはみ出さない様にする必要がある。また、本実施形態の接続方法では、回路基板１の配線４に形成されたＡｕランド５をボールボンディングの２次側としたが、これとは逆に、半導体素子３の電極３ａをボールボンディングの２次側としてもよい。
【００２４】
（他の実施形態）
本実施形態のフローチャートを図５に示す。本実施形態は、上述の実施形態におけるＡｕワイヤウェッジボンディング工程Ｓ１とＡｕワイヤボールボンディング工程Ｓ２との間に、加熱工程Ｓ３を行うものである。具体的には、この加熱工程Ｓ３では、回路基板１を、例えば、１５０℃程度の温度に加熱することができる。本実施形態によれば、回路基板１を加熱することにより、Ａｕランド５を構成するＡｕと配線４を構成するＣｕとを相互に拡散させ、Ａｕランド５の配線４への接合性を向上させることができる。
【００２５】
なお、この加熱工程Ｓ３は、Ａｕワイヤボールボンディング工程Ｓ２を行った後に行ってもよい。また、Ａｕワイヤボールボンディング工程Ｓ２においても回路基板１を加熱しているが、その時の温度は、例えば、１００〜１１０℃程度の温度であり、本実施形態の加熱工程Ｓ３における加熱温度よりも低い。従って、Ａｕランド５の配線４への接合性を向上させるためには、本実施形態の様に加熱工程Ｓ３を行うことが有効である。
【００２６】
【図面の簡単な説明】
【図１】本発明の半導体素子と回路基板との接続方法を示す工程図である。
【図２】図１に続く接続方法を示す工程図である。
【図３】本発明の実施形態のフローチャートである。
【図４】Ａｕランドの上面図である。
【図５】本発明の他の実施形態のフローチャートである。
【図６】従来の半導体素子と回路基板との接続方法を示す模式的な断面図である。
【図７】その他の従来の接続方法を示す模式的な図である。
【図８】もう一つのその他の従来の接続方法を示す模式的な図である。
【符号の説明】
１…回路基板、３…半導体素子、４…配線、５…Ａｕランド、１０…導線。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method of electrically connecting an electrode of a semiconductor element and a wiring of a circuit board by a conductive wire made of Au formed by wire bonding.
[0002]
[Prior art]
Along with the increase in functionality of semiconductor products, for example, the electrodes of semiconductor elements (bare chip ICs) mounted on hybrid ICs tend to have narrow pitches and multiple terminals. For this reason, it has become necessary to use an Au (gold) wire ball bonding technique that can cope with a narrow pitch between the electrode of the semiconductor element and the wiring on the circuit board. Further, in order to reduce the cost of the circuit board, it is necessary to use a base metal such as Cu (copper) instead of the expensive noble metal such as Au for the wiring of the circuit board.
[0003]
However, when the Au wire ball bonding method is applied to the Cu wiring on the circuit board, it is necessary to heat the circuit board, and this heating causes a problem that the Cu wiring is oxidized and the bonding property of the Au wire is lowered. is there. Therefore, various proposals have been made to solve the above problems by devising a portion (bonding land portion) for bonding the Au wire on the circuit board.
[0004]
For example, in the invention described in Japanese Patent Application Laid-Open No. 57-130443, as shown in FIG. 6 which is a schematic cross-sectional view of a circuit board using the connection method of the present invention, Cu wiring J2 on the circuit board J1 is used. Of these, the bonding land J3 is formed in advance using a noble metal such as an Au thick film. Thereafter, the electrode part J4a of the semiconductor element J4 and the bonding land part J3 of the circuit board J1 are wire-bonded using an Au wire, whereby the semiconductor element J4 and the circuit board J1 are electrically connected by the conductive wire J5. The method of connecting to is used.
[0005]
FIG. 7A shows a schematic cross-sectional view of a circuit board using the connection method of the invention described in Japanese Patent Application Laid-Open No. 3-91251. In the present invention, without forming an Au thick film or the like on the circuit board J1, an Au pad J6 is welded in advance on the Cu wiring J2 of the circuit board J1 to form a bonding land portion. Thereafter, they are connected by a conductive wire J5 made of Au wire as in Japanese Patent Laid-Open No. 57-130443.
[0006]
Furthermore, in the invention described in Japanese Patent Application Laid-Open No. 10-112471, as shown in FIG. 8A which is a schematic cross-sectional view of a circuit board using the connection method of the present invention, Cu wiring of the circuit board J1 is previously provided. A method has been proposed in which Au wire ball bonding is performed on J2 to form a ball-shaped bump J7, and thereafter, connection is made by a conductive wire J5 made of Au wire as in Japanese Patent Laid-Open No. 57-130443. Yes.
[0007]
[Problems to be solved by the invention]
However, the invention described in the above-mentioned Japanese Patent Application Laid-Open No. 57-130443 has a problem that the cost of the circuit board increases because a noble metal such as an Au thick film is used. In the invention described in JP-A-3-91251, when the Au pad J6 made of Au ribbon is welded by a technique such as parallel gap welding, the size of the Au pad J6 is at least about 1 mm × 1 mm. is necessary. FIG. 7B is a schematic top view of a circuit board when the present invention is used.
[0008]
When the size of the Au pad J6, for example, the semiconductor element J4 having the number of electrode terminals exceeding 100 is assembled to the circuit board J1, and the Au pad J6 is laid out on the circuit board J1, FIG. As shown, the mounting area of the wire bonding portion increases. As a result, there also arises a problem that the bonding length of the lead wire J5 made of Au wire becomes too long and Au wire bonding cannot be performed. Therefore, the invention described in this publication cannot cope with the recent reduction in the pitch and the number of terminals of the electrodes of semiconductor elements.
[0009]
On the other hand, when the invention described in Japanese Patent Laid-Open No. 10-112471 is used, as shown in FIG. 8B which is a schematic top view of a circuit board, the bonding property of the Au wire is ensured, and for example, A land for Au wire bonding having a narrow pitch of about 300 μm can be formed. However, since the method of first forming the bump J7 on the Cu wiring J2 is Au wire ball bonding, it is necessary to heat the circuit board J1 during bonding. As a result, when the number of Au wire bondings on the circuit board J1 is large, the heating time becomes long, so that the Cu wiring J2 is oxidized, and the bump J7 cannot be bonded well. .
[0010]
In view of the above problems, the present invention provides a method for electrically connecting a semiconductor element and a plurality of wirings formed on a circuit board by a conductive wire made of Au formed by wire bonding. Another object of the present invention is to provide a wire bonding land corresponding to a narrow pitch while avoiding deterioration of the bonding performance of Au wire bonding due to the oxidation of the wiring made of the base metal.
[0011]
[Means for Solving the Problems]
In order to achieve the above object, according to the first aspect of the present invention, the heating of the circuit board (1) is performed on all the portions where the plurality of wirings (4) formed on the circuit board (1) are bonded. Wedge bonding is performed without forming a land (5) made of Au, and then wire bonding is performed between the semiconductor element (3) and the land (5) by using a wire bonder for ball bonding. It is characterized by forming a conducting wire (10).
[0012]
According to the present invention, since the land (5) is formed by performing the wedge bonding without heating the circuit board (1), the land (5) is formed on the wiring (4) of the circuit board (1). The formation of the land (5) can be prevented by preventing the wiring (4) from being oxidized during the formation. In addition, since the land (5) is formed by wedge bonding, the size of the land (5) can be set to a size that the Au wire (6) is slightly crushed. Therefore, even if the pitch of the plurality of wirings (4) is narrowed, the land (5) can be formed correspondingly. Therefore, it is possible to avoid a decrease in the bonding property of Au wire bonding due to the oxidation of the wiring made of the base metal formed on the circuit board, and to provide a wire bonding land corresponding to a narrow pitch.
[0013]
According to a second aspect of the present invention, in the first aspect of the present invention, after the land (5) is formed, the circuit board (1) is heated to form Au and the wiring (4) constituting the land (5). ) Is diffused with each other. Thereby, the bondability between the land (5) and the wiring (4) can be improved.
[0014]
In addition, the code | symbol in the bracket | parenthesis of each said means shows the correspondence with the specific means as described in embodiment mentioned later.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
The present invention is a wire bonding method using an Au wire on a circuit board, and is suitable mainly for mounting a hybrid IC. 1 and 2 are process diagrams showing a method for connecting a semiconductor element and a circuit board according to the first embodiment of the present invention. As shown in the flowchart of this embodiment shown in FIG. The connection structure (partial cross-sectional view) shown in FIG. 2D is finally obtained by performing ball bonding after performing wedge bonding. FIG. 1 and FIGS. 2A to 2C show the state of each connection step in a cross section corresponding to FIG. Hereinafter, it demonstrates in order of a connection process.
[0016]
First, as shown in FIG. 1A, a circuit board (a board such as a ceramic board or a printed board or a lead frame) 1 is prepared. A semiconductor element 3 is die-mounted by a die mount material (for example, solder or Ag paste) 2 on one surface of the circuit board 1, and is electrically connected to an internal circuit of the semiconductor element 3 on the semiconductor element 3. A plurality of electrodes 3a are provided. On the other hand, a plurality of wirings 4 using a wiring material made of a base metal such as Cu are formed in a portion different from the installation region of the semiconductor element 3 on one surface of the circuit board 1, and Cu is used in this embodiment. ing.
[0017]
Then, using a wire bonder for wedge bonding, as shown in FIGS. 1A to 1C, a plurality of Au lands 5 made of Au are formed on the wiring 4 at room temperature using Au wires 6. That is, the circuit board 1 is formed by wedge bonding without heating. Here, the wedge bonding referred to in the present invention, as is well known, presses a bonding wire against a non-contact object at the tip of a wire bonding tool (hereinafter referred to as a wedge tool) for wedge bonding that performs ultrasonic vibration. This is a technique of joining by sonic vibration and load. First, as shown in FIG. 1A, the wedge tool 7 is brought into a state where there is an Au wire 6 as a bonding wire at the tip. The diameter of the Au wire 6 used here is, for example, about 30 μm, 50 μm, or 100 μm.
[0018]
Next, as shown in FIG. 1B, the wedge tool 7 is positioned on the wiring 4 and wedge bonding is performed to form Au lands 5. Specifically, after the Au wire 6 is wedge-bonded, the Au wire 6 is clamped and torn at a portion A in FIG. 1B or cut with a cutter or the like to form the Au land 5 Can do. Here, the width of the Au land 5 is set to be about 1.5 times or more the diameter of the Au wire 6 used when ball bonding described later is performed. Next, as shown in FIG. 1C, the next Au land 5 is prepared. The steps shown in FIGS. 1A to 1C are sequentially repeated to form all necessary Au lands 5. This is the Au wire wedge bonding step S1 shown in FIG.
[0019]
Next, as shown in FIGS. 2A to 2D, a plurality of electrodes 3a of the semiconductor element 3 are connected to the primary side of the circuit board 1 while heating the circuit board 1 using a wire bonder for ball bonding. The semiconductor element 3 and the circuit board 1 are wire-bonded by ball bonding using the plurality of Au lands 5 formed on the wiring 4 as the secondary side. First, as shown in FIG. 2 (a), an Au ball 6 a is formed at the tip of the Au wire 6 protruding from the capillary 8 by the discharge from the torch electrode 9 with the Au wire 6 inserted into the through hole of the capillary 8. To do. The diameter of the Au wire 6 used here can be, for example, about 30 μm, 50 μm, or 100 μm.
[0020]
Then, as shown in FIG. 2B, the capillary 8 is positioned on the electrode 3a of the semiconductor element 3, and primary bonding is performed. Next, as shown in FIG. 2 (c), the Au wire 6 is looped to place the capillary 8 on the Au land 5 and secondary bonding is performed to form a conductive wire 10 made of Au. 2A to 2C are sequentially repeated to connect all the Au lands 5 to the corresponding electrodes 3a of the semiconductor element 3 by the conductive wires 10. This is the Au wire ball bonding step S2 shown in FIG. As described above, by performing the steps S1 and S2, as shown in FIG. 2D, the conductive wire 10 made of the Au wire 6 is formed between the electrode 3a of the semiconductor element 3 and all the Au lands 5 of the circuit board 1. The semiconductor element 3 and the circuit board 1 are electrically connected.
[0021]
By the way, according to the present embodiment, the Au land 5 is formed by wedge bonding, and the wedge bonding can be performed without heating the circuit board 1. Therefore, the Au land is formed on the wiring 4 of the circuit board 1. It is possible to prevent the wiring 4 from being oxidized when forming 5 and form the Au land 5 appropriately. In addition, all the Au lands 5 required in advance are formed, and thereafter, the Au lands 5 are used as the secondary side and ball bonding is performed using the Au wire 6, and the secondary bonding is a bonding between Au. Therefore, the bondability of wire bonding using the Au wire 6 does not deteriorate.
[0022]
Further, since the Au land 5 is formed by wedge bonding, it is possible to form a small Au land 5 having a size that the Au wire 6 is slightly crushed. Specifically, as shown in FIG. 4 which is a top view of the Au land 5, the crushing width W is set to about 1.5 to 3 times the wire diameter of the Au wire 6, and the crushing length L is set to the wire diameter of the Au wire 6. It can be about 2 to 5 times. Therefore, it is possible to avoid a decrease in the bonding property of Au wire bonding due to the oxidation of the wiring made of the base metal formed on the circuit board, and to provide a wire bonding land corresponding to a narrow pitch.
[0023]
The diameters of the Au wire 6 used for forming the Au land 5 and the Au wire 6 used for subsequent ball bonding may be the same or different. Thus, it is necessary to prevent the Au wire from protruding from the Au land 5 when the secondary bonding is performed. In the connection method of the present embodiment, the Au land 5 formed on the wiring 4 of the circuit board 1 is used as the secondary side of ball bonding. On the contrary, the electrode 3a of the semiconductor element 3 is used for ball bonding. It is good also as a secondary side.
[0024]
(Other embodiments)
A flowchart of this embodiment is shown in FIG. In the present embodiment, a heating step S3 is performed between the Au wire wedge bonding step S1 and the Au wire ball bonding step S2 in the above-described embodiment. Specifically, in this heating step S3, the circuit board 1 can be heated to a temperature of about 150 ° C., for example. According to the present embodiment, by heating the circuit board 1, Au constituting the Au land 5 and Cu constituting the wiring 4 are diffused to each other, and the bonding property of the Au land 5 to the wiring 4 is improved. be able to.
[0025]
The heating step S3 may be performed after the Au wire ball bonding step S2. The circuit board 1 is also heated in the Au wire ball bonding step S2, and the temperature at that time is, for example, about 100 to 110 ° C., which is lower than the heating temperature in the heating step S3 of the present embodiment. . Therefore, in order to improve the bondability of the Au land 5 to the wiring 4, it is effective to perform the heating step S3 as in this embodiment.
[0026]
[Brief description of the drawings]
FIG. 1 is a process diagram illustrating a method for connecting a semiconductor element and a circuit board according to the present invention.
FIG. 2 is a process diagram illustrating a connection method following FIG. 1;
FIG. 3 is a flowchart of an embodiment of the present invention.
FIG. 4 is a top view of an Au land.
FIG. 5 is a flowchart of another embodiment of the present invention.
FIG. 6 is a schematic cross-sectional view showing a conventional method for connecting a semiconductor element and a circuit board.
FIG. 7 is a schematic diagram showing another conventional connection method.
FIG. 8 is a schematic diagram showing another other conventional connection method.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Circuit board, 3 ... Semiconductor element, 4 ... Wiring, 5 ... Au land, 10 ... Conductive wire.

Claims (2)

半導体素子（３）と回路基板（１）上に形成された複数個の配線（４）とをワイヤボンディングで形成されたＡｕよりなる導線（１０）によって電気的に接続する方法であって、
前記複数個の配線（４）におけるワイヤボンディングを行う全ての部分に、前記回路基板（１）の加熱を伴わずにウェッジボンディングを行ってＡｕよりなるランド（５）を形成し、
その後、ボールボンディング用のワイヤボンダを用いて前記半導体素子（３）と前記ランド（５）との間をワイヤボンドすることにより前記導線（１０）を形成することを特徴とする半導体素子と回路基板との接続方法。A method of electrically connecting a semiconductor element (3) and a plurality of wirings (4) formed on a circuit board (1) by a conductive wire (10) made of Au formed by wire bonding,
A land (5) made of Au is formed by performing wedge bonding without heating the circuit board (1) on all portions where wire bonding is performed in the plurality of wirings (4).
Thereafter, the conductor (10) is formed by wire bonding between the semiconductor element (3) and the land (5) using a wire bonder for ball bonding, and a semiconductor element and a circuit board, Connection method. 前記ランド（５）を形成した後、前記回路基板（１）を加熱することにより、前記ランド（５）を構成するＡｕと前記配線（４）を構成する金属とを相互に拡散させることを特徴とする請求項１に記載の半導体素子と回路基板との接続方法。After the land (5) is formed, the circuit board (1) is heated to diffuse the Au constituting the land (5) and the metal constituting the wiring (4) to each other. A method for connecting a semiconductor element according to claim 1 and a circuit board.
JP24017799A 1999-08-26 1999-08-26 Connection method between semiconductor element and circuit board Expired - Fee Related JP3997665B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24017799A JP3997665B2 (en) 1999-08-26 1999-08-26 Connection method between semiconductor element and circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24017799A JP3997665B2 (en) 1999-08-26 1999-08-26 Connection method between semiconductor element and circuit board

Publications (2)

Publication Number Publication Date
JP2001068497A JP2001068497A (en) 2001-03-16
JP3997665B2 true JP3997665B2 (en) 2007-10-24

Family

ID=17055629

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24017799A Expired - Fee Related JP3997665B2 (en) 1999-08-26 1999-08-26 Connection method between semiconductor element and circuit board

Country Status (1)

Country Link
JP (1) JP3997665B2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004297014A (en) * 2003-03-28 2004-10-21 Denso Corp Method for wire bonding of semiconductor device and semiconductor device
DE102004034821A1 (en) * 2004-07-19 2006-03-16 Infineon Technologies Ag Semiconductor and method for its production
US8125060B2 (en) 2006-12-08 2012-02-28 Infineon Technologies Ag Electronic component with layered frame
GB2604433B (en) * 2020-12-23 2023-05-03 Skyworks Solutions Inc Apparatus and methods for tool mark free stitch bonding

Also Published As

Publication number Publication date
JP2001068497A (en) 2001-03-16

Similar Documents

Publication Publication Date Title
JP3935370B2 (en) Bumped semiconductor element manufacturing method, semiconductor device and manufacturing method thereof, circuit board, and electronic device
US5960262A (en) Stitch bond enhancement for hard-to-bond materials
US6252178B1 (en) Semiconductor device with bonding anchors in build-up layers
US20030155405A1 (en) Semiconductor device and method of manufacturing the same, circuit board, and electronic equipment
US20080061450A1 (en) Bonding wire and bond using a bonding wire
CN1842394A (en) Wirebonding insulated wire and capillary therefor
EP1367644A1 (en) Semiconductor electronic device and method of manufacturing thereof
JP3997665B2 (en) Connection method between semiconductor element and circuit board
TWI452640B (en) Semiconductor package and method for packaging the same
US5408127A (en) Method of and arrangement for preventing bonding wire shorts with certain integrated circuit components
JP3972518B2 (en) Ball bonding method and electronic component connection method
JP3887993B2 (en) Connection method between IC chip and circuit board
JP3855523B2 (en) Connection method between IC chip and circuit board
JP2007035863A (en) Semiconductor device
JP2823000B2 (en) Wire bonding method
JP3855532B2 (en) Connection method between IC chip and circuit board
JP3202193B2 (en) Wire bonding method
JP2798040B2 (en) Method for manufacturing semiconductor device
JP2806168B2 (en) Resin-sealed semiconductor device
JPH05326601A (en) Wire bonding method
JP2004221264A (en) Semiconductor device and its manufacturing method
JP2871575B2 (en) Lead frame, method of manufacturing the same, resin-sealed semiconductor device and method of manufacturing the same
JPH0525236Y2 (en)
JP3233194B2 (en) Wire bonding method
JP2001007142A (en) Capillary for wire bonding, and method of connecting electronic parts

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20051014

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20060406

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070327

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070522

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070612

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070621

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20070717

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20070730

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100817

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100817

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110817

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120817

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130817

Year of fee payment: 6

LAPS Cancellation because of no payment of annual fees