JP3988944B2 - Electroluminescence display device - Google Patents

Description

The present invention is a thin film transistor (hereinafter, referred to as TFT) electroluminescent using (hereinafter, EL hereinafter) relates to an EL display equipment for driving the element.

  The display screen of the EL display device has, for example, 800 × 480 (dots), and the number of pixels is so large that a defect of the TFT drive circuit for driving the EL element occurs, resulting in poor yield of the EL display device. For this reason, improvement in the yield of EL display devices is desired.

  4 to 6 are diagrams showing a conventional example. A conventional example will be described below with reference to the drawings.

  FIG. 4A is a panel block diagram, and a display (display) panel 10 is provided with a display screen 11, an X-axis shift register 12, and a Y-axis shift register 13.

  The display screen 11 is supplied with EL power, and the X-axis shift register 12 is supplied with shift register power and input with an X-axis synchronization signal. Further, the Y-axis shift register 13 is supplied with a shift register power supply and a Y-axis synchronization signal. Further, an output of the image data signal is provided at the output section of the X-axis shift register 12.

  FIG. 4B is an enlarged explanatory view of the A part of FIG. 4A. One pixel (indicated by a dotted line square) of the display screen 11 includes two transistors, one capacitor, and an EL element. It is composed of one piece.

  In the light emission operation of one pixel, for example, when the selection signal y1 is output from the Y-axis shift register 13 and the selection signal x1 is output from the X-axis shift register 12, the transistors Ty11 and Tx1 are turned on. It becomes.

  For this reason, the image data signal -VL is input to the gate of the drive transistor M11. As a result, a current corresponding to the gate voltage flows from the EL power source to the drain and source of the drive transistor M11, and the EL element EL11 emits light.

  At the next timing, the X-axis shift register 12 turns off the output of the selection signal x1 and outputs the selection signal x2. However, since the gate voltage of the drive transistor M11 is held by the capacitor C11, Until the pixel is selected, the light emission of the EL element EL11 is continued.

  FIG. 5 is an explanatory diagram of a conventional X-axis shift register. In FIG. 5, NAND circuits 21 and 22 are waveform shaping circuits, to which an anti-phase clock -CL and a low level ("L") start pulse (X-axis synchronization signal) -SP are input. The clocked inverters 26 to 32 and the inverters 33 to 37 are shift registers. Further, the inverters 38 to 43 and the NAND circuits 23 to 25 are logic circuits that output selection signals x1 to x3.

  When one of the clock CL and the anti-phase clock -CL is at a high level (“H”), the other is at a low level (“L”).

  The clocked inverter becomes active when the clock CL input is “L” and the anti-phase clock −CL input is “H”, and operates as an inverter, and conversely, the clock CL input is “H” and the anti-phase clock − When the CL input is “L”, a high impedance state is established.

  For example, in the clocked inverter 26 and the clocked inverter 29, the clock CL input and the anti-phase clock input -CL are connected in reverse. Therefore, when the clocked inverter 26 is in an active state, the clocked inverter 29 is in a high impedance state.

  FIG. 6 is a waveform explanatory diagram of a conventional example. Hereinafter, the operation of the X-axis shift register of FIG. 5 will be described based on the waveforms of FIG.

  (1) The potential at point A, which is the output of the waveform shaping circuit, is “H” when there is no start pulse -SP (“L”). At this time, when a start pulse -SP of “L” is input, the point A becomes “L” (see FIG. 6, A).

  (2) The point B becomes “H” because the clocked inverter 26 becomes active when the point A becomes “L”, and then becomes the clocked inverter when the clocked inverter 26 becomes the high impedance state. Since 29 is in an active state, “H” at the point B is held only during the active period of the clocked inverter 29 (see FIG. 6, B).

  (3) The point C becomes a waveform having an opposite phase to the point B by the inverter 33 (see FIG. 6, C).

  (4) The point D has a waveform delayed by half a clock cycle from the point B due to the clocked inverter 27 that becomes active simultaneously with the clocked inverter 29 and the holding circuit of the inverter 34 and the clocked inverter 30.

  (5) The point E becomes a waveform having a phase opposite to that of the point D by the inverter 34, and is a waveform delayed by half a clock cycle from the waveform of the point C (see FIG. 6, E).

  (6) The point F has a waveform delayed by a half clock cycle from the point D by the holding circuit including the clocked inverter 28 that is activated simultaneously with the clocked inverter 30 and the inverter 35 and the clocked inverter 31.

  (7) The point G becomes a waveform having a phase opposite to that of the point F by the inverter 35, and is a waveform delayed by a half clock cycle from the waveform of the point E (see FIG. 6, G).

  (8) The H point becomes an inverted signal of the C point by the inverter 38 (see H in FIG. 6). The I point becomes an inverted signal of the E point by the inverter 39 (see I in FIG. 6). Further, the J point becomes an inverted signal of the G point by the inverter 40 (see J in FIG. 6).

  (9) The point K is the output of the NAND circuit 23, and the signals at the points H and E are input to the two inputs of the NAND circuit 23. The point L is the output of the NAND circuit 24, and the signals at the points I and G are input to two inputs of the NAND circuit 24. The point M is an output of the NAND circuit 25, and signals from the point J and an inverter (not shown) are input to two inputs of the NAND circuit 25.

  (10) The selection signal x1 becomes an inverted signal of the point K by the inverter 41 (see x1 in FIG. 6), and this selection signal x1 is input to the gate of the N-channel field effect transistor Tx1. Therefore, when the selection signal x1 becomes “H”, the transistor Tx1 is turned on, and the drain and source thereof are conducted.

  (11) The selection signal x2 becomes an inverted signal of point L by the inverter 42 (see x2 in FIG. 6), and this selection signal x2 is input to the gate of the N-channel field effect transistor Tx2. Therefore, when the selection signal x2 becomes “H”, the transistor Tx2 is turned on.

  (12) The selection signal x3 becomes an inverted signal at point M by the inverter 43 (see x3 in FIG. 6), and this selection signal x3 is input to the gate of the N-channel field effect transistor Tx3. Therefore, when the selection signal x3 becomes “H”, the transistor Tx3 is turned on.

  In this way, signals having a half-clock cycle shift are obtained in the order of selection signals x1, x2, x3,.

  In the above conventional device, when the number of pixels on the EL display screen is increased, the probability that a defective TFT is generated increases accordingly, and there is a problem that the yield is deteriorated.

  In order to solve such a conventional problem, an object of the present invention is to improve the yield by providing a spare TFT driving circuit and switching a defective TFT driving circuit to a spare one.

  The present invention is configured as follows to solve the above problems.

  FIG. 1 is an explanatory diagram of an embodiment of the present invention, FIG. 1 (a) is a panel block diagram, and FIG. 1 (b) is an enlarged view of a portion A in FIG. 1 (a).

  In FIG. 1A, an EL display panel 10 is provided with a display screen 11, an X-axis shift register 12, and a Y-axis shift register 13. The display screen 11 is supplied with EL power, and the X-axis shift register 12 is supplied with shift register power and input with an X-axis synchronization signal. The Y-axis shift register 13 is supplied with shift register power and a Y-axis synchronization signal. Further, the output portion of the X-axis shift register 12 is provided with an output of a modulated image data signal.

  In FIG. 1B, one pixel (indicated by a dotted square) on the display screen 11 is provided with two drive TFTs M11r and M11l and drive TFTs M12r and M12l for driving the EL elements EL11 and EL12, respectively.

  The drive TFT M11r is driven by the modulated image data signal -VL1 when the transistor Ty11r and the transistor Tx1r, which are selection switches, are turned on by the selection signal y1 and the selection signal x1r. The drive TFT M11l is driven by the modulated image data signal -VL1 when the transistors Ty11l and Tx1l, which are selection switches, are turned on by the selection signal y1 and the selection signal X1l.

  Further, the drive TFT M12r is driven by the modulated image data signal -VL1 when the transistor Ty12r and the transistor Tx1r, which are selection switches, are turned on by the selection signal y2 and the selection signal x1r. The drive TFT M12l is driven by the modulated image data signal -VL1 when the transistor Ty12l and the transistor Tx1l, which are selection switches, are turned on by the selection signal y2 and the selection signal X1l.

  Capacitors C11r, C11l, C12r, and C12l hold the drive voltage of each drive TFT.

  The operation of the present invention based on the above configuration will be described.

  Two sets of drive circuits for driving one EL element are provided, and usually one of them is used, and when one is defective, the other drive circuit is used.

  In FIG. 1B, for example, a case where the drive TFT 11r that drives the EL element EL11 is defective will be described. When the transistor Ty11r and the transistor Tx1r are turned on by the selection signal y1 and the selection signal x1r, the image data signal is supplied to the gate of the drive TFT M11r as the modulated image data signal −VL1 at the off level (“H” in this case).

  Next, when the transistors Ty11l and Tx1l are turned on by the selection signals y1 and x1l, a modulated image data signal -VL1 that is an image data signal is applied to the gate of the drive TFT M11l. The modulated image data signal -VL1 is held by the capacitor C11l.

  In this way, modulated image data for driving an EL element with a selection signal of the first half per pixel is normally used by using twice the X-axis selection signals x1r and x1l obtained by dividing the X-axis selection signal of the conventional example into the first half and the second half. Assume that the signal -VL1 is generated. If a defective drive TFT M11r is selected, an image data signal is not supplied, but is supplied when the drive TFT M11l is selected. As a result, the EL element EL11 is driven by the normal drive TFT M11l.

  As described above, a redundant circuit serving as a spare for the TFT drive circuit is provided for one pixel, and when a defect occurs in the TFT drive circuit, it can be switched to the spare, so that the yield can be improved.

  The present invention has the following effects.

  (1) Since a redundant circuit for backup is provided, the yield can be improved.

  (2) Since an image data signal is given to any one of a plurality of drive TFTs in one pixel and a drive circuit is selected, switching to a spare drive circuit can be easily performed.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  1 to 3 are diagrams showing an embodiment of the present invention, and the same components as those in FIGS. 4 to 6 are denoted by the same reference numerals.

  FIG. 1 is an explanatory diagram of an embodiment of the present invention, FIG. 1 (a) is a panel block diagram, and FIG. 1 (b) is an enlarged view of portion A of FIG. 1 (a).

  In FIG. 1A, an EL display panel 10 is provided with a display screen 11, an X-axis shift register 12, and a Y-axis shift register 13. The display screen 11 is supplied with EL power, and the X-axis shift register 12 is supplied with shift register power and input with an X-axis synchronization signal. The Y-axis shift register 13 is supplied with shift register power and a Y-axis synchronization signal. Further, an output of the image data signal is provided at the output section of the X-axis shift register 12.

  In FIG. 1B, one pixel (indicated by a dotted square) on the display screen 11 includes two drive TFTs M11r and M11l and a drive TFT M12r for driving the EL elements EL11 and EL12 formed of an organic EL film, respectively. M12l is provided.

  The drive TFT M11r is driven by the modulated image data signal -VL1 when the transistor Ty11r and the transistor Tx1r, which are selection switches, are turned on by the selection signal y1 and the selection signal x1r. The drive TFT M11l is driven by the modulated image data signal -VL1 when the transistor Ty11l and the transistor Tx1l, which are selection switches, are turned on by the selection signal y1 and the selection signal x1l.

  The drive TFT M12r is driven by the modulated image data signal -VL1 when the selection signal y2 and the selection signal x1r turn on the transistors Ty12r and Tx1r which are selection switches. The drive TFT M12l is driven by the modulated image data signal -VL1 when the transistor Ty12l and the transistor Tx1l, which are selection switches, are turned on by the selection signal y2 and the selection signal x1l.

  Capacitors C11r, C11l, C12r, and C12l hold the drive voltage of each drive TFT.

  The selection signals y1 and y2 output from the Y-axis shift register 13 are the same as those in the conventional example of FIG. 4B, but the selection signals x1r and x1l output from the X-axis shift register 13 are The number of pulses is twice that of the conventional example. Then, the image data signal gives a selection image x1r or a modulated image data signal -VL1 synchronized with x1l.

  FIG. 2 is an explanatory diagram of a driving circuit for one pixel and a modulated image data signal. FIG. 2A illustrates the EL element driving circuit for one pixel in FIG.

  In FIG. 2A, two P-channel drive TFTs Mnmr and Mnml connected to the EL power source 1 and an EL element ELnm driven by the drive TFTs Mnmr or Mnml are provided.

  A series circuit of an N-channel field effect transistor Tynmr and an N-channel field effect transistor Txnr as a selection switch is connected to the gate of the drive TFT Mnmr, and an N-channel field switch as a selection switch is connected to the gate of the drive TFT Mnml. A series circuit of a field effect transistor Tynml and an N-channel field effect transistor Txnl is connected.

  2A, when the selection signal ym of the Y-axis shift register 13 is “H”, the selection signal xnr of the X-axis shift register 12 first becomes “H”. The transistors Tynmr and Txnr, which are selection switches, are turned on. For this reason, the modulated image data signal -VL1 at this time is supplied to the gate of the drive TFT Mnmr, and a current corresponding to the gate voltage is supplied from the EL power source 1 to the EL element ELnm. This gate voltage is held in the capacitor Cnmr when the selection switch is turned off. Thereby, the EL element emits light according to the current.

  Next, when the selection signal ym is “H” and the selection signal xnl becomes “H”, the transistors Tynml and Txnl, which are selection switches, are turned on. For this reason, the modulated image data signal -VL1 at this time is given to the gate of the drive TFT Mnml. Since the capacitor Cnmr is holding the image data signal with the selection signal xnr, the image data signal is at the off level ( In this case, a modulated image data signal −VL of “H”) is given.

  FIG. 2B is a block diagram of a modulation image data signal generation circuit. In FIG. 2B, the phase selector circuit 2 divides the output timing (timing for selecting one pixel) of the image data signal -VL synchronized with the conventional shift pulses x1 to x3 into the first half and the second half, When there is no TFT information, for example, image data is output only in the first half (masking the second half), and when there is defective TFT information from ROM 3, image data is output only in the second half (masking the first half). The modulated image data signal -VL is output.

  The ROM 3 is a read-only memory that stores which TFT is defective in product inspection, and outputs a defect at a timing when a pixel of the defective TFT is selected.

  FIG. 3 is a timing chart in the present embodiment. 3A shows a timing chart of a conventional example for comparison, and FIG. 3B shows a timing chart in the embodiment of the present invention.

  3A, the image data signal -VL changes according to the shift pulses of the X-axis selection signals xn, xn + 1, xn + 2, xn + 3, xn + 4, xn + 5,.

  In FIG. 3B, the X-axis selection signal outputs two selection signals xnr and xnl, xn + 1r and xn + 1l, xn + 2r and xn + 2l,.

  As shown in FIG. 3B, for example, a case where there is a defective TFT in the selection time of the selection signal xn + 2r will be described.

  In the case of a pixel having no defective TFT, an image data signal is output when the first half of the selection signals xnr and xn + 1r are output. In the case of a pixel having a defective TFT, the image data signal is output when the second half of the selection signal xn + 2l is output. The phase selector circuit 3 outputs the modulated image data signal -VL1 so as to output it.

  In the above embodiment, two drive TFT drive circuits are provided in one pixel. However, three or more drive TFT drive circuits may be provided. Furthermore, transistors that are drive TFTs or selection switches can be of different channels.

It is explanatory drawing of embodiment of this invention. It is explanatory drawing of the drive circuit of 1 pixel and modulation | alteration image data signal in embodiment. It is a timing chart in this Embodiment. It is explanatory drawing of a prior art example. It is explanatory drawing of the X-axis shift register of a prior art example. It is waveform explanatory drawing of a prior art example.

Explanation of symbols

10 Display Panel 11 Display Screen 12 X-axis Shift Register 13 Y-axis Shift Register C11r, C11l, C12r, C12l Capacitor EL11, EL12 EL Element M11r, M11l, M12r, M12l Drive TFT
Ty11r, Ty11l, Ty12r, Ty12l, Tx1r, Tx1l Transistor (selection switch)
x1r, x1l selection signal (X axis)
y1, y2 selection signal (Y axis)
-VL1 modulated image data signal

Claims (3)

A display unit having a plurality of pixels;
An electroluminescence element provided for each of the plurality of pixels;
A first thin film transistor and a second thin film transistor for driving the electroluminescence element;
A first selection switch for selecting the first thin film transistor;
A second selection switch for selecting the second thin film transistor;
A read-only memory having information on a defective thin film transistor;
Have
The timing for driving the one electroluminescent element is divided into a first half and a second half corresponding to driving of the first and second thin film transistors, respectively.
Modulated image data that has been masked so that the image data signal is received at the timing and the image data signal is not output at the drive timing of the first or second thin film transistor, which is determined to be defective by the information from the read-only memory. Signal is output,
When the first selection switch is turned on, the modulated image data signal is input to the first thin film transistor,
When the second selection switch is turned on, the modulated image data signal is input to the second thin film transistor,
According to the modulated image data signal , one of the first and second thin film transistors normally drives the electroluminescent element, and if one is defective, the other thin film transistor drives the electroluminescent element. An electroluminescent display device. A display unit having a plurality of pixels;
An electroluminescence element provided in each of the plurality of pixels;
A first drive TFT and a second drive TFT for driving the electroluminescence element;
A first selection switch connected to the gate of the first drive TFT and comprising a series circuit of a first field effect transistor and a second field effect transistor;
A second selection switch connected to the gate of the second drive TFT and comprising a series circuit of a third field effect transistor and a fourth field effect transistor;
A Y-axis shift register connected to the gates of the first field effect transistor and the third field effect transistor;
An X-axis shift register connected to the gates of the second field effect transistor and the fourth field effect transistor;
A read-only memory having information of a defective drive TFT;
In an electroluminescent display device having
The timing for driving the one electroluminescent element is divided into the first half and the second half corresponding to the driving of the first and second drive TFTs, respectively.
A modulated image in which an image data signal is received at the timing and a mask is applied so that the image data signal is not output at the drive timing of the first or second drive TFT determined to be defective by the information from the read-only memory. Data signal is output,
When the first field effect transistor and the second field effect transistor of the first selection switch are turned on by the selection signal from the Y-axis shift register and the first selection signal from the X-axis shift register, The modulated image data signal is input to the gate of the first drive TFT,
When the third field effect transistor and the fourth field effect transistor of the second selection switch are turned on by the selection signal from the Y axis shift register and the second selection signal from the X axis shift register, The modulated image data signal is input to the gate of the second drive TFT,
According to the modulated image data signal , usually, one of the first and second drive TFTs drives the electroluminescent element, and when one is defective, the other drive TFT drives the electroluminescent element. electroluminescent display equipment, characterized in that. In claim 2 ,
The display unit, the first and second drive TFT, said first and second selection switches, as well as the X-axis and Y Jikushi shift register, electroporation, characterized in that formed in the same EL display panel luminescence display equipment.

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