JP3980866B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device having a trench isolation (STI) structure.
[0002]
[Prior art]
In semiconductor devices in which elements such as VLSI are highly integrated, miniaturization has been attempted conventionally, and in recent years, the tendency has become more prominent. In manufacturing such a semiconductor device, a trench isolation (STI) structure in which an insulating film is embedded in a trench formed in a semiconductor substrate in order to electrically isolate elements formed on the semiconductor substrate. The process of manufacturing is included.
[0003]
In this STI structure, a trench is generally formed in a semiconductor substrate, and then an insulating film (for example, SiO 2) is formed in the trench 101 formed in the semiconductor substrate 100 as shown in FIG.₂) 102 is formed and the insulating film 102 is buried in the trench 101, and then the insulating film 102 above the surface of the semiconductor substrate 100 is removed to the surface of the semiconductor substrate 100.
[0004]
[Problems to be solved by the invention]
By the way, as described above, semiconductor devices have been miniaturized, and in recent years, the width of trenches in the STI structure is shifting from 0.18 μm to 0.15 μm or less.
[0005]
However, when the insulating film 102 is formed in the trench 101 having a narrow width of 0.15 μm or less, a phenomenon that the insulating film 102 protrudes above the trench 101 (hereinafter referred to as “overhang”) occurs (see FIG. 6 (a)), there is a case where a filling defect occurs such that a large void 103 is formed in the trench 101 (see FIG. 6B). For this reason, current leakage may occur between elements, or the semiconductor device finally obtained may malfunction.
[0006]
Note that in order to sufficiently suppress the overhang of the insulating film 102 described above, the insulating film 102 may be formed by sputtering the overhanging portion 102a with argon (Ar) by using a high-density plasma CVD method. Although it has been performed (see FIG. 6C), even in this case, generation of voids in the insulating film 102 has not been sufficiently prevented.
[0007]
The present invention has been made in view of the above circumstances, and provides a semiconductor device manufacturing method capable of sufficiently preventing formation of voids in an insulating film embedded in a recess formed in a semiconductor substrate. With the goal.
[0008]
[Means for Solving the Problems]
As a result of intensive research to solve the above problems, the present inventors have generated plasma in the chamber, and then introduced an insulating film forming gas to form an insulating film in the recess formed in the semiconductor substrate. It was found that the formation of voids in the insulating film was sufficiently prevented by introducing a fluorine-containing gas comprising a compound containing fluorine atoms into the chamber during film formation, and the present invention was completed. .
[0009]
  That is, the present inventionMethod for manufacturing semiconductor deviceIssiliconOn the boardTrench formed by etching the silicon substrateFormTrenchForming step, andTrenchFormedsiliconA housing step of housing the substrate in the chamber; a plasma generating step of generating plasma in the chamber; and, SiH ₄ Gas, O ₂ Gas and NF ₃ Gas togetherIntroduce the aboveTrenchInsulation filmEmbed withA film forming step;siliconRemoving the insulating film above the surface of the substrate to obtain an element isolation structure.SeeIn the film forming step,SiH ₄ Gas and O ₂ The NF after a predetermined time has passed since the introduction of gas ₃ Introducing gasIt is characterized by.
[0010]
  According to this invention, formed on the semiconductor substrateTrenchWhen the insulating film is formed on the insulating film, the overhang of the insulating film is sufficiently suppressed, and the formation of voids in the insulating film can be sufficiently prevented.Also, when fluorine-containing gas is introduced into the chamber in the film formation process, active species such as fluorine radicals derived from the fluorine-containing gas are generated by the plasma, and this active species causes uneven deposition of fluorine atoms on the inner surface of the trench, There is a tendency to etch the inner surface of the trench. According to the present invention, SiH is contained in the chamber. ₄ Gas and O ₂ NF after starting the gas introduction for a predetermined time ₃ By introducing gas, it is SiO on the trench side wall. ₂ Since a film is formed and this acts as a protective film against the active species, it is possible to sufficiently prevent the fluorine atoms from being unevenly deposited on the inner surface of the trench and the inner surface of the trench from being etched. Further, when the fluorine-containing gas contains nitrogen atoms as in the present invention, SiN may remain in the insulating film, but this SiN does not adversely affect the insulating properties of the insulating film. Further, as compared with the case where the fluorine-containing gas does not contain nitrogen atoms, the uneven deposition of fluorine atoms on the inner surface of the trench and etching on the inner surface of the trench can be sufficiently prevented. Furthermore, in the present invention, the fluorine-containing gas containing a nitrogen atom is NF. ₃ However, this is because the number of fluorine atoms contained in one gas molecule is N, for example. ₂ F ₂ This is because it is larger than other fluorine-containing gases containing nitrogen atoms.
  In the present invention, NF ₃ The gas is preferably introduced intermittently. In this case, uneven deposition of fluorine atoms on the inner surface of the trench and etching on the inner surface of the trench are more sufficiently prevented.
[0011]
  The above invention is the aboveTrenchIn the formation process,Trench widthTo be 0.15 μm or lessTrenchIt is effective when forming. this is,Trench widthThis is because when the thickness is 0.15 μm or less, the insulating film tends to overhang.
[0012]
  In the present invention,"Trench width"WhenIsThe width between the sidewalls of the trench on the surface of the semiconductor substrate is assumed.
[0013]
  The above invention is the aboveTrenchIn the forming step, a mask layer is provided on the surface of the semiconductor substrate, and the surface of the mask layerTrenchThe length to the bottom of theTrench widthIs the following formula:
d / t ≧ 3.0
(In the above formula, d is from the surface of the mask layer.TrenchRepresents the length to the bottom ofTrench widthRepresents
It is particularly effective when satisfying
[0014]
  This is because when the above d and t satisfy the above relational expression, the overhang of the insulating film tends to occur particularly easily.
[0019]
  In the film forming step,SiH ₄ NF for gas ₃ Make the gas flow ratio 2 or lessIs preferred.
[0020]
  SiH ₄ NF for gas ₃ Gas flow ratioIs greater than 2,TrenchFluorine atoms are unevenly deposited on the inner surface,TrenchThe inner surface of the metal tends to be etched.
[0021]
  In the film forming step,SiH ₄ NF for gas ₃ Gas flow ratioThe flow rate ratio is preferably 0.2 or more.
[0022]
  SiH ₄ NF for gas ₃ Gas flow ratioIf the value is less than 0.2, the insulating film tends to overhang, and voids tend to be generated in the insulating film.
[0026]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail.
[0027]
1A to 1G are process diagrams showing a series of processes until an STI structure is formed on a semiconductor substrate.
[0028]
First, as shown in FIG. 1A, a silicon substrate (semiconductor substrate) 1 is thermally oxidized to form a silicon thermal oxide film 2 on the surface of the silicon substrate 1. Next, a silicon nitride film 3 is formed on the silicon substrate 1 (mask formation process).
[0029]
Next, as shown in FIG. 1B, the silicon thermal oxide film 2 and the silicon nitride film 3 are patterned to expose the surface of the silicon substrate 1 (patterning step).
[0030]
Thereafter, as shown in FIG. 1C, trenches (recesses) 4 are formed on the exposed silicon substrate 1 by dry etching using the silicon nitride film 3 as a mask layer (recess formation step). At this time, the width t of the trench 4 is 0.15 μm or less (for example, 0.13 μm). This is because, in the film forming process described later, when the width of the trench 4 becomes 0.15 μm or less, it is especially an insulating film, SiO.₂This is because the overhang tends to occur easily.
[0031]
The length from the upper surface of the silicon nitride film (mask layer) 3 to the bottom of the trench 4 (the depth of the groove from the upper surface of the silicon nitride film 3) and the width t of the trench 4 are expressed by the following formula:
d / t ≧ 3.0
(In the above formula, d represents the length from the upper surface of the silicon nitride film 3 layer to the bottom of the trench 4)
Meet. When the ratio (d / t) is less than 3.0, in the film forming process described later, the SiO 2₂There is a tendency that overhang of the film 5 is likely to occur.
[0032]
Next, as shown in FIG. 1 (d), SiO 2 is formed on the silicon substrate 1.₂The film 5 is formed. Details of the film forming method will be described later.
[0033]
Next, as shown in FIG. 1E, the upper surface of the silicon nitride film 3 is planarized by, for example, chemical mechanical polishing (CMP). Thereafter, as shown in FIG. 1F, the silicon nitride film 3 and the silicon thermal oxide film 2 are removed by wet etching. Subsequently, as shown in FIG.₂A part of the film 5 is removed and planarized to the surface of the silicon substrate 1 to obtain an STI structure (inter-element isolation structure) (removal step).
[0034]
After the STI structure is manufactured on the silicon substrate 1 in this way, elements such as MOS transistors are formed by a known method to obtain a semiconductor device.
[0035]
Next, the film forming method described above will be described in detail. This film forming method is performed by a high density plasma (HDP) type CVD apparatus.
[0036]
FIG. 2 is a schematic configuration diagram illustrating an example of an HDP type CVD apparatus that performs the film forming method. The HDP type CVD apparatus 10 includes a chamber 11 having an introduction port 11a for introducing a silicon substrate 1 (hereinafter referred to as a “processed plate W”) having a trench 4 formed therein. A support member 12 that supports the silicon substrate 1 is provided in the chamber 11, and an electrostatic chuck 13 for fixing the processing target plate W to the support member 12 is provided above the support member 12. . A DC power source (not shown) is connected to the electrostatic chuck 13.
[0037]
The support member 12 is provided with a lift mechanism (not shown) having lift pins and the like for lifting (lifting up) the processing target plate W. This lift mechanism is used when the charged plate W is brought into contact with plasma to remove charges from the plate W. Furthermore, a dome 14 is installed on the upper portion of the chamber 11 so as to cover the chamber 11. A heater plate 15 and a cold plate 16 for setting the dome temperature are placed on the dome 14. Furthermore, the chamber 11 has a gas inlet 17a, and the dome 14 is provided with a gas inlet 17b.
[0038]
These gas inlets 17a and 17b are connected to gas supply sources 19a to 19d via gas supply lines 18a and 18b, respectively, and a predetermined gas is supplied from these gas supply sources 19a to 19d to the gas inlets 17a and 17d. It is introduced into the chamber 11 through 17b. Here, the gas supply sources 19a to 19d are respectively SiH._FourGas, O₂Gas, Ar gas, and NF_ThreeIt is a gas supply source.
[0039]
The gas supply lines 18a and 18b are provided with a mass flow controller 20 for controlling the amount of each gas introduced into the gas inlets 17a and 17b. In particular, SiH_FourGas supply source 19a in which gas is stored, and NF_ThreeThe mass flow rate controller 20 provided in the gas supply lines 18a and 18b to which the gas supply source 19d in which the gas is stored is connected has a control function of adjusting the flow rate ratio between the two gases to an appropriate value or a predetermined value.
[0040]
Of these gases, SiH_FourGas and O₂The gas is SiO on the processed plate W.₂This is a main source gas (insulating film forming gas) for forming a film. In addition, NF_ThreeGas is SiO₂This is introduced into the chamber 11 when the film is formed.
[0041]
Further, a throttle valve chamber 22 in which a two-blade turbo throttle valve 21 is housed is provided below the chamber 11 so as to communicate with the chamber 11. Below the throttle valve chamber 22 is installed a turbo molecular pump 25 that evacuates the chamber 11 through a gate valve 24. By opening and closing the gate valve 24, the throttle valve chamber 22 and the turbo molecular pump The inlet of the pump 25 can be communicated and isolated. By providing the turbo throttle valve 21, the gate valve 24, and the turbo molecular pump 25, the pressure in the chamber 11 can be stably controlled when the processing target plate W is processed.
[0042]
The exhaust port 26 of the turbo molecular pump 25 is connected to a dry pump 28 that evacuates the chamber 11 through an exhaust pipe 27. The exhaust pipe 27 and an exhaust port 29 provided in the throttle valve chamber 22 are connected by an exhaust pipe 30 having a rough throttle valve 31. These exhaust pipes 27 and 30 are provided with isolation valves 32 and 33, respectively.
[0043]
Further, the chamber 11 is provided with a gas inlet port 36 connected to the reactor cavity 35 via a cleaning gas supply line 34. The reactor cavity 35 has a microwave generator 37 for generating plasma, and is connected to a gas supply source 19 c through a gas supply line 38. The gas supply line 38 is provided with a mass flow controller 39 that controls the amount of each gas introduced into the reactor cavity 35.
[0044]
Furthermore, the dome 14 is provided with coils 40a and 40b (side coils and top coils, respectively). The coils 40a and 40b are connected to RF generators 41a and 41b, respectively, and plasma is generated in the chamber 11 by applying high frequency power from the RF generators 41a and 41b.
[0045]
Further, matching networks 42a and 42b for matching the output impedance of the RF generators 41a and 41b to the coils 40a and 40b are provided between the coils 40a and 40b and the RF generators 41a and 41b. Further, the electrostatic chuck 13 is connected to a bias RF generator 41c via a matching network 42c.
[0046]
Next, a film forming method using the thus configured HDP type CVD apparatus 10 will be described.
[0047]
First, the target plate W having the configuration shown in FIG. 1C is accommodated in the chamber 11 through the introduction port 11a and placed on the support member 12 (accommodating step).
[0048]
Next, the inside of the chamber 11 is decompressed by the dry pump 28 and the turbo molecular pump 25 with the gate valve 24 opened and the turbo throttle valve 21 opened at a predetermined angle. After the pressure in the chamber 11 reaches a predetermined value, the O of the gas supply source 19b₂Gas is introduced into the chamber 11 from the gas supply ports 17a and 17b.
[0049]
Next, high frequency power is applied in this order from the RF generators 41b and 41a to the coils 40b and 40a to generate plasma in the chamber 11 (plasma generation step). At this time, the processed plate W is heated by the plasma. Subsequently, a DC voltage is applied to the processing target plate W through the electrostatic chuck 13 to turn on the electrostatic chuck 13. Thereby, the to-be-processed board W is charged so that it may become a predetermined electric potential with respect to a plasma sheath.
[0050]
Next, SiH of the gas supply source 19a_FourGas is introduced into the chamber 11 from the gas supply ports 17a and 17b. SiH introduced into the chamber 11_FourGas and O₂The gas generates active species by plasma. Furthermore, cooling of the processed plate W is started with a slight delay. Then, a high frequency power for bias is applied from the RF generator 41 c to the processing target plate W through the electrostatic chuck 13. As a result, SiH_Four, O₂The active species generated from the substrate are drawn to the processed plate W side on the support member 12, reach the processed plate W, and are formed on the surface of the processed plate W by a chemical reaction.₂Is deposited and grown on the inner wall surface of the trench 4.₂Grows and the trench 4 is buried (film formation step).
[0051]
In the vicinity of the opening end of the trench 4, particularly in the tapered portion of the silicon nitride film 3, SiO₂In the prior art, SiO in the trench 4 is caused by overhang or the like.₂In some cases, the trench 4 was blocked with a void left in the film.
[0052]
Therefore, in the present embodiment, in the film forming step, the NF of the gas supply source 19d_ThreeThe gas is introduced into the chamber 11 from the gas supply ports 17a and 17b. At this time, plasma is generated in the chamber 11, and this plasma is NF introduced into the chamber 11._ThreeFrom gas, NF_ThreeActive species (fluorine radicals, fluorine radicals, etc.) of chemical species containing fluorine derived from gas are generated. This active species acts as an etchant in the film forming process, and is deposited on a site where overhang is likely to occur.₂The film formation proceeds while being etched by the active species. Therefore, in the film forming process, SiO₂Overhang is sufficiently suppressed, and SiO₂Generation of voids in the film can be sufficiently prevented.
[0053]
Here, in the film forming step, the NF_ThreeThe gas is contained in the chamber 11 with SiH_FourIt is preferable to introduce the gas into the chamber 11 after a predetermined time has passed since the gas was introduced.
[0054]
In the film forming process, NF is placed in the chamber 11._ThreeWhen gas is introduced, NF_ThreeActive species such as fluorine radicals derived from gas are generated. This active species is SiO during film formation.₂Etch the overhanging part of SiO2₂However, it tends to attack the side walls of the trench 4 to cause uneven deposition of fluorine atoms or to etch the side walls of the trench 4 excessively. Therefore, SiH in the chamber 11_FourBy introducing the gas for a predetermined time, the sidewall of the trench 4 is SiO.₂Since a film is formed and this acts as a protective film against the active species, it is possible to sufficiently prevent the situation where the fluorine atoms are unevenly deposited on the side walls of the trench 4 or the side walls of the trench 4 are etched as described above. be able to.
[0055]
Here, the predetermined time is SiH._FourDepending on gas flow rate etc., for example SiH_Four8 seconds when the gas flow rate is 50 sccm.
[0056]
SiH in the chamber 11_FourNF when introducing gas for a predetermined time_ThreeThe gas is preferably introduced intermittently. In this case, uneven deposition of fluorine atoms on the side walls of the trench 4 and etching on the side walls of the trench 4 are more sufficiently prevented.
[0057]
NF_ThreeWhen the gas is introduced intermittently, the introduction time per time is, for example, 20 seconds.
[0058]
In the film formation step, SiH_FourGas and NF_ThreeWhen both gases are introduced into the chamber 11, SiH_FourNF for gas_ThreeThe gas flow rate is preferably 2 or less, more preferably 1 or less.
[0059]
When the ratio of the gas flow rates exceeds 2, there is a tendency that fluorine atoms are unevenly deposited on the sidewalls of the trench 4 or the sidewalls of the trench 4 are etched by active species such as fluorine plasma.
[0060]
SiH_FourGas and NF_ThreeWhen both gases are introduced into the chamber 11, SiH_FourNF for gas_ThreeThe ratio of the gas flow rates is preferably 0.2 or more, more preferably 0.5 or more, and further preferably 1.0 or more. If the gas flow ratio is less than 0.2, SiO 2₂There is a tendency that formation of voids in the film 5 cannot be sufficiently prevented.
[0061]
In addition, SiO₂The pressure in the chamber 11 when the film 5 is formed is preferably 50 mTorr or less, particularly preferably 10 mTorr or less. When the pressure in the chamber 11 exceeds 50 mTorr, SiO₂There is a tendency that generation of voids in the film cannot be sufficiently prevented.
[0062]
Furthermore, the flow rate of each gas introduced into the chamber 11 is preferably the following conditions.
[Preferred conditions for each gas supply flow rate]
・ SiH_FourGas: 25-100 mL / min
・ O₂Gas: 50 to 200 mL / min
Ar gas: 0 to 200 mL / min
・ NF_ThreeGas: 25-100 mL / min
Furthermore, the frequency of the high frequency power applied from the RF generators 41a and 41b is preferably 1.8 to 2.2 MHz, and the output is preferably 1000 to 5000 W. These are the same in the RF generators 41a and 41b. It may or may not be. On the other hand, the frequency of the high frequency power applied from the RF generator 41c is preferably 13.56 MHz, and the output is preferably 1000 to 5000 W, more preferably 1500 to 3500 W.
[0063]
Next, for a predetermined time, SiO₂After film formation, SiH from gas supply sources 19a and 19d_FourGas and NF_ThreeThe introduction of the gas is stopped, and at the same time or substantially the same time, the application of the high frequency power from the RF generator 41c is stopped and the bias RF is stopped. At this point, SiO on the plate W to be processed₂The film formation is substantially finished. Thereafter, the cooling of the processed plate W is stopped, the electrostatic chuck 13 of the processed plate W is turned off, and the application of the high frequency power from the RF generators 41a and 41b to the coils 40a and 40b is stopped. At the same time, O from the gas supply sources 19b and 19c.₂The introduction of gas and Ar gas is stopped.
[0064]
According to the semiconductor device manufacturing method using the HDP type CVD apparatus 10 having such a configuration, SiH_FourNF with gas_ThreeBy introducing the gas into the chamber 11, active species of chemical species including fluorine generated by plasma act as an etching agent while acting as an etchant.₂A film is formed. As a result, SiO is deposited and grows in a portion where an overhang is likely to occur in the trench 4 formed in the target substrate W, particularly in the vicinity of the opening.₂Is effectively etched. As a result, even if the width of the trench 4 is reduced, the occurrence of overhang can be suppressed, and SiO 2₂It is possible to sufficiently prevent the generation of voids in the trench 4 where the film is formed. Therefore, it is possible to manufacture a semiconductor device in which current leakage between elements and malfunction of the semiconductor device are sufficiently prevented.
[0065]
The embodiment of the present invention is not limited to the above-described embodiment. For example, in the above-described embodiment, the procedure for introducing each gas into the chamber 11 and the procedure for applying high-frequency power from the RF generator are not limited to the above-described procedures.
[0066]
In the above embodiment, NF is used as the fluorine-containing gas._ThreeGas was used but NF_ThreeFor example, nitrogen monofluoride (N₂F₂) Gases may be used alone or in combination. In addition, these gases include nitrogen difluoride (NF₂) Gas may be mixed. In addition, SiO₂From the viewpoint of sufficiently preventing the formation of voids in the film, a fluorine-containing gas not containing nitrogen atoms, such as carbon fluoride (CF_X), Silicon fluoride (SiF)_X) Etc. can also be used. However, the fluorine-containing gas is fluorocarbon (CF_X) And SiO₂Carbon remains in the film 5, and SiO₂The insulation resistance of the film 5 tends to be low, and the fluorine-containing gas is changed to silicon fluoride (SiF_X) And SiO₂SiF remains as an impurity in the film 5, and this diffuses in a subsequent annealing step, and there is a tendency that fluorine atoms are unevenly deposited on the sidewalls of the trench 4 or the sidewalls of the trench 4 are etched. On the other hand, when the fluorine-containing gas contains nitrogen atoms, SiN remains in the insulating film.₂There is no adverse effect on the insulating properties of the film. Further, as compared with the case where the fluorine-containing gas does not contain nitrogen atoms, the uneven accumulation of fluorine atoms on the sidewalls of the trench 4 and the etching on the inner surface of the trench 4 can be sufficiently prevented.
[0067]
Furthermore, although the silicon substrate 1 is used as the semiconductor substrate, Ge, SiGe, GaAs, InAs, InP, or the like can be used instead of silicon.
[0068]
Next, the contents of the present invention will be described more specifically using examples and comparative examples.
[0069]
【Example】
Example 1
The silicon substrate 1 was thermally oxidized to form a silicon thermal oxide film 2 having a thickness of about 10 nm on the surface of the silicon substrate 1. Next, a silicon nitride film 3 having a thickness of 150 nm was formed on the silicon substrate 1. Next, the silicon thermal oxide film 2 and the silicon nitride film 3 were patterned to expose the surface of the silicon substrate 1.
[0070]
Thereafter, a trench 4 having a width of 0.13 μm was formed in the silicon substrate 1 by dry etching using the silicon nitride film 3 as a mask layer. At this time, the length from the upper surface of the silicon nitride film 3 as the mask layer to the bottom of the trench 4 (depth of the groove from the surface of the silicon nitride film 4) was set to about 0.45 μm. Next, SiOD is deposited on the silicon substrate 1 under the following film formation conditions using the HDP type CVD apparatus shown in FIG.₂A film 5 was formed.
[Film formation conditions]
-Chamber pressure: 2 mTorr
・ Film formation temperature: 600 ℃
・ SiH_FourGas flow rate: 50 mL / min
・ O₂Gas flow rate: 100 mL / min
・ NF_ThreeGas flow rate: 50 mL / min
RF generator 41a (side): frequency 2.0MHz, output 3500W
-RF generator 41b (top): frequency 2.0MHz, output 5000W
During film formation, NF_ThreeThe gas is SiH_FourThe gas was introduced into the chamber 11 simultaneously with the gas.
[0071]
SiO film thus formed₂The cross section of the film was observed with a scanning electron microscope (S5000, manufactured by Hitachi, Ltd.). The result is shown in FIG.
[0072]
  (Reference example)
  Among the above film forming conditions, NF_ThreeGas is SiF₄In the same manner as in Example 1, except that₂A film was formed. Then, in the same manner as in Example 1, the deposited SiO₂The cross section of the film was observed. The results are shown in FIG.
[0073]
(Comparative Example 1)
Among the above film forming conditions, NF_ThreeA SiO 2 film is formed on the silicon substrate in the same manner as in Example 1 except that the gas flow rate is zero.₂A film was formed. Then, in the same manner as in Example 1, the deposited SiO₂The cross section of the film was observed. The results are shown in FIG.
[0074]
  Example above1. Reference exampleFrom the results of Comparative Example 1 and NF,_ThreeWhen not added, SiO₂In the film 5, it has been found that a large void 50 is formed not only inside the trench 4 but also above the trench 4 (see FIG. 5).
[0075]
In contrast, NF in the film formation process_ThreeWhen SiO is added, SiO₂In the film 5, no void was observed (see FIG. 3). SiF_FourWhen SiO is added, SiO₂In the film 5, the void 50 was observed inside the trench 4 (see FIG. 4), but it was found that the void 50 was considerably smaller than when no fluorine-containing gas was added.
[0076]
(Example 3)
SiH_Four8 seconds after introducing gas into the chamber 11 NF_ThreeExcept that the gas was intermittently introduced into the chamber 11, SiO 2 was formed on the silicon substrate 1 in the same manner as in Example 1.₂A film was formed. At this time, NF_ThreeThe time for introducing the gas into the chamber 11 was 20 seconds, and the time for not introducing it was 8 seconds, which were alternately performed. As a result, NF_ThreeSiO in the first 8 seconds without introducing gas₂Deposit 300 mm of film, then NF_ThreeSiO in 20 seconds after introducing gas₂A film of 750 mm was deposited. Then, in the same manner as in Example 1, the deposited SiO₂The cross section of the film was observed.
[0077]
Example 4
SiH_Four40 seconds after the gas is introduced into the chamber 11 NF_ThreeExcept that the gas was introduced into the chamber 11, SiO 2 was formed on the silicon substrate 1 in the same manner as in Example 1.₂A film was formed. At this time, NF_ThreeThe gas was introduced into the chamber 11 for 160 seconds. As a result, NF_ThreeSiO in the first 40 seconds without introducing gas₂Deposit 1500 of film, then NF_ThreeIn 160 seconds after introducing gas, SiO₂A film of 6000 mm was deposited. Then, in the same manner as in Example 1, the deposited SiO₂The cross section of the film was observed.
[0078]
From the results of Example 3 and Example 4, NF_ThreeIn the case of Example 4 where the gas was not intermittently introduced, SiO 2₂Although no voids were found in the film 5, fluorine atoms were unevenly deposited on the side walls of the trench 4. In contrast, NF_ThreeIn the case of Example 3 where gas was introduced intermittently, SiO₂It was found that not only voids were found in the film 5, but also the area where fluorine atoms were unevenly deposited on the side walls of the trench 4 was sufficiently smaller than in the case of Example 4.
[0079]
【The invention's effect】
As described above, according to the semiconductor device manufacturing method of the present invention, the overhang of the insulating film is suppressed, and the formation of voids in the insulating film can be sufficiently prevented. Therefore, it is possible to manufacture a semiconductor device in which current leakage between elements and malfunction of the semiconductor device are sufficiently prevented.
[Brief description of the drawings]
FIGS. 1A to 1G are process diagrams showing a series of steps for manufacturing a semiconductor device having an STI structure. FIGS.
FIG. 2 is a schematic cross-sectional view showing an example of an HDP type CVD apparatus that performs a film forming process.
FIG. 3 shows SiO according to Example 1.₂It is sectional drawing which shows a film | membrane.
4 shows SiO 2 according to Example 2. FIG.₂It is sectional drawing which shows a film | membrane.
FIG. 5 shows SiO according to Comparative Example 1.₂It is sectional drawing which shows a film | membrane.
FIG. 6A is a diagram illustrating SiO in a film forming process.₂Sectional drawing which shows the state in which the film | membrane is overhanging, (b) is SiO obtained by the film-forming process₂It is sectional drawing which shows the state in which the void has generate | occur | produced in the film | membrane.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Silicon substrate (semiconductor substrate), 4 ... Trench (concave part), 5 ... SiO₂Film (insulating film).

Claims (6)

A trench forming step of forming a trench formed by etching the silicon substrate in the silicon substrate ;
A housing step of housing the silicon substrate in which the trench is formed in a chamber;
A plasma generating step for generating plasma in the chamber;
Into the chamber, and the deposition step of embedding the SiH ₄ gas, _{O 2} gas, and NF ₃ gas together by introducing the trench with an insulating film,
See containing and a removal step of obtaining a device isolation structure wherein the insulating film is removed above the surface of the silicon substrate,
In the film forming step, the NF ₃ gas is introduced after a predetermined time has elapsed after the introduction of the SiH ₄ gas and the O ₂ gas is started . NF ₃ The method for manufacturing a semiconductor device according to claim 1, wherein the gas is intermittently introduced. 3. The method of manufacturing a semiconductor device according to claim 1, wherein, in the trench formation step, the trench is formed so that a width of the trench is 0.15 μm or less. In the trench forming step, a mask layer is provided on the surface of the silicon substrate, and the length from the surface of the mask layer to the bottom of the trench and the width of the trench are expressed by the following formula:
d / t ≧ 3.0
4. The semiconductor device according to claim 3, wherein d represents a length from a surface of the mask layer to a bottom of the trench, and t represents a width of the trench. 5. Production method. In the film forming step, the SiH ₄ NF for gas ₃ The method for manufacturing a semiconductor device according to claim 1, wherein a gas flow ratio is set to 2 or less. In the film forming step, the SiH ₄ NF for gas ₃ The method for manufacturing a semiconductor device according to claim 1, wherein the gas flow ratio is 0.2 or more.

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