JP3972645B2 - Solid-state image sensor - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a solid-state imaging device, and more particularly to a CMOS image sensor that includes a plurality of output ports and performs parallel reading.
[0002]
[Prior art]
FIG. 4 is a block diagram showing an example of a conventional solid-state imaging device. This conventional solid-state imaging device is a solid-state imaging device called a CMOS image sensor including a pixel unit 11, a vertical shift register 12, a CDS (Correlated Double Sampling) circuit 13, and a horizontal shift register 14. It is. The pixel unit 11 is composed of a large number of pixels arranged in a two-dimensional matrix. Each pixel photoelectrically converts incident subject light to generate charges according to the amount of incident light, and transfers the charges. And an accumulation transistor for amplifying the potential change due to the charge from the accumulation portion, and an output transistor for outputting the amplified potential change as an imaging signal outside the pixel at a predetermined timing. .
[0003]
The total number of pixels of the pixel unit 11 is, for example, twice or more the number of pixels of a high-definition television (HDTV) system. When imaging signals of all the pixels are sequentially output from a single output port, Since the number is large, a high operating frequency is required. To avoid this, the pixel unit 11 is divided into eight in the horizontal direction. Therefore, the pixel unit 11 is composed of eight sets of pixels (the divided image capturing _area) 11 1 to 11 _8.
[0004]
The vertical shift register 12 includes a row control circuit, and the operation of the pixel for each row is controlled by the shift register and the row control circuit. The CDS circuit 13 and the horizontal shift register 14 constitute a horizontal output circuit. The CDS circuit 13 removes noise from the imaging signal output from the pixel unit 11, and the horizontal shift register 14 performs selection of the pixel column of the pixel unit 11 and output of the imaging signal, respectively. Here, since the pixel portion 11 and a horizontal direction 8 divided pixel pairs ₁₁ 1 to 11 _8, an image signal is also horizontal shift register 14 is taken out in parallel from the pixels set ₁₁ 1 to 11 ₈ 8 The output ports 15 ₁ to 15 ₈ are output in parallel.
[0005]
[Problems to be solved by the invention]
The large-scale CMOS image sensor having a large number of pixels as described above has a configuration in which imaging signals are output in parallel from the _eight output ports 15 ₁ to 158 in order to suppress the operating frequency. When the random access readout is performed by the sensor, the output port of the imaging signal is different when the readout area is across adjacent pixel sets among the _eight pixel sets 11 _{1 to} 118, so that the subsequent signal processing is performed. There is a problem of complexity.
[0006]
The present invention has been made in view of the above points, and an object of the present invention is to provide a solid-state imaging device capable of outputting, in parallel, a plurality of output ports, imaging signals read out in random access that do not require complicated subsequent signal processing. And
[0007]
[Means for Solving the Problems]
In order to achieve the above-described object, the present invention provides a plurality of pixels for normal readout in which a pixel unit is divided into a plurality of divided imaging regions, and imaging signals output in parallel from the plurality of divided imaging regions are respectively provided correspondingly. In a solid-state imaging device that outputs in parallel from an output port, a setting unit that sets a desired random access readout region among all the imaging regions of the pixel unit, and a single unit provided separately from the plurality of output ports Output port for random access, and during normal readout, imaging signals output in parallel from multiple divided imaging areas are output to multiple output ports, and during random access readout, images obtained from the random access readout area And a selection switch means for outputting a signal in series to a single random access output port.
[0008]
In the present invention, at the time of random access reading, it is possible to select an imaging signal from one desired random access reading area instead of from a plurality of divided imaging areas by the selection switch and output it in series to the random access output port. .
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a configuration diagram of an embodiment of a solid-state imaging device according to the present invention. In the figure, the same components as those in FIG. 4 are denoted by the same reference numerals, and the description thereof is omitted. In FIG. 1, the solid-state imaging device of the present embodiment is referred to as a CMOS image sensor having a selection switch 16 in addition to the conventional configuration of the pixel unit 11, the vertical shift register 12, the CDS circuit 13, and the horizontal shift register 14. The solid-state imaging device.
[0010]
The CDS circuit 13, the horizontal shift register 14, and the selection switch 16 constitute a horizontal output circuit, and after removing noise from the imaging signal from the pixel unit 11, selection and imaging of the pixel columns that constitute the pixel unit 11. Output the signal. The selection switch 16 is provided with a random access port 17.
[0011]
FIG. 2 shows a configuration diagram of an example of a main part of the horizontal output circuit in FIG. In the figure, the same components as those in FIG. 2, the storage unit ₁₉ 11 _{~ 19 1n} the result of processing by the CDS circuit 13, n pieces for storing processing results obtained by performing noise processing by the CDS circuit 13 an image signal output from the pixel set 11 ₁ in the storage unit has a signal line for each two systems, one of the signal lines are commonly connected to the output port 15 ₁ through the switch _S 11 _{to S 1n,} other signal lines through the switches _T 11 _{through T 1n} Are commonly connected to the random access output port 17.
[0012]
Similarly, the set of pixels ₁₁ 2, ..., 11 an imaging signal output from the _8, the storage unit ₁₉ 21 _{~ 19} 2n for storing processing results obtained by performing noise processing by the CDS circuit 13, respectively, ... _·, 19 81 _{~ 19 8n} has a signal line for each two systems, one signal line switches _{S 21 ~S 2n, ···, S} 81 ~S 8n via the output port ₁₅ 2, ..., are commonly connected to 15 _8, the other signal lines are commonly connected to a random access output port 17 via the switch _T 21 _{through T} 2n, _{· · ·,} a T 81 _{through T 8n.}
[0013]
The switches S _{11 to} S _8n and the switches T _{11 to} T _8n constitute a selection switch 16 and are independent of each other based on a control signal from a horizontal shift register 14 not shown in FIG. Switching control. As will be described later, in a normal read is switching control to switches _S 11 _{to S 8n} is on or off, and the switch _T 11 _{through T 8n} are turned off, while, at the time of random access switches _T 11 _{through T 8n} There is switching-controlled on or off, and switches _S 11 _{to S 8n} is turned off.
[0014]
Next, a normal read operation of the present embodiment will be described with reference to FIGS. During normal read operation, a plurality of pixels of each row of pixels set 11 ₁ to 11 ₈ by the vertical shift register 12 of FIG. 1 is selected, and, one after the other in a horizontal scanning period towards the line below the top row It will be selected. The image pickup signal from each pixel of the selected row is supplied with the selection switch 16 after the noise is removed by the CDS circuit 13.
[0015]
The horizontal register 14 in FIG. 1 always turns off the switches T _{11 to} T _8n of the selection switch 16 at the time of normal reading, and includes eight groups of switches S _{11 to} S _1n ,..., S _{81 to} S _8n . For each, only one switch is turned on, and the switches to be turned on are sequentially switched. Accordingly, video signals obtained by scanning each pixel in the horizontal direction in each of the _eight pixel groups 11 _{1 to} 118 are output in parallel from the _eight output ports 15 ₁ to 15 ₈ .
[0016]
Next, the operation at the time of random access according to the present embodiment will be described. Random access is performed for the purpose of selectively extracting only a necessary area without requiring the entire information. For example, as shown in FIG. 3, the read start address of the vertical shift register 12 is A, the read end address is B, the read address of the horizontal output circuit is C, and the read end address is D. A random access readout area 20 in all pixel areas is defined. The determination of the random access read area 20 is set by a signal from the outside of the image sensor (not shown).
[0017]
When random access to obtain the imaging signals from the random access read area 20, a plurality of pixels in each row of the vertical shift register 12 of FIG. 1 and FIG. 3 from the address A set of pixels 11 ₁ to 11 ₈ to B, and top row Selections are made sequentially in the horizontal scanning cycle toward the lower row. The image pickup signal from each pixel of the selected row is supplied with the selection switch 16 after the noise is removed by the CDS circuit 13.
[0018]
At the same time, the horizontal register 14 of FIGS. 1 and 3 always turns off the switches S _{11 to} S _8n of the selection switch 16 shown in FIG. Among all the switches in the address range from address C to address D among _{11 to} T _1n ,..., T _{81 to} T _8n , only one switch is turned on, and the switches to be turned on are sequentially turned on. Switch to. Of the eight switch groups T _{11 to} T _1n ,..., T _{81 to} T _8n , the switch group in the address range before the address C and the switch group in the address range after the address D are respectively Controlled off.
[0019]
As a result, all the pixels in the random access read area 20 do not have the concept of pixels constituting a plurality of pixel sets, and the pixels constituting one random access read area 20 are defined in the vertical direction and the horizontal direction. The resulting video signal is output in series to a single random access output port 17.
[0020]
Conventionally, at the time of random access reading, if the area to be read crosses the divided imaging area, the output port is different, so the information read from each output port is accumulated in the frame memory and the image is reconstructed However, in this embodiment, there is no concept of crossing divided areas, and a random access read video signal can always be output from one random access read area 20, so that complicated processing as in the prior art is required. Can be made unnecessary.
[0021]
In this embodiment, the frame rate changes according to the size of the random access read area 20, but the operating frequencies of the vertical shift register 12 and the horizontal shift register 14 are changed between normal read and random access. There is no problem of operating frequency because there is no. Further, the number of pixels of a random access read region 20 is equal to or less than 1/8 of the total number of pixels of the pixel portion 11, can more quickly than the case of obtaining a random access read video signals in parallel from the output port 15 ₁ to 15 ₈ .
[0022]
Note that the method for operating the vertical shift register 12 in the range from the address A to B and the method for operating the horizontal shift register 14 in the range from the address C to D can be performed by known methods. The detailed explanation is omitted.
[0023]
The present invention is not limited to the above-described embodiment. For example, the number of divisions of the pixel unit 11 has been described as being divided into eight in the horizontal direction. However, the number of divisions may be any number of two or more other than eight. Of course it is good. In addition, a plurality of divisions may not be performed only in the horizontal direction, but N divisions in the horizontal direction and M divisions in the vertical direction (N and M may be the same or different integers of 2 or more) may be performed. For example, when the number of pixels of the pixel unit 11 is a total of four times the number of pixels in the horizontal direction and the vertical direction of the number of pixels of the HDTV system, it is divided into two in the horizontal direction and into two in the vertical direction. Each divided area may have the same number of pixels as the HDTV system.
[0024]
【The invention's effect】
As described above, according to the present invention, at the time of random access readout, an imaging signal from a desired random access readout area is selected by a selection switch instead of from a plurality of divided imaging areas, and a random access output port is selected. In the conventional solid-state imaging device, complicated signal processing is required for imaging signals taken out in parallel from a plurality of output ports when the random access readout region extends over a plurality of divided imaging regions. Compared to the above, it is possible to obtain an image signal read out by random access with simple processing.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of an embodiment of the present invention.
FIG. 2 is a configuration diagram of an example of a main part in FIG. 1;
FIG. 3 is a conceptual explanatory diagram of random access reading according to the present invention.
FIG. 4 is a configuration diagram of a conventional example.
[Explanation of symbols]
11 pixel unit 11 _{1 to} 11 ₈ pixel set (divided imaging region)
12 Vertical shift register 13 CDS circuit 14 Horizontal shift register 15 ₁ to 15 ₈ Output port 16 Select switch 17 Random access output port 19 _{11 to} 188 _n Processing result storage unit 20 Random access read area S _{11 to} S _8n , T ₁₁ ~ T _8n switch

Claims (1)

A solid-state imaging device in which a pixel unit is divided into a plurality of divided imaging regions, and imaging signals output in parallel from the plurality of divided imaging regions are output in parallel from a plurality of normal read ports provided in correspondence with each other. In
Setting means for setting a desired random access readout region among all the imaging regions of the pixel unit;
A single random access output port provided separately from the plurality of output ports;
During normal readout, imaging signals output in parallel from the plurality of divided imaging regions are output to the plurality of output ports, and during random access readout, imaging signals obtained from the random access readout region are output to the single And a selection switch means for outputting in series to the random access output port.

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