JP3971212B2 - Abnormality detection circuit for signal processing equipment - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an abnormality detection circuit for a signal processing apparatus suitable for use in detecting disconnection of a power supply line or the like connecting a sensor unit and a control unit mounted on an automobile.
[0002]
[Prior art]
In general, various sensors for detecting physical quantities such as pressure and temperature are mounted on automobiles, and each sensor is connected to a control unit (ECU) via a wire cable.
[0003]
FIG. 8 shows a conventional signal processing apparatus 100 in which a sensor unit (first signal processing circuit) 110 for detecting pressure is connected to a control unit (second signal processing circuit) 120. The sensor unit 110 includes a sensor element 111 configured by a strain gauge type resistance bridge that detects a pressure change as a resistance value change, and a processing circuit unit 112 that processes a differential output of the sensor element 111. In this case, the processing circuit unit 112 has a signal amplification function, an offset adjustment function, a gain adjustment function, a memory function, and an interface function, and the differential output of the sensor element 111 is used as a pressure detection signal Sd (analog signal). The signal is converted and output from the signal output unit 113. On the other hand, the control unit 120 includes an A / D converter 121 and a control unit 122 having a computer function, and also includes a regulator 123 that converts the voltage 12 [V] of the in-vehicle battery into 5 [V].
[0004]
The sensor unit 110 and the control unit 120 are connected by a wire cable W. Accordingly, the signal output unit 113 of the sensor unit 110 and the signal input unit 124 of the control unit 120 to which the detection signal Sd output from the signal output unit 113 is input are connected by the signal line Ls, and the power output of the control unit 120 The parts 125p and 125n and the power input parts 114p and 114n of the sensor part 110 are connected by power lines Lp and Ln. In addition, Wc ... shows the detachable connector with which the wire cable W at the time of connecting the sensor part 110 and the control part 120 is provided.
[0005]
By the way, such a signal processing apparatus 100 is normally used under a severe environment such as vibration or temperature change, so that the signal line Ls and the power supply lines Lp and Ln connecting the sensor unit 110 and the control unit 120 are disconnected. In addition, if the control unit 120 malfunctions due to disconnection, a serious accident may occur. Therefore, normally, this type of signal processing apparatus 100 is provided with an abnormality detection circuit 130 that detects disconnection of the signal line Ls and the power supply lines Lp and Ln, and an abnormality such as lighting an alarm when the disconnection is detected. Generation processing is performed.
[0006]
As shown in FIG. 8, the conventional abnormality detection circuit 130 is configured by connecting a detection resistor Rrb between the signal output unit 113 of the sensor unit 110 and the power supply line Ln (power supply input unit 114n) on the negative electrode side. It was. The operation of this abnormality detection circuit 130 is as follows. First, the voltage (magnitude) of the detection signal Sd at the normal time changes within a predetermined range A shown in FIG. Assume that a disconnection occurs at position X in the power supply line Lp in FIG. In this case, as in the equivalent circuit U shown in FIG. 10, a pull-up resistor Rrp connected from the power supply line Lp to the signal input unit 124, and further a parallel circuit of the detection resistor Rrb and the impedance Zr. Current flows through. Zr is an impedance excluding the detection resistor Rrb when the sensor unit 110 is viewed from the signal line Ls. As is apparent from the equivalent circuit U, if the detection resistor Rrb is reduced or the pull-up resistor Rrp is increased, a voltage that falls within the abnormal range Bd outside the predetermined range A shown in FIG. Can be entered. That is, in the example, since 0.3 [V] or less is set to the abnormal range Bd, for example, the detection resistor Rrb is selected as 10 [kΩ] and the pull-up resistor Rrp is selected as 1 [MΩ]. For example, regardless of the magnitude of the impedance Zr, 5 [V] × (10 [kΩ] / 1000 [kΩ]) = 0.05 [V] or less, and a voltage of 0.3 [V] or less is input. Thus, disconnection can be detected.
[0007]
[Problems to be solved by the invention]
However, such a conventional abnormality detection circuit 130 has the following problems. That is, in the conventional abnormality detection circuit 130, it is necessary to reduce the detection resistance Rrb or increase the pull-up resistance Rrp, but if the detection resistance Rrb is too small, the current of the detection signal Sd flowing through the detection resistance Rrb Therefore, the detection resistor Rrb is normally selected to be about 5 to 20 [kΩ]. Therefore, in the above-described abnormality detection circuit 130, the pull-up resistor Rrp must be increased. As a result, when the insulation between the signal input unit 124 and the power supply line Lp deteriorates with time, the detection signal There is a problem that an error that cannot be ignored occurs in Sd, and the reliability and reliability in detecting a disconnection are lowered.
[0008]
The present invention solves such a problem existing in the prior art, solves the problem that the processing accuracy (detection accuracy) is affected by the deterioration of insulation over time, and detects disconnection. It is an object of the present invention to provide an abnormality detection circuit for a signal processing device that can improve reliability and reliability.
[0009]
[Means for Solving the Problems and Embodiments]
In the present invention, the signal output unit 2so of the first signal processing unit 2 that outputs the signal Sd whose magnitude changes in the predetermined range A and the signal input unit 3si of the second signal processing unit 3 that receives the signal Sd are connected to the signal line Ls. And the power supply output units 3po, 3no of the second signal processing unit 3 and the power input units 2pi, 2ni of the first signal processing unit 2 are connected by power supply lines Lp, Ln, and in the second signal processing unit 3 The signal input unit 3si and the power supply output unit 3po are provided in a signal processing device M in which a pull-up resistor Ru is connected, and the voltage of a signal input to the signal input unit 3si of the second signal processing unit 3 has a predetermined range A. When configuring the abnormality detection circuit 1 of the signal processing device M that detects the disconnection of the abnormal range Bu (Bd) and detects the disconnection of the signal line Ls and the power supply lines Lp and Ln, the first signal processing unit The active element 4 that is turned on when the power supply voltage E (Et) of the power supply line Lp in the first signal processing unit 2 is applied to the signal line Ls in the first signal processing unit 2 and turned off when the application of the power supply voltage E (Et) is released The disconnection is detected based on the fact that the voltage of the signal input to the signal input unit 3si of the second signal processing unit 3 becomes the power supply voltage E (Et) when the active element 4 is turned off. To do. Thereby, for example, if a disconnection occurs in the power supply line Lp, the application of the power supply voltage E (Et) to the active element 4 is released, so that the active element 4 is turned off. As a result, the voltage of the signal input section 3si becomes the power supply voltage E, and the voltage that falls within the abnormal range Bu (Bd) outside the predetermined range A is obtained reliably without being influenced by the resistance value of the pull-up resistor Ru. be able to.
[0010]
In this case, according to a preferred embodiment, the first signal processing unit 2 can be configured by a sensor unit 2s that detects a predetermined physical quantity, and the second signal processing unit 3 is a signal Sd provided to the signal input unit 3si. It can comprise by the control part 3c which performs control based on. The active element 4 can be an FET 4t. On the other hand, as an additional circuit, a booster circuit 7 that boosts and applies the power supply voltage E to the active element 4, a buffer amplifier 8 that amplifies the signal Sd applied to the active element 4, and the power supply voltage E is a constant voltage. One or more power supply voltage monitoring circuits 9 can be provided that turn off the active element 4 when out of range.
[0011]
【Example】
Next, preferred embodiments according to the present invention will be given and described in detail with reference to the drawings.
[0012]
First, the configuration of the signal processing apparatus M including the abnormality detection circuit 1 according to the present embodiment will be described with reference to FIGS. 1 and 2.
[0013]
FIG. 1 shows a signal processing device M mounted on an automobile. The signal processing apparatus M controls a sensor unit 2s (first signal processing circuit 2) that detects pressure such as hydraulic pressure, and controls an actuator (not shown) based on a detection signal Sd obtained from the sensor unit 2s or a pressure value. Is provided with a control unit 3c (second signal processing circuit 3). The sensor unit 2s and the control unit 3c are connected via a wire cable W.
[0014]
The sensor unit 2s includes a sensor element 21, a processing circuit unit 22, and the abnormality detection circuit 1 according to the present embodiment. The sensor element 21 is configured by a strain gauge type resistance bridge that detects a pressure change as a resistance value change, and has four resistances R1, R2, R3, and R4 that are bridge-connected.
[0015]
On the other hand, an example of the processing circuit unit 22 is shown in FIG. The processing circuit unit 22 includes a first amplifier 31 that amplifies a differential signal output from the differential output unit of the sensor element 21, a first D / A converter 32 that performs offset adjustment, and a second D that performs gain (sensitivity) adjustment. / A converter 33 and second amplifier 34, final stage output amplifier 35, nonvolatile memory 36 for storing adjustment values (digital code), and serial interface 37 for writing adjustment values to the nonvolatile memory 36 from the outside. , A non-volatile memory 36 and a clock generator 38 for applying a base clock to the serial interface 37. Reference numerals 39 and 40 denote adders. Therefore, the processing circuit unit 22 has a signal amplification function, an offset adjustment function, a gain adjustment function, a memory function, and an interface function with respect to the differential signal of the sensor element 21. A detection signal Sd (analog signal) is output. The output section of the output amplifier 35 becomes the signal output section 2so.
[0016]
Further, as shown in FIG. 1, the processing circuit unit 22 includes a positive-side power input unit 2pi and a negative-side power input unit 2ni, and each of the power input units 2pi and 2ni is a power input unit of the sensor element 21, respectively. , A sensor unit power line Lps is connected to the power input unit 2pi, and a sensor unit power line Lns is connected to the power input unit 2ni.
[0017]
Furthermore, the abnormality detection circuit 1 is connected to the output section of the processing circuit unit 22 (output amplifier 35). The abnormality detection circuit 1 includes an N-channel type FET 4t (active element 4) having a source connected to the output part of the processing circuit unit 22, and the drain of the FET 4t is connected to the sensor part signal line Lss and the gate of the FET 4t. Is connected to the booster circuit 7. The booster circuit 7 includes a capacitor C1 connected between the gate of the FET 4t and the power input part 2pi, a pair of diodes D1 and D2 connected between the gate of the FET 4t and the power input part 2pi, and an interconnection part of the diodes D1 and D2. A capacitor C2 connected between the clock ports of the processing circuit unit 22 is provided. In this case, the pair of diodes D1 and D2 are connected in series, and the diodes D1 and D2 have the gate side of the FET 4t from the power input part 2pi in the forward direction. The base clock (see FIG. 4B) is applied to the capacitor C2 from the clock generator 38. By this booster circuit 7, the power supply voltage E of the power supply line Lps is boosted twice, and this boosted voltage Et is applied to the gate of the FET 4t.
[0018]
On the other hand, the control unit 3c includes an A / D converter 51 and a control unit 52 having a computer function, and also includes a regulator 53 that converts the voltage 12 [V] of the in-vehicle battery into 5 [V]. In this case, the output section (5 [V] output) of the regulator 53 becomes the power supply output section 3po on the positive electrode side and is connected to the control section power supply line Lpc, and the input section of the A / D converter 51 is the signal input section 3si. And connected to the control unit signal line Lsc. In addition, 3no becomes a power supply output section (ground line) on the negative electrode side, and is connected to the control section power supply line Lnc.
[0019]
The sensor unit power line Lps and the control unit power line Lpc are connected by a detachable connector Wp to become a power line Lp, and the sensor unit power line Lns and the control unit power line Lnc are connected by a detachable connector Wn. The sensor part signal line Lss and the control part signal line Lsc are connected by a detachable connector Ws to become a signal line Ls. Such a partial section of the power supply lines Lp, Ln and the signal line Ls is constituted by the wire cable W.
[0020]
Next, the operation of the abnormality detection circuit 1 according to this embodiment will be described with reference to FIGS.
[0021]
First, the basic operation of the abnormality detection circuit 1 according to the basic mode will be described with reference to FIG. In the figure, at the normal time, the power supply voltage E is applied from the power supply line Lp to the gate of the FET 4t, and the FET 4t is turned on. Therefore, the signal line Ls becomes conductive, and the detection signal Sd output from the signal output unit 2so is given to the control unit 3c side through the FET 4t. In this case, the resistance value of the pull-up resistor Ru is selected to a general arbitrary value of 5 to 20 [kΩ]. As a result, the voltage of the detection signal Sd output from the FET 4t has a magnitude that falls within the predetermined range A (0.3 to 4.7 [V]) in FIG.
[0022]
On the other hand, it is assumed that a disconnection occurs at the position Xo of the power supply line Lp shown in FIG. In this case, since the supply of the power supply voltage E from the power supply line Lp to the gate of the FET 4t is released, the FET 4t is turned off, and the current flowing through the pull-up resistor Ru does not flow to the processing circuit unit 22 side. As a result, the voltage input to the signal input unit 3si is the power supply voltage E (5 [V]), which is a voltage that falls within the abnormal range Bu shown in FIG.
[0023]
By the way, in the abnormality detection circuit 1 according to such a basic form, when the detection signal Sd rises to the vicinity of the power supply voltage E, the gate-source voltage of the FET 4t is lowered, so that the output impedance of the sensor unit 2s is increased. As a result, an increase in output error and a decrease in responsiveness to a sudden change are caused. Therefore, in the abnormality detection circuit 1 according to the present embodiment shown in FIG. 1, the booster circuit 7 is provided so that the voltage Et applied to the gate of the FET 4t is twice the power supply voltage E to keep the output impedance low. . FIG. 4 shows a timing chart of voltages at various parts in the booster circuit 7. As shown in FIG. 4B, the base clock applied from the clock generator 38 to the capacitor C2 varies between 0 and 5 [V]. Further, as shown in FIG. 4C, a power supply voltage E, that is, 5 [V] is applied to the capacitor C2 by the diode D2. Therefore, if the base clock is output and applied to the capacitor C2, the voltage Et of the gate of the FET 4t increases with time (increase in the number of pulses), and the terminal voltage 5 of the capacitor C2 is increased to 5 [V] of the power supply voltage E. [V] is added to be 10 [V].
[0024]
Therefore, the provision of the booster circuit 7 makes it easy to keep the output impedance low with respect to the entire voltage range of the detection signal Sd. Therefore, it is more normal than the abnormality detection circuit 1 according to the basic form shown in FIG. It is possible to achieve output accuracy (reduction of output error) at the time (when no disconnection). Even when the power supply line Ln and the signal line Ls on the negative electrode side are disconnected, detection can be performed by turning off the FET 4t, similarly to the disconnection of the power supply line Lp.
[0025]
Moreover, the use of such an abnormality detection circuit 1 facilitates detection of a short circuit. That is, in the conventional abnormality detection circuit 100 shown in FIG. 8, a case is assumed in which the 12 [V] power supply line Lo and the signal line Ls are short-circuited by the path Y indicated by the dotted line. In this case, the current flows in the order of path Y → signal line Ls → signal input unit 113 → processing circuit unit 112 → power input unit 114p → power source line Lp (5 [V]) → regulator 123 from the power source line Lo (12 [V]). Therefore, there is a possibility that the control unit 120 including the sensor unit 110 and the regulator 123 generates heat and breaks down. However, in the case of the abnormality detection circuit 1 according to the present embodiment, if a FET 4t having an appropriate conductance is selected, the short-circuit current can be easily limited, and the regulator 123 and the like can be protected from heat generation and destruction. Therefore, such an abnormality detection circuit 1 has both a disconnection detection function and an output short-circuit protection function.
[0026]
Next, the abnormality detection circuit 1 according to the modified embodiment of the present invention will be described with reference to FIGS.
[0027]
FIG. 5 is provided with a buffer amplifier 8 for amplifying the detection signal Sd applied to the FET 4t. The buffer amplifier 8 includes an amplifier unit 61. The input unit of the amplifier unit 61 is connected to the signal output unit 2so of the processing circuit unit 22, and the output unit of the amplifier unit 61 is connected to the source of the FET 4t. The drain of the FET 4t and the feedback input section of the amplifier section 61 are connected by a feedback resistor Rb. Providing such a buffer amplifier 8 has the following advantages. That is, when the predetermined range A (FIG. 9) with respect to the voltage of the detection signal Sd proportional to the physical quantity to be measured is ensured as wide as possible, the gate-source voltage of the FET 4t may be made sufficiently higher than the threshold voltage. It is often difficult. For example, when the voltage of the detection signal Sd is 4.7 [V] and the power supply voltage E is 5.0 [V], the gate-source voltage of the FET 4t is 0.3 [V]. In this case, since the resistance when the FET 4t is on increases, as a result, the output impedance also increases and the output error increases. However, if the buffer amplifier 8 having the feedback resistor Rb is provided, the output impedance can be kept low. Note that when the positive power supply line Lp is disconnected, it is necessary to suppress current leakage due to feedback. Therefore, the feedback resistor Rb is preferably selected to be around several hundreds [kΩ].
[0028]
On the other hand, FIG. 6 (FIG. 7) shows a power supply by reducing the power supply voltage Et applied to the FET 4t to a low level when the power supply voltage E is out of a certain voltage range, compared to the embodiment shown in FIG. A power supply voltage monitoring circuit 9 for detecting an abnormality in the voltage E is added. That is, the modified embodiment shown in FIG. 6 is different from FIG. 1 in that the gate of the FET 4t is connected to the capacitor C1 through the resistor Ra, and the drain-source of the FET 71 is connected between the gate of the FET 4t and the power supply line Ln. Furthermore, the output part of the monitoring circuit main body 72 is connected to the gate of the FET 71.
[0029]
An example of the monitoring circuit main body 72 is shown in FIG. In the figure, 73 is a Zener diode, R11, R12, R13, and R14 are resistors, 74 and 75 are comparators, and 76 is a NAND circuit. The monitoring circuit main body 72 compares the Zener voltage (reference voltage) of the Zener diode 73 and the power supply voltage E by the two comparators 74 and 75, and when the power supply voltage E is out of a certain voltage range, that is, the upper limit value is set. When the value is above the upper limit or below the lower limit value, the output of the NAND circuit 76 is switched to the high level, and the FET 71 is turned on. Thereby, the gate of the FET 4t becomes a low level, and the occurrence of abnormality can be detected by turning off the FET 4t. As described above, the abnormality detection circuit 1 shown in FIG. 6 (FIG. 7) has both a disconnection detection function and a power supply voltage abnormality detection function. Therefore, both functions can be realized by using a part of the circuit, and the cost is improved and the reliability is further improved.
[0030]
As described above, the embodiment (modified embodiment) has been described in detail. However, the present invention is not limited to such an embodiment (modified embodiment), and in the detailed circuit configuration, parts, technique, numerical value, etc. Changes, additions, and deletions can be arbitrarily made without departing from the scope of the present invention. For example, although FIG. 3 has been described as the abnormality detection circuit 1 of the basic form, this basic form is also included in the present invention. Therefore, the booster circuit 7, the buffer amplifier 8, and the power supply voltage monitoring circuit 9 can be used as necessary. Moreover, although the sensor part 2s was illustrated as the 1st signal processing part 2, and the control part 3c was illustrated as the 2nd signal processing part 3, it can substitute by another similar functional circuit. Furthermore, although the FET 4t is illustrated as the active element 4, an active element that exhibits other similar functions, such as a general transistor, can be used.
[0031]
【The invention's effect】
As described above, the present invention connects the signal output unit of the first signal processing unit that outputs a signal whose magnitude changes within a predetermined range and the signal input unit of the second signal processing unit that receives the signal through the signal line, The power output unit of the second signal processing unit and the power input unit of the first signal processing unit are connected by a power line, and the signal input unit and the power output unit of the second signal processing unit are connected by a pull-up resistor. An abnormality that detects a disconnection of the signal line and the power line by detecting that the voltage of the signal input to the signal input unit of the second signal processing unit is within an abnormal range outside the predetermined range. In the detection circuit, an active element that is turned on when the power supply voltage of the power supply line in the first signal processing unit is applied to the signal line in the first signal processing unit and that is turned off when the supply of the power supply voltage is released is connected in series. Because active devices have to detect the disconnection based on the voltage of the signal input to the signal input of the second signal processing unit by turning off is the power supply voltage, a marked effect as follows.
[0032]
(1) The problem that the processing accuracy (detection accuracy) is affected by the deterioration of insulation over time can be solved, and the reliability and reliability in detecting disconnection can be improved.
[0033]
(2) According to a preferred embodiment, if a FET is used and an FET having an appropriate conductance is selected, a short-circuit current can be easily limited, and a regulator or the like (second signal processing unit) is protected from heat generation and breakdown. can do.
[0034]
(3) According to a preferred embodiment, if a booster circuit or a buffer amplifier is provided, the output impedance of the first signal processing unit can be reduced, the output error can be reduced, and the responsiveness to a sudden change is increased. be able to.
[0035]
(4) If a power supply voltage monitoring circuit is provided according to a preferred embodiment, both a disconnection detection function and a power supply voltage abnormality detection function can be realized by using a part of the circuit, thereby increasing cost. In addition, the reliability can be further increased.
[Brief description of the drawings]
FIG. 1 is an electric circuit diagram of an abnormality detection circuit of a signal processing device according to a preferred embodiment of the present invention;
FIG. 2 is a block circuit diagram showing an example of a processing circuit unit provided in the signal processing device;
FIG. 3 is an electric circuit diagram showing a basic form of the abnormality detection circuit;
4 is a timing chart of voltages at various parts in the booster circuit included in the abnormality detection circuit shown in FIG.
FIG. 5 is an electric circuit diagram of an abnormality detection circuit of a signal processing device according to a modified embodiment of the present invention;
FIG. 6 is an electric circuit diagram of an abnormality detection circuit of a signal processing device according to another modified embodiment of the present invention;
7 is an electric circuit diagram of a monitoring circuit body of a power supply voltage monitoring circuit provided in the abnormality detection circuit shown in FIG.
FIG. 8 is an electric circuit diagram of an abnormality detection circuit of a signal processing device according to a conventional technique;
FIG. 9 is a relationship diagram showing a detection signal and an abnormal range with respect to pressure (physical quantity);
10 is an equivalent circuit when a disconnection occurs in the signal processing device shown in FIG.
[Explanation of symbols]
1 anomaly detection circuit 2 first signal processing unit 2s sensor unit,
2so signal output unit 2pi power input unit (positive side)
2ni Power input unit (negative electrode side)
3 Second signal processing unit 3c control unit 3si signal input unit 3po power output unit (positive side)
3no power supply output (negative electrode side)
4 Active element 4t FET
7 Booster circuit 8 Buffer amplifier 9 Power supply voltage monitoring circuit A Predetermined range B Abnormal range Bd Abnormal range Sd signal (Detection signal)
Ls signal line Lp power line (positive side)
Ln Power line (Negative electrode side)
Ru pull-up resistor M signal processor E power supply voltage Et voltage applied to active element

Claims (6)

  A signal output unit of a first signal processing unit that outputs a signal whose magnitude changes within a predetermined range and a signal input unit of a second signal processing unit to which the signal is input are connected by a signal line, and the second signal processing unit The signal output unit and the power input unit of the first signal processing unit are connected by a power line, and the signal input unit and the power output unit in the second signal processing unit are connected by a pull-up resistor. A disconnection of the signal line and the power supply line is detected by detecting that the voltage of the signal input to the signal input unit of the second signal processing unit is included in the abnormal range outside the predetermined range. In the abnormality detection circuit of the signal processing device, the signal line in the first signal processing unit is turned on when the power supply voltage of the power supply line in the first signal processing unit is applied to the signal line. The active elements that are released when the signal is released are connected in series, and when the active elements are turned off, the voltage of the signal input to the signal input unit of the second signal processing unit becomes the power supply voltage. An abnormality detection circuit for a signal processing device, characterized in that:   The first signal processing unit is configured by a sensor unit that detects a predetermined physical quantity, and the second signal processing unit is configured by a control unit that performs control based on a signal given to the signal input unit. The abnormality detection circuit of the signal processing device according to claim 1.   2. The abnormality detection circuit for a signal processing apparatus according to claim 1, wherein the active element is an FET.   The abnormality detection circuit of the signal processing apparatus according to claim 1, further comprising a booster circuit that boosts and applies a power supply voltage to the active element.   The abnormality detection circuit of the signal processing apparatus according to claim 1, further comprising a buffer amplifier that amplifies the signal applied to the active element.   The abnormality detection circuit of the signal processing apparatus according to claim 1, further comprising a power supply voltage monitoring circuit that turns off the active element when the power supply voltage is out of a certain voltage range.

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