JP3970297B2 - Recording apparatus and recording apparatus control method - Google Patents

Description

  The present invention relates to a recording apparatus and a control method for the recording apparatus.

  Conventional techniques using a ring structure as a recording buffer in a printing apparatus have been proposed in the patent literature. This conventional technique has an address pointer for storing print data in a memory area, an address pointer for extracting the data, and a print data number count register for managing free areas in the memory area. However, attempts have been made to improve the efficiency of memory use in the circulation region.

As the above-described prior art, for example, there is one shown in Patent Document 1 below.
Japanese Patent Publication No. 63-12290

  However, when the conventional ring buffer structure in the prior art is applied to a recording apparatus for full-color printing, it can cope with a recording head for one color, but there is a data storage area for recording heads for other colors. The problem that it cannot be secured arises.

  Even if you have a ring buffer structure for multiple colors, the buffer structure is allocated for each color first, so even if there is no data to be printed, it is necessary to prepare that area, making the memory area efficient. It is difficult to use.

  In order to solve the above-described problems, a recording apparatus and a control method for the recording apparatus according to the present invention are mainly characterized by the following configurations.

That is, in order to perform recording by causing a carriage mounted with a recording head to scan on a recording medium, an area recorded by one scan of the recording head is divided into a plurality of areas in the scanning direction , and the divided areas are divided. A recording apparatus having a buffer having a plurality of memory areas in which image data corresponding to the
An input unit for inputting data in block units from the outside;
A decompression processing unit for performing decompression processing of block-unit data input by the input means;
The decompressed data by the decompression processing unit, for storage in the buffer as the image data of the divided area units, a write controller for controlling write address information of the image data of the area units for each color,
A read control section for controlling reading address information for reading the image data stored in the buffer for each color,
Based on the read address information, according to the read image data, a recording data generation unit that generates recording data for the divided area units;
It is characterized by providing.

Preferably, in the recording apparatus described above, the image data for each divided area includes data corresponding to cyan, yellow, magenta, and black.

Preferably, in the recording apparatus, the write control unit stores the image data in a circulating manner between areas set by the first address information and the last address information of the buffer .

  Preferably, in the recording apparatus, the write control unit is configured to prohibit setting of an address overlapping with the image data stored in the buffer when the write address information matches the read address information. Execute.

  Preferably, in the recording apparatus, the writing control unit controls address information to be stored in the buffer according to the presence or absence of the color data included in the image data.

Preferably, in the recording apparatus, the writing control unit stores setting information including information for identifying presence / absence of data included in the image data and the number of rasters of the data for each color data. A first register;
A second register for storing width information of the image data;
Second block data to be written next, which is determined based on setting information related to the first block data to be written stored in the first register and width information of image data stored in the second register. A third register for storing the write start address of
The write control unit updates the write address information for the second block data to the determined write start address before completing the writing of the image data corresponding to the first block data.

Preferably, in the recording apparatus, the read control unit stores setting information including information for identifying presence / absence of data included in the image data and the number of rasters of the data for each color data. A fourth register;
A fifth register for storing width information of the image data;
A sixth register for storing a read start address determined based on setting information stored in the fourth register and width information of image data stored in the fifth register;
A seventh register for determining a read start address for the next block data before storing the image data in accordance with the read address stored in the sixth register, and storing the data;
Have

  Preferably, in the recording apparatus, the read control unit further includes a read color table register that stores information specifying a reading order for each color, and based on the information specifying the reading order for each color, Reading is controlled in order from the buffer.

  Preferably, in the recording apparatus, when the read address information specifies the final address of the buffer, the read control unit specifies the first address of the buffer.

  Preferably, in the recording apparatus, when the write address information specifies the final address of the buffer, the write control unit performs control so as to specify the first address of the buffer.

  Preferably, in the above recording apparatus, the number of data that can be stored in the buffer is the number of data in a recording area that is smaller than the recording area for one scan.

Further, in order to perform recording by causing a carriage mounted with a recording head to scan on a recording medium, an area recorded by one scan of the recording head is divided into a plurality of areas in the scanning direction , and the divided areas are divided. A control method of a recording apparatus having a buffer having a plurality of memory areas in which image data corresponding to the
An input process for inputting block unit data from the outside,
A decompression processing step for performing decompression processing of block-unit data input in the input step;
A write control step for controlling the write address information of the image data for each area for each color in order to store the data decompressed in the decompression process step as image data corresponding to the divided areas in the buffer; ,
A read control step for controlling read address information for reading image data stored in the buffer for each color;
Based on the read address information, in accordance with the read image data, a recording data generation step of generating the divided area unit recording data;
It is characterized by providing.

  According to the recording apparatus and the control method of the recording apparatus according to the present invention, it is possible to control writing and reading to the buffer in units of data including a plurality of color data. This control makes it possible to synchronize the input / output of block data by controlling the addresses for writing and reading the data for each block corresponding to the area obtained by dividing one scan into a plurality of blocks. .

  Alternatively, by managing the height (raster number) information of each color data and the information indicating the presence / absence of the color data individually for each color data, it is possible to efficiently execute address management when writing each color image data to the recording buffer. It becomes like this.

  Alternatively, since it is possible to determine the presence or absence of data for each color data, it is not necessary to secure a recording buffer area for an area without data, and the buffer area can be used efficiently.

  Preferred embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

  In the embodiments described below, a printer is taken as an example of a recording apparatus using an inkjet recording method.

  In this specification, “recording” (sometimes referred to as “printing”) is not only for forming significant information such as characters and graphics, but also for human beings, regardless of whether it is significant or not. Regardless of whether or not it has been manifested, it also represents a case where an image, a pattern, a pattern or the like is widely formed on a recording medium or the medium is processed.

  “Recording medium” refers not only to paper used in general recording apparatuses but also widely to cloth, plastic film, metal plate, glass, ceramics, wood, leather, and the like that can accept ink. Shall.

  Furthermore, “ink” (sometimes referred to as “liquid”) is to be interpreted broadly in the same way as the definition of “recording (printing)” above. It represents a liquid that can be used for forming a pattern or the like, processing a recording medium, or processing an ink (for example, solidification or insolubilization of a colorant in ink applied to the recording medium).

<Outline of the main unit>
FIG. 19 is an external perspective view showing an outline of the configuration of an inkjet printer IJRA that is a representative embodiment of the present invention. In FIG. 19, the carriage HC engaged with the spiral groove 5004 of the lead screw 5005 that rotates via the driving force transmission gears 5009 to 5011 in conjunction with the forward / reverse rotation of the drive motor 5013 has a pin (not shown). It is supported by the guide rail 5003 and reciprocates in the directions of arrows a and b. On the carriage HC, an integrated ink jet cartridge IJC incorporating a recording head IJH and an ink tank IT is mounted.

  A paper pressing plate 5002 presses the recording paper P against the platen 5000 in the moving direction of the carriage HC. Reference numerals 5007 and 5008 denote photo-couplers which are home position detectors for confirming the presence of the carriage lever 5006 in this region and switching the rotation direction of the motor 5013.

  Reference numeral 5016 denotes a member that supports a cap member 5022 that caps the front surface of the recording head IJH. Reference numeral 5015 denotes a suction unit that sucks the inside of the cap, and performs suction recovery of the recording head through the cap opening 5023. Reference numeral 5017 denotes a cleaning blade, and reference numeral 5019 denotes a member that enables the blade to move in the front-rear direction, and these are supported by a main body support plate 5018. Needless to say, the blade is not in this form, and a known cleaning blade can be applied to this example.

  Reference numeral 5021 denotes a lever for starting suction for suction recovery, which moves in accordance with the movement of the cam 5020 engaged with the carriage, and the driving force from the driving motor is controlled by a known transmission mechanism such as clutch switching. Is done.

  These capping, cleaning, and suction recovery are configured so that desired processing can be performed at their corresponding positions by the action of the lead screw 5005 when the carriage comes to the home position side region. As long as the above operation is performed, any of these can be applied to this example.

  The ink tank IT and the recording head IJH may be integrally formed to constitute a replaceable ink cartridge IJC. However, the ink tank IT and the recording head IJH are configured to be separable so that the ink can be separated. Only the ink tank IT may be exchanged when it runs out.

  FIG. 20 is an external perspective view showing the configuration of the ink cartridge IJC in which the ink tank and the head can be separated. In the ink cartridge IJC, as shown in FIG. 20, the ink tank IT and the recording head IJH can be separated at the position of the boundary line K. When the ink cartridge IJC is mounted on the carriage HC, an electrode (not shown) for receiving an electric signal supplied from the carriage HC side is provided, and by this electric signal, the recording head IJH as described above is provided. Is driven to eject ink.

  In FIG. 20, reference numeral 500 denotes an ink discharge port array. The ink tank IT is provided with a fibrous or porous ink absorber to hold ink.

  Next, a control configuration for executing the recording control of the above-described apparatus will be described.

<First Embodiment>
A first embodiment of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram showing a recording control unit of a recording apparatus in an embodiment of the recording apparatus according to the present invention. In the figure, reference numeral 1 receives data transferred from a host computer (not shown) via the interface signal line S1, and from the received data, data necessary for operation of the recording apparatus and An interface control unit (controller) that extracts and temporarily stores image data. The data extracted by the interface controller 1 is stored in the reception buffer 2 via the signal line S2.

  The reception buffer 2 is constituted by a storage device such as SRAM or DRAM, and data stored in the reception buffer has a structure as shown in FIGS. 2 (a) and 2 (b).

  As shown in the data structure of the reception buffer in FIG. 2A, data of “command” (201), “data length” (202), and “setting data” (203) are stored in this order from the left. Subsequently, data of “command” (204), “data length” (205), and “setting data” (206) are stored. This indicates that data transferred in chronological order is stored at consecutive addresses in the reception buffer. The setting data 206 shown here includes, for example, execution of paper feed, paper feed amount setting, and recording head to be used. It is information indicating the number and the like, and recording is possible with the recording apparatus only after all the information determined by the setting data is prepared. Thereafter, the image data (209, 212) to be recorded is stored in the reception buffer 2.

  The image data (209, 212) is data obtained by dividing the data amount required when the recording head performs recording on the recording medium in one scan into smaller blocks, and divided into blocks. The image data is divided in units of blocks and sequentially stored as first block data (209), second block data (212),.

  FIG. 2B is a diagram showing in detail the data structure of the image data divided into block units. As shown in FIG. 2B, a plurality of color data (213 to 214) are sequentially compressed as data. Stored. This color data is delimited by “color changing codes” (216, 217, 218).

  For example, assuming four color data of cyan, yellow, magenta, and black, using a print head in which nozzle rows each having 64 vertical nozzles for each color are arranged in two rows in the scanning direction, Since the data for each nozzle row constitutes one color data, the two nozzle rows for four colors, that is, the compressed color data of the first to eighth colors are converted into image data in one block data. Stored. Each nozzle of this nozzle row is lined up in the conveyance direction of the recording medium. For example, the first and second colors are cyan data, the third and fourth colors are magenta data, the fifth and sixth colors are yellow data, and the seventh and eighth colors are black data. Become.

  FIG. 3 shows the data structure of a recording buffer that holds image data. For example, when a maximum length of about 8 inches is recorded in one scan, assuming that one block data has a size capable of recording about 1/8 inch in the scanning direction, a total of 8 blocks of image data can be recorded. An image for one scan is completed. The first block to the eighth block are arranged in the scanning direction of the recording head, and the first color data to the eighth color data are stored in each block data. The length of each color data stored in each block corresponds to the number of nozzles of the recording head.

  Returning to FIG. 1, the description of each control block is continued. Of the data stored in the reception buffer 2, “command”, “data length”, and “setting data”, which are setting values for controlling the recording apparatus, are read from the interface controller 1 by the CPU 9 via the signal line S 902. Are set in the respective control circuits (7, 8) in the figure (S903, S907). The CPU 9 interprets the read data (data corresponding to 201 to 208 in FIG. 2A), and controls overall recording control of the recording apparatus according to the result. On the other hand, regarding the processing of the image data, the CPU 9 activates the data expansion block 3 to execute the processing.

  The data expansion block 3 reads three types of data “compression TAG”, “data”, and “color change code” from the reception buffer 2 as shown in FIG. 2B, and expands the data based on these data. Execute control. In this embodiment, PackBits compression is used as the data compression / decompression method. Therefore, when the compression TAG is 8 bits and is a value from 00h to 7Fh, processing is performed assuming that 1 to 128 non-contiguous data exists in the data area, and compression is performed. When TAG is 8 bits and is a value from FFh to 81h, a process of decompressing the next 1-byte data into 2 to 128 consecutive data is performed. When 80h is read at the compression TAG, it is processed as a color change code. The decompressed data is placed on the signal line S4 and written to the recording buffer 4.

  The recording buffer 4 stores the decompressed image data in the data structure shown in FIG. The head data of the first color data of the first block is written to the head address of the recording buffer 4, and the subsequent data is sequentially written while adding the addresses one by one. The area that can be stored as one color data at the address of the recording buffer is determined by the setting data read by the CPU 9 first, and since data exceeding that value cannot be written, the image data is compressed according to the setting data. Data size restrictions will be added. The data after detecting the color change code is sequentially written from the start address of the second color data. The control of the address data is executed by a recording buffering control structure circuit 8 to be described later.

  This writing is repeated from the first color data to the eighth color data in the first block, and when the color change code is detected after the eighth color data has been written, all the data in the first block has been written. The data expansion block 3 ends the data expansion operation, notifies the CPU 9 that the data expansion for one block has been completed by an interrupt (INT3), and waits for the start of the next data expansion from the CPU 9.

  When a plurality of blocks of image data are arranged on the recording buffer 4, the CPU 9 operates a scanning motor (not shown) to start the recording operation, and the recording head 6 scans the image data with a carriage encoder (CR encoder). The image can be completed on the paper surface (on the recording medium) by transferring and recording in synchronization with the image 10. After the recording head 6 scans in the main scanning direction, the conveying means conveys the recording medium in the sub scanning direction. In this way, scanning of the recording head and conveyance of the recording medium are repeatedly performed to record an image for one page.

  The recording data generation block 5 reads each block structure of the image data on the recording buffer 4 via the signal line S5 at a timing synchronized with the CR encoder 10 in accordance with a value designated by the CPU 9, and the recording head 6 performs recording. The data is output to the signal line S6 while being converted into a possible data structure. This recording data generation block 5 holds information on the block width (indicating the length of the block) in the recording buffer, which will be described later, and information on the height of each color of the block (referred to as “raster number” of color data). To do.

<Receiving buffer write / read control>
As described above, the interface controller 1 writes data to the reception buffer 2 and the data expansion block 3 reads only image data. The reception buffering structure control circuit controls the write address and read address. 7. The reception buffering structure control circuit 7 manages the start address and the end address of the reception buffer 2, and the write address and read address.

  The reception buffering structure control circuit 7 adds a write request signal (S701) received from the interface controller 1 for each reception, and outputs this to the reception buffer 2 as write address information (signal line S702). Then, the reception buffering structure control circuit 7 performs control to return the write address to the head address of the reception buffer 2 when the final address of the reception buffer 2 is reached.

  When the write address reaches (matches) the read address, the reception buffer 2 is filled with data and communicates to the interface controller 1 via the signal line S703 that the next data cannot be written.

  At the same time, the reception buffer 2 notifies the CPU 9 that the data cannot be written by an interrupt signal on the signal line S904. The structure of the reception buffer 2 can be set by the CPU 9 writing to an internal register using the bus of the signal line S903.

  When the CPU 9 reads the data in the reception buffer 2 directly through the data read register in the reception buffering structure control circuit 7, the data expansion block 3 sends the data read request signal line S705 to the read address. When the request is made, the read address is added one by one via the signal line S706 and outputted to the reception buffer 2.

  The reception buffering structure control circuit 7 performs control to return the read address to the head address of the reception buffer 2 when the read address reaches the final address. When the read address reaches (matches) the write address, data is lost from the reception buffer, so that the next data cannot be read is communicated to the data development block via the signal line S704. At the same time, the CPU 9 is informed that there is no data to be read out on the reception buffer 2 through the interrupt signal line of the signal line S904.

  The above is the processing content of the data writing / reading control to the reception buffer 2. Next, the processing contents for writing the data read out from the reception buffer 2 and developed into the recording buffer or reading the data from the recording buffer will be described.

<Record buffer read / write control>
The data development block 3 writes image data to the recording buffer 4, and the recording data generation block 5 reads the written image data. At this time, the recording buffer controls the writing address and the reading address. This is a ring structure control circuit 8.

  The recording buffering structure control circuit 8 manages the start address, the end address, the write address, and the read address of the record buffer.

  The recording buffering structure control circuit 8 adds a write request signal (S801) received from the data development block 3 by one address each time it is received, and outputs this to the recording buffer 4 as write address information (signal line S802). Then, the recording buffering structure control circuit 8 performs control to return the write address to the head address of the recording buffer 4 when the final address of the recording buffer 4 is reached.

  When the write address reaches (matches) the read address, the recording buffer 4 is filled with image data, and the fact that the next image data cannot be written is communicated to the data development block 3 via the signal line S803.

  When the data expansion block 3 reads the color change code from the reception buffer 2, the data expansion block 3 communicates that fact via the signal line S804, and the recording buffering structure control circuit 8 receives the next color data. The head address to be stored is prepared to be output from the signal line S802. The structure of the recording buffer 4 can be set by the CPU 9 writing to an internal register using the bus of the signal line S907.

  When the recording data generation block 5 requests the read address for each color via the data read request signal line S805, the read address is added one address at a time via the signal line S806 and output to the recording buffer 4.

  The recording buffering structure control circuit 8 performs control to return the reading address to the head address of the recording buffer 4 when the reading address reaches the final address.

  The recording data generation block 5 sets the data structure of the image data block currently being read out from the CPU 9 to a register in the recording data generation block 5 via the bus of the signal line S908. When all the image data in the set image data block structure is read, the end signal S909 is communicated to the CPU 9 as an interrupt signal. At this time, if the next image data block is already developed on the recording buffer 4, the image data block structure is written in the register.

  Since the recording buffer 4 controls data writing in units of one image data block and does not activate a recording data generation block for an unwritten image data block, the read address of the recording buffer exceeds the write address. Absent. Reference numeral 11 denotes a buffer structure information memory. This is a working memory (work RAM) for controlling the recording buffer, and is an area for temporarily storing information about the recording buffer structure described later.

  The outline of the flow of recording data in the recording control unit has been described above. Hereinafter, detailed functions of each control block will be described.

<Interface controller 1 (FIG. 4)>
FIG. 4 is a block diagram showing the inside of the interface controller 1, which includes a command analysis unit 101 and a data latch unit 102.

  The command analysis unit 101 determines whether the data string sent from the host computer via the interface signal line S1 is command information for confirming the state of the recording apparatus or the like, or data related to image data, and the received data is If it is command information for confirming the status or the like of the recording apparatus, a status for identifying the status of the apparatus is automatically responded, and if it is image data, control for temporarily storing it in the data latch unit 102 is performed. The command analysis unit 101 has a register for storing status information of the recording apparatus, and the CPU 9 writes the information in the register via the bus (S901).

  When the command analysis unit 101 receives data (command information, image data) through the interface signal line S1, the command analysis unit 101 outputs an interrupt signal (INT1) S902 to the CPU 9 to notify the completion of data reception. The CPU 9 receives the interrupt signal and starts data processing.

  The data latch unit 102 is a storage device of several bytes and has a FIFO structure. When the data latch unit 102 has data, the data latch unit 102 outputs a write request signal S701 to the reception buffering structure control circuit unit 7, and the data latch unit The write request signal S701 is output until the data 102 becomes zero. However, when the reception buffer 2 is full and cannot be written, or when data is not accepted due to some abnormality, the reception buffering structure control circuit unit 7 outputs a data transfer standby signal S703 and receives the standby signal S703 to receive the data latch unit. 102 stops the data transfer.

  When the data transfer is stopped, the FIFO of the data latch unit 102 is immediately filled with data and cannot receive data from the host computer side. In this case, the state of the apparatus main body is set to the busy state, and the command analysis unit 101 receives the data. A retransmission request is output to the host computer as if it could not be received.

<Reception Buffering Structure Control Circuit Unit 7 (FIG. 5)>
FIG. 5 is a block diagram showing details of the reception buffering structure control circuit unit 7, a write address register (WP) 701 for outputting an address (write pointer) for writing data of the interface controller 1 to the reception buffer 2, and reception It has a read address register (RP) 702 that outputs a read address (read pointer) for outputting data on the buffer 2 to the data development block 3, and outputs them as a write address signal line S702 and a read address signal line S706, respectively. . Furthermore, a start address register (top_adr) 703 and a last address register (bottom_adr) 704 for specifying the start address and the end address of the reception buffer 2 are provided. The initial values of these registers are set by the CPU 9.

  For example, the start address of the reception buffer 2 is set as the 1000h address in the start address register 703, the last address is set as the FFFFh address in the final address register 704, and there is no data on the reception buffer 2 at first. 1000h is set in the write address register 701 and the read address register 702.

  When there is no data in this initial state, the address control block 705 accepts the write request signal S701 from the interface controller 1, but outputs a buffer empty signal line S704 to notify the data development block 3 that there is no data, Communication is performed so as not to output the read request signal S705. When the write request signal S701 from the interface controller 1 is received and the first data is written to the reception buffer 2, the address control block 705 adds one value of the write address register 701 and writes it back. The above control is performed every time there is a write request, and when the next write address exceeds the value set in the final address register 704, the value set in the start address register 703 as the next address is stored in the write address register 701. Value.

  When the value of the write address register 701 matches the value of the read address register 702, the reception buffer 2 is filled with unread data, and the next data cannot be written. Therefore, the address control block 705 is an interface control block. 1 outputs a buffer full signal line S703 to suppress the output of the write request signal S701.

  The state in which there is even one piece of data on the reception buffer 2 is when the value of the write address register 701 and the value of the read address register 702 are different. In this case, the address control block 705 stops outputting the buffer empty signal S704. When the data read request signal S705 from the data expansion block 3 is output and the data read from the reception buffer 2 is completed, the address control block 705 adds one value of the read address register 702 and writes it back.

  The above control is performed every time there is a read request, and when the next read address exceeds the value set in the final address register 704, the value set in the start address register 703 as the next address is stored in the read address register 701. Value.

  When the value of the read address register 702 matches the value of the write address register 701, there is no unread data on the reception buffer 2, and the next data cannot be read. Therefore, the address control block 705 is a data expansion block. 3 outputs a buffer empty signal line S704 to suppress the output of the read request signal S705.

  The address control block 705 outputs a reception buffer interrupt signal line S904 (INT2) to notify the CPU 9 when the reception buffer 2 is in a buffer empty state or a buffer full state, or when these states are released. To do.

  FIG. 6 is a diagram showing the operation timing of the reception buffering structure control circuit 7. The write request signal S701, the write address signal line S702, the buffer full signal line S703, the buffer empty signal line S704, the read request signal S705, and the read address signal. The change of each signal line of line S706 is shown. As described above, the write address signal line S702 is incremented by 1 each time the write request signal S701 is input, and the read address signal line S706 is incremented by 1 each time the read request signal S705 is input. When there is no data on the reception buffer, the buffer empty signal S704 is output (timing A and B in FIG. 6), and when the data is full on the reception buffer, the buffer full signal S703 is output (timing C in FIG. 6). .

<Description of Recording Buffering Structure Control Circuit>
The recording buffering structure control circuit will be described with reference to FIGS. In the processing of the recording buffering structure control circuit, FIG. 7 is a diagram for explaining mainly the write address control, and FIG. 10 is a diagram for explaining the reading address control of the recording buffering structure control circuit 8.

  The recording buffering structure control circuit 8 includes a read control unit 8A and a write address control unit 8B. In the buffer area of the recording buffer 4, the top address of the recording buffer is indicated by top_adr, and the final address is indicated by bottom_adr. The head address is stored in the register 803 in the write address control unit 8B, and the final address is stored in the register 804 in the write address control unit 8B.

  “RP” shown in the recording buffer 4 indicates a read pointer, and “WP” indicates a write pointer. A hatched portion between RP and WP in the recording buffer indicates that recording data is stored. The white portion of the recording buffer 4 indicates that recording data is not stored.

  802 in the read address control unit 8A is a register indicating a data read address (RP: read pointer). Reference numerals 805 to 812 denote registers for storing information on each color for the first to eighth colors. Here, the register 805 stores the height information of the first color data buffer and information indicating the presence or absence of the first color data. Similarly, the registers 806 to 812 also have the second color to the eighth color. Similar information is set for.

  Reference numeral 813 denotes a register for setting block width information. This width information is a value commonly used in units of blocks from the first color to the eighth color.

  The above-described block height information and width information are information included in the setting data described with reference to FIG.

  A register 815 stores an address of the next block data. This address is a value of one of the registers 805 to 812 storing information related to each color and a width of the register 813 storing width information related to the block data. It can be determined using the value. The write control unit 8B determines the write start address of the second block data to be written next and stores it in this register according to the setting information related to the first block data to be written.

  The write control unit 8B can update the write address information for the next second block data to the determined write start address before completing the writing of the image data corresponding to the first block data.

  Reference numeral 816 denotes a register for storing a data write address.

  Reference numeral 814 denotes an address control register, which manages write processing and read processing so that the write address does not overtake the read address (so as not to specify an address in which both addresses overlap).

<Storage of data in recording buffer (FIG. 8)>
FIG. 8 is a diagram for explaining how image data is stored in the recording buffer 4. FIG. 8A shows a state in which four words are stored in the vertical order as the first color data. Here, one word corresponds to 16 pixels. Assuming that the address for storing information in the register is incremented by one, the write pointer (WP) is counted as 1 → 2 → 3 → 4 → 5 →.

  For example, in the register setting of FIG. 8A, the value of the buffer height information (number of rasters) is “4”, and the value of the data presence / absence information is “1 (present)”. The value of the register 813 (block width information) is “28”.

  FIG. 8B is a diagram illustrating data writing to the recording buffer 4 when there is second color data. After all the data is stored in the storage area for the first color, the write pointer (WP) is moved to the head address of the second color as indicated by the arrow, and the data for the second color is stored. FIG. 8C shows that when there is no second color data, the third color data is stored following the storage area for the first color data. In this case, the presence / absence information of the second color data in the register 806 shown in FIG. 7 is “0 (absent)” indicating no data. Alternatively, if the height information of the buffer is “0”, it indicates that there is no data, so this information may be used. Alternatively, the result may be determined by performing a logical sum (AND process) on the data presence / absence information and the buffer height information.

  In FIG. 8D, for the second color data, e1 (WP: write pointer) indicating the writing position indicates that writing stops before e2 (RP: read pointer) indicating the reading position. This is a control for prohibiting overwriting by prohibiting data writing at a position where reading is not completed. The above control is the same for the third to eighth color regions.

  The following is a description of FIG. The left side of the figure shows the read address control unit 8A of the recording buffering structure control circuit 8, and the right side of the figure shows the recording buffer 4.

  The buffer area of the recording buffer 4 is represented by top_adr, which is the top address of the recording buffer, and the final address is represented by bottom_adr. The start address is stored in the register 803 and the final address is stored in the register 804. “RP” shown in the recording buffer is a read pointer as in FIG. 7, and “WP” is a write pointer. A hatched portion between RP and WP in the recording buffer 4 indicates that recording data is stored, and a white portion of the recording buffer indicates that recording data is not stored.

  802 in the read address control unit 8A is a register indicating a data read address (RP: read pointer). 900 surrounded by a broken line frame is a first register group, and 901 surrounded by a solid line frame is a second register. A group.

  When recording image data from the first block to the eighth block, for example, at the start of scanning, information about the first block is stored in the first register group. The second register group stores information about the second block. When the recording of the first block is completed, the information of the second register group 901 is copied to the first register group 900, and the information of the second block is stored in the first register group 900. The second register group 901 stores information on the third block. Thereafter, the processing is performed in order until the data of the last eighth block is stored. At the start of the next scan, the first block information is stored again in the first register group, and the second block information is stored in the second register group.

  When the recording of the nth block indicated by the first register group is completed, if the information of the (n + 1) th block is not stored in the second register group, the print data of the (n + 1) th block has not been prepared, so the second The register group information is not copied to the first register group, and in addition, data reading from the recording buffer is stopped.

  A register (1st_hight 1 color bit) 819 in the first register group is a register for setting the height information about the first color and the presence / absence information of the color data. Each of the registers 822, 824, 826, 828, 830, 832, and 834 is a register for setting height information and color data presence / absence information for the second to eighth colors.

  A register 820 stores width information of each block data. This width information is a value that is commonly used in units of blocks from the first color to the eighth color.

  A register (1st_color_adr) 818 is a register for storing the read address of the first color. When the data is read from the recording buffer 819 in which the first color data is stored, the address is updated. For example, as shown in FIG. 8A, data for one column of 1 → 2 → 3 → 4 is read out from the first color data. Registers 821, 823, 825, 827, 829, 831, and 833 are registers for storing read addresses of the second to eighth colors, respectively, and the color data of the second to eighth colors are also color data of the first color. Similarly, the data for one column is read in order.

  Since the data stored in the recording buffer 4 includes a plurality of color data, for example, when the color data of the first, second color,... Are mixed, the address for storing the color data of each color unit is It will not be continuous. Therefore, if there is only one read address register, it is necessary to calculate an address when reading one address of the second color recording buffer next to the address of the first color recording buffer 4, for example. By preparing a register for storing the read address for each color in the recording buffer 4, it is possible to omit the address calculation when reading in units of columns.

  Reference numeral 817 denotes an address control register. When the recording data generation block 5 requests the read address for each color via the data read request signal line S805, the address control register 817 adds the read address by one address via the signal line S806 and outputs the read address to the recording buffer 4. To do.

  A register 835 stores the address of the next block. If the block currently being read is the first block, this register stores the start address of the second block. The value of this register is copied to the register 802 when reading of the block data currently being read is completed. As a result, the next block data can be read smoothly.

  The register 836 is a table that stores information for specifying the reading order among the first to eighth colors. The order of reading data from the recording buffer can be freely set by the values set in this table. For example, the first color, the second color,..., The eighth color can be read out in this order. It is also possible to change the value and skip reading of the data of the third color and the fourth color, such as 1st color → 2nd color → 5th color → 6th color → 7th color → 8th color. . As a result, it is possible to accurately read out image data of colors that are not stored.

  The second register group 901 is a collection of buffers for storing information relating to the next block data. When each register in the first register group is read, the value set in each register in the second register group is set in the corresponding register in the first register group. For example, the value set in the register 838 is set in the register 819. Registers 839 to 845 are registers in which similar information is set for the second to eighth color data in the next block data.

  The register 838 (819) stores the buffer height information of the first color data and information indicating the presence or absence of the first color data.

  846 (820) is a register for setting block width information. This width information is a value that is commonly used in units of blocks from the first color to the eighth color.

  The register 878 can reset the same value in the first register group by setting this value to “1” when the same block size as the previously set block size is the same. In this case, the setting of the registers 838 to 846 can be omitted. When the value of the register 878 is “0”, the respective values are set in the registers 838 to 846. If the block size is the same by the register (same_type) 878, the register can be easily set.

  FIG. 11 is a diagram schematically illustrating the relationship between a recording area recorded in one scan and image data recorded in the area. FIG. 11 shows that there is no image data in the region D indicated by the arrow and the region corresponding to the eighth block. The region D is a region on the right side of the third block, all of the fourth blocks, and a region on the left side of the fifth block.

  FIG. 9A is an explanatory diagram of image data written in the recording buffer corresponding to FIG. Since there is no image data in the area corresponding to the fourth block in the area D of FIG. 11, the fourth block is not secured in the recording buffer.

  In FIG. 9A, since the data stored in the second block does not include the third color data and the fourth color data, the data of the fifth color data to the eighth color data are included. Stored. Only the first color data and the second color data are stored in the third block, and no color data after the third color is stored. The hatched portions of the second block and the third block indicate that no buffer is allocated because there is no data. Accordingly, the next address after the last address of the eighth color data in the second block is the first address of the first color data in the third block. In this way, since the image data can be packed and stored in the recording buffer, the recording buffer can be used efficiently.

  Therefore, for example, even when the recording buffer area cannot be secured by storing the recording buffer area uniformly even in the area where there is no image data, as shown in the present embodiment. By controlling the storage of the data based on the presence / absence of the color data stored in the register, the data for one scan can be stored.

<Description of recording operation>
FIG. 12 is a flowchart for explaining the flow of processing of image data and recording operation. In step S1201, the data analysis flag is checked. If the data analysis flag is set (S1201-Yes), the process proceeds to step S1202, the data analysis process is executed, and the data analysis flag is cleared. If the data analysis flag is cleared (S1201-No), step S1202 is skipped and the process proceeds to step S1203.

  In step S1203, the data development processing flag is checked. If the data expansion process flag is set (S1203-Yes), the process proceeds to step S1204, the data expansion process is executed, and the data expansion process flag is cleared. If the flag is not set (S1203-No), step S1204 is skipped.

  In step S1205, the scan flag is checked. If the scan flag is set (S1205-Yes), the process proceeds to step S1206, and the scan (recording) process is performed (S1206). If the scan process is completed, the process returns to step S1201.

  If it is determined in step S1205 that the scan flag is not set (S1205-No), the process in step S1206 is skipped and the process returns to step S1201.

  FIG. 13 is a flowchart for explaining the flow of reception buffer interrupt (INT1, INT2) processing. In step S1301, an interrupt factor is determined. If the interrupt factor is data reception, the process proceeds to step S1302, and the data analysis processing flag is set. Here, whether or not the set data analysis flag is set is determined in step S1201 in the flowchart of FIG.

  FIG. 14 is a flowchart for explaining a control flow in the data analysis process. This data analysis process is a process executed in step S1202 of FIG. First, in step S1401, received data is captured.

  Next, it is checked in step S1402 whether the received data is recording data. If the data is recording data (S1402-Yes), the process proceeds to step S1404, and write address information to the recording buffer is set (S1404). In step S1405, pack bits are not activated, and the data read into the recording buffer is expanded.

  If it is determined in step S1402 that the received data is not recording data (S1402-No), the process proceeds to step S1403 to perform command processing and data setting processing. In step S1403, information about the buffer width and the buffer height is set in the transfer buffer for colors with no data in the image data. This transfer buffer is the buffer structure information memory 11 shown in FIG.

  FIG. 15 is a flowchart for explaining the processing flow of the pack bits end interrupt (INT3). When the pack bits process is completed, the data development flag is set in step S1501 and the process ends. Whether or not the data expansion flag is set is determined in step S1203 (FIG. 12) in the flowchart of FIG.

  FIG. 16 is a flowchart for explaining the flow of data expansion processing. In step S1601, the value set in the recording block register is set in the transfer buffer. The transfer buffer is the buffer structure information memory 11 of FIG. 1, and the recording block register is a register (900, 901) set for each block shown in FIG. 10, for example.

  In step S1602, a scan start determination is performed. It is determined whether or not the development of data of a predetermined block or more is completed (for example, data for one block or one scan is finished). If the data expansion has ended (S1602-Yes), the process proceeds to step S1603, and a scan flag is set for the scan request, and the process ends (S1603).

  The process of the flowchart shown in FIG. 16 corresponds to the process of step S1204 of FIG.

  FIG. 17 is a flowchart for explaining the scan processing. In step S1701, the data stored in the transfer buffer described in step S1601 in FIG. 16 is set in the recording block register (900, 901). In step S1702, the image data set in the recording block register is scanned (recorded).

  FIG. 18 is a flowchart for explaining interrupt (INT4) processing when recording block data. This interruption process is executed if the process is completed in units of blocks during the recording operation. For example, if the data to be recorded is stored in eight blocks, eight interruption processes are executed. In the recording of the block data, the generated interrupt factor is determined (S1801). If the interrupt factor is the end of block data, the process advances to step S1802.

  On the other hand, the interrupt factor is the state where there is no block data to be recorded, that is, the record data (for example, the value of the write address pointer (RP) and the value of the read address pointer (WP) are examined, and the data must be stored in the block). If not, the process proceeds to step S1804, a print failure process is performed, and the scan is stopped (S1804). In this case, since the recording has been performed up to an intermediate block, unrecorded data is stored, scanning is performed again, and an unprinted area is recorded.

  In step S1802, it is determined whether the block whose recording has been completed is the last block. If it is the last block (S1802-Yes), the process is terminated. If it is not the last block (S1802-No), the process proceeds to step S1803, and the block data of the next image data is set in the register.

Second Embodiment
FIG. 9B illustrates a case where the memory is used more effectively than FIG. 9A in the first embodiment. In FIG. 9A, the width information in the scanning direction of each block obtained by dividing the recording area into a plurality of blocks is equal to each other. However, if there is no image data to be recorded in the block, the minimum necessary width information can be held. That's fine. Focusing on the third block and the fifth block in FIG. 11, the third block has image data only on the left side, and the fifth block has image data only on the right side. Therefore, the length of the third block and the fifth block can be made half of the width of the other blocks according to the number of image data.

  As a result, the recording buffer can be used efficiently even when the memory capacity is small. For example, even when the recording buffer cannot secure an area for storing all the data for one scan, the data for one scan can be stored.

  In this case, the host device may generate the command information and the image data so that the lengths of the blocks differ when the image data extends over a plurality of blocks and the null data continues.

  By controlling the data width information of the block unit according to the amount of image data and storing the data, the buffer area can be used effectively. In this case, the information relating to the block data length generated by the host device is received by the recording device as information included in the setting data, and the width information is set in a register (not shown) for variable setting.

  Although the embodiment according to the present invention has been described above, the gist of the present invention is not limited to the number of nozzles of the recording head being 64 per nozzle row and the number of colors used for recording being four.

  In this embodiment, the recording area is divided into eight in the main scanning direction, but the number of blocks is not limited to this number. Further, regarding the register of the recording buffering structure control circuit, as shown in FIG. 7 and FIG. 10, it is not possible to store the recording buffer height information of each color and the presence / absence information of the color data in one register. Alternatively, a register that stores only height information and a register that stores only information on whether or not there is color data may be used.

  Further, in order to set the width information of the block data described above for each block, a configuration may be adopted in which a register is provided for each color data.

  In the above embodiment, the liquid droplets ejected from the recording head have been described as ink, and the liquid stored in the ink tank has been described as ink. However, the storage is limited to ink. It is not a thing. For example, a treatment liquid discharged to the recording medium may be accommodated in the ink tank in order to improve the fixability and water resistance of the recorded image or to improve the image quality.

  The above embodiment includes means (for example, an electrothermal converter, a laser beam, etc.) that generates thermal energy as energy used for performing ink discharge, particularly in the ink jet recording system, and the ink is generated by the thermal energy. By using a system that causes a change in the state of recording, it is possible to achieve higher recording density and higher definition.

  As its typical configuration and principle, for example, those performed using the basic principle disclosed in US Pat. Nos. 4,723,129 and 4,740,796 are preferable. This method can be applied to both the so-called on-demand type and continuous type. In particular, in the case of the on-demand type, it is arranged corresponding to the sheet or liquid path holding the liquid (ink). By applying at least one drive signal corresponding to the recorded information and giving a rapid temperature rise exceeding nucleate boiling to the electrothermal transducer, the thermal energy is generated in the electrothermal transducer, and the recording head This is effective because film boiling occurs on the heat acting surface of the liquid, and as a result, bubbles in the liquid (ink) corresponding to the drive signal on a one-to-one basis can be formed.

  By the growth and contraction of the bubbles, liquid (ink) is ejected through the ejection opening to form at least one droplet. It is more preferable that the drive signal has a pulse shape, since the bubble growth and contraction is performed immediately and appropriately, and thus it is possible to achieve discharge of a liquid (ink) having particularly excellent responsiveness.

  As this pulse-shaped drive signal, those described in US Pat. Nos. 4,463,359 and 4,345,262 are suitable. Further excellent recording can be performed by employing the conditions described in US Pat. No. 4,313,124 of the invention relating to the temperature rise rate of the heat acting surface.

  As the configuration of the recording head, in addition to the combination configuration (straight liquid flow path or right-angle liquid flow path) of the discharge port, the liquid path, and the electrothermal transducer as disclosed in each of the above-mentioned specifications, the heat acting surface The configurations described in US Pat. No. 4,558,333 and US Pat. No. 4,459,600, which disclose a configuration in which is arranged in a bending region, are also included in the present invention. In addition, Japanese Patent Application Laid-Open No. 59-123670, which discloses a configuration in which a common slot is used as a discharge portion of an electrothermal transducer, or an opening that absorbs a pressure wave of thermal energy is discharged to a plurality of electrothermal transducers. A configuration based on Japanese Patent Laid-Open No. 59-138461 disclosing a configuration corresponding to each part may be adopted.

  Furthermore, as a full-line type recording head having a length corresponding to the width of the maximum recording medium that can be recorded by the recording apparatus, the length is satisfied by a combination of a plurality of recording heads as disclosed in the above specification. Either a configuration or a configuration as a single recording head formed integrally may be used.

  In addition to the cartridge-type recording head in which the ink tank is integrally provided in the recording head itself described in the above embodiment, it can be electrically connected to the apparatus body by being attached to the apparatus body. A replaceable chip type recording head that can supply ink from the apparatus main body may be used.

  In addition, it is preferable to add recovery means for the recording head, preliminary means, etc. to the configuration of the recording apparatus described above, since the recording operation can be further stabilized. Specific examples thereof include a capping unit for the recording head, a cleaning unit, a pressure or suction unit, an electrothermal converter, a heating element different from this, or a preheating unit using a combination thereof. In addition, it is effective to provide a preliminary ejection mode for performing ejection different from recording in order to perform stable recording.

  Further, the recording mode of the recording apparatus is not limited to the recording mode of only the mainstream color such as black, but the recording head may be integrated or may be a combination of a plurality of colors. An apparatus having at least one of full colors can also be provided.

  In the embodiment described above, the description is made on the assumption that the ink is a liquid, but it may be an ink that is solidified at room temperature or lower, or an ink that is softened or liquefied at room temperature, Alternatively, the ink jet method generally controls the temperature of the ink so that the viscosity of the ink is within a stable discharge range by adjusting the temperature within a range of 30 ° C. or higher and 70 ° C. or lower. It is sufficient if the ink sometimes forms a liquid.

  In addition, it is solidified in a stand-by state in order to actively prevent temperature rise by heat energy as energy for changing the state of ink from the solid state to the liquid state, or to prevent ink evaporation. Ink that is liquefied by heating may be used. In any case, by applying heat energy according to the application of thermal energy according to the recording signal, the ink is liquefied and liquid ink is ejected, or when it reaches the recording medium, it already starts to solidify. The present invention can also be applied to the case of using ink having the property of being liquefied for the first time.

  In such a case, the ink is held as a liquid or solid in a porous sheet recess or through-hole as described in JP-A-54-56847 or JP-A-60-71260, It is good also as a form which opposes with respect to an electrothermal converter. In the present invention, the most effective one for each of the above-described inks is to execute the above-described film boiling method.

  In addition, as a form of the recording apparatus according to the present invention, a copying apparatus combined with a reader or the like, and a transmission / reception function are provided as an image output terminal of an information processing apparatus such as a computer or the like. It may take the form of a facsimile machine.

FIG. 3 is a block diagram showing a recording control unit of the recording apparatus in the embodiment of the recording apparatus according to the present invention. It is a figure which shows the data structure at the time of storing the data transferred from a host computer in a receiving buffer. It is a figure which shows the data structure of the recording buffer which hold | maintains image data. 2 is a block diagram showing the inside of an interface controller 1. FIG. 7 is a block diagram showing details of a reception buffering structure control circuit unit 7. FIG. It is explanatory drawing of the operation timing of a reception buffering structure control circuit. It is a figure explaining a recording buffering structure control circuit. It is a figure explaining how image data is stored in the recording buffer. It is a figure explaining the structure of the image data stored in a recording buffer. It is a figure explaining a recording buffering structure control circuit. It is a figure explaining the relationship between the recording area recorded by one scan, and the image data of the area. It is a flowchart explaining the flow of processing of image data and recording operation. It is a flowchart explaining the flow of a reception buffer interrupt (INT1, INT2) process. It is a flowchart explaining the control flow in a data analysis process. It is a flowchart explaining the flow of a process of pack bits end interruption (INT3). It is a flowchart explaining the flow of a data expansion process. It is a flowchart explaining a scanning process. It is a flowchart explaining the interruption (INT4) process at the time of recording block data. 1 is a diagram illustrating an appearance of a printer that is a preferred embodiment of the present invention. FIG. It is a figure which shows the inkjet cartridge of the printer of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Interface controller 2 Reception buffer 3 Data expansion block 4 Recording buffer 5 Recording data generation block 6 Recording head 7 Reception buffering structure control circuit 8 Recording buffering structure control circuit 8A Read address control part 8B Write address control part 9 CPU
DESCRIPTION OF SYMBOLS 10 Carriage encoder 11 Buffer structure information memory 900 1st register group 901 2nd register group RP Read pointer WP Write pointer

Claims (20)

In order to perform recording by causing a carriage mounted with a recording head to scan on a recording medium, an area recorded by one scan of the recording head is divided into a plurality of areas in the scanning direction , and the divided areas correspond to the divided areas . the memory area where the image data is read and written that a recording apparatus having a plurality with buffer,
An input unit for inputting data in block units from the outside;
A decompression processing unit for performing decompression processing of block-unit data input by the input means;
The decompressed data by the decompression processing unit, for storage in the buffer as the image data of the divided area units, a write controller for controlling write address information of the image data of the area units for each color,
A read control section for controlling reading address information for reading the image data stored in the buffer for each color,
Based on the read address information, according to the read image data, a recording data generation unit that generates recording data for the divided area units;
A recording apparatus comprising: The recording apparatus according to claim 1, wherein the image data for each divided area includes data corresponding to cyan, yellow, magenta, and black. The recording apparatus according to claim 1, wherein the writing control unit circulates and stores the image data between areas set by the first address information and the last address information of the buffer . The write control unit, when the write address information coincides with the read address information, executes control for prohibiting setting of an address overlapping with the image data stored in the buffer. Item 4. The recording device according to any one of Items 1 to 3. The recording apparatus according to claim 1, wherein the size of the buffer is determined according to the number of nozzles that the recording head records in the next main scan and the divided width information of the recording area. 4. The write control unit according to claim 1, wherein the write control unit controls address information to be stored in the buffer in accordance with presence / absence of the color data included in the image data. Recording device. The write control unit includes a first register that stores setting information including information for identifying the presence / absence of data included in the image data and the number of rasters of the data for each color data;
A second register for storing width information of the image data;
Second block data to be written next, which is determined based on setting information related to the first block data to be written stored in the first register and width information of image data stored in the second register. A third register for storing the write start address of
The write controller updates the write address information for the second block data to the determined write start address before completing the writing of the image data corresponding to the first block data. 4. The recording apparatus according to any one of items 3. The read control unit includes a fourth register that stores setting information including information for identifying the presence or absence of data included in the image data and the number of rasters of the data for each color data;
A fifth register for storing width information of the image data;
A sixth register for storing a read start address determined based on setting information stored in the fourth register and width information of image data stored in the fifth register;
A seventh register for determining a read start address for the next block data before storing the image data in accordance with the read address stored in the sixth register, and storing the data;
The recording apparatus according to claim 1, further comprising: The read control unit further includes a read color table register that stores information for designating the order of reading for each color, and controls reading from the buffer in order based on the information for designating the order of reading for each color. The recording apparatus according to claim 1, wherein the recording apparatus is a recording apparatus. 4. The recording apparatus according to claim 1, wherein when the read address information designates a final address of the buffer, the read control unit designates a first address of the buffer. 5. 2. The recording apparatus according to claim 1, wherein when the write address information designates a final address of the buffer, the write control unit performs control so as to designate an initial address of the buffer. The recording apparatus according to claim 1, wherein the number of data that can be stored in the buffer is the number of data in a recording area smaller than a recording area for one scan. The recording apparatus according to claim 1, wherein the writing control unit controls storage of the divided area-unit image data in accordance with the management of the management unit in the order input by the input unit. 2. The recording apparatus according to claim 1, wherein the write controller updates the address by one each time a write request signal is input from the decompression processor and uses the address as write address information. . 2. The recording apparatus according to claim 1, wherein the data stored in one address of the buffer is data in a column format. The recording apparatus according to claim 1, further comprising a control unit that communicates with the input unit, the decompression processing unit, and the writing control unit and controls a recording operation using the recording head. The recording apparatus according to claim 16, wherein the decompression processing unit notifies the control unit every time decompression of the data in units of blocks is completed. The recording apparatus according to claim 17, wherein the control unit starts scanning of the recording head when it is determined that a predetermined number of decompression of the block-unit data has been completed. The recording apparatus according to claim 1, wherein the recording head is an ink jet recording head that performs recording by discharging ink. In order to perform recording by causing a carriage mounted with a recording head to scan on a recording medium, an area recorded by one scan of the recording head is divided into a plurality of areas in the scanning direction , and the divided areas correspond to the divided areas . A method for controlling a recording apparatus having a buffer having a plurality of memory areas from which image data is read and written ,
An input process for inputting block unit data from the outside,
A decompression processing step for performing decompression processing of block-unit data input in the input step;
A write control step for controlling the write address information of the image data for each area for each color in order to store the data decompressed in the decompression process step as image data corresponding to the divided areas in the buffer; ,
A read control step for controlling read address information for reading image data stored in the buffer for each color;
Based on the read address information, in accordance with the read image data, a recording data generation step of generating the divided area unit recording data;
A control method for a recording apparatus comprising:

Images