JP3959425B2 - Receiving device and display device - Google Patents

Description

The present invention relates to a video compression / enlargement apparatus capable of displaying video on a screen without a sense of incongruity.

High-definition television test broadcasting began in 1991, with a screen aspect ratio of 16
: 9 receivers are also starting to spread for household use. Screen aspect ratio is 1
It is an important point for the 6: 9 receiver to be consistent with the conventional broadcast, and how to convert the aspect ratio of the conventional broadcast to 16: 9 is a major issue. Furthermore, there are many movie sizes that exist in recent package software, that is,
A so-called letterbox image (with various aspect ratios) is displayed on a display device with a screen aspect ratio of 16: 9, with black bands at the top and bottom of the image and an overall aspect ratio of 4: 3. In this case, since an aspect ratio close to 16: 9 can be obtained by enlarging in the vertical direction, enlargement in the vertical direction is also an essential technique.

For example, in JP-A-1-194784, a video is compressed in the horizontal direction by changing the writing frequency and the reading frequency of the line memory, and the aspect ratio is 4: 3 in a screen having an aspect ratio of 16: 9. There is disclosed a method that uses both a method of fitting an image and a method of expanding an image in the vertical direction by changing the output amplitude of a deflection circuit and cutting and displaying a part of the upper and lower images.

Japanese Patent Laid-Open No. 3-11891 discloses a technique for performing vertical enlargement of an image by digital signal processing. FIG. 2 shows a configuration in the already proposed example in which scanning lines are interpolated by digital signal processing to enlarge an image in the vertical direction.

In FIG. 2, 201 and 202 are input terminals and output terminals for digitized video signals, 203 is a memory having a capacity of at least about 120 lines, 204 is a one-line memory, and 205 and 206 multiply input signals by a coefficient. ROM table, 20
7 is an adder, 208 is a control signal input terminal of the memory 203, and 209 is a ROM 20.
This is an input terminal for a control signal for switching the table of 5,206.

In this proposed example, the memory 203 is controlled to read the same line again at a predetermined line period in accordance with a control signal from the input terminal 208. As a result of delaying the one-line video signal by the one-line memory 204, the ROM 205, 2
The upper and lower two scanning line signals are supplied to 06, multiplied by the coefficient in the ROM table selected by the control signal from the input terminal 209, and a signal having the correct scanning line centroid can be obtained from the adder 207. it can.

The enlarged image obtained in this way is not changed in the scanning signal interval as compared with the case where the scanning signal is enlarged by changing the output amplitude of the deflection circuit. High quality images can be obtained.

As described above, various ideas have been made to display an image having an aspect ratio of 4: 3 on a screen having an aspect ratio of 16: 9.

Japanese Patent Laid-Open No. 1-194484 Japanese Patent Laid-Open No. 3-11891

The above-mentioned two already proposed examples are excellent as methods for displaying an image having an aspect ratio of 4: 3 on a screen having an aspect ratio of 16: 9. However, some of the letterbox images of movie software often found in recent package software have various aspect ratios, which are optimal for display devices with a screen aspect ratio of 16: 9. It has become difficult to adapt to the size.

Further, with regard to a method for compressing and displaying a video having an aspect ratio of 4: 3 that occupies the majority, there is a possibility that the screen may be burned, particularly in a projection type display device.

An object of the present invention is to provide a receiving apparatus for displaying video on a screen without a sense of incongruity.

In order to solve the above-described problem, for example, a receiving device that inputs a video signal and outputs the video signal to a display unit, where the video signal is input and the video signal input to the input unit is displayed and data reference type enlargement ratio determining means for determining the using magnification look-up table corresponding to the display position of, using the expansion factor determining means, vertical and / or horizontal direction of the input video signal the manner by expanding the video continuous, and means for controlling the video signal to match the video signal to a predetermined aspect ratio of the display unit may be configured to include.

As described above, according to the present invention, it is possible to provide a receiving device for displaying video on a screen without a sense of incongruity.

  The best embodiment of the present invention will be described below. The same number / symbol means the same configuration.

An embodiment of the present invention is shown in FIG. In FIG. 1, 101 is an input terminal for a digitized video signal, 102 is an output terminal for a video signal, 103 is a field memory,
104 is a vertical interpolation enlargement circuit, 105 is a one-line memory, 106 is a vertical interpolation circuit,
107 is a horizontal interpolation enlargement circuit, 108 is a pixel delay circuit, 109 is a horizontal interpolation circuit,
10 is a vertical enlargement control circuit, 111 is a memory control circuit, 112 is a vertical interpolation coefficient generation circuit, 113 is a horizontal enlargement control circuit, 114 is an image delay control circuit, 115 is a horizontal interpolation coefficient generation circuit, and 116 is a first delay circuit. Reference numeral 117 denotes a second delay circuit, 118 denotes a write clock input terminal, 119 denotes a read clock generation circuit, 120 denotes an input terminal for a vertical enlargement ratio setting value, 121 denotes an input terminal for a horizontal enlargement ratio setting value, and 122 denotes a memory This is a control signal synthesis circuit.

In FIG. 1, the video signal input from the input terminal 101 is managed for each line by the write clock from the input terminal 118, and sequentially the field memory 1.
03 is written. The clock generation circuit 119 generates a read clock having a frequency about 4/3 times the input write clock and supplies it to the field memory 103 through the synthesis circuit 122. Accordingly, a video signal obtained by compressing the video in the horizontal direction is read from the field memory 103. The vertical enlargement control circuit 110 performs control via the synthesis circuit 122 so as to read the video signal from the field memory 103 at a line cycle corresponding to the enlargement ratio. Further, the writing of the one-line memory 105 included in the vertical enlargement circuit 104 is stopped at the same cycle, and the line delay output of the output signal of the field memory 103 is obtained. This is shown in FIG.

FIG. 3 is an explanatory diagram showing the state of the scanning line when it is enlarged 4/3 times in the vertical direction. (B) is an output signal of the field memory 103, and the same scanning line is repeatedly read at the timing of the line reset (a) by the memory control circuit 111. (
c) is a write inhibition control signal for the one-line memory 105, and writing is stopped one line before the line reset (a), and an output signal (d) for the one-line memory 105 is obtained. As a result, the vertical interpolation circuit 106 is supplied with signals from the upper and lower scanning lines. That is, (b) and (d) are always signals of adjacent scanning lines.

In the vertical interpolation circuit 106, a scanning line signal is generated by interpolation calculation (e) in accordance with the control signal from the vertical enlargement control circuit 110.

FIG. 4 shows the configuration of the vertical enlargement control circuit 110. In FIG. 4, 120 is an input terminal for an enlargement set value determined according to the enlargement ratio, 402 is an output terminal for an interpolation coefficient, 4
03 is an output terminal for a memory control signal, 404 is an input terminal for a pulse of one line period,
Reference numeral 405 denotes an adder for adding the interpolation coefficient and the enlarged set value input from the input terminal 120; 406, an output signal latch circuit of the adder 405; and 407, a carry signal latch circuit of the adder 405.

In this configuration example, the accuracy of the output interpolation coefficient is 8 bits. The enlargement set value and the fed back interpolation coefficient are repeatedly added by the adder 405 in accordance with the pulse input from the input terminal 404, whereby new interpolation coefficients in each line are sequentially obtained. At this time, the carry signal of the adder 405 becomes a memory control signal for repeatedly reading the same line in the field memory 103. In the case of an 8-bit system, the relationship between the set value x of the enlargement ratio and the actual enlargement ratio z is
It can be expressed by the following formula.

(Equation 1)
z = 256 / (256-x)
As can be seen from the above equation, an arbitrary enlargement ratio can be obtained theoretically by increasing the bit precision.

On the other hand, the scanning line obtained by the vertical interpolation circuit 106 has a center of gravity at the position (g) with respect to the input video signal (video signal input from the input terminal 101) shown in FIG. . By displaying this at the position (h) of the actual scanning line, a video signal in which the video is enlarged in the vertical direction can be obtained.

The horizontal expansion can be performed with the same configuration as the vertical expansion. The delay control signal generated by the horizontal enlargement control circuit 113 is supplied to the field memory 103 through the synthesis circuit 122. In the field memory 103, in accordance with the delay control signal, the same pixel is read again with a period corresponding to the magnification, and a video signal in which the video is expanded in the horizontal direction is obtained. Further, the horizontal enlargement circuit 107 performs horizontal interpolation according to the control signal from the horizontal enlargement control circuit 113 to obtain an image signal in which the image is expanded in the horizontal direction and has a uniform center of gravity. The delay circuits 116 and 117 are
It is inserted for controlling the field memory 103 and adjusting the delay time between the pixel delay circuit 108 and the horizontal interpolation circuit 109.

As described above, in this embodiment, by using the field memory 103, the one-line memory 105, and the like, an image having an aspect ratio of 4: 3 is converted to an aspect ratio of 16: 9.
In order to display the image on the screen, the image is temporarily compressed in the horizontal direction, and at the same time, the image can be enlarged to an arbitrary size in the vertical direction and the horizontal direction with a simple circuit configuration. For example, Hitachi field memory HM530281 is used as the field memory.
By using, the same line can be read repeatedly using the line reset function, and the control becomes simple.

FIG. 5 shows another embodiment of the present invention. In FIG. 5, 501 is a delay circuit for delaying the control signal of the field memory 103, 502 is a delay circuit for the interpolation coefficient,
Other components are the same as those in the embodiment of FIG. In this embodiment, the horizontal enlargement circuit 10
1 is different from the embodiment of FIG. 1 in that the vertical enlargement circuit 104 performs the vertical enlargement after the horizontal enlargement in FIG. The operation of the circuit is the same as in the embodiment of FIG.

In this embodiment, the delay amounts of the delay circuits 116 and 117 are extremely small compared to the embodiment of FIG. 1, and the circuit scale can be reduced. Since the delay circuits 501 and 502 are controlled on a line-by-line basis, there is almost no need to delay by considering the control signal generation timing of the vertical enlargement control circuit 110. That is, by adopting the configuration of the present embodiment, it is possible to provide a circuit that can be arbitrarily compressed and expanded with a smaller circuit scale.

FIG. 6 shows another embodiment of the present invention. In FIG. 6, reference numeral 601 denotes a second horizontal enlargement control circuit having the same configuration as that of the horizontal enlargement control circuit 113, and the others are the same as those in the embodiment of FIG. This embodiment is different from the embodiment of FIG. 1 in that a second horizontal enlargement control circuit 601 having the same function is provided in addition to the horizontal enlargement control circuit 113.
The operation of the circuit is the same as in the embodiment of FIG.

The first horizontal enlargement control circuit 113 controls the field memory 103 according to the enlargement setting value given from the input terminal 121 to obtain a video signal in which the video is enlarged in the horizontal direction. The second horizontal enlargement control circuit 601 receives the field memory 103 and the horizontal interpolation enlargement circuit 10 in response to the reset timing of the first horizontal enlargement control circuit 113.
7 is supplied with a delay control signal for controlling the pixel delay circuit 108 in the horizontal interpolation enlargement circuit 107 and a coefficient value for controlling the horizontal interpolation circuit 109. As a result, the delay circuits 116 and 117 required in the embodiment of FIG. 1 are unnecessary. Accordingly, the delay circuits 116 and 11 in FIG.
7 and the second horizontal enlargement control circuit 601 shown in FIG. 6 can be used to configure an optimum circuit by selecting an embodiment having a smaller circuit scale.

In the above-described embodiment, the entire image can be compressed and enlarged to an arbitrary size both in the vertical and horizontal directions by the vertical enlargement control circuit 110 and the horizontal enlargement control circuit 113. This is because when a horizontally long image such as a letterbox type movie is projected on a display device having a screen with an aspect ratio of 16: 9 among the images based on the current format video signal, the black band portion with no signal is reduced. There was a big effect in doing. However, in an image with a normal aspect ratio of 4: 3, there is a large part that is out of the screen due to enlargement and becomes invisible. Furthermore, even in letterbox images, depending on the size, when enlarged, the left and right images become invisible by adjusting the top and bottom sizes, or black bands remain at the top and bottom by adjusting the left and right sizes. Sometimes gave a sense of incongruity. In addition, it has been pointed out that the black belt part causes screen burn-in.

    An embodiment that solves such problems will be described with reference to FIG. In other words, this embodiment is an improvement of the vertical enlargement control circuit 110 and the horizontal enlargement control circuit 113 in the above-described embodiment, and FIG. 7 is a block diagram showing the configuration of the vertical enlargement control circuit 110.

In FIG. 7, reference numeral 701 denotes a vertical counter for counting the number of lines on the screen, 702
Is a numerical value converter for converting the value of the vertical counter 701 according to a certain function, and the others are the same as the configuration example of FIG. According to this embodiment, the input terminal 1 shown in the configuration example of FIG.
Since the setting value of the enlargement ratio from 20 can be freely converted according to the setting of the numerical converter 702 depending on the position of the screen, an arbitrary position in the video can be enlarged at an arbitrary magnification. The numerical value converter 702 can be configured with a logic circuit as long as it is a simple function. For complex functions, a look-up table method using a ROM or the like may be employed. An example of use of this embodiment is shown in FIG.

FIG. 8A shows an image obtained by compressing an image based on the current image signal in the horizontal direction and displaying it on a screen having an aspect ratio of 16: 9. This video is of a horizontally long letterbox type, and its aspect ratio is assumed to be about 2: 1, and the overall aspect ratio (video and black belt portion) before compression is 4: 3. . (B
) Is an enlargement of (a) 4/3 times in both the vertical and horizontal directions. 16: 9
In this screen, the horizontal size of the video is almost the same. However, as described above, in this case, a portion of the black band remains on the top and bottom, resulting in a screen that gives a sense of discomfort.

(C) shows a function in the numerical value converter 702 shown in FIG. The vertical axis represents the value of the vertical counter 701, and the horizontal axis represents the enlargement ratio. This function gives an enlargement factor of 4/3 near the center of the screen, increases the enlargement factor at the top and bottom edges of the screen, and makes the average enlargement factor in the vertical direction 3/2. Such a function is converted into a numeric converter 7
By defining in 02, it is possible to provide an image that has no black band and has an aspect ratio of 16: 9 as shown in (d). At this time, since the horizontal and vertical enlargement ratios match in the center of the screen, the correct roundness is displayed, and the roundness is changing only at the edge of the screen. Therefore, there is almost no sense of incongruity as a video.

On the other hand, (e) shows a case where the image is enlarged 3/2 times in both the vertical direction and the horizontal direction, and the size in the vertical direction coincides with a screen having an aspect ratio of 16: 9. It will occur. In this case, the concept of the numerical value converter 702 described above with respect to the horizontal enlargement control circuit 113 is introduced. The input signal of the numerical value converter 702 becomes a count value of a horizontal counter (not shown), and a function for determining the enlargement ratio is selected such that the enlargement ratio is small at both ends in the horizontal direction of the screen as shown in (f). At this time, if the average magnification in the horizontal direction is set to be 4/3 times, as shown in (g), it is possible to fit all the images on a screen with an aspect ratio of 16: 9. In this case as well, as in (d), the image is distorted only at both ends in the horizontal direction, and the image has almost no sense of incongruity.

In this way, in this embodiment, by introducing the numerical value converter 702 shown in FIG. 7 and combining it with a circuit capable of expanding the image as shown in FIG. 1 to an arbitrary size,
Since the video can be partially compressed and enlarged, it is possible to display a video with an aspect ratio of 4: 3 and a letterbox video on a screen with an aspect ratio of 16: 9 without any discomfort.

FIG. 9 shows still another embodiment of the present invention. In FIG. 9, reference numeral 901 denotes a video signal input terminal, 902 a display having a screen with an aspect ratio of 4: 3, and 903
Is a video processing circuit for performing signal processing such as Y / C separation on the input video signal and supplying it to the display 902, 904 is a synchronization processing circuit for extracting a synchronization signal from the video signal, 9
05 is a mode setting circuit for setting an expansion compression ratio of the video signal. 906 is a vertical deflection for outputting a vertical deflection current for driving the display 902 in accordance with a mode designated by the mode setting circuit 905 from the output signal of the synchronization processing circuit 904. A circuit 907 is a horizontal deflection circuit that outputs a horizontal deflection current for driving the display 902 in accordance with a mode specified by the mode setting circuit 905 from an output signal of the synchronization processing circuit 904, and 908 and 909 are a vertical deflection circuit 906 and a horizontal deflection. First and second deflection current correction circuits 910 for correcting the deflection current output of the circuit 907 are high voltage generation circuits.

This embodiment is different from the above-described embodiment in that partial compression and enlargement of an image are performed by a deflection circuit and a deflection current correction circuit. The vertical deflection circuit 906 generates a vertical sawtooth wave that drives the display 902 in accordance with the vertical pulse from the synchronization processing circuit 904. Similarly, the horizontal deflection circuit 907 generates a horizontal sawtooth wave that drives the display 902 in accordance with the horizontal pulse from the synchronization processing circuit 904. At this time, the vertical deflection circuit 906 and the horizontal deflection circuit 907 change the slope and phase of the generated sawtooth wave according to the mode set by the mode setting circuit 905, respectively. Therefore, the image is enlarged as a whole in the vertical and horizontal directions.

On the other hand, the first deflection current correction circuit 908 corrects the vertical deflection circuit 906, and the second deflection current correction circuit 909 corrects the horizontal deflection circuit 907, respectively, to give partial distortion to the sawtooth wave. As a result of this correction, the inclination of the sawtooth wave partially changes, and the video image has a different expansion / compression rate for each screen location.

This embodiment is particularly effective when displaying a letterbox video on a screen having an aspect ratio of 4: 3. An example of use of this embodiment is shown in FIG.

FIG. 10A shows a letterbox format image displayed on a screen having an aspect ratio of 4: 3. Letterbox video is a method that can be adopted in the second generation EDTV system and is expected to spread in the future. In the second-generation EDTV, high-definition information is inserted in the upper and lower non-picture portions, so that it seems that some unnaturalness remains on a screen with an aspect ratio of 4: 3. (B) is a device in which a vertical deflection circuit 906 and a horizontal deflection circuit 907 are used to enlarge the entire image in the vertical and horizontal directions to reduce the area of the non-image area. However, the problem remains because there are portions that cannot be seen at both the left and right ends. (C) The second deflection current correction circuit 909 is used to compress the image by reducing the slope of the horizontal sawtooth wave at both left and right ends, and the first deflection current correction circuit 908 is used to compress the vertical sawtooth wave. The image is enlarged by increasing the inclination of the image at both the upper and lower ends. Therefore, almost all necessary images can be displayed. (D) shows the distortion which arises in the displayed image | video when the display method of (c) is taken. The central part (a) has no distortion, and the distortion becomes the largest at the four corners (D), which hardly causes a problem.

The system of this embodiment is also effective when displaying on a screen with an aspect ratio of 16: 9 shown in FIG. Further, it is relatively simple as compared with the above-described variable compression ratio method using digital processing, and is particularly effective for an analog display device.

    As described above, according to the above-described embodiment, for example, when an image having an aspect ratio of 4: 3 is displayed on a screen having an aspect ratio of 16: 9, the entire image can be reduced and enlarged to an arbitrary size. Therefore, it is possible to obtain an image that matches the aspect ratio of the screen and display the image on the screen without a sense of incongruity.

In addition, since the video can be partially reduced or enlarged, problems such as partial loss of the video or black band remaining due to the enlargement of the entire video can be solved.
Video that matches the aspect ratio of the screen can be obtained. As a result, it is possible to prevent burn-in. In either case, it can be realized with a small circuit scale.

It is a block diagram which shows one Example of this invention. It is a block diagram which shows the structure in a prior proposal example. FIG. 2 is an explanatory diagram for explaining the operation contents and the principle of video enlargement in the circuit of FIG. 1. FIG. 2 is a block diagram illustrating a configuration of a vertical enlargement control circuit in FIG. 1. It is a block diagram which shows the other Example of this invention. It is a block diagram which shows another Example of this invention. It is a block diagram which shows the structure of the vertical expansion control circuit in the further another Example of this invention. It is explanatory drawing which shows the usage example of the Example of FIG. It is a block diagram which shows another Example of this invention. It is explanatory drawing which shows the usage example of the Example of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 103 ... Field memory, 104 ... Vertical interpolation expansion circuit, 105 ... 1 line memory, 106 ... Vertical interpolation circuit, 107 ... Horizontal interpolation expansion circuit, 108 ... Pixel delay circuit, 109 ... Horizontal interpolation circuit, 110 ... Vertical expansion control circuit, DESCRIPTION OF SYMBOLS 111 ... Memory control circuit, 112 ... Vertical interpolation coefficient generation circuit, 113 ... Horizontal expansion control circuit, 114 ... Pixel delay control circuit, 115 ... Horizontal interpolation coefficient generation circuit, 116, 117 ... Delay circuit, 1
20... Input terminal for the vertical magnification setting value 121... Input terminal for the horizontal magnification setting value 1
22 ... Memory control signal synthesis circuit, 402 ... Interpolation coefficient output terminal, 403 ... Memory control signal output terminal, 405 ... Adder, 406, 408 ... Latch circuit, 501
, 502 ... Delay circuit, 601 ... Horizontal enlargement control circuit, 701 ... Counter, 702 ...
Numerical value converter, 903... Video signal processing circuit, 904... Synchronization processing circuit, 905... Mode setting circuit, 906 .. vertical deflection circuit, 907 ... horizontal deflection circuit, 908, 909.
Deflection current correction circuit, 910... High voltage circuit.

Claims (3)

A receiving device for inputting a video signal and outputting it to a display unit,
An input means for inputting a video signal;
A data reference type enlargement ratio determining means for determining using an enlargement ratio lookup table corresponding to a display position when the video signal input to the input means is displayed;
Using the expansion factor determining unit, by expanding the continuous image in the vertical direction and / or horizontal direction of the input video signal, so as to match the video signal to a predetermined aspect ratio of the display unit And a means for controlling the video signal. The receiving device according to claim 1,
The enlargement ratio determining means is configured to change enough magnification goes to aesthetic of the display screen displayed on the display unit is greater than near the center of the display screen, in the conversion process, the display screen receiving device, characterized in that said magnification is configured to be continuously changes as the go end. The receiving device according to any one of claims 1 and 2,
A display device comprising a display screen for displaying a signal output from the receiving device.

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