JP3954389B2 - チェックサム構築システム - Google Patents

チェックサム構築システム Download PDF

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Publication number
JP3954389B2
JP3954389B2 JP2002003154A JP2002003154A JP3954389B2 JP 3954389 B2 JP3954389 B2 JP 3954389B2 JP 2002003154 A JP2002003154 A JP 2002003154A JP 2002003154 A JP2002003154 A JP 2002003154A JP 3954389 B2 JP3954389 B2 JP 3954389B2
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JP
Japan
Prior art keywords
checksum
memory
location
data value
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2002003154A
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English (en)
Japanese (ja)
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JP2002251330A5 (cg-RX-API-DMAC7.html
JP2002251330A (ja
Inventor
ブライアン・ホーナング
グレゴリー・エス・パーマー
ポール・エフ・ヴォーゲル
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
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Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JP2002251330A publication Critical patent/JP2002251330A/ja
Publication of JP2002251330A5 publication Critical patent/JP2002251330A5/ja
Application granted granted Critical
Publication of JP3954389B2 publication Critical patent/JP3954389B2/ja
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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)
JP2002003154A 2001-01-31 2002-01-10 チェックサム構築システム Expired - Fee Related JP3954389B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/773,124 2001-01-31
US09/773,124 US6665830B2 (en) 2001-01-31 2001-01-31 System and method for building a checksum

Publications (3)

Publication Number Publication Date
JP2002251330A JP2002251330A (ja) 2002-09-06
JP2002251330A5 JP2002251330A5 (cg-RX-API-DMAC7.html) 2005-06-16
JP3954389B2 true JP3954389B2 (ja) 2007-08-08

Family

ID=25097276

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002003154A Expired - Fee Related JP3954389B2 (ja) 2001-01-31 2002-01-10 チェックサム構築システム

Country Status (2)

Country Link
US (1) US6665830B2 (cg-RX-API-DMAC7.html)
JP (1) JP3954389B2 (cg-RX-API-DMAC7.html)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4015807B2 (ja) * 2000-11-28 2007-11-28 Ｎｅｃエレクトロニクス株式会社 タイミングドリブンレイアウト手法
US20050111381A1 (en) * 2003-11-26 2005-05-26 Debargha Mukherjee Method and apparatus for updating offset fields
JP2007072847A (ja) * 2005-09-08 2007-03-22 Nec Corp 情報処理システムとセパレート隠蔽装置及びセパレート制御方法並びにプログラム
JP4240496B2 (ja) * 2005-10-04 2009-03-18 インターナショナル・ビジネス・マシーンズ・コーポレーション アクセス制御のための装置および方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59157887A (ja) 1983-02-28 1984-09-07 Hitachi Ltd 情報処理装置
US5230045A (en) 1986-11-12 1993-07-20 Xerox Corporation Multiple address space system including address translator for receiving virtual addresses from bus and providing real addresses on the bus
US4849978A (en) 1987-07-02 1989-07-18 International Business Machines Corporation Memory unit backup using checksum
US5130992A (en) * 1990-04-16 1992-07-14 International Business Machines Corporaiton File-based redundant parity protection in a parallel computing system
US5208813A (en) * 1990-10-23 1993-05-04 Array Technology Corporation On-line reconstruction of a failed redundant array system
US5446691A (en) 1994-03-15 1995-08-29 Shablamm! Computer Inc. Interleave technique for accessing digital memory
JPH0887424A (ja) * 1994-09-16 1996-04-02 Toshiba Corp 電子計算機
JPH08286844A (ja) * 1995-04-13 1996-11-01 Hitachi Ltd パリティ生成制御方法およびディスク制御装置
US5761695A (en) 1995-09-19 1998-06-02 Hitachi, Ltd. Cache memory control method and apparatus, and method and apparatus for controlling memory capable of interleave control
US5835954A (en) 1996-09-12 1998-11-10 International Business Machines Corporation Target DASD controlled data migration move
JP2000010738A (ja) * 1998-06-17 2000-01-14 Toshiba Corp ディスクアレイシステム、同システムに適用される記憶容量拡張方法および記録媒体
US6397365B1 (en) * 1999-05-18 2002-05-28 Hewlett-Packard Company Memory error correction using redundant sliced memory and standard ECC mechanisms
US6490668B2 (en) * 2000-12-15 2002-12-03 Hewlett-Packard Company System and method for dynamically moving checksums to different memory locations

Also Published As

Publication number Publication date
US6665830B2 (en) 2003-12-16
US20020104056A1 (en) 2002-08-01
JP2002251330A (ja) 2002-09-06

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