JP3939426B2 - Pressure embedding method for copper wiring film - Google Patents

Description

【００１４】
【表２】

【００１５】
表１および表２は、配線膜材料にＣｕもしくはＣｕ系の合金を用いて、直径２００ｍｍのＳｉウェーハ上に形成されたコンタクトホール（孔、穴）もしくはコンタクトホールが底部に形成された配線溝にスパッタリング法により配線膜を形成した後、高圧ガス圧力を利用した加圧埋込処理を行うことにより配線膜を製造する実験を行った結果を示したものである。
表１中Ａ．Ｒ．（Ａｓｐｅｃｔ Ｒａｔｉｏ）はコンタクトホールの深さと穴径の比を示す。また、表２で埋込結果の欄に示した記号は、◎がコンタクトホールが完全に配線膜材料で埋め込まれて気孔が残存していなかったことを、×は気孔が残存していたことを、また、△は気孔は残存していないが、下地のＴｉＮ層が剥離したなど完全ではないことを示す。
【００１６】
成膜にはスパッタリング装置を用い、ターゲットと基板との距離は、３８ｍｍ、８０ｍｍ、３８０ｍｍの３種類を用いた。配線膜材料としては、高純度の純銅（膜で９９．９９％）、Ｃｕ−Ｓｉ合金系、Ｃｕ−Ｔｉ合金系、Ｃｕ−Ｓｎ合金系、Ｃｕ−Ｓｉ−Ｔｉ合金系を選択した。加圧埋込処理時のガスには、この種の処理で用いられているアルゴンおよび窒素（実施例１０）を用いた。装置には、最高圧力２００ＭＰａ、最高処理温度２０００℃のＨＩＰ装置を用いた。
実施例１および比較例１−Ａ〜比較例１−Ｃは、直径０．２５μｍ、ＡＲ＝３，４のコンタクトホールの形成されたＳｉウェーハ（基板）にＴｉＮバリア層を５〜１０ｎｍのオーダで付与した後、純銅配線膜をスパッタリング法により厚さ約１．２μｍで形成して、処理を行ったものである。圧力は実施例１では１２０ＭＰａ、比較例では１５０ＭＰａとした。実施例１と比較例１−Ａ、比較例１−Ｂでは、スパッタリング時の基板の温度を変化させた点（実施例１では３００℃、比較例１−Ａでは室温（Ｒ．Ｔ）、比較例１−Ｂでは１９０℃）が大きな違いである。実施例１と比較例１−Ｃでは、加圧埋込処理時後の減圧と降温の操作に違いがある（表２中の備考参照）。
【００１７】
実施例１の結果から判るように、スパッタリング時の基板温度を３００℃程度の高温として、基本的な操作方法により、完全埋込みが達成されると同時に製造された配線膜の体積固有抵抗値も純銅の１．５５〜１．６μΩｃｍにほぼ近い約１．７μΩｃｍが得られる。このコンタクトホールの中に埋め込まれた配線膜材料の結晶学的なモーフォロジは極めて特徴的で、Ａｌ合金の場所のように穴の中央部に結晶粒界が観察されず、上部の膜部分と同一の結晶粒からなるほぼ単結晶となっている。このため、多結晶の場合と異なり、結晶粒界により電子の散乱に伴う電気抵抗の発生がないため、低抵抗化にも寄与しているものと推定される。
【００１８】
一方、比較例１−Ａおよび比較例１−Ｂに示すようにスパッタリング時の温度を２００℃より低い温度や室温（ＲＴ）にすると、実施例１よりも高い圧力で加圧埋込操作を行ってもコンタクトホール中の気孔を埋め込むことは困難であった。
また、比較例１−Ｃは加圧埋込処理、すなわち４５０℃、１５０ＭＰａで５分の処理を行った後の降温と圧力の減圧の仕方を実施例１のように圧力を下げてから温度を下げるという順序ではなく、温度を先にさげてから圧力を抜いたものでは、気孔は完全に埋まっているものの、下地のバリア層の局部的な剥れが観察されると同時に、穴の内部の配線膜材料部には双晶が発生しており、特有の縞模様が観察された。これは、気孔内部の銅が減圧時に体積膨張して応力が発生したためと推定される。バリア層の剥離も同様の原因によるものと推定される。
【００１９】
実施例２、比較例２−Ａおよび比較例２−Ｂは、実施例１よりもアスペクトレイショ（ＡＲ）が大きな、すなわち、孔の奥まで埋め込むことが難しい形状（ＡＲ６である）のコンタクトホールを対象部材とした実験結果を示している。
実施例２では、加圧埋込後、圧力を１５０ＭＰａから１０ＭＰａに降圧後に温度４５０℃からの降温を開始したもので実施例１と同様な結果を得た。
一方、処理時の温度を室温とした比較例２−Ａ、２−Ｂでは埋め込み処理時の保持時間を長く（３０分）にしても、また、圧力を２００ＭＰａまで上げても完全な埋込を行うことは困難であった。
【００２０】
実施例３は、いわゆるデュアルダマシンといわれる構造の配線形成手法によるコンタクトホールと配線溝の製造を行ったものである。この構造を図１に模式的に示す。溝の底面に形成されたコンタクトホールの穴径は０．２５μｍで穴部の深さは０．７μｍである。この場合、スパッタリングは２回行い、１回目のスパッタリングは室温で、ターゲットと基板の距離を若干大きくして（ターゲット距離８０ｍｍ）孔の奥への配線膜材料の着きまわりを良くするように配慮し、２回目のスパッタリングはターゲット距離３８ｍｍに小さくし孔と同時に溝全体を覆うように高温（３００℃）で行った。実施例１の場合と同様、このような複雑な構造であっても完全な埋込が可能で電気抵抗的にも良い配線膜が得られることが実証された。比較例３は２回のスパッタリングを両方とも室温で行ったものである。比較例１−Ａと同様、埋込はほとんどできない状況であった。
【００２１】
以上の実験から、スパッタリングの条件により埋め込みができない最大の原因が、スパッタリング後の孔や溝の上が配線膜材料によって完全に覆われているか、否かによっていることが判明した。すなわち、室温でスパッタリングを行うと、純銅では融点が１０８３℃と結構高いことから、図２に示すように、ターゲットと基板の距離を小さくしても、飛んできて孔の外縁部に付着した銅粒子の温度がすぐに下がって硬くなるため、次に銅粒子が飛んできて衝突しても変形せず、孔の外縁に沿ってほとんど垂直にしか堆積せず、結果として孔や溝がそのまま残ってしまうためと推定される。基板温度を２００℃以上に上げることにより、付着した銅粒子に次の粒子が衝突した際には、面方向に押しつぶされるように変形を起こし、これが連続して生じるという現象が促進されて、容易に孔や溝を覆うように成膜されると考えられる。
【００２２】
以上の結果により、純銅による配線膜の製造が可能なことが実証されたが、実用化という観点では、実施例１〜３に示したような加圧埋込処理の圧力・温度はいずれも高すぎるといわざるを得ない。加圧埋込時の温度を下げる、あるいは圧力を下げるための方策としては、銅に合金元素を添加して、より低い温度で圧力による塑性変形流動あるいは拡散クリープ現象を発現するようにすることが考えられる。
実施例４〜１０はこのような観点から、少しの添加量で銅の融点を下げ、かつ電気抵抗に大きな影響を与えず、かつＳｉなど至近に存在する構成材料との反応等の問題を生じないような元素を添加したものである。表２の膜材質の欄に添加元素と量（原子％）を示した。実施例４〜１０および比較例４〜７から明らかなように、このような銅合金を採用することにより加圧埋込時の温度および圧力を低下できることが明らかである。一方、このように合金化してもスパッタリング時の温度を室温としたままでは、やはり埋込が不可能なことも実証された。合金元素の添加量は、多ければ多いほど融点を下げることが可能であるが、それと同時に形成された膜の電気抵抗の増大も顕著となる。Ａｌ合金膜とほぼ同等（３〜３．５μΩｃｍ）以下を目安とすれば、最大添加量は１０原子％程度である。添加する合金元素としては、表１に示したＳｉ，Ｔｉ，Ｓｎのほか、Ｓｂ，Ｐｄ等が上げられ、また、これら元素を１種又は２種類以上添加することも本発明の範囲に含まれる。
【００２３】
なお、スパッタリングを２回とする場合、実施例９、１０に示すように１回目は純銅とし、２回目以降を前述した合金元素を添加したものとするとともにターゲット距離を表１で示すように変化させ、しかも１回目（１段目）は基板温度が低温（１００℃であるが室温近傍を含む意である）で行い、２回目（２段目）は高温（３００℃を示している）で行うことも推奨され、このような構成とすることにより、電気抵抗値を低くすることも可能である。
また、加圧埋込処理を行う場合、圧力媒体として通常はアルゴンガスが用いられるが、処理コストを低減するためには、より安価な窒素ガスを用いることも推奨される。この場合、高圧の窒素は材料によっては窒化される可能性があるので、処理物はもちろん、加圧埋込処理に用いる装置の高温部構成部材の選定にも配慮することが推奨される。
【００２４】
更に、加圧するとき、配線膜材料の再結晶温度以上でかつ融点以下の温度で行うことも推奨される。
また、実施例１１で示すように、基板温度の上限は４００℃であっても良いが望ましくは２００〜３００℃程度が有利であり、基板としてはＳｉ半導体ウェーハが推奨されるが、該基板としてはＧａ等であっても良いし、また、物理蒸着法による成膜を複数段で行うときは、前段に対して後段の温度を高くして行う限りにおいてその回数は３段以上であっても良い。
【００２５】
【発明の効果】
以上述べたように、本発明により、今後、ますます微細化と多層化が進むＵＬＳＩ半導体の製造において大きな課題となりつつある配線膜の低電気抵抗化、対ＥＭ性の改善の観点から注目されている銅系合金配線膜の製造を、従来から用いられているスパッタリング技術とガス圧による加圧埋込技術の組合せで実現できることとなり、加圧埋込処理が本来持っている歩留まり改善効果を享受できるようになった。さらに、Ａｌ配線膜用に設置された既存のスパッタリング設備をそのまま用いて銅配線膜のＵＬＳＩを製造できることとなり、多大な設備投資が不要となるほか、処理コストの観点から、工業生産への利用が非常に容易となる。このように、本発明は、ＵＬＳＩ業界の今後の発展に寄与するところは非常に大きい。
【図面の簡単な説明】
【図１】 デュアルダマシン構造の配線形成手法を示す斜視図である。
【図２】 埋込状況不調を示す断面図である。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to the formation of a wiring film in a manufacturing process of a semiconductor represented by ULSI. In particular, the present invention is unavoidable under a wiring material film formed by a wet film forming method, a chemical vapor deposition method, or a physical vapor deposition method. In addition, the present invention relates to a method for filling a pore remaining in the substrate and improving adhesion to form a sound copper-based wiring film. More specifically, a semiconductor substrate having a film formed by these film forming methods is subjected to a high-pressure gas pressure at a high temperature to crush the pores and remove the pores, thereby reducing the electrical resistance. The present invention relates to a method for manufacturing a wiring film having excellent adhesion.
[0002]
[Prior art]
Patent No. 2660040 (Registered: June 6, 1997) states that “a thin metal film is formed on a substrate having a concave portion by a vacuum film forming method such as sputtering, CVD, or vacuum deposition. A step of heating and fluidizing the entire metal thin film formed on the substrate, and pressurizing the metal of the fluidized metal thin film with a gas so that the metal of the metal thin film is hollowed in the concave portion. And a step of embedding so as not to occur.
[0003]
Japanese Patent Application Laid-Open No. 7-193063 discloses “a method for treating an article, wherein the article has a surface, and the surface has at least one recess in the surface. Forming a layer over at least a portion, the layer extending over the recess, and further deforming the article and the layer such that a portion of the layer fills the recess. A process for treating an article comprising exposing to a sufficiently high pressure and high temperature.
This known document describes that the article is a semiconductor wafer, the concave portion is a hole, groove, or via formed in the semiconductor wafer, and the layer is made of a metal such as aluminum. When the layer is aluminum, the temperature is 350 to 650 ° C., the pressure is 3000 psi or more, and gas can be used for pressurization. The thickness of the layer formed on the hole or groove is at least equal to the width of the hole. Each is disclosed that a thickness is required. Further, it is described that the semiconductor wafer itself includes a plurality of layers with different properties and is obtained as a result of a manufacturing process that includes a plurality of stages to form it.
[0004]
Thus, in these known techniques, it is effective to expose to high pressure at high temperature as a method of filling the voids formed in the holes and grooves mainly for improving the conductivity of the semiconductor wiring film. It is shown that there is. However, the Al wiring films shown in these publicly known materials are required as the wiring material in the future with further miniaturization of ULSI, in terms of resistance to EM (Electron Migration) and low electrical resistance. There are expectations for Cu, which has reached its limits and is said to be superior to Al in these respects.
[0005]
The present inventors applied these known techniques to copper-based wiring films and studied them through experiments and the like. As a result, although these effects were confirmed, there are some problems in using them for industrial production. I found out.
[0006]
[Problems to be solved by the invention]
First, in order to form a structure without pores in the holes and grooves by the pressure embedding process, it is important that the film forming material completely covers these holes and grooves at the time of film formation. It is. As a film forming method, in addition to the PVD method typified by the sputtering method, a CVD method or an electroplating method can be applied. However, although a very fine hole can be filled by the CVD method, it becomes a raw material. It has a decisive disadvantage in terms of industrial use where the gas is limited and very expensive. In addition, in electroplating, the electrolyte cannot be mixed into the membrane due to the use of the electrolyte or the phenomenon of hydrogen entrainment, and heat treatment is indispensable to remove these and stabilize the structure. However, the treatment of the electrolytic solution as a waste liquid becomes an important issue in terms of industrialization, and has a problem that it must be built from a completely new dedicated factory instead of an existing factory.
[0007]
The PVD method, especially the sputtering method, actually uses a wide range of Al wiring film manufacturing methods. If this method can be applied to copper-based wiring films, the use of existing equipment can be greatly improved. It can be realized without any significant changes, and is the most preferable.
This sputtering method is a method in which Ar ions collide with a cathode whose target is a wiring film material, and the wiring film material is ejected and deposited on the surface of a target member. The state of adhesion can be controlled by energy. However, the direction and distribution (directivity) of the wiring film particles may vary depending on the material, and the setting of film forming conditions is very important. In addition, the temperature of the object greatly affects the properties of the film formed.
[0008]
As a result of experiments using long throw sputtering (increasing the distance between a target and an object to 350 to 400 mm) or the like as a sputtering technique often used in the formation of Al wiring films, It was found that optimization of conditions is important for forming a film that completely covers holes and grooves on the premise of pressure embedding.
Further, when pure copper (purity 99.99% or more) is formed as the copper wiring film, if the hole diameter is as small as 0.5 μm or less, the pressure embedding treatment condition is 100 MPa even at a temperature of 450 ° C. The above pressure is necessary, and it is important to ensure the quality of the insulating film layer and the electrical characteristics of the formed wiring film in consideration of the method of keeping the temperature low during the pressure embedding process. When the pores are embedded by force under a high pressure of 200 MPa or more, the TiN or TaN barrier film formed as the base of the wiring film is peeled off when the copper wiring film material is forced into the hole. Was found.
[0009]
It is an object of the present invention to provide a pressure-embedding method for a copper-based wiring film that solves the problems (problems) of the prior art described above.
[0010]
[Means for Solving the Problems]
In the present invention, the surface of the insulating film of the substrate in which holes or grooves are formed is coated with a wiring film material by a physical vapor deposition method, and then a gas pressure is applied at a temperature equal to or lower than the melting point of the wiring film material. In the pressure embedding method of a copper-based wiring film that embeds and disappears pores remaining in the film by plastic flow or diffusion creep, the following technical means are taken in order to achieve the above-mentioned object. .
That is, in the present invention, the wiring film material contains Cu as a main component and includes one or more alloy elements of Si, Ti, Sb, Sn, and Pd, and the total addition amount of the alloy elements is 5 to 10 atoms. A copper alloy which is a percentage is used, and the substrate is coated by the physical vapor deposition method at a temperature of 200 to 400 ° C., and then embedded by applying a gas pressure.
[0011]
In another method of embedding a copper-based wiring film according to the present invention, as the wiring film material, one or more alloy elements of Si, Ti, Sb, Sn, and Pd containing Cu as a main component are used. A first stage film formation in which the substrate is coated at room temperature and a temperature of the substrate is 200 to 200, using a copper alloy containing 5 to 10 atomic percent in total. After performing at least two stages of the second stage film formation performed at 400 ° C., the embedding process is performed by applying a gas pressure.
Before mentioned, the substrate desirably is Si semiconductor wafer, also the physical vapor deposition method, a sputtering method is desirable, furthermore, a pressure temperature operation after the embedding process, lowering the temperature after lowering the pressure below 10MPa It is desirable to use nitrogen as the pressure medium gas during the embedding process.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described in detail with reference to Tables 1 and 2.
[0013]
[Table 1]

[0014]
[Table 2]

[0015]
Tables 1 and 2 show contact holes (holes) formed on a Si wafer having a diameter of 200 mm or wiring grooves in which contact holes are formed at the bottom using Cu or a Cu-based alloy as a wiring film material. 3 shows the result of an experiment for manufacturing a wiring film by forming a wiring film by a sputtering method and performing a pressure embedding process using a high-pressure gas pressure.
In Table 1, A. R. (Aspect Ratio) indicates the ratio between the depth of the contact hole and the hole diameter. In Table 2, the symbol shown in the column of the embedding result indicates that the contact hole is completely filled with the wiring film material and no pores remain, and the × indicates that the pores remain. Further, Δ indicates that the pores do not remain, but the underlying TiN layer is not completely removed.
[0016]
A sputtering apparatus was used for film formation, and three types of distances between the target and the substrate were 38 mm, 80 mm, and 380 mm. As the wiring film material, high purity pure copper (99.99% in the film), Cu—Si alloy system, Cu—Ti alloy system, Cu—Sn alloy system, and Cu—Si—Ti alloy system were selected. Argon and nitrogen (Example 10) used in this type of process were used as the gas during the pressure embedding process. As the apparatus, an HIP apparatus having a maximum pressure of 200 MPa and a maximum processing temperature of 2000 ° C. was used.
In Example 1 and Comparative Examples 1-A to 1-C, a TiN barrier layer is formed on the order of 5 to 10 nm on a Si wafer (substrate) in which contact holes having a diameter of 0.25 μm and AR = 3,4 are formed. After the application, a pure copper wiring film was formed by sputtering to a thickness of about 1.2 μm and processed. The pressure was 120 MPa in Example 1 and 150 MPa in the comparative example. In Example 1, Comparative Example 1-A, and Comparative Example 1-B, the temperature of the substrate during sputtering was changed (300 ° C. in Example 1, room temperature (RT) in Comparative Example 1-A), comparison In Example 1-B, 190 ° C.) is a big difference. In Example 1 and Comparative Example 1-C, there is a difference in operation of pressure reduction and temperature decrease after the pressure embedding process (see remarks in Table 2).
[0017]
As can be seen from the results of Example 1, the substrate temperature at the time of sputtering was set to a high temperature of about 300 ° C., and the volume resistivity of the wiring film manufactured at the same time as the complete embedding was achieved by the basic operation method was also pure copper About 1.7 .mu..OMEGA.cm, which is approximately close to 1.55-1.6 .mu..OMEGA. The crystallographic morphology of the wiring film material embedded in this contact hole is extremely characteristic, and no crystal grain boundary is observed at the center of the hole like the location of the Al alloy, and it is the same as the upper film part. It is almost a single crystal composed of crystal grains. For this reason, unlike the case of polycrystal, there is no generation of electrical resistance due to electron scattering due to the crystal grain boundary, and it is presumed that this also contributes to a reduction in resistance.
[0018]
On the other hand, as shown in Comparative Example 1-A and Comparative Example 1-B, when the sputtering temperature is lower than 200 ° C. or room temperature (RT), the pressure embedding operation is performed at a pressure higher than that in Example 1. However, it was difficult to fill the pores in the contact hole.
Further, Comparative Example 1-C is a pressure embedding process, that is, a method of lowering the temperature and reducing the pressure after performing a process at 450 ° C. and 150 MPa for 5 minutes, after reducing the pressure as in Example 1, and then changing the temperature. In the case where the temperature is first reduced and the pressure is released, the pores are completely filled, but local peeling of the underlying barrier layer is observed, and at the same time, Twinning was generated in the wiring film material portion, and a unique stripe pattern was observed. This is presumed to be because the copper inside the pores expanded during the decompression to generate stress. The peeling of the barrier layer is presumed to be caused by the same cause.
[0019]
In Example 2, Comparative Example 2-A and Comparative Example 2-B, a contact hole having a larger aspect ratio (AR) than that of Example 1, that is, a shape that is difficult to be embedded to the back of the hole (AR6) is formed. The experimental result made into the object member is shown.
In Example 2, after pressure embedding, the pressure was lowered from 150 MPa to 10 MPa, and then the temperature was lowered from 450 ° C., and the same result as in Example 1 was obtained.
On the other hand, in Comparative Examples 2-A and 2-B in which the temperature at the time of treatment is room temperature, complete embedding is possible even if the holding time at the time of embedding is increased (30 minutes) or the pressure is increased to 200 MPa. It was difficult to do.
[0020]
In the third embodiment, contact holes and wiring grooves are manufactured by a wiring forming method having a so-called dual damascene structure. This structure is schematically shown in FIG. The diameter of the contact hole formed on the bottom surface of the groove is 0.25 μm and the depth of the hole is 0.7 μm. In this case, the sputtering is performed twice, and the first sputtering is performed at room temperature, and the distance between the target and the substrate is slightly increased (target distance 80 mm) so that the wiring film material is placed in the hole deeply. The second sputtering was performed at a high temperature (300 ° C.) so that the target distance was reduced to 38 mm and the entire groove was covered simultaneously with the hole. As in the case of Example 1, it was proved that a wiring film that can be completely embedded and has good electrical resistance can be obtained even with such a complicated structure. In Comparative Example 3, both sputterings were performed at room temperature. As in Comparative Example 1-A, the embedding was almost impossible.
[0021]
From the above experiments, it has been found that the largest cause that cannot be filled due to sputtering conditions depends on whether or not the holes and grooves after sputtering are completely covered with the wiring film material. That is, when sputtering is performed at room temperature, the melting point of pure copper is quite high at 1083 ° C., so as shown in FIG. 2, even if the distance between the target and the substrate is reduced, the copper can fly and adhere to the outer edge of the hole. Because the temperature of the particles quickly decreases and hardens, the copper particles fly and do not deform even if they collide, and only deposit almost perpendicularly along the outer edge of the hole, resulting in holes and grooves remaining intact. It is estimated that By raising the substrate temperature to 200 ° C. or more, when the next particle collides with the attached copper particles, the phenomenon that it is deformed so as to be crushed in the surface direction and this occurs continuously is facilitated, and easy It is considered that the film is formed so as to cover the holes and grooves.
[0022]
From the above results, it was proved that the wiring film can be manufactured using pure copper. However, from the viewpoint of practical use, the pressure and temperature of the pressure embedding treatment as shown in Examples 1 to 3 are both high. If it is too much, it must be said. As a measure to lower the temperature at the time of pressure embedding or lower the pressure, an alloying element is added to copper so that plastic deformation flow or diffusion creep phenomenon due to pressure occurs at a lower temperature. Conceivable.
From this point of view, Examples 4 to 10 reduce the melting point of copper with a small addition amount, do not greatly affect the electrical resistance, and cause problems such as reaction with constituent materials that are present in the vicinity such as Si. This is the addition of elements that are not present. The additive element and amount (atomic%) are shown in the column of the film material in Table 2. As is clear from Examples 4 to 10 and Comparative Examples 4 to 7, it is apparent that the temperature and pressure during pressure embedding can be reduced by employing such a copper alloy. On the other hand, it has been proved that even if alloying is performed in this manner, embedding is impossible if the sputtering temperature remains at room temperature. The larger the amount of alloy element added, the lower the melting point, but at the same time, the increase in the electrical resistance of the formed film becomes significant. If the standard is approximately equal to or less than the Al alloy film (3 to 3.5 μΩcm) or less, the maximum addition amount is about 10 atomic%. Examples of alloy elements to be added include Si, Ti, and Sn shown in Table 1, Sb, Pd, and the like, and addition of one or more of these elements is also included in the scope of the present invention. .
[0023]
When sputtering is performed twice, pure copper is used for the first time as shown in Examples 9 and 10, and the alloy elements described above are added for the second and subsequent times, and the target distance is changed as shown in Table 1. In addition, the first time (first stage) is the substrate temperature at a low temperature (100 ° C. is meant to include near room temperature), and the second time (second stage) is at a high temperature (showing 300 ° C.). It is also recommended that this be done, and the electrical resistance value can be lowered by adopting such a configuration.
In addition, when performing the pressure embedding process, an argon gas is usually used as a pressure medium, but it is also recommended to use a cheaper nitrogen gas in order to reduce the processing cost. In this case, since high-pressure nitrogen may be nitrided depending on the material, it is recommended to consider not only the processed product but also the selection of the high-temperature part constituent member of the apparatus used for the pressure embedding process.
[0024]
Furthermore, when pressurizing, it is also recommended that the temperature be higher than the recrystallization temperature of the wiring film material and lower than the melting point.
Further, as shown in Example 11, the upper limit of the substrate temperature may be 400 ° C., but it is preferably about 200 to 300 ° C., and a Si semiconductor wafer is recommended as the substrate. Ga may be used, and when film formation by physical vapor deposition is performed in a plurality of stages, the number of times may be three or more as long as the temperature of the subsequent stage is set higher than that of the previous stage. good.
[0025]
【The invention's effect】
As described above, the present invention has attracted attention from the viewpoint of reducing the electrical resistance of wiring films and improving the resistance to EM, which is becoming a major issue in the manufacture of ULSI semiconductors that are becoming increasingly finer and multilayered in the future. Production of copper alloy wiring films can be realized by combining the conventionally used sputtering technique and pressure embedding technique using gas pressure, so that the yield improvement effect inherent to the pressure embedding process can be enjoyed. It became so. Furthermore, the existing sputtering equipment installed for the Al wiring film can be used as it is, and the ULSI of the copper wiring film can be manufactured, so that a large capital investment is not required and the use for industrial production is possible from the viewpoint of processing cost. It will be very easy. Thus, the present invention greatly contributes to the future development of the ULSI industry.
[Brief description of the drawings]
FIG. 1 is a perspective view showing a wiring formation method of a dual damascene structure.
FIG. 2 is a cross-sectional view showing an embedding condition malfunction.

Claims (6)

After covering the surface of the insulating film of the substrate in which holes or grooves are formed with a wiring film material by physical vapor deposition, a gas pressure is applied at a temperature below the melting point of the wiring film material to plastically flow or diffuse the wiring film material. In the method of embedding and eliminating the pores remaining in the coating by creeping,
As the wiring film material, a copper alloy containing Cu as a main component and containing one or more alloy elements of Si, Ti, Sb, Sn, Pd and having a total addition amount of the alloy elements of 5 to 10 atomic percent. use,
A method of embedding a copper-based wiring film according to claim 1, wherein the substrate is coated by the physical vapor deposition method at a temperature of 200 to 400 ° C., and then embedded by applying gas pressure. After covering the surface of the insulating film of the substrate in which holes or grooves are formed with a wiring film material by physical vapor deposition, a gas pressure is applied at a temperature below the melting point of the wiring film material to plastically flow or diffuse the wiring film material. In the method of embedding and eliminating the pores remaining in the coating by creeping,
As the wiring film material, a copper alloy containing Cu as a main component and containing one or more alloy elements of Si, Ti, Sb, Sn, Pd and having a total addition amount of the alloy elements of 5 to 10 atomic percent. use,
The coating by the physical vapor deposition method is performed in at least two stages of a first stage film formation in which the substrate is performed at room temperature and a second stage film formation in which the temperature of the substrate is 200 to 400 ° C., and then the gas pressure is applied. A method for pressure embedding of a copper-based wiring film, characterized by performing an embedding process. The substrate is a Si semiconductor wafer
3. The method of pressurizing and embedding a copper wiring film according to claim 1 or 2 . The pressure embedding method for a copper-based wiring film according to claim 1 , wherein the physical vapor deposition method is a sputtering method. The pressure embedding method for a copper-based wiring film according to any one of claims 1 to 4, wherein, in the pressure temperature operation after the embedding treatment, the temperature is lowered after the pressure is lowered to 10 MPa or less . 6. The pressure embedding method for a copper wiring film according to claim 1 , wherein nitrogen is used as a pressure medium gas during the embedding process .

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