JP3932793B2 - Capacitor inspection method - Google Patents

Description

【００１９】
この（表１）から明らかなように、本実施の形態１の検査方法に用いる検査装置の回路構成は従来の回路構成における充電電流よりもピーク電流が大きく、かつピーク電流に達するまでの時間も短いことから、回路構成によってより高速大電流の検査を行うことが可能となることがわかる。さらに、意図的に検出抵抗を２０ｍΩ以上とし、充放電の回路インピーダンスを２０ｍΩ以上にすると、電流検出抵抗を１０ｍΩとした場合に比べてピーク電流が極端に小さくなることから、電流検出抵抗を１０ｍΩ以下とし、回路インピーダンスを２０ｍΩ以下に制限することにより被検査試料による充放電応答をより正確に捉えることができるものである。
【００２０】
また、図３（ａ），（ｂ）は実際に被検査試料であるコンデンサの検査を行う状態を示す正面図と側面図であり、同図において、１６はマガジン、１７は被検査試料である。このように、同検査装置を固定したままで、被検査試料１７を収納したマガジン１６を上下させることによって被検査試料１７の端子を同検査装置の測定端子６に接触させて測定することにより、多数の被検査試料１７に対して効率良く検査を行うことができるものである。
【００２１】
以下の検査装置の説明は、前記検査装置における充電用／放電用スイッチとして高速スイッチング半導体素子を用いると共に、これらを制御する制御回路を設けた構成としたものであり、これ以外の構成は前記検査装置と同じであるために同一部分には同一の符号を付与してその説明は省略し、異なる部分についてのみ説明を行う。
【００２２】
図４（ａ），（ｂ）は本発明の実施の形態１の検査方法に用いる高速スイッチング半導体素子を用いたコンデンサの検査装置の回路構成を示す概念図と測定部を示す平面図であり、同図において、３Ａは高速スイッチング半導体素子を用いた充電用スイッチ、５Ａは高速スイッチング半導体素子を用いた放電用スイッチ、１３および１４は充電用／放電用スイッチ３Ａ／５Ａの電流制限用抵抗、１５は充電用／放電用スイッチ３Ａ／５Ａの駆動用直流電源である。
【００２３】
このように構成された高速スイッチング半導体素子を用いた検査装置では、充電用スイッチ３Ａおよび放電用スイッチ５Ａに高速スイッチング半導体素子であるＦＥＴを用いることにより、より急峻な充放電が可能となるものである。
【００２４】
さらに、充電用スイッチ３Ａおよび放電用スイッチ５Ａを制御する充放電制御回路７において、充電用スイッチ３Ａおよび放電用スイッチ５Ａ（以下、ＦＥＴ３Ａ，５Ａという）の駆動電圧を制御することにより、ＦＥＴ３Ａ，５Ａの動作状態を変化させて被検査試料への印加電圧を一定にしたままピーク電流を制御することが可能となるものである。
【００２５】
また、ＦＥＴ３Ａ，５Ａの電流制限用抵抗１３，１４によって電流抑制を行うことによりＦＥＴ３Ａ，５Ａの駆動を遅らせて、被検査試料への印加電圧を一定にしたままでピーク到達時間の制御を行うことが可能となるものである。
【００２６】
このように構成された高速スイッチング半導体素子を用いたコンデンサの検査装置により検査を行った場合の充電の電流挙動について、ＦＥＴ３Ａ，５Ａの駆動電圧を変化させた時の電流および電圧波形を図５に示す。この図５から明らかなように、ＦＥＴ３Ａ，５Ａの駆動電圧と共にピーク電流を変化させることが可能であることがわかる。また、この時、直流電源１の電圧を一定に保ったままなので、被検査試料への印加電圧を一定に保ちながら任意のピーク電流に対する検査が可能になり、さらに、どのような被検査試料に対しても一定のピーク電流で検査を行うことが可能であることを示している。
【００２７】
また、ＦＥＴ３Ａ，５Ａの駆動電流を電流制限用抵抗１３，１４により制限した時の電流および電圧波形について図６に示す。この図６から明らかなように、ＦＥＴ３Ａ，５Ａを駆動する回路の中に電流制限用抵抗１３，１４を挿入することによりＦＥＴ３Ａ，５Ａの駆動電流を制限するとピーク到達時間が遅くなる傾向が現れるようになり、この技術を用いることにより実際の使用回路に合わせたピーク到達時間を持つインラッシュ検査を行うことが可能になるものである。
【００２８】
以下の検査装置の説明は、前記検査装置における充電用／放電用スイッチとしての高速スイッチング半導体素子（以下、ＦＥＴという）を複数個並列に接続した構成としたものであり、これ以外の構成は前記高速スイッチング半導体素子を用いる検査装置と同じであるために同一部分には同一の符号を付与してその説明は省略し、異なる部分についてのみ説明を行う。
【００２９】
本検査装置では上記図４（ａ），（ｂ）に示すＦＥＴ３Ａ，５Ａを複数個並列に接続して使用したものであるが、このような構成にすることにより、充電用／放電用スイッチ部分の合成インピーダンスの低下、およびＦＥＴ固有の許容電流による電流制限が並列接続により緩和され、このためにピーク電流の増加を図ることができるようになるものである。
【００３０】
なお、一般的には並列使用をすると回路の配線が長くなるためにインダクタンス成分が増加して回路の高速動作が妨げられ、ピーク到達時間が長くなる傾向が現れるものであるが、本実施の形態３による図４（ａ），（ｂ）に示すような回路の構成では、ＦＥＴ３Ａ，５Ａの数を増加しても回路の高速動作が妨げられず、ピーク到達時間を一定に保つことができるものである。
【００３１】
また、図４（ａ），（ｂ）における充電用スイッチ３Ａおよび放電用スイッチ５Ａに使用しているＦＥＴの数を変化させた時のピーク電流についてまとめた結果を（表２）に示す。
【００３２】
【表２】

【００３３】
この（表２）から明らかなように、本高速スイッチング半導体素子を複数個並列に接続したコンデンサの検査装置によれば、並列接続して使用するＦＥＴ３Ａ，５Ａの使用数を増加するとピーク電流が増加する傾向が見られることがわかるものである。
【００３４】
以下、実施の形態１の検査方法について説明する。
【００３５】
図１に示すような構成のコンデンサの検査装置を用いて、１００ｋＨｚのＥＳＲ値の異なった被検査試料を検査した場合のピーク電流についてまとめた結果を図８に示す。図８より明らかなように、ピーク電流と１００ｋＨｚのＥＳＲ値に相関が見られることから、ピーク電流値からＥＳＲ不良の判定を行うことができることを示している。さらに、図９に示すように、一部の被検査試料においては充放電の印加回数に応じてピーク電流が変化するものがあり、このような被検査試料では検査前後でＥＳＲの劣化が認められることから、図９に示すように３回以上の充放電印加を行うことによりインラッシュ電流に対する耐性を正確に評価することができるものである。
【００３６】
（参考例１）
以下、参考例１について説明する。
【００３７】
上記実施の形態１で説明した図１に示すような構成のコンデンサの検査装置を用いて、ＬＣ良品およびＬＣ不良品の検査を行った場合の充電電流波形を図７に示す。この図７から明らかなように、ＬＣ良品と不良品ではピーク電流後の電流挙動が大きく異なっており、これはコンデンサの場合、充電が完了してもＬＣに相当する電流が流れ続けるためにＬＣが大きな被検査試料では充電終了時の電流が大きくなるためである。このことから、充電終了時の電流値を測定することによりＬＣの良否判定を行うことができるものであり、ＬＣ不良はコンデンサの充放電回数が複数回行われた後に発生することもあることから、検査は充放電を複数回以上行うのが望ましいといえるものである。
【００３８】
（参考例２）
以下、参考例２について説明する。なお、本参考例２は上記実施の形態１に用いる同検査装置における給電用コンデンサを複数個（４７０μＦ×３０個）並列に接続した構成としたものであり、これ以外の構成は実施の形態１に用いる検査装置と同じであるために同一部分には同一の符号を付与してその説明は省略し、異なる部分についてのみ説明を行う。
【００３９】
本参考例２では上記図１に示す給電用コンデンサ２を複数個並列に接続して使用したものであるが、このような構成にすることにより、給電用コンデンサ群から被検査試料に対してより多くの電荷供給を高速で供給することができるようになるものである。
【００４０】
なお、一般的には並列使用をすると回路の配線が長くなるためにインダクタンス成分が増加し、回路の高速動作が妨げられてピーク到達時間が長くなる傾向が現れるが、図１に示すような構成では、給電用コンデンサ２の個数を増加しても回路の高速動作が妨げられず、ピーク到達時間を一定に保つことができるものである。
【００４１】
なお、ピーク電流においては、給電用コンデンサ２の増加に伴って給電部のインピーダンスの低下および容量増加による供給電荷の増加などからピーク電流の増加が起こるため、少なくとも給電用コンデンサには被検査試料としてのコンデンサの１０倍以上の容量が必要である。
【００４２】
なお、図１に示すような構成において、給電用コンデンサ２の数を変化させた時のピーク電流およびピーク到達時間についてまとめた結果を（表３）に示す。
【００４３】
【表３】

【００４４】
（表３）から明らかなように、給電用コンデンサ２の増加に伴ってピーク電流の増加が起こることから、少なくとも給電用コンデンサ２には被検査試料としてのコンデンサの１０倍以上の容量が必要である。
【００４５】
（参考例３）
以下、参考例３について説明する。
【００４６】
上記実施の形態１で説明した図１に示す検査装置の構成において、被検査試料の充電状態が９０％未満の時に充電を終了した場合の充電電流の挙動を図１０に示す。図１０に示すように、充電終了前に充電を打ち切ると回路中のインダクタンス成分により電流のリンギングが発生する。この時、瞬間的に被検査試料に対して逆電圧が印加されることがあるため、有極性のコンデンサを検査する場合にはコンデンサが破壊する恐れがある。また、図１１に示すように、充電が９０％以上終了し、充電電流がある程度小さくなった時点で充電を終了するとリンギングが小さく逆電圧がかからないため、充電を９０％以上完了した時点で充電スイッチの切り替えを行う必要があることがわかる。
【００４７】
また、放電時に関しても同様に容量の９０％以上が放電した状態で放電を終了しないとリンギングが発生するため、放電においても９０％以上の放電が完了した時点で放電スイッチの切り替えを行わなければならないものである。
【００４８】
【発明の効果】
以上のように本発明によれば、耐インラッシュ電流性に優れたコンデンサを選別することが可能になるものである。
【図面の簡単な説明】
【図１】 （ａ）本発明の実施の形態１の検査方法に用いるコンデンサの検査装置の構成を示す概念図
（ｂ）同測定部を示す平面図
【図２】 同充放電時の被検査試料に流れる電流の挙動を示す電流波形図
【図３】 （ａ）同実際に検査を行う状態を示す正面図
（ｂ）同側面図
【図４】 （ａ）本発明の実施の形態１の検査方法に用いる高速スイッチング半導体素子を用いたコンデンサの検査装置の回路構成を示す概念図
（ｂ）同測定部を示す平面図
【図５】 同ＦＥＴ３Ａ，５Ａの駆動電圧を変化させた場合の被検査試料に印加される電流および電圧の波形を示す特性図
【図６】 同ＦＥＴ駆動電流を電流制限用抵抗により制限した場合の被検査試料に印加される電流および電圧の波形を示す特性図
【図７】 参考例１による被検査試料の漏れ電流の良否による電流応答の違いを示す特性図
【図８】 同被検査試料の１００ｋＨｚにおけるＥＳＲ値と検査時に流れるピーク電流との関係を示す特性図
【図９】 同検査後のＥＳＲの有無によるピーク電流値と印加回数との関係を示す特性図
【図１０】 参考例３による被検査試料への充電が９０％未満で充電を終了した場合の電流および電圧挙動を示す特性図
【図１１】 同被検査試料への充電が９０％で充電を終了した場合の電流および電圧挙動を示す特性図
【図１２】 従来のコンデンサの検査装置の構成を示す回路図
【符号の説明】
１ 直流電源
２ 給電用コンデンサ
３ 充電用スイッチ（ＦＥＴ素子）
３Ａ 高速スイッチング半導体素子を用いた充電用スイッチ
４ 電流検出用抵抗
５ 放電用スイッチ（ＦＥＴ素子）
５Ａ 高速スイッチング半導体素子を用いた放電用スイッチ
６ 測定端子
７ 充放電制御回路
８ 電流測定部
９，１０，１１，１２ 通電用フレーム
１３ 充電用スイッチ３Ａの電流制限用抵抗
１４ 放電用スイッチ５Ａの電流制限用抵抗
１５ 充電用／放電用スイッチ３Ａ／５Ａの駆動用直流電源
１６ マガジン
１７ 被検査試料[0001]
BACKGROUND OF THE INVENTION
INDUSTRIAL APPLICABILITY The present invention tests the inrush current resistance of capacitors that require low series equivalent resistance (hereinafter referred to as ESR), among capacitors used in various electrical products and electronic devices. The present invention relates to a capacitor inspection apparatus and an inspection method using the same.
[0002]
[Prior art]
This type of conventional capacitor inspection apparatus will be described with reference to the drawings. FIG. 12 is a circuit diagram showing the configuration of a conventional capacitor inspection apparatus. In FIG. 12, 18 is a DC power supply (anode side), 19 is a power supply capacitor (10000 μF), 20 is a current detection resistor (0.1Ω). ), 21 is an FET element as a charging switch, 22 is a protective resistor (0.68Ω), 23 is a protective resistor (1 kΩ), 24 is a capacitor as a sample to be inspected, 25 is a discharge resistor, and 26 is a discharge switch. is there.
[0003]
In the conventional inspection apparatus configured as described above, as shown in FIG. 12, a power supply capacitor 19 (10000 μF, 100 V) connected in parallel via a protective resistor 23 to a DC power source 18 that generates a DC current is provided. The test sample 24 is charged in a series of tests in which the test sample 24 is charged and the current charged in the test sample 24 is discharged through the discharge resistor 25 by opening the discharge switch 26. In this case, a test for inrush current resistance is performed by passing a certain amount of current in an ambiguous manner.
[0004]
[Problems to be solved by the invention]
However, in the conventional capacitor inspection apparatus, the power supply capacitor 19, the FET element 21 as the charging switch, and the parasitic circuit resistance value of the wiring circuit are about 200 mΩ. In such a circuit configuration, the charging unit 27 and the discharging unit In any of the 28 circuits, a parasitic circuit resistance value of about several hundred milliohms is generated. With this parasitic circuit resistance value, a sufficient current is supplied to the sample 24 to be inspected of a low ESR capacitor of 100 mΩ or less, which has recently been in active demand. There is a problem that the inspection cannot be performed accurately and accurately according to the actual application.
[0005]
Further, in the conventional capacitor inspection apparatus for inspecting the inrush current resistance of the capacitor, only a steep current is applied to the sample 24 to be inspected, and there is no circuit for controlling the current rising speed and the peak current value. In addition, there is a problem that the applied current changes due to the characteristic variation of the sample 24 to be inspected, and stable inspection cannot be performed.
[0006]
An object of the present invention is to provide a capacitor inspection method capable of accurately inspecting a low ESR capacitor excellent in inrush current resistance .
[0007]
[Means for Solving the Problems]
In order to solve this problem, when a constant voltage is applied to the discharged capacitor to be inspected and charged, the peak current value is based on the correlation between ESR and the peak current value at which the charging current of the capacitor rises from the initial stage. This is an inspection method for determining whether the ESR is good or bad depending on the value of the value , and an effect of being able to select a low ESR capacitor having excellent inrush current resistance can be obtained.
[0008]
In addition, after charging by applying a constant voltage to the discharged capacitor to be inspected, after the charging / discharging for discharging, the inspection method for determining whether the ESR is good or not is used to accurately detect the initial failure occurrence product against the sudden charging / discharging stress. Therefore, it is possible to obtain a function effect that a highly reliable and stable capacitor can be selected.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
(Embodiment 1)
First, an inspection apparatus used for the inspection method of the first embodiment will be described.
[0010]
FIGS. 1A and 1B are a conceptual diagram showing a configuration of a capacitor inspection apparatus used in the inspection method according to Embodiment 1 of the present invention and a plan view showing a measurement unit. In FIG. 2 is a power supply capacitor (470 μF), 3 is an FET (element) as a charging switch, 4 is a current detection resistor (10 mΩ), 5 is an FET (element) as a discharging switch, 6 is a measurement terminal, 7 Is a charge / discharge control circuit, 8 is a current measuring unit, and 9 to 12 are energization frames.
[0011]
Next, the operation of the capacitor inspection apparatus used in the inspection method of the first embodiment configured as described above will be described. First, the FET (element) 3 as the charging switch is OFF at the initial time, and the discharging switch. The FET (element) 5 is turned on, and in this state, the power supply capacitor 2 is charged by the DC power supply 1, the FET (element) 5 serving as the discharge switch is turned off, and the FET (element) as the charging switch is turned on ( At the same time that the element 3 is turned ON, a steep current flows from the power supply capacitor 2 to a capacitor (not shown), which is a sample to be inspected, connected to the measurement terminal 6 via the current measuring unit 8.
[0012]
Next, when the FET (element) 3 as a charging switch is turned OFF and the FET (element) 5 as a discharging switch is turned ON, a steep discharge occurs from the sample to be inspected via the current measuring unit 8. By repeating this operation, the sample to be inspected is charged and discharged.
[0013]
Thus inspection apparatus of the capacitor used in the inspection method of Embodiment 1, since the test circuit portion composed of the charge-discharge circuit with the circuit elements to the structure directly attached to current-carrying frames 9-12, thereby It is possible to increase current and charge speed in charging and discharging .
[0014]
In addition, as shown in FIG. 1, by providing a current measuring unit 8 using a current detection resistor 4 of 10 mΩ, current behavior during charging / discharging can be observed, and the sample to be inspected during charging / discharging can be observed. It is possible to observe changes in the characteristics of the.
[0015]
FIG. 2 is a current waveform diagram in which the charge / discharge behavior at this time is observed. In FIG. 2, the maximum current value is called the peak current, and the time until the peak current is reached is called the peak arrival time.
[0016]
As described above, the resistance value of the current measuring unit 8 is extremely low compared to the conventional one, and is small even when compared with the resistance value of the capacitor to be inspected having a resistance value of at least several tens of mΩ to 100 mΩ. Since it is a value, it can be said that the influence on the charge / discharge current by the current detection resistor 4 is small, and the charge / discharge current of a pure sample to be inspected can be observed. Further, since the impedance of the charging circuit and the discharging circuit including the wiring resistance and the current detection resistance value can be suppressed to 20 mΩ or less in total by the circuit configuration as shown in FIG. 1, it is possible to inspect the low impedance capacitor. Is.
[0017]
Table 1 shows the results of summarizing the peak current and peak arrival time for the charging current behavior when inspected by the capacitor inspection apparatus used in the inspection method of Embodiment 1 thus obtained. Show.
[0018]
[Table 1]

[0019]
As is clear from this (Table 1), the circuit configuration of the inspection apparatus used in the inspection method of the first embodiment has a peak current larger than the charging current in the conventional circuit configuration, and the time until the peak current is reached. From the shortness, it can be seen that a high-speed and high-current inspection can be performed depending on the circuit configuration. Furthermore, if the detection resistance is intentionally set to 20 mΩ or more and the charge / discharge circuit impedance is set to 20 mΩ or more, the peak current becomes extremely small compared to the case where the current detection resistance is set to 10 mΩ. By limiting the circuit impedance to 20 mΩ or less, the charge / discharge response due to the sample to be inspected can be captured more accurately.
[0020]
3 (a) and 3 (b) are a front view and a side view showing a state in which a capacitor, which is a sample to be inspected, is actually inspected. In FIG. 3, 16 is a magazine, and 17 is a sample to be inspected. . In this way, by measuring the contact of the terminal of the sample 17 to be measured with the measurement terminal 6 of the inspection device by moving the magazine 16 containing the sample 17 up and down while the inspection device is fixed, A large number of specimens 17 can be inspected efficiently.
[0021]
The following description of the testing device, with use of the high speed switching semiconductor device as charging / discharging switch in the inspection apparatus, which has a configuration in which a control circuit for controlling these, other configuration is the inspection Since it is the same as the apparatus , the same reference numerals are given to the same parts and the description thereof is omitted, and only different parts will be described.
[0022]
4 (a) and 4 (b) are a conceptual diagram showing a circuit configuration of a capacitor inspection apparatus using a high-speed switching semiconductor element used in the inspection method of Embodiment 1 of the present invention, and a plan view showing a measurement unit. In the figure, 3A is a charging switch using a high-speed switching semiconductor element, 5A is a discharging switch using a high-speed switching semiconductor element, 13 and 14 are current limiting resistors of charging / discharging switch 3A / 5A, 15 Is a DC power source for driving the charging / discharging switch 3A / 5A.
[0023]
In the inspection apparatus using the high-speed switching semiconductor element configured as described above, the charge switch 3A and the discharge switch 5A can be charged and discharged more rapidly by using FETs that are high-speed switching semiconductor elements. is there.
[0024]
Further, in the charge / discharge control circuit 7 for controlling the charging switch 3A and the discharging switch 5A, the driving voltages of the charging switch 3A and the discharging switch 5A (hereinafter referred to as FETs 3A and 5A) are controlled, thereby enabling the FETs 3A and 5A. Thus, it is possible to control the peak current while changing the operating state to keep the applied voltage to the specimen to be inspected constant.
[0025]
Further, by controlling the current by the current limiting resistors 13 and 14 of the FETs 3A and 5A, the driving of the FETs 3A and 5A is delayed, and the peak arrival time is controlled while the applied voltage to the sample to be inspected is kept constant. Is possible.
[0026]
FIG. 5 shows the current and voltage waveforms when the drive voltage of the FETs 3A and 5A is changed with respect to the current behavior of the charge when the inspection is performed by the capacitor inspection apparatus using the high-speed switching semiconductor element configured as described above. Show. As can be seen from FIG. 5, the peak current can be changed together with the drive voltages of the FETs 3A and 5A. At this time, since the voltage of the DC power source 1 is kept constant, it is possible to inspect for an arbitrary peak current while keeping the voltage applied to the specimen to be inspected constant. In contrast, it is shown that the inspection can be performed with a constant peak current.
[0027]
FIG. 6 shows current and voltage waveforms when the drive currents of the FETs 3A and 5A are limited by the current limiting resistors 13 and. As apparent from FIG. 6, when the current limiting resistors 13 and 14 are inserted into the circuits for driving the FETs 3A and 5A to limit the driving currents of the FETs 3A and 5A, the peak arrival time tends to be delayed. Thus, by using this technique, it is possible to perform an inrush test having a peak arrival time that matches the actual circuit used.
[0028]
The following description of the inspection apparatus, the high-speed switching semiconductor element as a switch for charging / discharging in the inspection apparatus (hereinafter, referred to as FET) is obtained by a structure connected to a plurality parallel, other configuration is the Since it is the same as an inspection apparatus using a high-speed switching semiconductor element, the same reference numerals are given to the same parts and the description thereof is omitted, and only different parts will be described.
[0029]
In this inspection apparatus , a plurality of FETs 3A and 5A shown in FIGS. 4 (a) and 4 (b) are connected and used in parallel. The reduction in the combined impedance and the current limitation due to the allowable current inherent in the FET are alleviated by the parallel connection, and for this reason, the peak current can be increased.
[0030]
In general, when the parallel use is used, the wiring of the circuit becomes long, so that the inductance component increases and the high-speed operation of the circuit is hindered, and the peak arrival time tends to become long. In the circuit configuration as shown in FIGS. 4 (a) and 4 (b) according to No. 3, even if the number of FETs 3A and 5A is increased , the high-speed operation of the circuit is not hindered, and the peak arrival time can be kept constant. It is.
[0031]
Table 2 shows a summary of peak currents when the number of FETs used in the charging switch 3A and the discharging switch 5A in FIGS. 4A and 4B is changed.
[0032]
[Table 2]

[0033]
As is clear from this (Table 2), according to the capacitor inspection apparatus in which a plurality of the high-speed switching semiconductor elements are connected in parallel, the peak current increases as the number of FETs 3A and 5A used in parallel connection increases. It is understood that the tendency to do is seen.
[0034]
Hereinafter, the inspection method according to the first embodiment will be described.
[0035]
FIG. 8 shows the results of summarizing peak currents when inspecting samples to be inspected having different ESR values of 100 kHz using the capacitor inspection apparatus having the configuration shown in FIG. As is clear from FIG. 8, the correlation between the peak current and the 100 kHz ESR value indicates that the ESR failure can be determined from the peak current value. Furthermore, as shown in FIG. 9, some of the samples to be inspected have peak currents that change depending on the number of charge / discharge applications. In such samples to be inspected, ESR deterioration is observed before and after the inspection. Therefore, as shown in FIG. 9, the resistance to the inrush current can be accurately evaluated by applying the charge and discharge three times or more.
[0036]
(Reference Example 1)
Hereinafter, Reference Example 1 will be described.
[0037]
FIG. 7 shows a charging current waveform when the non-defective LC product and the defective LC product are inspected using the capacitor inspection apparatus having the configuration shown in FIG. 1 described in the first embodiment. As apparent from FIG. 7, the current behavior after the peak current is greatly different between the non-defective product and the defective product. This is because the current corresponding to LC continues to flow even when charging is completed. This is because the current at the end of charging becomes large in the specimen to be inspected with a large. From this, it is possible to determine the quality of the LC by measuring the current value at the end of the charge, and the LC failure may occur after the capacitor has been charged / discharged multiple times. In the inspection, it can be said that it is desirable to perform charging and discharging a plurality of times.
[0038]
(Reference Example 2)
Hereinafter, Reference Example 2 will be described. The present reference example 2 has a configuration in which a plurality (470 μF × 30) of power feeding capacitors in the inspection apparatus used in the first embodiment are connected in parallel, and other configurations are the same as in the first embodiment. the same parts to be the same as the test apparatus used in the description will be omitted by giving the same reference numerals, a description and only different parts.
[0039]
In the present Reference Example 2 , a plurality of power feeding capacitors 2 shown in FIG. 1 are connected in parallel, but with such a configuration, the power feeding capacitor group can be applied more to the sample to be inspected. Many electric charges can be supplied at high speed.
[0040]
In general, when parallel use is used, the wiring of the circuit becomes longer and the inductance component increases, which tends to hinder the high-speed operation of the circuit and increase the peak arrival time. However, the configuration as shown in FIG. Then, even if the number of power supply capacitors 2 is increased , the high-speed operation of the circuit is not hindered, and the peak arrival time can be kept constant.
[0041]
At the peak current, an increase in the peak current occurs due to a decrease in the impedance of the power supply unit and an increase in the supply charge due to an increase in capacity as the power supply capacitor 2 increases. It is necessary to have a capacity that is at least 10 times that of the capacitor.
[0042]
Table 3 shows the results of summarizing the peak current and the peak arrival time when the number of power feeding capacitors 2 is changed in the configuration shown in FIG.
[0043]
[Table 3]

[0044]
As apparent from (Table 3), the peak current increases with the increase of the power supply capacitor 2, so that at least the power supply capacitor 2 needs to have a capacity 10 times or more that of the capacitor as the sample to be inspected. is there.
[0045]
(Reference Example 3)
Hereinafter, Reference Example 3 will be described.
[0046]
FIG. 10 shows the behavior of the charging current when charging is terminated when the charged state of the sample to be inspected is less than 90% in the configuration of the inspection apparatus shown in FIG. 1 described in the first embodiment. As shown in FIG. 10, when the charging is terminated before the charging is completed, current ringing occurs due to an inductance component in the circuit. At this time, since a reverse voltage may be instantaneously applied to the sample to be inspected, the capacitor may be destroyed when inspecting a polar capacitor. In addition, as shown in FIG. 11, when charging is completed when 90% or more is completed and the charging current is reduced to a certain degree, ringing is small and no reverse voltage is applied. It turns out that it is necessary to switch.
[0047]
Similarly, during discharge, ringing occurs if 90% or more of the capacity is discharged and the discharge is not terminated. Therefore, the discharge switch must be switched when 90% or more of the discharge is completed. It will not be.
[0048]
【The invention's effect】
As described above, according to the present invention, it is possible to select a capacitor having excellent inrush current resistance .
[Brief description of the drawings]
FIG. 1A is a conceptual diagram showing the configuration of a capacitor inspection apparatus used in the inspection method of Embodiment 1 of the present invention. FIG. 1B is a plan view showing the same measurement unit. FIG. Figure current waveform showing a behavior of electric current flowing through the sample 3 (a) front view showing a state of performing the actual inspection (b) a side view of the same FIG. 4 (a) of the first embodiment of the present invention FIG. 5 is a conceptual diagram showing a circuit configuration of a capacitor inspection apparatus using a high-speed switching semiconductor element used in the inspection method . FIG. 5 is a plan view showing the same measurement unit. FIG. Fig. 6 is a characteristic diagram showing waveforms of current and voltage applied to a test sample. Fig. 6 is a characteristic diagram showing waveforms of current and voltage applied to a test sample when the FET drive current is limited by a current limiting resistor. 7] leakage current of the test samples according to example 1 Fig. 8 is a characteristic diagram showing the difference in current response depending on pass / fail. Fig. 8 is a characteristic diagram showing the relationship between the ESR value of the sample to be inspected at 100 kHz and the peak current flowing during the inspection. Fig. 9 is the peak current due to the presence or absence of ESR after the inspection. Fig. 10 is a characteristic diagram showing the relationship between the value and the number of times of application. Fig. 10 is a characteristic diagram showing current and voltage behavior when charging of the sample to be inspected in Reference Example 3 is less than 90% and charging is terminated. Fig. 12 is a characteristic diagram showing the current and voltage behavior when the test sample is charged at 90%. Fig. 12 is a circuit diagram showing the configuration of a conventional capacitor inspection device.
1 DC power supply 2 Power supply capacitor 3 Charging switch (FET element)
3A Charge switch using high-speed switching semiconductor element 4 Resistance for current detection 5 Switch for discharge (FET element)
5A Discharge Switch Using High-Speed Switching Semiconductor Element 6 Measuring Terminal 7 Charge / Discharge Control Circuit 8 Current Measuring Unit 9, 10, 11, 12 Current Supply Frame 13 Current Limiting Resistance of Charging Switch 3A 14 Current of Discharge Switch 5A Limiting resistor 15 DC power source for driving charging / discharging switch 3A / 5A 16 Magazine 17 Sample to be inspected

Claims (2)

Based on the correlation between the peak current value at which the charging current of the capacitor to be tested rises from the initial stage when the discharged capacitor to be tested is charged and charged, and the equivalent series resistance, the value of the peak current value A method for inspecting capacitors for determining whether the equivalent series resistance is acceptable. The peak current value at which the charging current of the capacitor to be inspected rises from the beginning when the capacitor to be inspected is charged by charging after applying the constant voltage to the discharged capacitor to be inspected and then discharging. And a method of inspecting a capacitor for determining whether the equivalent series resistance is good or not based on the peak current value based on the correlation with the equivalent series resistance .

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