JP3921323B2 - Manufacturing method of electronic parts - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention is used in a display such as a computer or a television receiver, for example, and is a transmissive or reflective liquid crystal display device provided with a switching element such as a thin film transistor (hereinafter referred to as “TFT”) as an address element. Includes a gate line, a source line, and a switching element provided in the vicinity of the intersection of the gate line and the source line, the switching element including a gate electrode connected to the gate line, and the source line A liquid crystal display device having a source electrode connected to the drain electrode and a drain electrode connected to a pixel electrode for applying a voltage to the liquid crystal layer, and a repetitive pattern such as a large number of wirings, switching elements, and sensor parts. A semiconductor device having a plurality of film patterns and a display device other than liquid crystal (for example, DMD) Active devices such as image sensors and passive devices, and various electronic components including substrates mounted with components such as resistors, capacitors, semiconductor devices and integrated circuit circuits for driving and controlling these active devices and passive devices The present invention relates to a method for manufacturing an electronic component.
[0002]
Here, the electronic component includes a small or portable electronic device as an integrated component such as a calculator, a digital camera, a handy scanner, a portable radio, an MD player, an electronic dictionary, and an electronic information terminal notebook.
[0003]
[Prior art]
A TFT type liquid crystal display device will be described as an example. FIG. 8 is a circuit diagram showing a general configuration of a transmissive liquid crystal display device including an active matrix substrate. As shown in FIG. 8, the active matrix substrate 101 has a plurality of pixel electrodes 102 formed in a matrix, such as tens of thousands to hundreds of thousands or more, and the pixel electrodes 102 are switching elements. The TFT 103 is connected and provided. A gate wiring 104 for supplying a scanning signal is connected to the gate electrode of the TFT 103, and the TFT 103 is driven and controlled by the gate signal input to the gate electrode. A source wiring 105 for supplying a display signal (data signal) is connected to the source electrode of the TFT 103, and a data (display) signal is input to the pixel electrode 102 via the TFT 103 when the TFT 103 is driven. The gate wirings 104 and the source wirings 105 are provided so as to pass through the periphery of the pixel electrodes 102 arranged in a matrix and to be orthogonal to each other with an insulating film interposed therebetween. Further, the drain electrode of the TFT 103 is connected to the pixel electrode 102 and the additional capacitor 106, and the counter electrode of the additional capacitor 106 is connected to the common wiring 107.
[0004]
FIG. 9 is a cross-sectional view of a TFT portion of an active matrix substrate in a conventional liquid crystal display device. As shown in FIG. 9, a gate electrode 108 connected to the gate wiring 104 of FIG. 101 is formed on a transparent insulating substrate 107, and a gate insulating film 109 is formed so as to cover it. Further thereon, a semiconductor layer 110 is formed so as to overlap with the gate electrode 108, and a channel protective layer 111 is formed on the central portion thereof. An n + Si layer that covers both ends of the channel protective layer 111 and a part of the semiconductor layer 110 and is divided on the channel protective layer 111 is formed as the source electrode 112a and the drain electrode 112b. A metal layer 113a is formed on the source electrode 112a, which is one n + Si layer, with the same film as the source wiring 105 in FIG. 101, and the drain electrode 112b is formed on the drain electrode 112b, which is the other n + Si layer. A metal layer 113b that connects the pixel electrode 114 and the TFT 115 serving as a switching element and its peripheral structure are formed. Further, an interlayer insulating film 116 is formed so as to cover the TFT 115, the gate wiring, and the source wiring.
[0005]
A transparent conductive film to be the pixel electrode 114 is formed on the interlayer insulating film 116, and this transparent conductive film is a metal connected to the drain electrode 112b of the TFT 111 through a contact hole 116a that penetrates the interlayer insulating film 116. It is connected to the layer 113b. As described above, since the interlayer insulating film 116 is formed between the gate wiring and the source wiring and the transparent conductive film 114 serving as the pixel electrode 1, the pixel electrode 1 is overlapped with the gate wiring and the source wiring. be able to. Such a structure is disclosed in, for example, Japanese Patent Application Laid-Open No. 58-172585, thereby improving the aperture ratio of the liquid crystal display device and shielding the electric field caused by the gate wiring and the source wiring. Therefore, it is possible to suppress the disclination in which the alignment of the liquid crystal molecules is broken.
[0006]
As the insulating film 109 or the interlayer insulating film 116, an inorganic film such as silicon nitride (SiN) has been conventionally formed to a film thickness of about 300 to 500 nm by using a CVD method (plasma enhanced chemical vapor deposition). The reason why a film thickness larger than this is not formed is that deposition takes time and production efficiency deteriorates, and the substrate is warped due to residual stress, and defects such as cracks increase. Alternatively, only the interlayer insulating film 116 may form an organic film with a thickness of about 1 to 5 μm. Alternatively, there may be a case where the aperture ratio is lowered but the interlayer insulation 116 is not formed. In addition, various portable electronic devices such as calculators, digital cameras, handy scanners, portable radios, MD players, electronic dictionaries, electronic information terminal notebooks, etc., are becoming lighter, thinner, and smaller like the above-mentioned liquid crystal display devices. Various private companies and universities are competing for the development of packaging technology including high-efficiency manufacturing methods. For example, chip parts such as resistors, capacitors, semiconductor elements, and integrated circuit circuits are supplied to the board at high speed on the board with a surface mounter at a high speed on the board, and multiple parts are collectively aligned by soldering as a connection material. However, the mounting technology has already been developed, mass-produced, and put into practical use. However, further developments such as mounting speedup and connection technology for irregularly shaped parts and micro-pitch multi-terminal parts are underway. The process for mounting the integrated circuit 120 having a high-density multi-terminal is schematically shown using FIGS. First, as shown in FIG. 10A, an integrated circuit 120 on which solder bumps (projection electrodes are referred to as bumps) 121 is supplied onto a substrate 122 by a mounter. At this time, a variation error d occurs in the mounting position due to the machine accuracy of the mounter. Next, as shown in FIG. 10A, the solder 121a is melted in a reflow furnace or the like, and the position of the integrated circuit 120 is corrected by the surface tension of the solder. A research example of positioning using self-alignment is published in the Journal of Precision Engineering, Vol. 66. No. 2. Starting from page 282 of 2000. Here, a technique for aligning micro parts using the surface tension of a liquid is introduced.
[0007]
[Problems to be solved by the invention]
In the case of the above-described liquid crystal display device, a relatively small area of 0 to 2 semiconductor layers or conductive film layers and a relatively large area of about 2 to 5 layers are mixed in a repetitive pattern. In addition, regions having different defect rates are formed simultaneously on the same substrate in the same process, which is basically inefficient. In the case of FIG. 10, when the insulating film 109 or the interlayer insulating film 116 is formed on the TFT 111 by CVD or sputtering using SiNx, SiO2, TaOx (Ta: tantalum) or the like, the film is formed. The insulating film 109 or the interlayer insulating film 116 reflects unevenness due to the thickness of the base film. Cracks A and B are more likely to enter due to the effects of residual stress (larger substrates have more in-plane variations), such as multi-layer TFTs and uneven portions such as cross sections of source wiring and gate wiring. Etching liquid permeates and short-circuiting and disconnection defects are likely to occur, and the larger the substrate, the lower the defect rate due to increased variations in residual stress, temperature, etching liquid or impurity concentration distribution, etc. For this reason, it becomes necessary to strictly control the apparatus and conditions, and the processing time is increased, and a special apparatus improvement is required. On the other hand, liquid crystal display devices, etc. are moving to adopt larger and larger board dimensions so as to increase the number of parts to improve overall production efficiency, but for example, the line does not rise at the speed as expected at the start of mass production. However, there are many cases where profits are not sufficiently secured or goods cannot be delivered to users in a timely manner due to the balance of supply and demand. Or reliability may fall by the same factor. Or, if the manufacturing equipment becomes larger due to the larger substrate size and it is difficult to assemble and transport (the transportation means, route and time are limited), the whole factory becomes large, and it is difficult to secure the site, It becomes difficult to uniformly control the cleanliness of the inner line. In addition, the variation in the external dimensions of each device increases, making line design difficult. In addition, in the case of component mounting using the above-mentioned two surface tensions, until now, components have been mounted on the surface of a substantially flat board except for protrusions and grooves on the order of terminals, wiring, and insulating films. . Therefore, these parts and devices have limitations in high-density mounting, thinning, miniaturization, and weight reduction. Also, if the component is forcibly embedded in the substrate with the conventional mounting structure, the number of processes such as contact hole formation for connecting between the conductive layer connected to the lower surface of the component and the conductive layer on the surface of the substrate will increase. In some cases, the reliability of the connection is reduced. The object of the present invention is to produce various electronic components including those other than liquid crystal display devices and electronic components, particularly in electronic components such as liquid crystal display devices and semiconductor devices in which the dimensions of the original substrate for production are large. How to manufacture electronic components that improve production efficiency with reliability, reduce the size of the equipment, and reduce the above problems The law The purpose is to provide. Or, in electronic components or electronic devices that have various components mounted using surface tension, they can be mounted at a higher density without causing a significant increase in process or reliability, resulting in thinner, smaller, or lighter weights. Of electronic parts to achieve The law The purpose is to provide.
[0008]
[Means for Solving the Problems]
The method of manufacturing an electronic component according to the present invention is as follows: ,same A first substrate on which a plurality of wirings of one pattern are formed; a mounting region connected to each of the wirings on the first substrate and having terminals formed by at least one first film layer; A method of manufacturing an electronic component, comprising: a terminal formed by a second film layer different from the first film layer; and a switching device connected to the terminal, and a microcomponent stacked in the mounting region, A plurality of the micro components are formed on a second substrate different from the first substrate, and then the second substrate is divided into a single unit or a small number, and is formed into micro units. In the mounting area of the first substrate, A groove portion for mounting the microcomponent is formed, and the microcomponent is self-aligned and mounted on the groove portion of the first substrate by surface tension with water.
[0009]
According to the above method, the multi-layer region and the small-layer region, which have been conventionally formed in the same substrate, are made separately. Thereby, a multilayer region such as a TFT switching part can be manufactured separately from other small layer regions, and can be arranged on a small substrate with higher density. Reliability, quality, and yield can be improved easily and can be manufactured efficiently. Further, the apparatus can be miniaturized at that portion, the conveying device and the path can be made small, and the cleanliness can be easily uniformed in the process, so that the line design and the apparatus can be carried in easily. In addition, since the micro component is mounted in the groove portion of the substrate, the electronic component can be reduced in thickness, size, or weight. In addition, self-alignment utilizing the surface tension of water enables efficient positioning almost simultaneously even if it is a minute part or a plurality of minute parts without being affected by mechanical accuracy. Further, when the upper layer is flattened, the disconnection of the wiring formed on the upper layer and the short circuit failure of the multilayer wiring are reduced, or in the case of a liquid crystal display device, the size of the pixel electrode is maximized to improve the aperture ratio. , The uniformity of the alignment treatment can be improved.
[0010]
Further, by providing a gap between the bottom of the groove and the bottom surface of the micro component, the frictional force can be reduced even if there is an electrostatic force or foreign matter or protrusion during self-alignment, and the micro component can be positioned with higher accuracy. Further, by using the side surface of the groove portion or the like for the terminal portion arrangement, it can be mounted at a higher density, or another wiring or (pixel) electrode can be expanded.
[0011]
Grooves slightly larger than the external dimensions in the width and depth direction of the microcomponent are formed on the first substrate, water is supplied to at least one of the microcomponent and the first substrate, and the microcomponent is attached to the first substrate. The micro parts may be aligned with the first substrate by self-alignment with the surface tension of water supplied to the temporary position by rough alignment in the groove of the substrate.
[0012]
According to the above method, since a liquid material is used as the alignment material, the alignment can be performed instantaneously when supplying the microparts, and if the alignment material is unnecessary, the removal is easy.
[0013]
After the alignment of the microcomponent with respect to the first substrate, the water interposed between the microcomponent and the first substrate may be removed.
[0014]
According to the above method, positioning is performed more accurately by removing water. For example, as in a TFT type liquid crystal display device or an integrated circuit, wiring corrosion due to moisture or the like, deterioration of characteristics of semiconductor elements, quality of liquid crystal, etc. Even in the case where the deterioration is likely to occur, the display quality and other functional deterioration can be suppressed to improve the reliability.
[0015]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below.
(Embodiment 1) Embodiment 1 of the present invention will be described in detail with reference to the following drawings, taking a TFT type liquid crystal display device as an example. FIG. 1 is a plan view and a cross-sectional view showing a configuration in the vicinity of a pixel of an active matrix substrate 1 in a liquid crystal display device according to an embodiment of the present invention. As shown in FIG. 1, an active matrix side substrate 1 as a first substrate is provided with tens of thousands or more of pixel electrodes 2 made of a transparent conductive material in a matrix (in the figure, abbreviated as three). Each gate wiring 3 for supplying a scanning signal and a source wiring 4 for supplying a display signal (data signal) are provided so as to pass around the pixel electrodes 2 and cross each other. Further, a TFT 6 (thin film transistor) as a switching element connected to the pixel electrode 1 is provided in the vicinity of an insulating cross (intersection) 5 between the gate wiring 4 and the source wiring 3.
[0016]
A gate wiring 3 is connected to the gate electrode of the TFT 6, and the TFT 6 is driven and controlled by a signal input to the gate electrode. A source wiring 4 is connected to the source electrode of the TFT 6, and a data signal (display signal) is input to the source electrode. Further, the drain electrode of the TFT 6 is connected to the pixel electrode 2. Further, for example, a chip 7 as a second substrate is inserted into the groove portion of the active matrix side substrate 1, and on the chip 7, an original substrate (manufacturing a first substrate for producing a plurality of chips 7 not shown) Usually, a plurality of liquid crystal display device substrates can be taken and a glass substrate having an area of several 100 mm square or more is generally smaller than the original substrate (for example, a silicon substrate having a diameter of several inches), and the TFT 6 and the gate wiring 3a and the source in advance. The wiring 4a and its cross part 5 are formed and separated into individual chips 7. 2A and 2B are cross-sectional views showing a mounting structure and a mounting method in the vicinity of the chip 7. FIG. 2A shows a cross-sectional structure of the chip 7. Terminals 8 for electrical connection are formed on the side surfaces of the chip 7, and solder balls (projection electrodes) 9 are further formed on the terminals 8. Next, as shown in FIG. 2B, the chip 7 is inserted into the groove 1 a of the first substrate 1. Here, the position and dimensions of the solder balls 9 are designed so that the lower surface 7a of the chip 7 is in contact with the bottom surface 1b of the groove 1a or a slight gap (for example, several μm in design) is provided, and the first substrate is designed. 1 so as to abut on the terminal 10. As a result, even if there are multiple terminals, electrical connection conduction is ensured, and especially the chip 7 is very small, and the chip 7 and the first substrate are fixed due to static electricity or other intermolecular forces, thereby preventing self-alignment. In this way, self-alignment of the next process is easily performed. Further, as shown in FIG. 2R> 2 (c), the solder ball 9a is melted, and the self-alignment in the X direction on the paper surface is performed by the surface tension of the molten solder ball 9a. If the chip 7 is very small and light, there is a possibility that the float may occur. If it is necessary to suppress the float, as shown in FIG. You may process in order of pressurization, heating, heating cancellation | release, and pressurization cancellation | release with the pressurizing tools 11, such as a heating. At that time, a slight deviation may occur, but it is about 0 to 5 μm in one example, and there is no problem. In addition, although the example of solder was shown as an alignment material, it is not restricted to this, Another conductive material or an insulating material may be sufficient. However, the conductive material is more efficient because it can simultaneously handle the connection between the terminals. As described above, the example of the liquid crystal display device has been shown, but the application of the present invention is not limited to the TFT type liquid crystal display device. For example, when a component such as a resistor, a capacitor, or a semiconductor integrated circuit is mounted on a printed board, Applicable to various electronic devices and parts.
(Embodiment 2) Another embodiment is shown in FIG. This example has substantially the same structure as that of the first embodiment, but the terminal 13 is provided on the side surface 12b of the groove 12a of the substrate 12, and the component chip 15 is connected via the solder 14 or the like. With such a structure, the entire chip 15 can be embedded in the substrate 12, making it thinner, making it easy to flatten the top layer, improving the reliability of the wiring formed on the top, Depending on the quality, quality can be improved. In the case of a liquid crystal display device, luminance can be improved and power consumption can be reduced. In addition, the pitch between a plurality of chips can be reduced, or other wiring areas can be widened to increase the wiring width.
(Embodiment 3) FIG. 4R> 4 (a) to (c) shows another embodiment of the present invention. As shown in FIG. 4A, a groove 16a is formed on the substrate 16, and a substrate-side wettability member 18 (glass in the case of water) is provided with an alignment material 17 such as solder or water at the bottom 16b of the groove. The component 20 having the component-side wettability member 19 made of the same material as the member 18 having good wettability is supplied by a mounter or the like. . In addition, by providing an inclination on the side surface 16c of the groove portion, it is possible to increase the allowable error value of the component supply position. Next, as shown in FIG. 4R> 4 (b), the component 20 is self-aligned, and when the alignment material is solder or the like, there is no need to proceed to the next FIG. 4 (c). When parallelism between the component 20 and the substrate 16 is required, a projection-shaped component receiving portion or a foot portion (not shown) may be formed on the substrate 16 side or the component 20 side, respectively. Further, in order to firmly fix the component 20, an adhesive such as photocuring or thermosetting (not shown) may be interposed between the substrate 16 and the component 20, and fixing the structure in which an adhesive layer is formed on the surface of the spacer member. A material and the like may be used for connection, parallelism, and arrangement height control. In addition, as shown in FIG. 4C, the alignment material is removed in order to improve the parallelism or the positional accuracy in the case of causing a problem such as a decrease in reliability of the circuit unit such as water. In the case of water or the like, it may be evaporated, or a hole or the like (not shown) may be provided in the center of the substrate-side wettability member 18 and drawn in under vacuum or low pressure. When the alignment material is solder or the like, a plurality of terminals may be provided to serve both as electrical connection of terminals and parallelism control. When the alignment material is water or the like, solder or metal bumps may be formed on the lower surface of the component as electrical connection terminals that serve to control the parallelism and the arrangement height, and the upper portion of the component may be flat. The signal wiring connection processing may be performed by performing the conversion processing, or the terminal connection may be performed by wire bond connection.
(Embodiment 4) Another embodiment of the present invention is shown in FIGS. 5 (a) to 5 (d), and the structure of a modification is shown in FIG. As shown in FIG. 5A, the surface of the substrate 21 remains substantially flat, and no processing such as groove formation is performed. Further, the alignment material 22 such as solder is contained on the surface of the substrate-side wettability member 23 with good wettability, and the component 25 having the component-side wettability member 24 made of the same material as the member 23 with good wettability is mounted on the mounter or the like. Supply with.
[0017]
A protruding electrode 26 is formed on the component 25. Next, as shown in FIG. 5B, the component 25 is arranged with high accuracy by self-alignment. Further, as shown in FIG. 5C, a planarizing film 27 is formed so as to cover the entire component 25. Then, as shown in FIG. 5D, the planarizing film 27a is etched from the upper surface of the substrate 21 until the protruding electrode 26a is exposed. The parts are made by forming various wirings, electrodes and insulating layers in the upper layer. Further, if the alignment material is water or the like, it may be evaporated, or a hole 29 for suction of the alignment material may be provided at the center of the substrate-side wettability member 28 as in the structure of FIG.
(Embodiment 5) Still another embodiment of the present invention is shown in FIGS. In the present embodiment, an example is shown in which self-alignment is used for alignment before dropping into the groove. As a result, the size of the groove can be further reduced, and higher-density mounting or the like can be achieved. First, as shown in FIG. 7A, the terminal 31 and solder 32 are formed and supplied to both ends of the side of the component 30 in advance, and solder paste or the like is supplied in some cases, and the terminal 34 is also formed on the side surface of the groove 33a of the substrate 33. In addition, the component 30 is supplied at high speed even if the position is slightly rough with a mounter or the like. Although not necessarily required, an adhesive 35 for reinforcing and fixing components may be supplied to the bottom of the groove. Also, when supplying a large amount of solder 32 or the like to increase the alignment force, the bottom corner of the groove is used as a solder escape portion in order to suppress the protrusion of the solder to the upper surface or to reduce short-circuit failure at the time of a minute pitch connection. Further, a second groove 36 may be formed. As shown in FIG. 7B, when the component 30 is placed on the substrate 33, the component 30 does not fit in the groove 33a. Next, although not shown in the drawing, the solder is melted in a reflow furnace temporarily or continuously with the next process, and the component 30 is aligned with the center of the groove 33 with high accuracy by self-alignment, and then as shown in FIG. In the case where the solder 32a is melted and heated with a pulse heat tool 37 or the like, and the adhesive is present, the curing of the adhesive is promoted, the component 30 is pushed in securely, the heating is released, and then the tool 37 Release the pressure.
[0018]
【The invention's effect】
As explained above, the present invention Power of According to the child component manufacturing method, the component in the concave portion can be inserted and aligned in the groove portion in the case of component mounting, so that the electronic component mounting board can be reduced in thickness, size, and weight. In addition, a process such as contact hole formation for connecting between the conductive layer connected to the lower surface of the component and the conductive layer on the surface of the substrate becomes unnecessary, and the effect of improving the connection reliability is achieved. In addition, since preliminary alignment can be performed in which the parts are inserted into the grooves and temporarily placed at the preliminary positions prior to the final alignment, it is possible to eliminate the temporary positioning-dedicated material. Therefore, in addition to reducing material costs, temporary positioning equipment is not required. The overall effect is to reduce the cost of electronic components. As in the case of liquid crystal display devices, in a mounting structure in which gate wiring, source wiring, and cross portions thereof are formed in an active matrix substrate, and a TFT type liquid crystal display device is mounted with individual TFT chips, the groove portion of the substrate Since the parts are mounted on the product, the product can be made thinner, smaller or lighter. In addition, self-alignment using surface tension enables efficient positioning almost simultaneously even for a minute part or a plurality of parts without being affected by mechanical accuracy. Further, when the upper layer is flattened, the disconnection of the wiring formed on the upper layer and the short circuit failure of the multilayer wiring are reduced, and in the case of a liquid crystal display device or the like, the size of the pixel electrode is maximized to improve the aperture ratio. Or the uniformity of the alignment treatment can be improved.
[Brief description of the drawings]
FIGS. 1A and 1B are a plan view and a cross-sectional view illustrating a configuration in the vicinity of a pixel of an active matrix substrate 1 in a liquid crystal display device according to Embodiment 1 of the present invention. FIGS.
FIG. 2 is a cross-sectional view showing a mounting structure and a mounting method in the vicinity of a chip 7; FIG. 2A shows a cross-sectional structure of the chip 7.
FIG. 3 is a diagram showing another embodiment of the present invention.
FIG. 4 is a diagram showing another embodiment of the present invention.
FIG. 5 is a diagram showing another embodiment of the present invention.
FIG. 6 is a diagram showing another embodiment of the present invention.
FIG. 7 is a diagram showing another embodiment of the present invention.
FIG. 8 is a circuit diagram illustrating a general configuration of a transmissive liquid crystal display device including an active matrix substrate.
FIG. 9 is a cross-sectional view of a TFT portion of an active matrix substrate in a conventional liquid crystal display device.
FIG. 10 is a schematic view relating to a mounting process of a high-density multi-terminal integrated circuit for simply explaining the steps.
[Explanation of symbols]
1 Active matrix substrate
2 Pixel electrode
3 Gate wiring
4 Source wiring
5 Crossing between gate wiring and source wiring
6 TFT
7 chips
8 Electrical connection terminals
9 Solder balls (projection electrodes)
10 Terminal of the first substrate 1
11 Pressurizing tool
12, 16, 21, 33, 122 substrate
12a, 16a substrate groove
12b Side of substrate
13 terminals
14, 32, 32a Solder
15 Component chips
16b Bottom of substrate groove
16c Side surface of groove
17 Alignment material
18 Substrate-side wettability member
19 Parts side wettability
20, 25, 30 parts
22 Alignment materials
23, 28 Substrate-side wettability member
24 Parts-side wettability
26, 26a Projection electrode
27, 27a Planarizing film
29 Hole for alignment material suction
31, 34 terminals
33a substrate groove
36 Second groove
37 Pulse Heat Tool
101 Active matrix substrate
102 Pixel electrode
103, 115 TFT
104 Gate wiring
105 Source wiring
106 Additional capacity
107 Common wiring
108 Gate electrode
109 Gate insulation film
110 Semiconductor layer
111 channel protective layer
112a Source electrode
112b Drain electrode
113a, 113b Metal layer
114 pixel electrode
116 Interlayer insulation film
116a contact hole
120 integrated circuit
121, 121a Solder bumps (projection electrodes are called bumps)

Claims (3)

A first substrate on which a number of wirings of the same pattern are formed;
A mounting region having a terminal connected to each of the wirings on the first substrate and formed by at least one first film layer;
A method for manufacturing an electronic component, comprising: a terminal formed of a second film layer different from the first film layer; and a switching device connected to the terminal, and a micro component stacked in the mounting region. And
A plurality of the micro components are formed on a second substrate different from the first substrate, and then the micro components are formed by dividing the second substrate into single or small numbers,
In the mounting area of the first substrate, a groove for mounting the micro component is formed,
A method of manufacturing an electronic component, wherein the micro component is self-aligned and mounted on the groove portion of the first substrate by surface tension caused by water. Forming a groove slightly larger than the width and depth of the micro component on the first substrate;
Supplying water to at least one of the micro component and the first substrate;
The micro component is supplied to a temporary position by rough alignment in the groove portion of the first substrate, and the micro component is aligned with respect to the first substrate by self-alignment by the surface tension of water. The manufacturing method of the electronic component of Claim 1 . 3. The method of manufacturing an electronic component according to claim 2 , wherein after the alignment of the micro component with respect to the first substrate, the water interposed between the micro component and the first substrate is removed.

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