JP3906982B2 - Triangular wave voltage generator - Google Patents

Triangular wave voltage generator Download PDF

Info

Publication number
JP3906982B2
JP3906982B2 JP2002005653A JP2002005653A JP3906982B2 JP 3906982 B2 JP3906982 B2 JP 3906982B2 JP 2002005653 A JP2002005653 A JP 2002005653A JP 2002005653 A JP2002005653 A JP 2002005653A JP 3906982 B2 JP3906982 B2 JP 3906982B2
Authority
JP
Japan
Prior art keywords
terminal
resistor
voltage
diode
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2002005653A
Other languages
Japanese (ja)
Other versions
JP2003209462A (en
Inventor
義彦 山方
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Systems Co Ltd filed Critical Fuji Electric Systems Co Ltd
Priority to JP2002005653A priority Critical patent/JP3906982B2/en
Publication of JP2003209462A publication Critical patent/JP2003209462A/en
Application granted granted Critical
Publication of JP3906982B2 publication Critical patent/JP3906982B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Landscapes

  • Power Conversion In General (AREA)

Description

【0001】
【発明の属する技術分野】
この発明は、例えば、半導体電力変換回路を構成するそれぞれの半導体素子へのパルス幅変調(PWM)されたオン・オフ信号を生成するための搬送波回路としての三角波電圧発生回路に関する。
【0002】
【従来の技術】
図2は、この種の三角波電圧発生回路の従来例を示す回路構成図であり、Ra,Rb,Rc,Rdは抵抗、Cはコンデンサ、Cpは反転入力端子(図示の「−」端子),非反転入力端子(図示の「+」端子),オープンコレクタ方式の出力端子を備えるコンパレータ素子(以下、単に素子Cpとも称する)を示し、また、この素子Cpの電源端子は中間電位(0V)点を基準電位端子(アース記号)とした図示しない制御電源の両端(V+,V−)に接続される。ここで、オープンコレクタ方式の出力端子を備えるコンパレータ素子Cpは反転入力端子の電位が非反転入力端子の電位より低いときには前記出力端子がオフ状態となり、このときには該出力端子から見た内部インピーダンスが非常に大きな値になり、また、反転入力端子の電位が非反転入力端子の電位より高いときには前記出力端子がオン状態になり、このときの出力端子の電位は前記V−の電位とほぼ等しくなる。
【0003】
図2の三角波電圧発生回路の動作を以下に説明する。
【0004】
先ず、素子Cpの出力端子がオフ状態のとき、コンデンサCには前記V+から抵抗Raと抵抗Rcとを介した充電電流が流れ、この充電電流によりコンデンサCの素子Cpの反転入力端子側の電圧が滑らかに上昇する。このコンデンサCの電圧が素子Cpの非反転入力端子の電圧、すなわち、Rdの両端電圧より上昇すると、素子Cpの出力端子はオフ状態からオン状態に変わる。
【0005】
素子Cpの出力端子がオン状態に変わると、コンデンサCに蓄えられた電荷は抵抗Rcと素子Cpの出力端子とを介して緩やかに前記V−側に流出する。このとき、前記基準電位端子から抵抗Rdと抵抗Rbとを介した電流も前記V−に向かって流れるため、素子Cpの非反転入力端子の電位がマイナスの値になる。従って、緩やかに低下するコンデンサCの電圧が素子Cpの非反転入力端子の電圧より低くなると、素子Cpの出力端子はオン状態からオフ状態に変わる。
【0006】
上述の動作を繰り返すことにより、コンデンサCの両端電圧が三角波状に変化するが、このときの両端電圧の最小値は、図2に示すようにマイナスとなる。
【0007】
【発明が解決しようとする課題】
半導体電力変換回路を構成するそれぞれの半導体素子へのパルス幅変調されたオン・オフ信号を生成するときには、三角波電圧と信号波電圧との比較演算を行うが、この比較演算を行うコンパレータ回路は、後段のロジック素子等とのインタフェースを簡単にするために、例えば、端子電圧が5ボルトの論理回路電源で動作させることが一般的である。
【0008】
前記コンパレータ回路を利用する際には、三角波電圧自身の最小電圧が0ボルト、すなわち基準電位であることが望ましいが、図2に示した従来の三角波電圧発生回路が出力する三角波電圧の最小電圧は、上述の如くマイナス電位となっている。従って、バイアス電圧を発生するバイアス電源回路と、このバイアス電圧と、従来の三角波電圧発生回路が出力する三角波電圧とを加算演算して等価的に三角波電圧の最小電圧を0ボルトにする加算回路とを追加する必要があり、その結果、パルス幅変調のための回路構成全体を複雑にするという難点があった。
【0009】
この発明の目的は上記問題点を解決し、簡単な回路構成で三角波電圧自身の最小電圧が0ボルトの三角波電圧発生回路を提供することにある。
【0010】
【課題を解決するための手段】
この発明の三角波電圧発生回路では、中間電位点を基準電位端子とした制御電源と、オープンコレクタ方式またはオープンドレイン方式の出力端子を有するコンパレータ素子と、第1乃至第4抵抗と、第1乃至第3ダイオードと、コンデンサとを備え、前記制御電源の両端を前記コンパレータ素子の電源端子に接続し、第1抵抗の一端を前記制御電源の正側端子に接続し、第1抵抗の他端と第2抵抗の一端と第3抵抗の一端と前記コンパレータ素子の出力端子とを互いに接続し、第2抵抗の他端と前記コンパレータ素子の非反転入力端子と第4抵抗の一端と第1ダイオードのカソード端子とを互いに接続し、第4抵抗の他端と第1ダイオードのアノード端子とを前記基準電位端子に接続し、第3抵抗の他端と前記コンパレータ素子の反転入力端子と第2ダイオードのカソード端子と第3ダイオードのアノード端子とを互いに接続し、第2ダイオードのアノード端子と第3ダイオードのカソード端子とコンデンサの一端とを互いに接続し、コンデンサの他端を前記基準電位端子に接続し、前記コンデンサの両端電圧を外部へ出力することを特徴とする。
【0011】
この発明によれば、従来の回路構成にダイオード3個を付加することにより、出力する三角波電圧の最小電圧をほぼ0ボルトにすることができる。
【0012】
【発明の実施の形態】
図1は、この発明の実施例を示す三角波電圧発生回路の回路構成図であり、図2に示した従来例回路と同一機能を有するものには同一符号を付している。
【0013】
図1に示した回路構成ではコンパレータ素子Cpと、コンデンサCと、第1抵抗としての抵抗R1と、第2抵抗としての抵抗R2と、第3抵抗としての抵抗R3と、第4抵抗としての抵抗R4と、第1ダイオードとしてのダイオードD1と、第2ダイオードとしてのダイオードD2と、第3ダイオードとしてのダイオードD3と、従来例回路と同様の制御電源(図示せず)とを備えている。
【0014】
すなわち、図1に示した三角波電圧発生回路が図2に示した従来例回路構成と異なる点は、ダイオードD1〜D3が追加されていることである。
【0015】
図1の三角波電圧発生回路の動作を以下に説明する。
【0016】
先ず、素子Cpの出力端子がオフ状態のとき、コンデンサCには前記V+から抵抗R1と抵抗R3とダイオードD3とを介した充電電流が流れ、この充電電流によりコンデンサCの素子Cpの反転入力端子側の電圧が滑らかに上昇する。このコンデンサCの電圧が素子Cpの非反転入力端子の電圧、すなわち、R4の両端電圧より上昇すると、素子Cpの出力端子はオフ状態からオン状態に変わる。このとき、コンデンサCの両端電圧の最大電圧値を前記V+の値より十分に小さく設定することにより、該両端電圧はほぼ直線的に上昇する。
【0017】
次に、素子Cpの出力端子がオン状態に変わると、コンデンサCに蓄えられた電荷はダイオードD2と抵抗R3と素子Cpの出力端子とを介して緩やかに前記V−側に流出する。このとき、前記基準電位端子からダイオードD1と抵抗R2とを介した電流も前記V−に向かって流れるため、素子Cpの非反転入力端子の電位がダイオードD1のえん層電圧分だけマイナスの値になる。従って、緩やかに低下するコンデンサCの電圧が素子Cpの非反転入力端子の前記電圧より低くなると、素子Cpの出力端子はオン状態からオフ状態に変わる。このとき、コンデンサCの両端電圧の最小電圧値を前記V−の電圧値より十分に小さく設定することにより、該両端電圧はほぼ直線的に下降し、この下降した電圧が素子Cpの非反転入力端子の電圧より低くなると、素子Cpの出力端子はオン状態からオフ状態に変わる。ここで、抵抗R2と抵抗R3の抵抗値を等しく設定し、ダイオードD1とダイオードD2を同仕様のものを選定すると、これらのダイオードに流れる電流はほぼ等しくなることから、これらのダイオードのえん層電圧はほぼ等しくなり、その結果、コンデンサCの最小電圧もほぼ0ボルトとなる。
【0018】
上述の動作を繰り返すことにより、この発明の三角波電圧発生回路の出力であるコンデンサCの両端電圧が三角波状に変化し、このときの両端電圧の最小値は図1に示すように0ボルトとなる。
【0019】
【発明の効果】
この発明によれば、従来の三角波電圧発生回路に対して、小形,安価な3個の信号用ダイオードを追加することで、例えば、半導体電力変換回路のPWM制御に好適な三角波電圧発生回路を提供することができる。
【図面の簡単な説明】
【図1】この発明の実施例を示す三角波電圧発生回路の回路構成図
【図2】従来例を示す三角波電圧発生回路の回路構成図
【符号の簡単な説明】
Cp :コンパレータ素子
R1〜R4:抵抗
D1〜D3:ダイオード
C :コンデンサ
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a triangular wave voltage generation circuit as a carrier wave circuit for generating, for example, a pulse width modulated (PWM) on / off signal to each semiconductor element constituting a semiconductor power conversion circuit.
[0002]
[Prior art]
FIG. 2 is a circuit configuration diagram showing a conventional example of this type of triangular wave voltage generation circuit, where Ra, Rb, Rc, and Rd are resistors, C is a capacitor, Cp is an inverting input terminal ("-" terminal shown in the figure), A comparator element (hereinafter also simply referred to as element Cp) having a non-inverting input terminal (“+” terminal in the figure) and an open collector type output terminal is shown, and the power supply terminal of this element Cp has an intermediate potential (0 V) point. Is connected to both ends (V +, V−) of a control power source (not shown) having a reference potential terminal (ground symbol). Here, in the comparator element Cp having an open collector type output terminal, the output terminal is turned off when the potential of the inverting input terminal is lower than the potential of the non-inverting input terminal. At this time, the internal impedance viewed from the output terminal is very low. When the potential of the inverting input terminal is higher than the potential of the non-inverting input terminal, the output terminal is turned on, and the potential of the output terminal at this time is substantially equal to the potential of V−.
[0003]
The operation of the triangular wave voltage generation circuit of FIG. 2 will be described below.
[0004]
First, when the output terminal of the element Cp is in an OFF state, a charging current flows from the V + through the resistor Ra and the resistor Rc to the capacitor C, and this charging current causes a voltage on the inverting input terminal side of the element Cp of the capacitor C. Rises smoothly. When the voltage of the capacitor C rises above the voltage at the non-inverting input terminal of the element Cp, that is, the voltage across Rd, the output terminal of the element Cp changes from the off state to the on state.
[0005]
When the output terminal of the element Cp is turned on, the electric charge stored in the capacitor C slowly flows out to the V− side through the resistor Rc and the output terminal of the element Cp. At this time, since the current from the reference potential terminal via the resistor Rd and the resistor Rb also flows toward the V−, the potential of the non-inverting input terminal of the element Cp becomes a negative value. Therefore, when the slowly decreasing voltage of the capacitor C becomes lower than the voltage of the non-inverting input terminal of the element Cp, the output terminal of the element Cp changes from the on state to the off state.
[0006]
By repeating the above-described operation, the voltage across the capacitor C changes in a triangular waveform. At this time, the minimum value of the voltage across the capacitor is negative as shown in FIG.
[0007]
[Problems to be solved by the invention]
When generating a pulse width modulated on / off signal to each semiconductor element constituting the semiconductor power conversion circuit, a comparison operation between the triangular wave voltage and the signal wave voltage is performed. In order to simplify the interface with a logic element or the like in the subsequent stage, for example, it is common to operate with a logic circuit power supply having a terminal voltage of 5 volts.
[0008]
When the comparator circuit is used, it is desirable that the minimum voltage of the triangular wave voltage itself is 0 volt, that is, the reference potential, but the minimum voltage of the triangular wave voltage output from the conventional triangular wave voltage generating circuit shown in FIG. As described above, the potential is negative. Accordingly, a bias power supply circuit for generating a bias voltage, an addition circuit for equivalently calculating the minimum voltage of the triangular wave voltage by adding the bias voltage and the triangular wave voltage output from the conventional triangular wave voltage generating circuit to 0 volt, and As a result, there is a difficulty in complicating the entire circuit configuration for pulse width modulation.
[0009]
An object of the present invention is to solve the above-mentioned problems and to provide a triangular wave voltage generating circuit in which the minimum voltage of the triangular wave voltage itself is 0 volts with a simple circuit configuration.
[0010]
[Means for Solving the Problems]
In the triangular wave voltage generation circuit according to the present invention, a control power supply having an intermediate potential point as a reference potential terminal, a comparator element having an output terminal of an open collector system or an open drain system, first to fourth resistors, and first to fourth resistors 3 diodes and a capacitor, both ends of the control power supply are connected to the power supply terminal of the comparator element, one end of the first resistor is connected to the positive terminal of the control power supply, the other end of the first resistance and the second One end of the two resistors, one end of the third resistor, and the output terminal of the comparator element are connected to each other, the other end of the second resistor, the non-inverting input terminal of the comparator element, one end of the fourth resistor, and the cathode of the first diode The other end of the fourth resistor and the anode terminal of the first diode are connected to the reference potential terminal, the other end of the third resistor and the inverting input of the comparator element And the cathode terminal of the second diode and the anode terminal of the third diode are connected to each other, the anode terminal of the second diode, the cathode terminal of the third diode, and one end of the capacitor are connected to each other. It is connected to a reference potential terminal, and the voltage across the capacitor is output to the outside.
[0011]
According to the present invention, by adding three diodes to the conventional circuit configuration, the minimum voltage of the output triangular wave voltage can be reduced to almost 0 volts.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is a circuit configuration diagram of a triangular wave voltage generating circuit showing an embodiment of the present invention. Components having the same functions as those of the conventional circuit shown in FIG. 2 are denoted by the same reference numerals.
[0013]
In the circuit configuration shown in FIG. 1, a comparator element Cp, a capacitor C, a resistor R1 as a first resistor, a resistor R2 as a second resistor, a resistor R3 as a third resistor, and a resistor as a fourth resistor R4, a diode D1 as a first diode, a diode D2 as a second diode, a diode D3 as a third diode, and a control power supply (not shown) similar to the conventional circuit are provided.
[0014]
That is, the triangular wave voltage generating circuit shown in FIG. 1 is different from the conventional circuit configuration shown in FIG. 2 in that diodes D1 to D3 are added.
[0015]
The operation of the triangular wave voltage generation circuit of FIG. 1 will be described below.
[0016]
First, when the output terminal of the element Cp is in an off state, a charging current flows from the V + through the resistor R1, the resistor R3, and the diode D3 to the capacitor C, and this charging current causes an inverting input terminal of the element Cp of the capacitor C. The voltage on the side rises smoothly. When the voltage of the capacitor C rises above the voltage at the non-inverting input terminal of the element Cp, that is, the voltage across R4, the output terminal of the element Cp changes from the off state to the on state. At this time, by setting the maximum voltage value of the voltage across the capacitor C to be sufficiently smaller than the value of V +, the voltage across the voltage rises almost linearly.
[0017]
Next, when the output terminal of the element Cp is turned on, the electric charge stored in the capacitor C gradually flows out to the V− side via the diode D2, the resistor R3, and the output terminal of the element Cp. At this time, since the current from the reference potential terminal via the diode D1 and the resistor R2 also flows toward the V-, the potential of the non-inverting input terminal of the element Cp becomes a negative value by the amount corresponding to the layer voltage of the diode D1. Become. Accordingly, when the slowly decreasing voltage of the capacitor C becomes lower than the voltage at the non-inverting input terminal of the element Cp, the output terminal of the element Cp changes from the on state to the off state. At this time, by setting the minimum voltage value of the voltage across the capacitor C to be sufficiently smaller than the voltage value of V−, the voltage across the voltage drops almost linearly, and this lowered voltage is the non-inverting input of the element Cp. When the voltage is lower than the terminal voltage, the output terminal of the element Cp changes from the on state to the off state. Here, if the resistance values of the resistors R2 and R3 are set to be equal, and the diodes D1 and D2 having the same specifications are selected, the currents flowing through these diodes become substantially equal. Are approximately equal, so that the minimum voltage on capacitor C is also approximately 0 volts.
[0018]
By repeating the above operation, the voltage across the capacitor C, which is the output of the triangular wave voltage generating circuit of the present invention, changes in a triangular wave shape, and the minimum value of the voltage across the capacitor is 0 volts as shown in FIG. .
[0019]
【The invention's effect】
According to the present invention, for example, a triangular wave voltage generation circuit suitable for PWM control of a semiconductor power conversion circuit is provided by adding three small and inexpensive signal diodes to the conventional triangular wave voltage generation circuit. can do.
[Brief description of the drawings]
FIG. 1 is a circuit configuration diagram of a triangular wave voltage generating circuit showing an embodiment of the present invention. FIG. 2 is a circuit configuration diagram of a triangular wave voltage generating circuit showing a conventional example.
Cp: Comparator elements R1 to R4: Resistors D1 to D3: Diode C: Capacitor

Claims (1)

中間電位点を基準電位端子とした制御電源と、オープンコレクタ方式またはオープンドレイン方式の出力端子を有するコンパレータ素子と、第1乃至第4抵抗と、第1乃至第3ダイオードと、コンデンサとを備え、
前記制御電源の両端を前記コンパレータ素子の電源端子に接続し、第1抵抗の一端を前記制御電源の正側端子に接続し、第1抵抗の他端と第2抵抗の一端と第3抵抗の一端と前記コンパレータ素子の出力端子とを互いに接続し、第2抵抗の他端と前記コンパレータ素子の非反転入力端子と第4抵抗の一端と第1ダイオードのカソード端子とを互いに接続し、第4抵抗の他端と第1ダイオードのアノード端子とを前記基準電位端子に接続し、第3抵抗の他端と前記コンパレータ素子の反転入力端子と第2ダイオードのカソード端子と第3ダイオードのアノード端子とを互いに接続し、第2ダイオードのアノード端子と第3ダイオードのカソード端子とコンデンサの一端とを互いに接続し、コンデンサの他端を前記基準電位端子に接続し、
前記コンデンサの両端電圧を外部へ出力することを特徴とする三角波電圧発生回路。
A control power supply having an intermediate potential point as a reference potential terminal; a comparator element having an output terminal of an open collector system or an open drain system; first to fourth resistors; first to third diodes; and a capacitor;
Both ends of the control power source are connected to the power source terminal of the comparator element, one end of the first resistor is connected to the positive side terminal of the control power source, the other end of the first resistor, one end of the second resistor, and the third resistor One end and the output terminal of the comparator element are connected to each other, the other end of the second resistor, the non-inverting input terminal of the comparator element, one end of the fourth resistor, and the cathode terminal of the first diode are connected to each other. The other end of the resistor and the anode terminal of the first diode are connected to the reference potential terminal, the other end of the third resistor, the inverting input terminal of the comparator element, the cathode terminal of the second diode, and the anode terminal of the third diode Are connected to each other, the anode terminal of the second diode, the cathode terminal of the third diode and one end of the capacitor are connected to each other, the other end of the capacitor is connected to the reference potential terminal,
A triangular wave voltage generating circuit for outputting the voltage across the capacitor to the outside.
JP2002005653A 2002-01-15 2002-01-15 Triangular wave voltage generator Expired - Fee Related JP3906982B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002005653A JP3906982B2 (en) 2002-01-15 2002-01-15 Triangular wave voltage generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002005653A JP3906982B2 (en) 2002-01-15 2002-01-15 Triangular wave voltage generator

Publications (2)

Publication Number Publication Date
JP2003209462A JP2003209462A (en) 2003-07-25
JP3906982B2 true JP3906982B2 (en) 2007-04-18

Family

ID=27644640

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002005653A Expired - Fee Related JP3906982B2 (en) 2002-01-15 2002-01-15 Triangular wave voltage generator

Country Status (1)

Country Link
JP (1) JP3906982B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1848683B (en) * 2005-04-15 2010-05-05 鸿富锦精密工业(深圳)有限公司 Trianglar-wave generator and pulse-width modulation signal generating circuit containing the same

Also Published As

Publication number Publication date
JP2003209462A (en) 2003-07-25

Similar Documents

Publication Publication Date Title
US8942019B2 (en) Current vector controlled deadtime for multilevel inverters
US20030090246A1 (en) DC-DC converter with current control
TW201029302A (en) Slope compensation circuit
JPH09502598A (en) Bridge rectifier circuit with active switch and active control circuit
JPS60215222A (en) Dc power supply circuit
JP2018074666A (en) Power conversion device
JP2008206226A (en) Detection circuit and power supply system
JP3920371B2 (en) Charging device, current detection circuit, and voltage detection circuit
JPH1042553A (en) Power supply device
JP3906982B2 (en) Triangular wave voltage generator
US7616458B2 (en) PWM current controlling apparatuses capable of optimally correcting load current
US7102320B1 (en) Half-bridge control circuit
TWI436582B (en) Motor driving circuit and method thereof
JP6868492B2 (en) Pulse generation circuit
WO2003041250A1 (en) Dc-dc converter with current control
JP4310982B2 (en) Non-isolated step-down converter and electronic device using the same
JP5713543B2 (en) Pulse width modulation circuit and switching amplifier using the same
JPH04324983A (en) Light emitting element drive power supply circuit
CN217363048U (en) One-way conduction circuit
US6879199B2 (en) PWM control signal generation method and apparatus
JP2003284334A (en) Reference voltage generating circuit and battery charging circuit employing it
JP2000013203A (en) Pulse shaping device and pulse shaping method
US6765449B2 (en) Pulse width modulation circuit
JPH0548406A (en) Synchronous triangle wave generating circuit
JPS5840414Y2 (en) Initial set pulse generation circuit

Legal Events

Date Code Title Description
A625 Written request for application examination (by other person)

Free format text: JAPANESE INTERMEDIATE CODE: A625

Effective date: 20040812

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20041201

RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20041210

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20060210

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20061221

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20061228

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20070110

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110126

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110126

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120126

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120126

Year of fee payment: 5

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120126

Year of fee payment: 5

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130126

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130126

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140126

Year of fee payment: 7

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees