JP3906091B2

JP3906091B2 - Semiconductor evaluation method and semiconductor evaluation apparatus

Info

Publication number: JP3906091B2
Application number: JP2002030655A
Authority: JP
Inventors: 辺浩志渡; 下大介松
Original assignee: Toshiba Corp
Current assignee: Toshiba Corp
Priority date: 2002-02-07
Filing date: 2002-02-07
Publication date: 2007-04-18
Anticipated expiration: 2022-02-07
Also published as: JP2003234469A

Description

【０００１】
【発明の属する技術分野】
本発明は、ＭＯＳトランジスタやＭＯＳキャパシタ等における絶縁膜の下部に位置する半導体表面の不純物濃度を評価する半導体評価方法および半導体評価装置に関する。
【０００２】
【従来の技術】
半導体基板中の不純物濃度は深さ方向に分布しているが、半導体装置の電気特性は表面近傍での不純物濃度に敏感である。このため、表面不純物濃度を正確に測定する技術が半導体装置の設計および製造の面から不可欠である。
【０００３】
【発明が解決しようとする課題】
しかしながら、従来は、基板深さ方向の不純物濃度を測定する際、半導体装置を削り取りながらSIMS(Secondary Ion Mass Spectrometry)という手法を使って測定するのが一般的であった。この手法では測定後の半導体装置を破壊してしまう上に、削り取る深さを非常に薄くし、しかもその幅を正確にしなければ十分な測定精度が得られないという問題がある。
【０００４】
また、ウエハ表面を部分的に削り取るのは技術的に難しい上に、部分的に削り取るだけでは、ウエハ上の表面不純物濃度の全体的な分布を評価することはできない。さらに、ウエハ表面を削り取った個所では、不純物濃度が変化するおそれもある。
【０００５】
本発明は、上記の問題点に鑑みてなされたもので、その目的は、半導体基板上に形成された半導体装置を破壊することなく、基板表面の不純物濃度の分布を精度よく測定可能な半導体評価方法および半導体評価装置を提供することにある。
【０００６】
【課題を解決するための手段】
上述した課題を解決するために、本発明は、絶縁膜の上面に形成される不純物を含む半導体からなる第１導電性膜と、前記絶縁膜の下面に形成される不純物を含む半導体からなる第２導電性膜と、を有する半導体装置の電気的特性をシミュレータにより評価する半導体評価方法であって、前記第１および第２導電性膜間に、フラットバンド条件を満たす電圧を含む電圧区間内の電圧を印加し、各電圧ごとに前記絶縁膜を介して前記第１および第２導電性膜間を流れる電流、または前記第１および第２導電性膜間の容量を測定するステップと、前記測定された前記第１および第２の導電性膜間を流れる電流と、前記第１および第２導電性膜間の容量と、に基づいて、前記絶縁膜の厚さ、前記第１導電性膜の不純物濃度、前記第２導電性膜の基板不純物濃度、前記第２導電性膜の表面不純物濃度、および前記絶縁膜中の不純物濃度を計算するステップと、を備える。
【０００７】
本発明では、第１および第２導電性膜間に絶縁破壊を起こさないほど低い電圧を印加して、第１および第２導電性膜間を流れる電流、または第１および第２導電性膜間の容量を測定するため、半導体装置を破壊することなく、半導体装置の絶縁膜の厚さ、第１導電性膜の不純物濃度、第２導電性膜の基板不純物濃度、第２導電性膜の表面不純物濃度、および絶縁膜中の不純物濃度を、種々に電圧を変化させながら精度よく評価できる。
【０００８】
また、本発明は、絶縁膜の上面に形成される不純物を含む半導体からなる第１導電性膜と、前記絶縁膜の下面に形成されるｐ型不純物を含む半導体からなる第２導電性膜と、を有する半導体装置の電気的特性をシミュレータにより評価する半導体評価方法であって、前記第２導電性膜の表面が蓄積層になる程度の電圧を前記第１導電性膜に印加した状態で、前記シミュレータにより計算された前記第１および第２導電性膜間の容量が前記容量の測定値に一致するように前記絶縁膜の膜厚を調整して、前記絶縁膜の膜厚を逆抽出するステップと、前記第２導電性膜の表面が反転層になる程度の電圧を前記第１導電性膜に印加した状態で、前記逆抽出された絶縁膜の膜厚を用いて前記シミュレータで計算された前記容量が前記容量の測定値に一致するように前記第１導電性膜の不純物濃度を調整して、前記第１導電性膜の不純物濃度を逆抽出するステップと、前記第２導電性膜の表面が空乏層になる程度の電圧を前記第１導電性膜に印加した状態で、前記逆抽出された絶縁膜の膜厚および前記逆抽出された第１導電性膜の不純物濃度を用いて前記シミュレータで計算された前記容量の傾きが測定された前記容量の傾きに一致するように前記第２導電性膜の基板不純物濃度を調整して、前記第２導電性膜の基板不純物濃度を逆抽出するステップと、前記第２導電性膜の表面が空乏層になる電圧領域の電圧を前記第１導電性膜に印加した状態で、前記逆抽出された絶縁膜の膜厚、前記逆抽出された第１導電性膜の不純物濃度および前記逆抽出された第２導電性膜の基板不純物濃度を用いて前記シミュレータで計算された前記容量が前記容量の測定値に一致するように前記第２導電性膜の表面不純物濃度を調整して、前記第２導電性膜の表面不純物濃度を逆抽出するステップと、前記第２導電性膜の表面が空乏層になる程度の電圧を前記第１導電性膜に印加した状態で、前記逆抽出された絶縁膜の膜厚、前記逆抽出された第１導電性膜の不純物濃度、前記逆抽出された第２導電性膜の基板不純物濃度および前記逆抽出された第２導電性膜の表面不純物濃度を用いて前記シミュレータで計算された前記電流が前記電流の測定値に一致するように前記絶縁膜の膜中不純物濃度を調整して、前記絶縁膜の膜中不純物濃度を逆抽出するステップと、を備える。
【０００９】
また、本発明は、絶縁膜の上面に形成される不純物を含む半導体からなる第１導電性膜と、前記絶縁膜の下面に形成されるｎ型不純物を含む半導体からなる第２導電性膜と、を有する半導体装置の電気的特性をシミュレータにより評価する半導体評価方法であって、前記第２導電性膜の表面が反転層になる程度の電圧を前記第１導電性膜に印加した状態で、前記シミュレータにより計算された前記第１および第２導電性膜間の容量が前記容量の測定値に一致するように前記絶縁膜の膜厚を調整して、前記絶縁膜の膜厚を逆抽出するステップと、前記第２導電性膜の表面が蓄積層になる程度の電圧を前記第１導電性膜に印加した状態で、前記逆抽出された絶縁膜の膜厚を用いて前記シミュレータで計算された前記容量が前記容量の測定値に一致するように前記第１導電性膜の不純物濃度を調整して、前記第１導電性膜の不純物濃度を逆抽出するステップと、前記第２導電性膜の表面が空乏層になる程度の電圧を前記第１導電性膜に印加した状態で、前記逆抽出された絶縁膜の膜厚および前記逆抽出された第１導電性膜の不純物濃度を用いて前記シミュレータで計算された前記容量の傾きが測定された前記容量の傾きに一致するように前記第２導電性膜の基板不純物濃度を調整して、前記第２導電性膜の基板不純物濃度を逆抽出するステップと、前記第２導電性膜の表面が空乏層になる程度の電圧を前記第１導電性膜に印加した状態で、前記逆抽出された絶縁膜の膜厚、前記逆抽出された第１導電性膜の不純物濃度および前記逆抽出された第２導電性膜の表面不純物濃度を用いて前記シミュレータで計算された前記容量が前記容量の測定値に一致するように前記第２導電性膜の表面不純物濃度を調整して、前記第２導電性膜の表面不純物濃度を逆抽出するステップと、前記第２導電性膜の表面が空乏層になる程度の電圧を前記第１導電性膜に印加した状態で、前記逆抽出された絶縁膜の膜厚、前記逆抽出された第１導電性膜の不純物濃度、前記逆抽出された第２導電性膜の基板不純物濃度および前記逆抽出された第２導電性膜の表面不純物濃度を用いて前記シミュレータで計算された前記電流が前記電流の測定値に一致するように前記絶縁膜の膜中不純物濃度を調整して、前記絶縁膜の膜中不純物濃度を逆抽出するステップと、を備える。
【００１０】
【発明の実施の形態】
以下、本発明に係る半導体評価方法および半導体評価装置について、図面を参照しながら具体的に説明する。
【００１１】
図１は本発明に係る半導体評価装置の一実施形態の概略構成を示すブロック図である。図１の半導体評価装置は、ＭＯＳトランジスタやＭＯＳキャパシタ内の絶縁膜とこの上部に形成される半導体の表面不純物濃度を決定するものである。以下では、ｎ+／SiＯ₂／p-Si構造のnMOSキャパシタを例に取って説明するが、pMOSキャパシタ、ｎＭＯＳトランジスタおよびｐＭＯＳトランジスタでも同様の処理手順で電気的特性を評価できる。
【００１２】
本明細書では、nMOSキャパシタ内の絶縁膜の上部に形成される導電膜を第１導電性膜、絶縁膜の下部の半導体を第２導電性膜と呼ぶ。第１導電性膜は例えばポリシリコンを材料として形成され、第２導電性膜は半導体基板上または半導体基板内の所望の領域に不純物イオンを注入して形成されるウェルである。
【００１３】
図１の半導体評価装置は、絶縁膜厚逆抽出部１と、不純物濃度逆抽出部２と、基板濃度逆抽出部３と、表面濃度逆抽出部４と、絶縁膜中濃度逆抽出部５と、シミュレータ６とを備えている。
【００１４】
絶縁膜厚逆抽出部１は、第２導電性膜の表面が蓄積層（pMOSキャパシタの場合は反転層）になるような電圧を第１導電性膜に印加した状態で、シミュレータ６により第１および第２導電性膜間の容量Ｃを計算し、その計算結果が容量Ｃの測定値に一致するように絶縁膜の膜厚を調整して、絶縁膜厚ｔoxを逆抽出する。
【００１５】
不純物濃度逆抽出部２は、第２導電性膜の表面が反転層（pMOSキャパシタの場合は蓄積層）になるような電圧を第１導電性膜に印加した状態で、逆抽出された絶縁膜厚ｔoxを用いてシミュレータ６により容量Ｃを計算し、その計算結果が容量Ｃの測定値に一致するように第１導電性膜としてのポリシリコン中の不純物濃度（以下、ポリ濃度と呼ぶ）Ｎpolyを調整して、ポリ濃度Ｎpolyを逆抽出する。
【００１６】
基板濃度逆抽出部３は、第２導電性膜の表面が反転層（pMOSキャパシタの場合は蓄積層）から空乏層になるような電圧と、空乏層から蓄積層（pMOSキャパシタの場合は反転層）になるような電圧と、をそれぞれ第１導電性膜に印加した状態で、逆抽出された絶縁膜厚ｔoxと第１導電性膜のポリ濃度Ｎpolyを用いてシミュレータ６により容量Ｃを計算し、その計算結果の傾きが容量Ｃの測定値の傾きに一致するように第２導電性膜の基板不純物濃度Ｎsubを調整して、第２導電性膜の基板不純物濃度Ｎsubを逆抽出する。
【００１７】
表面濃度逆抽出部４は、第２導電性膜の表面が空乏層になるような電圧を第１導電性膜に印加した状態で、逆抽出された絶縁膜厚ｔox、第１導電性膜のポリ濃度Ｎpolyおよび第２導電性膜の基板不純物濃度Ｎsubを用いてシミュレータ６により容量Ｃを計算し、その計算結果が容量Ｃの測定値に一致するように第２導電性膜の表面不純物濃度Ｎsrfを調整して、表面不純物濃度Ｎsrfを逆抽出する。
【００１８】
絶縁膜中濃度逆抽出部５は、第２導電性膜の表面が空乏層になるような電圧を第１導電性膜に印加した状態で、逆抽出された絶縁膜厚ｔox、第１導電性膜のポリ濃度Ｎpoly、第２導電性膜の基板不純物濃度Ｎsubおよび第２導電性膜の表面不純物濃度Ｎsrfを用いてシミュレータ６により容量Ｃを計算し、その計算結果が容量Ｃの測定値に一致するように絶縁膜の膜中不純物濃度を調整して、絶縁膜の膜中不純物濃度を逆抽出する。
【００１９】
図２は図１の半導体評価装置の処理手順を示すフローチャートである。まず、準備段階として、nMOSキャパシタの電流J−電圧特性（ＪＶ特性）と容量Ｃ−電圧特性（ＣＶ特性）とを測定する（ステップＳ１）。
【００２０】
続いて、合わせ込みの第１段階として、絶縁膜厚ｔoxの合わせ込みを行う（ステップＳ２）。図３（ａ）はＣＶ曲線の絶縁膜依存性を示し、図３（ｂ）はＪＶ曲線の絶縁膜依存性を示している。これらの図からわかるように、絶縁膜厚ｔoxを変化させると、ＪＶ曲線とＣＶ曲線がいずれも変化するのがわかる。特に、ゲート電圧VGが(-2)Ｖ付近で、ＣＶ曲線の変化の割合が大きい。このため、上述したステップＳ２では、ゲート電圧VGを例えば(-2)Ｖに設定した状態で、絶縁膜厚ｔoxを調整しながらシミュレータ６により容量Ｃを計算し、容量Ｃの計算値を測定値に一致させる。これにより、絶縁膜厚ｔoxが逆抽出される。
【００２１】
ここで、ＣＶ曲線の一般式は、（１）式で表される。
Ｃ(ＶG)＝ｆ(ＶG，ｔox，Ｎpoly，Ｎsrf，Ｎsub，Ｎins） …（１）
（１）式の具体例として、例えば（２）式が考えられる。
【数１】

（２）式において、Qsは表面電荷密度、V_Gは第１導電性膜に印加される電圧である。
（２）式中のＱ_sは（３）式で表される。
【数２】

正孔濃度、nは電子濃度である。
【００２２】
N_D ⁺とN_A ⁻は、それぞれ（４）式および（５）式で表される。
N_D ⁺＝ｒ_D×N_D …（４）
N_A ⁻＝ｒ_A×Ｎ_A …（５）
（４）式および（５）式において、ｒ_Dはドナーイオン化率、ｒ_Aはアクセプターイオン化率、N_Dはドナー濃度、N_Aはアクセプタ濃度である。
【００２３】
シミュレータ６は、（２）式に基づいてシミュレーションを行い、絶縁膜厚ｔoxを逆抽出する。
【００２４】
続いて、合わせ込みの第２段階として、第１導電性膜のポリ濃度Ｎpolyの合わせ込みを行う（ステップＳ３）。図４（ａ）はＣＶ曲線のポリ濃度Ｎpolyの依存性を示し、図４（ｂ）はＪＶ曲線のポリ濃度Ｎpolyの依存性を示している。これらの図からわかるように、ＣＶ曲線はＶG＞０Ｖの範囲（半導体基板がｐ型であれば反転層領域、ｎ型であれば蓄積層領域）でポリ濃度Ｎpolyに依存して大きく変化し、ＪＶ曲線は-1＜ＶG＜０Ｖの範囲（空乏層領域）でポリ濃度Ｎpolyに依存して大きく変化する。
【００２５】
このため、上述したステップＳ３では、半導体基板がｐ型であれば基板表面が反転層になるような電圧（例えば、ＶG＝１Ｖ）を第１導電性膜に印加した状態で、ステップＳ２で逆抽出した絶縁膜厚ｔoxを用いてシミュレータ６により容量Ｃを計算し、その計算結果が容量Ｃの測定値に一致するように第１導電性膜のポリ濃度Ｎpolyを調整して、ポリ濃度Ｎpolyを逆抽出する。
【００２６】
続いて、合わせ込みの第３段階として、第２導電性膜の基板不純物濃度Ｎsubの合わせ込みを行う（ステップＳ４）。図５（ａ）はＣＶ曲線の基板濃度依存性を示し、図５（ｂ）はＪＶ曲線の基板濃度依存性を示している。これらの図からわかるように、ＣＶ曲線は、-1Ｖ＜ＶG＜０Ｖの範囲（空乏領域）で表面濃度に依存して大きく変化する。また、ＪＶ曲線は、-1＜ＶG＜０Ｖの範囲（空乏領域）で表面濃度に依存して大きく変化する。
【００２７】
このため、上述したステップＳ４では、例えば、ＶG＝-0.5Ｖを第１導電性膜に印加した状態で、ステップＳ２で逆抽出した絶縁膜厚ｔoxとステップＳ３で逆抽出したポリ濃度Ｎpolyとを用いてシミュレータ６により容量Ｃを計算し、その計算結果の傾きが容量Ｃの測定値の傾きに一致するように第２導電性膜の基板不純物濃度Ｎsubを調整して、基板不純物濃度Ｎsubを逆抽出する。
【００２８】
続いて、合わせ込みの第４段階として、第２導電性膜の膜中不純物濃度（すなわち、表面不純物濃度Ｎsrf）の合わせ込みを行う（ステップＳ５）。図６（ａ）はＣＶ曲線の表面不純物濃度Ｎsrf依存性を示し、図６（ｂ）はＪＶ曲線の表面不純物濃度依存性を示している。これらの図からわかるように、ＣＶ曲線もＪＶ曲線も、-1Ｖ＜ＶG＜０Ｖの範囲（空乏層領域）で、表面不純物濃度Ｎsrfに依存して変化し、それ以外の電圧範囲ではほとんど変化しない。
【００２９】
このため、上述したステップＳ５では、第１導電性膜に-1Ｖ＜ＶG＜０Ｖの範囲内の電圧（例えば、ＶG＝-0.5Ｖ）を印加した状態で、ステップＳ２で逆抽出した絶縁膜厚ｔoxと、ステップＳ３で逆抽出したポリ濃度Ｎpolyと、ステップＳ４で逆抽出した基板不純物濃度Ｎsrfとを用いてシミュレータ６により第１および第２導電性膜間の容量Ｃを計算し、その計算結果がこの容量Ｃの測定値に一致するように表面不純物濃度Ｎsrfを調整して、表面不純物濃度Ｎsrfを逆抽出する。
【００３０】
続いて、合わせ込みの第５段階として、絶縁膜の膜中不純物濃度Ｎinsの合わせ込みを行う（ステップＳ６）。図７（ａ）はＣＶ曲線の絶縁膜中不純物濃度依存性を示し、図７（ｂ）はＪＶ曲線の絶縁膜中不純物濃度依存性を示している。これらの図からわかるように、ＣＶ曲線は第１導電性膜に印加する電圧を変えても変化せず、ＪＶ曲線は-1Ｖ＜ＶG＜０Ｖの範囲（空乏層領域）で、絶縁膜の膜中不純物濃度Ｎinsに依存して大きく変化し、それ以外の電圧範囲ではほとんど変化しない。
【００３１】
このため、上述したステップＳ６では、第１導電性膜に-1＜ＶG＜０Ｖの範囲内の電圧（例えば、ＶG＝-0.5Ｖ）を印加した状態で、ステップＳ２で逆抽出した絶縁膜厚ｔoxと、ステップＳ３で逆抽出したポリ濃度Ｎpolyと、ステップＳ４で逆抽出した基板不純物濃度Ｎsubと、ステップＳ５で逆抽出した表面不純物濃度Ｎsrfとを用いてシミュレータ６によりゲート電流を計算し、その計算結果がゲート電流の測定値に一致するように絶縁膜の膜中不純物濃度Ｎinsを調整して、膜中不純物濃度Ｎinsを逆抽出する。
【００３２】
ここで、ＪＶ曲線の一般式は、（６）式で表される。
Ｊ(ＶG)＝ｇ(ＶG，ｔox，Ｎpoly，Ｎsrf，Ｎsub，Ｎins） …（６）
（６）式の具体例として、例えば（７）式が考えられる。
【数３】

（７）式において、m_deは有効状態密度電子質量、EC_polyはポリシリコンの伝導帯端、EC_subは基板シリコンの伝導帯端、ｔ_oxは絶縁膜厚ｔox、ｑ＝1.6×10^-19[C]、Ｍ_c＝６である。
【００３３】
（７）式中の関数ｆは、（８）式で表される。
【数４】

（８）式において、Ｅ_Fはフェルミ準位、k_B＝1.38×10^-23[J/K]、Ｔは絶対温度[K]である。
【００３４】
（７）式中のκは、（９）式で表される。
【数５】

（９）式において、EC_oxは絶縁膜の伝導帯端である。
【００３５】
（９）式中のｍ_oxは、（１０）式で表される。
【数６】

（１０）式において,EG_oxは絶縁膜のエネルギーバンドギャップ、ｍ_pはパラボリック・トンネルマス、ｍ_Fはフランツのトンネルマス、ｍ_cは伝導帯トンネルマス、ｍ_vは価電子帯トンネルマスである。
【００３６】
（７）式中のΨs_polyとΨs_subとの間には、以下の関係が成り立つ。
【数７】

（１１）式中の関数Ｆは、（１２）式で表される。
【数８】

（１２）式中のβとＬ_Dはそれぞれ（１３）式および（１４）式で表される。
【数９】

【数１０】

（１４）式において、ε_s＝11.9×ε₀で、ε₀＝8.85×10^-12[F/m]である。
【００３７】
図８および図９は上述した五段階逆抽出法をまとめた図であり、図８はＣＶ曲線、図９はＪＶ曲線を表している。図８において、ＶG＝-2Ｖ近傍では、ＣＶ曲線は絶縁膜厚ｔoxの変化にのみ依存する。ＣＶ曲線とＪＶ曲線の全領域の中で、絶縁膜厚ｔoxの変化のみに依存する領域は他には存在しない。このため、図２のステップＳ２では、合わせ込みの第１段階として、ＶG＝-2Ｖ近傍で絶縁膜厚ｔoxの逆抽出を行う。
【００３８】
続いて、ＶG＝１Ｖ近傍では、ＣＶ曲線は絶縁膜厚ｔoxと第１導電性膜のポリ濃度Ｎpolyの変化のみに依存している。絶縁膜厚ｔoxはすでに逆抽出されているので、図２のステップＳ３では、合わせ込みの第2段階として、ＶG＝１Ｖ近傍で第１導電性膜のポリ濃度Ｎpolyの逆抽出を行う。
【００３９】
続いて、-1Ｖ＜ＶG＜０Ｖ近傍では、ＣＶ曲線は絶縁膜厚ｔox、ポリ濃度Ｎpoly、基板濃度Ｎsub、および表面不純物濃度Ｎsrfのみに依存している。このうち、絶縁膜厚ｔoxとポリ濃度Ｎpolyはすでに逆抽出されている。また、この領域でのNsub依存性は、ＣＶ曲線の傾きに表れるので、図２のステップＳ４では、合わせ込みの第３段階として、基板不純物濃度Ｎsubの逆抽出を行う。
【００４０】
図２のステップＳ５では、合わせ込みの第４段階として、-1Ｖ＜ＶG＜０Ｖの電圧範囲で表面不純物濃度Ｎsrfの逆抽出を行う。
【００４１】
続いて、-1Ｖ＜ＶG＜０Ｖでは、ＪＶ曲線は絶縁膜の膜中不純物濃度Ｎinsに依存している。そこで、図２のステップＳ６では、合わせ込みの第５段階として、-1Ｖ＜ＶG＜０Ｖの電圧範囲で絶縁膜の膜中不純物濃度Ｎinsの逆抽出を行う。
【００４２】
このように、本実施形態では、第１導電性膜に印加する電圧を複数通りに切り替え、各電圧ごとに、ＣＶ曲線やＪＶ曲線の変化に対して支配的な電気的特性因子ｔox，Ｎpoly，Ｎsub，Ｎsrf，Ｎinsの逆抽出を行うため、各電気的特性因子を精度よく評価できる。
【００４３】
また、本実施形態では、ウエハ上に形成された半導体デバイスを壊さずに、各電気的特性因子を計算できるため、実際の製品の出荷前検査に適用可能である。
特に、絶縁膜厚ｔoxは酸化工程の検査に、第１導電性膜のポリ濃度ＮpolyはＣＶＤ工程の検査に、表面不純物濃度Ｎsrfや基板不純物濃度は熱工程の検査に、それぞれ適用可能である。
【００４４】
さらに、上述した５段階の逆抽出法による非破壊測定は、拡散層がチャネル電界に与える影響が小さくなるほど長いゲートをもつMOSFETを用いても可能である。また、保護素子部のライン・アンド・スペースパターンを利用してもよいし、予め選択的にウエハ上に配置されたＭＯＳキャパシタやMOSFETを用いて測定を行ってもよい。
【００４５】
上述した実施形態では、５段階の逆抽出を行って５種類の電気的特性因子ｔox，Ｎpoly，Ｎsub，Ｎsrf，Ｎinsを評価する手法を説明したが、他の電気的特性因子を併せて逆抽出してもよい。例えば、絶縁膜の膜中の不純物の位置Ｚinsを、上述した５種類のパラメータとともに逆抽出してもよい。この場合のＣＶ曲線とＪＶ曲線の一般式は、それぞれ（１５）式および（１６）式のようになる。
Ｃ(ＶG)＝ｆ(ＶG，ｔox，Ｎpoly，Ｎsrf，Ｎsub，Ｎins，Ｚins） …（１５）
Ｊ(ＶG)＝ｇ(ＶG，ｔox，Ｎpoly，Ｎsrf，Ｎsub，Ｎins，Ｚins） …（１６）
【００４６】
上述した実施形態で説明した半導体評価装置は、ハードウェアで構成してもよいし、ソフトウェアで構成してもよい。ソフトウェアで構成する場合には、半導体評価装置の機能を実現するプログラムをフロッピーディスクやＣＤ−ＲＯＭ等の記録媒体に収納し、コンピュータに読み込ませて実行させてもよい。記録媒体は、磁気ディスクや光ディスク等の携帯可能なものに限定されず、ハードディスク装置やメモリなどの固定型の記録媒体でもよい。
【００４７】
また、半導体評価装置の機能を実現するプログラムを、インターネット等の通信回線（無線通信も含む）を介して頒布してもよい。さらに、同プログラムを暗号化したり、変調をかけたり、圧縮した状態で、インターネット等の有線回線や無線回線を介して、あるいは記録媒体に収納して頒布してもよい。
【００４８】
【発明の効果】
以上詳細に説明したように、本発明によれば、第１および第２導電性膜間に絶縁破壊が生じない程度の低い電圧を印加して、各電圧ごとに第１および第２導電性膜間を流れる電流、または第１および第２導電性膜間の容量を測定するため、半導体装置を破壊することなく、半導体装置の絶縁膜の厚さ、第１導電性膜の不純物濃度、第２導電性膜の表面不純物濃度、第２導電性膜の膜中不純物濃度、および絶縁膜中の不純物濃度を、精度よく評価できる。
【図面の簡単な説明】
【図１】本発明に係る半導体評価装置の一実施形態の概略構成を示すブロック図。
【図２】図１の半導体評価装置の処理手順を示すフローチャート。
【図３】（ａ）はＣＶ曲線の絶縁膜厚依存性を示す図、（ｂ）はＪＶ曲線の絶縁膜厚依存性を示す図。
【図４】（ａ）はＣＶ曲線のポリ濃度依存性を示す図、（ｂ）はＪＶ曲線のポリ濃度依存性を示す図。
【図５】（ａ）はＣＶ曲線の基板濃度依存性を示す図、（ｂ）はＪＶ曲線の基板濃度依存性を示す図。
【図６】（ａ）はＣＶ曲線の表面不純物濃度依存性を示す図、（ｂ）はＪＶ曲線の表面不純物濃度依存性を示す図。
【図７】（ａ）はＣＶ曲線の絶縁膜中不純物濃度依存性を示す図、（ｂ）はＪＶ曲線の絶縁膜中不純物濃度依存性を示す図。
【図８】五段階逆抽出法を説明するためのＣＶ曲線を示す図。
【図９】五段階逆抽出法を説明するためのＪＶ曲線を示す図。
【符号の説明】
１絶縁膜厚逆抽出部
２不純物濃度逆抽出部
３基板濃度逆抽出部
４表面濃度逆抽出部
５絶縁膜中濃度逆抽出部
６シミュレータ[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor evaluation method and a semiconductor evaluation apparatus for evaluating the impurity concentration of a semiconductor surface located below an insulating film in a MOS transistor, a MOS capacitor, or the like.
[0002]
[Prior art]
Although the impurity concentration in the semiconductor substrate is distributed in the depth direction, the electrical characteristics of the semiconductor device are sensitive to the impurity concentration in the vicinity of the surface. For this reason, a technique for accurately measuring the surface impurity concentration is indispensable from the viewpoint of designing and manufacturing a semiconductor device.
[0003]
[Problems to be solved by the invention]
However, conventionally, when measuring the impurity concentration in the substrate depth direction, it is common to use a technique called SIMS (Secondary Ion Mass Spectrometry) while scraping the semiconductor device. In this method, there is a problem that the semiconductor device after the measurement is destroyed, and further, the depth to be scraped is made very thin and the width is not accurate, so that sufficient measurement accuracy cannot be obtained.
[0004]
In addition, it is technically difficult to partially scrape the wafer surface, and it is impossible to evaluate the overall distribution of the surface impurity concentration on the wafer only by partially scraping. Furthermore, there is a possibility that the impurity concentration changes at the location where the wafer surface is scraped.
[0005]
The present invention has been made in view of the above problems, and its purpose is to evaluate a semiconductor that can accurately measure the distribution of impurity concentration on the surface of the substrate without destroying the semiconductor device formed on the semiconductor substrate. A method and a semiconductor evaluation apparatus are provided.
[0006]
[Means for Solving the Problems]
In order to solve the above-described problem, the present invention provides a first conductive film made of a semiconductor containing an impurity formed on an upper surface of an insulating film and a first conductive film made of a semiconductor containing an impurity formed on the lower surface of the insulating film. A semiconductor evaluation method for evaluating, using a simulator, electrical characteristics of a semiconductor device having two conductive films, wherein the first and second conductive films are within a voltage section including a voltage that satisfies a flat band condition. Applying a voltage and measuring a current flowing between the first and second conductive films via the insulating film or a capacitance between the first and second conductive films for each voltage; and the measurement The thickness of the insulating film, the thickness of the first conductive film based on the current flowing between the first and second conductive films and the capacitance between the first and second conductive films Impurity concentration, substrate of the second conductive film Net objects concentration, and a step of calculating the surface impurity concentration of the second conductive film, and the impurity concentration in the insulating film.
[0007]
In the present invention, a current that flows between the first and second conductive films by applying a low voltage that does not cause dielectric breakdown between the first and second conductive films, or between the first and second conductive films. In order to measure the capacitance of the semiconductor device, the thickness of the insulating film of the semiconductor device, the impurity concentration of the first conductive film, the substrate impurity concentration of the second conductive film, the surface of the second conductive film without destroying the semiconductor device The impurity concentration and the impurity concentration in the insulating film can be accurately evaluated while varying the voltage.
[0008]
The present invention also provides a first conductive film made of a semiconductor containing an impurity formed on an upper surface of an insulating film, and a second conductive film made of a semiconductor containing a p-type impurity formed on the lower surface of the insulating film; A semiconductor evaluation method for evaluating the electrical characteristics of a semiconductor device having a simulator with a voltage applied to the first conductive film so that the surface of the second conductive film becomes a storage layer. The thickness of the insulating film is adjusted so that the capacitance between the first and second conductive films calculated by the simulator matches the measured value of the capacitance, and the thickness of the insulating film is back-extracted. Step, and with the voltage applied to the first conductive film applied to the first conductive film with a voltage that causes the surface of the second conductive film to be an inversion layer. The capacity matches the measured value of the capacity Adjusting the impurity concentration of the first conductive film so that the impurity concentration of the first conductive film is back-extracted, and a voltage at which the surface of the second conductive film becomes a depletion layer. When applied to the first conductive film, the slope of the capacitance calculated by the simulator using the thickness of the back-extracted insulating film and the impurity concentration of the back-extracted first conductive film is Back-extracting the substrate impurity concentration of the second conductive film by adjusting the substrate impurity concentration of the second conductive film so as to match the measured slope of the capacitance; and the second conductive film In the state where the voltage in the voltage region where the surface of the first electrode is a depletion layer is applied to the first conductive film, the thickness of the back-extracted insulating film, the impurity concentration of the back-extracted first conductive film, and the Before using the substrate impurity concentration of the back-extracted second conductive film Back-extracting the surface impurity concentration of the second conductive film by adjusting the surface impurity concentration of the second conductive film so that the capacitance calculated by the simulator matches the measured value of the capacitance; The back-extracted insulating film thickness and the back-extracted first conductive film in a state in which a voltage to the extent that the surface of the second conductive film becomes a depletion layer is applied to the first conductive film. The current calculated by the simulator using the impurity concentration of the substrate, the substrate impurity concentration of the back-extracted second conductive film and the surface impurity concentration of the back-extracted second conductive film is the measured value of the current Adjusting the impurity concentration in the film of the insulating film so as to match, and back extracting the impurity concentration in the film of the insulating film.
[0009]
The present invention also provides a first conductive film made of a semiconductor containing impurities formed on the upper surface of an insulating film, and a second conductive film made of a semiconductor containing n-type impurities formed on the lower surface of the insulating film; A semiconductor evaluation method for evaluating electrical characteristics of a semiconductor device having a simulator with a voltage applied to the first conductive film so that the surface of the second conductive film becomes an inversion layer. The thickness of the insulating film is adjusted so that the capacitance between the first and second conductive films calculated by the simulator matches the measured value of the capacitance, and the thickness of the insulating film is back-extracted. In the state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes a storage layer, the simulator calculates the thickness of the back-extracted insulating film. The capacity matches the measured value of the capacity Adjusting the impurity concentration of the first conductive film so that the impurity concentration of the first conductive film is back-extracted, and a voltage at which the surface of the second conductive film becomes a depletion layer. When applied to the first conductive film, the slope of the capacitance calculated by the simulator using the thickness of the back-extracted insulating film and the impurity concentration of the back-extracted first conductive film is Back-extracting the substrate impurity concentration of the second conductive film by adjusting the substrate impurity concentration of the second conductive film so as to match the measured slope of the capacitance; and the second conductive film In a state where a voltage is applied to the first conductive film so that the surface of the first conductive film becomes a depletion layer, the thickness of the back-extracted insulating film, the impurity concentration of the back-extracted first conductive film, and the reverse Using the extracted surface impurity concentration of the second conductive film, Back-extracting the surface impurity concentration of the second conductive film by adjusting the surface impurity concentration of the second conductive film so that the capacitance calculated by the regulator matches the measured value of the capacitance; The back-extracted insulating film thickness and the back-extracted first conductive film in a state in which a voltage to the extent that the surface of the second conductive film becomes a depletion layer is applied to the first conductive film. The current calculated by the simulator using the impurity concentration of the substrate, the substrate impurity concentration of the back-extracted second conductive film and the surface impurity concentration of the back-extracted second conductive film is the measured value of the current Adjusting the impurity concentration in the film of the insulating film so as to match, and back extracting the impurity concentration in the film of the insulating film.
[0010]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a semiconductor evaluation method and a semiconductor evaluation apparatus according to the present invention will be specifically described with reference to the drawings.
[0011]
FIG. 1 is a block diagram showing a schematic configuration of an embodiment of a semiconductor evaluation apparatus according to the present invention. The semiconductor evaluation apparatus shown in FIG. 1 determines the surface impurity concentration of an insulating film in a MOS transistor or MOS capacitor and a semiconductor formed thereon. In the following, an nMOS capacitor having an n + / SiO ₂ / p-Si structure will be described as an example, but electrical characteristics can be evaluated by a similar processing procedure for a pMOS capacitor, an nMOS transistor, and a pMOS transistor.
[0012]
In this specification, the conductive film formed on the insulating film in the nMOS capacitor is referred to as a first conductive film, and the semiconductor below the insulating film is referred to as a second conductive film. The first conductive film is formed of, for example, polysilicon, and the second conductive film is a well formed by implanting impurity ions on a semiconductor substrate or a desired region in the semiconductor substrate.
[0013]
The semiconductor evaluation apparatus of FIG. 1 includes an insulating film thickness reverse extraction unit 1, an impurity concentration reverse extraction unit 2, a substrate concentration reverse extraction unit 3, a surface concentration reverse extraction unit 4, and an insulating film concentration reverse extraction unit 5. The simulator 6 is provided.
[0014]
The insulation film thickness reverse extraction unit 1 applies the first conductive film to the first conductive film in a state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes a storage layer (an inversion layer in the case of a pMOS capacitor). The capacitance C between the second conductive films is calculated, the thickness of the insulating film is adjusted so that the calculation result matches the measured value of the capacitance C, and the insulating thickness tox is back-extracted.
[0015]
The impurity concentration back extraction unit 2 applies the back extracted insulating film in a state where a voltage is applied to the first conductive film such that the surface of the second conductive film becomes an inversion layer (storage layer in the case of a pMOS capacitor). The capacitance C is calculated by the simulator 6 using the thickness tox, and the impurity concentration in the polysilicon as the first conductive film (hereinafter referred to as poly concentration) Npoly so that the calculation result coincides with the measured value of the capacitance C. Is adjusted and the poly concentration Npoly is back-extracted.
[0016]
The substrate concentration reverse extraction unit 3 is configured such that the surface of the second conductive film becomes a depletion layer from an inversion layer (storage layer in the case of a pMOS capacitor) and a depletion layer to an accumulation layer (in the case of a pMOS capacitor, an inversion layer). ) Is applied to the first conductive film, and the capacitance C is calculated by the simulator 6 using the back-extracted insulating film thickness tox and the polyconcentration Npoly of the first conductive film. Then, the substrate impurity concentration Nsub of the second conductive film is adjusted so that the slope of the calculation result matches the slope of the measured value of the capacitance C, and the substrate impurity concentration Nsub of the second conductive film is back-extracted.
[0017]
The surface concentration back extraction unit 4 applies the back extracted insulating film thickness tox and the first conductive film in a state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes a depletion layer. The capacitance C is calculated by the simulator 6 using the poly concentration Npoly and the substrate impurity concentration Nsub of the second conductive film, and the surface impurity concentration Nsrf of the second conductive film is set so that the calculation result matches the measured value of the capacitance C. And the surface impurity concentration Nsrf is back-extracted.
[0018]
The insulating film concentration back-extraction unit 5 applies the back-extracted insulating film thickness tox and the first conductivity in a state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes a depletion layer. The capacitance C is calculated by the simulator 6 using the poly concentration Npoly of the film, the substrate impurity concentration Nsub of the second conductive film, and the surface impurity concentration Nsrf of the second conductive film, and the calculation result matches the measured value of the capacitance C In this way, the impurity concentration in the insulating film is adjusted, and the impurity concentration in the insulating film is back-extracted.
[0019]
FIG. 2 is a flowchart showing a processing procedure of the semiconductor evaluation apparatus of FIG. First, as a preparation stage, the current J-voltage characteristic (JV characteristic) and the capacitance C-voltage characteristic (CV characteristic) of the nMOS capacitor are measured (step S1).
[0020]
Subsequently, as the first stage of matching, matching of the insulating film thickness tox is performed (step S2). FIG. 3A shows the dependency of the CV curve on the insulating film, and FIG. 3B shows the dependency of the JV curve on the insulating film. As can be seen from these figures, when the insulating film thickness tox is changed, both the JV curve and the CV curve change. In particular, when the gate voltage VG is around (-2) V, the rate of change of the CV curve is large. Therefore, in step S2 described above, the capacity C is calculated by the simulator 6 while adjusting the insulating film thickness tox while the gate voltage VG is set to (−2) V, for example, and the calculated value of the capacity C is measured. To match. Thereby, the insulating film thickness tox is back-extracted.
[0021]
Here, the general formula of the CV curve is expressed by formula (1).
C (VG) = f (VG, tox, Npoly, Nsrf, Nsub, Nins) (1)
As a specific example of the expression (1), for example, the expression (2) can be considered.
[Expression 1]

(2) In the formula, Qs is the surface charge density, the V _G is the voltage applied to the first conductive film.
Q _s in the formula (2) is represented by the formula (3).
[Expression 2]

The hole concentration, n is the electron concentration.
[0022]
N _D ⁺ and N _A ⁻ are represented by formulas (4) and (5), respectively.
N _D ⁺ = r _D × N _D (4)
N _A ⁻ = r _A × N _A (5)
In the formulas (4) and (5), r _D is the donor ionization rate, r _A is the acceptor ionization rate, N _D is the donor concentration, and N _A is the acceptor concentration.
[0023]
The simulator 6 performs a simulation based on the equation (2) and back-extracts the insulating film thickness tox.
[0024]
Subsequently, as a second stage of alignment, alignment of the polyconcentration Npoly of the first conductive film is performed (step S3). FIG. 4A shows the dependency of the CV curve on the poly concentration Npoly, and FIG. 4B shows the dependency of the JV curve on the poly concentration Npoly. As can be seen from these figures, the CV curve varies greatly depending on the polyconcentration Npoly in the range of VG> 0 V (inversion layer region if the semiconductor substrate is p-type, accumulation layer region if the semiconductor substrate is n-type), The JV curve varies greatly depending on the poly concentration Npoly in the range of -1 <VG <0V (depletion layer region).
[0025]
For this reason, in step S3 described above, if the semiconductor substrate is p-type, a voltage (for example, VG = 1V) is applied to the first conductive film so that the substrate surface becomes an inversion layer, and the reverse is performed in step S2. The capacitance C is calculated by the simulator 6 using the extracted insulating film thickness tox, and the polyconcentration Npoly of the first conductive film is adjusted so that the calculation result matches the measured value of the capacitance C. Back-extract.
[0026]
Subsequently, as a third stage of alignment, alignment of the substrate impurity concentration Nsub of the second conductive film is performed (step S4). FIG. 5A shows the substrate concentration dependency of the CV curve, and FIG. 5B shows the substrate concentration dependency of the JV curve. As can be seen from these figures, the CV curve varies greatly depending on the surface concentration in the range of -1V <VG <0V (depletion region). Also, the JV curve changes greatly depending on the surface concentration in the range of -1 <VG <0V (depletion region).
[0027]
Therefore, in step S4 described above, for example, with VG = −0.5V applied to the first conductive film, the insulating film thickness tox back-extracted in step S2 and the poly-concentration Npoly back-extracted in step S3 are obtained. Then, the capacitance C is calculated by the simulator 6 and the substrate impurity concentration Nsub of the second conductive film is adjusted so that the inclination of the calculation result coincides with the inclination of the measured value of the capacitance C, and the substrate impurity concentration Nsub is reversed. Extract.
[0028]
Subsequently, as a fourth stage of alignment, the concentration of impurities in the second conductive film (that is, the surface impurity concentration Nsrf) is adjusted (step S5). 6A shows the surface impurity concentration Nsrf dependency of the CV curve, and FIG. 6B shows the surface impurity concentration dependency of the JV curve. As can be seen from these figures, both the CV curve and the JV curve change depending on the surface impurity concentration Nsrf in the range of -1V <VG <0V (depletion layer region), and hardly change in other voltage ranges. .
[0029]
Therefore, in step S5 described above, the insulation film thickness back-extracted in step S2 in a state where a voltage (for example, VG = −0.5V) within the range of −1V <VG <0V is applied to the first conductive film. The capacitance C between the first and second conductive films is calculated by the simulator 6 using tox, the poly concentration Npoly back-extracted in step S3, and the substrate impurity concentration Nsrf back-extracted in step S4. The surface impurity concentration Nsrf is adjusted to match the measured value of the capacitance C, and the surface impurity concentration Nsrf is back-extracted.
[0030]
Subsequently, as a fifth stage of matching, matching of the impurity concentration Nins in the insulating film is performed (step S6). 7A shows the dependency of the CV curve on the impurity concentration in the insulating film, and FIG. 7B shows the dependency of the JV curve on the impurity concentration in the insulating film. As can be seen from these figures, the CV curve does not change even when the voltage applied to the first conductive film is changed, and the JV curve is in the range of -1V <VG <0V (depletion layer region). It varies greatly depending on the medium impurity concentration Nins, and hardly changes in other voltage ranges.
[0031]
Therefore, in step S6 described above, the insulating film thickness back-extracted in step S2 in a state where a voltage (for example, VG = −0.5V) within the range of −1 <VG <0V is applied to the first conductive film. The gate current is calculated by the simulator 6 using tox, the poly concentration Npoly back-extracted in step S3, the substrate impurity concentration Nsub back-extracted in step S4, and the surface impurity concentration Nsrf back-extracted in step S5. The in-film impurity concentration Nins is back-extracted by adjusting the in-film impurity concentration Nins so that the calculation result matches the measured value of the gate current.
[0032]
Here, the general formula of the JV curve is expressed by formula (6).
J (VG) = g (VG, tox, Npoly, Nsrf, Nsub, Nins) (6)
As a specific example of the formula (6), for example, the formula (7) can be considered.
[Equation 3]

In equation (7), m _de is the effective state density electron mass, EC _poly is the conduction band edge of polysilicon, EC _sub is the conduction band edge of the substrate silicon, t _ox is the insulating film thickness tox, and q = 1.6 × 10 ⁻¹⁹ [C], M _c = 6.
[0033]
The function f in the equation (7) is expressed by the equation (8).
[Expression 4]

In the equation (8), E _F is the Fermi level, k _B = 1.38 × 10 ⁻²³ [J / K], and T is the absolute temperature [K].
[0034]
Κ in the equation (7) is expressed by the equation (9).
[Equation 5]

In the equation (9), EC _ox is the conduction band edge of the insulating film.
[0035]
_{M ox} in the formula (9) is represented by the formula (10).
[Formula 6]

(10) In the formula, EG _ox is the energy band gap, m _p are parabolic tunnel mass, m _F Franz tunnel mass, m _c is the conduction band tunneling mass, m _v is the valence band tunnel mass of the insulating film .
[0036]
The following relationship holds between Ψs _poly and Ψs _sub in the equation (7).
[Expression 7]

The function F in the equation (11) is expressed by the equation (12).
[Equation 8]

Β and L _D in the formula (12) are represented by the formula (13) and the formula (14), respectively.
[Equation 9]

[Expression 10]

In the equation (14), ε _s = 11.9 × ε ₀ and ε ₀ = 8.85 × 10 ⁻¹² [F / m].
[0037]
8 and 9 are diagrams summarizing the above-described five-stage back extraction method. FIG. 8 shows a CV curve and FIG. 9 shows a JV curve. In FIG. 8, in the vicinity of VG = -2V, the CV curve depends only on the change in the insulating film thickness tox. There is no other region that depends only on the change in the insulation film thickness tox in the entire region of the CV curve and the JV curve. For this reason, in step S2 of FIG. 2, as the first stage of fitting, the insulating film thickness tox is back-extracted in the vicinity of VG = -2V.
[0038]
Subsequently, in the vicinity of VG = 1V, the CV curve depends only on the change in the insulating film thickness tox and the polyconcentration Npoly of the first conductive film. Since the insulating film thickness tox has already been back-extracted, in step S3 in FIG. 2, the polyconcentration Npoly of the first conductive film is back-extracted in the vicinity of VG = 1V as the second stage of fitting.
[0039]
Subsequently, in the vicinity of -1V <VG <0V, the CV curve depends only on the insulating film thickness tox, the poly concentration Npoly, the substrate concentration Nsub, and the surface impurity concentration Nsrf. Of these, the insulating film thickness tox and the poly concentration Npoly have already been back-extracted. Further, since the Nsub dependence in this region appears in the slope of the CV curve, in step S4 in FIG. 2, the substrate impurity concentration Nsub is back-extracted as the third stage of matching.
[0040]
In step S5 of FIG. 2, as the fourth stage of matching, back extraction of the surface impurity concentration Nsrf is performed in the voltage range of -1V <VG <0V.
[0041]
Subsequently, when -1V <VG <0V, the JV curve depends on the impurity concentration Nins in the insulating film. Therefore, in step S6 of FIG. 2, as the fifth stage of matching, back extraction of the impurity concentration Nins in the insulating film is performed in the voltage range of -1V <VG <0V.
[0042]
As described above, in this embodiment, the voltage applied to the first conductive film is switched in a plurality of ways, and for each voltage, the electrical characteristic factors tox, Npoly, which are dominant with respect to the change in the CV curve and JV curve. Since Nsub, Nsrf, and Nins are back-extracted, each electrical characteristic factor can be evaluated with high accuracy.
[0043]
Moreover, in this embodiment, since each electrical characteristic factor can be calculated without destroying the semiconductor device formed on the wafer, it can be applied to an actual product pre-shipment inspection.
In particular, the insulating film thickness tox can be applied to the inspection of the oxidation process, the polyconcentration Npoly of the first conductive film can be applied to the inspection of the CVD process, and the surface impurity concentration Nsrf and the substrate impurity concentration can be applied to the inspection of the thermal process.
[0044]
Furthermore, the non-destructive measurement by the five-step back-extraction method described above can be performed using a MOSFET having a gate that is long enough to reduce the influence of the diffusion layer on the channel electric field. Further, a line and space pattern of the protection element portion may be used, or measurement may be performed using a MOS capacitor or a MOSFET that is selectively placed on the wafer in advance.
[0045]
In the above-described embodiment, the method of evaluating five types of electrical characteristic factors tox, Npoly, Nsub, Nsrf, and Nins by performing five stages of back extraction has been described, but back extraction is performed together with other electrical characteristic factors. May be. For example, the position Zins of the impurities in the insulating film may be back-extracted together with the above five types of parameters. In this case, general formulas of the CV curve and the JV curve are respectively expressed by the equations (15) and (16).
C (VG) = f (VG, tox, Npoly, Nsrf, Nsub, Nins, Zins) (15)
J (VG) = g (VG, tox, Npoly, Nsrf, Nsub, Nins, Zins) (16)
[0046]
The semiconductor evaluation apparatus described in the above-described embodiment may be configured by hardware or software. When configured by software, a program for realizing the function of the semiconductor evaluation apparatus may be stored in a recording medium such as a floppy disk or a CD-ROM and read and executed by a computer. The recording medium is not limited to a portable medium such as a magnetic disk or an optical disk, but may be a fixed recording medium such as a hard disk device or a memory.
[0047]
Further, a program for realizing the function of the semiconductor evaluation apparatus may be distributed via a communication line (including wireless communication) such as the Internet. Further, the program may be distributed in a state where the program is encrypted, modulated or compressed, and stored in a recording medium via a wired line such as the Internet or a wireless line.
[0048]
【The invention's effect】
As described above in detail, according to the present invention, the first and second conductive films are applied for each voltage by applying a low voltage that does not cause dielectric breakdown between the first and second conductive films. In order to measure the current flowing between them or the capacitance between the first and second conductive films, the thickness of the insulating film of the semiconductor device, the impurity concentration of the first conductive film, and the second without destroying the semiconductor device. The surface impurity concentration of the conductive film, the impurity concentration in the second conductive film, and the impurity concentration in the insulating film can be accurately evaluated.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a schematic configuration of an embodiment of a semiconductor evaluation apparatus according to the present invention.
FIG. 2 is a flowchart showing a processing procedure of the semiconductor evaluation apparatus in FIG. 1;
3A is a diagram showing the dependency of the CV curve on the insulation film thickness, and FIG. 3B is a diagram showing the dependency of the JV curve on the insulation film thickness.
4A is a diagram showing the poly concentration dependency of a CV curve, and FIG. 4B is a diagram showing the poly concentration dependency of a JV curve.
5A is a diagram showing the substrate concentration dependency of a CV curve, and FIG. 5B is a diagram showing the substrate concentration dependency of a JV curve.
6A is a diagram showing the surface impurity concentration dependency of a CV curve, and FIG. 6B is a diagram showing the surface impurity concentration dependency of a JV curve.
7A is a diagram showing the dependency of the CV curve on the impurity concentration in the insulating film; FIG. 7B is a diagram showing the dependency of the JV curve on the impurity concentration in the insulating film.
FIG. 8 is a diagram showing a CV curve for explaining a five-stage back extraction method.
FIG. 9 is a diagram showing a JV curve for explaining a five-stage back extraction method.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Insulation film thickness reverse extraction part 2 Impurity density | concentration reverse extraction part 3 Substrate density | concentration reverse extraction part 4 Surface concentration reverse extraction part 5 Insulating film concentration reverse extraction part 6 Simulator

Claims

Electrical of a semiconductor device having a first conductive film made of a semiconductor containing an impurity formed on an upper surface of an insulating film and a second conductive film made of a semiconductor containing an impurity formed on a lower surface of the insulating film A semiconductor evaluation method for evaluating characteristics with a simulator,
A voltage within a voltage interval including a voltage satisfying a flat band condition is applied between the first and second conductive films, and the first and second conductive films are interposed between the first and second conductive films for each voltage via the insulating film. Measuring a flowing current, or a capacitance between the first and second conductive films;
Based on the measured current flowing between the first and second conductive films and the capacitance between the first and second conductive films, the thickness of the insulating film, the first conductivity A step of calculating an impurity concentration of the film, a substrate impurity concentration of the second conductive film, a surface impurity concentration of the second conductive film, and an impurity concentration in the insulating film. Method.

A semiconductor device comprising: a first conductive film made of a semiconductor containing an impurity formed on an upper surface of an insulating film; and a second conductive film made of a semiconductor containing a p-type impurity formed on a lower surface of the insulating film. A semiconductor evaluation method for evaluating electrical characteristics with a simulator,
The capacitance between the first and second conductive films calculated by the simulator in a state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes a storage layer. Adjusting the film thickness of the insulating film to match the measured value, and back-extracting the film thickness of the insulating film;
The capacitance calculated by the simulator using the thickness of the back-extracted insulating film in a state in which a voltage to the extent that the surface of the second conductive film becomes an inversion layer is applied to the first conductive film. Adjusting the impurity concentration of the first conductive film so as to match the measured value of the capacitance, and back extracting the impurity concentration of the first conductive film;
The thickness of the back-extracted insulating film and the back-extracted first conductive film in a state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes a depletion layer. And adjusting the substrate impurity concentration of the second conductive film so that the slope of the capacitance calculated by the simulator matches the measured slope of the capacitance using the impurity concentration of the second conductive film. Back-extracting the substrate impurity concentration of
With the voltage in the voltage region where the surface of the second conductive film becomes a depletion layer being applied to the first conductive film, the thickness of the back-extracted insulating film and the back-extracted first conductivity Surface impurities of the second conductive film so that the capacitance calculated by the simulator matches the measured value of the capacitance using the impurity concentration of the film and the substrate impurity concentration of the back-extracted second conductive film Back-extracting the surface impurity concentration of the second conductive film by adjusting the concentration; and
The back-extracted insulating film thickness and the back-extracted first conductive film in a state in which a voltage to the extent that the surface of the second conductive film becomes a depletion layer is applied to the first conductive film. The current calculated by the simulator using the impurity concentration of the substrate, the substrate impurity concentration of the back-extracted second conductive film and the surface impurity concentration of the back-extracted second conductive film is the measured value of the current Adjusting the impurity concentration in the film of the insulating film so as to match, and back extracting the impurity concentration in the film of the insulating film.

A semiconductor device comprising: a first conductive film made of a semiconductor containing impurities formed on an upper surface of an insulating film; and a second conductive film made of a semiconductor containing n-type impurities formed on a lower surface of the insulating film. A semiconductor evaluation method for evaluating electrical characteristics with a simulator,
The capacitance between the first and second conductive films calculated by the simulator in a state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes an inversion layer. Adjusting the film thickness of the insulating film to match the measured value, and back-extracting the film thickness of the insulating film;
The capacitance calculated by the simulator using the thickness of the back-extracted insulating film in a state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes a storage layer. Adjusting the impurity concentration of the first conductive film so as to match the measured value of the capacitance, and back extracting the impurity concentration of the first conductive film;
The thickness of the back-extracted insulating film and the back-extracted first conductive film in a state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes a depletion layer. And adjusting the substrate impurity concentration of the second conductive film so that the slope of the capacitance calculated by the simulator matches the measured slope of the capacitance using the impurity concentration of the second conductive film. Back-extracting the substrate impurity concentration of
The back-extracted insulating film thickness and the back-extracted first conductive film in a state in which a voltage to the extent that the surface of the second conductive film becomes a depletion layer is applied to the first conductive film. And the back-extracted surface impurity concentration of the second conductive film so that the capacitance calculated by the simulator matches the measured value of the capacitance. Adjusting the surface impurity concentration of the second conductive film by adjusting
The back-extracted insulating film thickness and the back-extracted first conductive film in a state in which a voltage to the extent that the surface of the second conductive film becomes a depletion layer is applied to the first conductive film. The current calculated by the simulator using the impurity concentration of the substrate, the substrate impurity concentration of the back-extracted second conductive film and the surface impurity concentration of the back-extracted second conductive film is the measured value of the current Adjusting the impurity concentration in the film of the insulating film so as to match, and back extracting the impurity concentration in the film of the insulating film.

The semiconductor evaluation method according to claim 1, wherein the second conductive film is formed as a well region in the semiconductor substrate itself or in the semiconductor substrate.

The semiconductor evaluation method according to claim 1, wherein the semiconductor device is at least one of a MOS transistor and a MOS capacitor.

The processing of each step is performed for each arbitrarily selected device among a plurality of MOS transistors or MOS capacitors formed on the wafer, and the capacitance and the first are individually determined for each selected device. 6. The semiconductor evaluation method according to claim 5, wherein a current flowing between the first and second conductive films can be detected.

7. The voltage applied to the second conductive film when evaluating electrical characteristics of the semiconductor device is a voltage that does not destroy the insulating film. The semiconductor evaluation method of description.

A semiconductor device comprising: a first conductive film made of a semiconductor containing an impurity formed on an upper surface of an insulating film; and a second conductive film made of a semiconductor containing a p-type impurity formed on a lower surface of the insulating film. A semiconductor evaluation device for evaluating electrical characteristics by a simulator,
The capacitance between the first and second conductive films calculated by the simulator in a state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes a storage layer. Adjusting the film thickness of the insulating film so as to match the measured value of the insulating film, and an insulating film thickness reverse extraction unit for back extracting the film thickness of the insulating film;
The capacitance calculated by the simulator using the thickness of the back-extracted insulating film in a state in which a voltage to the extent that the surface of the second conductive film becomes an inversion layer is applied to the first conductive film. Adjusting the impurity concentration of the first conductive film so as to match the measured value of the capacitance, and back-extracting the impurity concentration of the first conductive film;
The thickness of the back-extracted insulating film and the back-extracted first conductive film in a state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes a depletion layer. And adjusting the substrate impurity concentration of the second conductive film so that the slope of the capacitance calculated by the simulator matches the measured slope of the capacitance using the impurity concentration of the second conductive film. A substrate concentration back extraction unit for back extracting the substrate impurity concentration of
The back-extracted insulating film thickness and the back-extracted first conductive film in a state in which a voltage to the extent that the surface of the second conductive film becomes a depletion layer is applied to the first conductive film. And the back-extracted surface impurity concentration of the second conductive film so that the capacitance calculated by the simulator matches the measured value of the capacitance. And a surface concentration back extraction unit for back extracting the surface impurity concentration of the second conductive film;
The back-extracted insulating film thickness and the back-extracted first conductive film in a state in which a voltage to the extent that the surface of the second conductive film becomes a depletion layer is applied to the first conductive film. The current calculated by the simulator using the impurity concentration of the substrate, the substrate impurity concentration of the back-extracted second conductive film and the surface impurity concentration of the back-extracted second conductive film is the measured value of the current And an insulating film concentration reverse extraction section that adjusts the impurity concentration in the insulating film so as to match the above and reversely extracts the impurity concentration in the insulating film.

A semiconductor device comprising: a first conductive film made of a semiconductor containing impurities formed on an upper surface of an insulating film; and a second conductive film made of a semiconductor containing n-type impurities formed on a lower surface of the insulating film. A semiconductor evaluation device for evaluating electrical characteristics by a simulator,
The capacitance between the first and second conductive films calculated by the simulator in a state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes an inversion layer. Adjusting the film thickness of the insulating film so as to match the measured value of the insulating film, and an insulating film thickness reverse extraction unit for back extracting the film thickness of the insulating film;
The capacitance calculated by the simulator using the thickness of the back-extracted insulating film in a state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes a storage layer. Adjusting the impurity concentration of the first conductive film so as to match the measured value of the capacitance, and back-extracting the impurity concentration of the first conductive film;
The thickness of the back-extracted insulating film and the back-extracted first conductive film in a state where a voltage is applied to the first conductive film so that the surface of the second conductive film becomes a depletion layer. And adjusting the substrate impurity concentration of the second conductive film so that the slope of the capacitance calculated by the simulator matches the measured slope of the capacitance using the impurity concentration of the second conductive film. A substrate concentration back extraction unit for back extracting the substrate impurity concentration of
The back-extracted insulating film thickness and the back-extracted first conductive film in a state in which a voltage to the extent that the surface of the second conductive film becomes a depletion layer is applied to the first conductive film. And the back-extracted surface impurity concentration of the second conductive film so that the capacitance calculated by the simulator matches the measured value of the capacitance. And a surface concentration back extraction unit for back extracting the surface impurity concentration of the second conductive film;
The back-extracted insulating film thickness and the back-extracted first conductive film in a state in which a voltage to the extent that the surface of the second conductive film becomes a depletion layer is applied to the first conductive film. The current calculated by the simulator using the impurity concentration of the substrate, the substrate impurity concentration of the back-extracted second conductive film and the surface impurity concentration of the back-extracted second conductive film is the measured value of the current And an insulating film concentration reverse extraction section that adjusts the impurity concentration in the insulating film so as to match the above and reversely extracts the impurity concentration in the insulating film.