JP3901021B2 - Group III nitride semiconductor light-emitting device, manufacturing method thereof, and LED - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor light emitting device, and more particularly, to a group III nitride semiconductor light emitting device having improved electrical characteristics using a boron phosphide-based semiconductor for a barrier layer of a light emitting part having a double hetero structure.
[0002]
[Prior art]
Conventionally, semiconductor light emitting devices that emit visible light having a relatively short wavelength such as a blue band or a green band, such as light emitting diodes (LEDs), use a group III nitride semiconductor such as gallium nitride (GaN) as a material for a light emitting part. Configured. Group III nitride semiconductor of the general formula _{Al α Ga β In 1- α -} β N 1- δ V δ (0 ≦ α ≦ 1,0 ≦ β ≦ 1,0 ≦ α + β ≦ 1,0 ≦ δ <1, The symbol V represents a Group V element other than nitrogen (N). In view of the configuration of the light emitting part of the semiconductor light emitting device, the light emitting part is exclusively a double hetero (DH) junction structure in which the light emitting layer is sandwiched between the barrier layers from both sides in order to obtain high intensity light emission. is there. The light emitting part is a functional part responsible for light emission of the semiconductor light emitting element including a barrier (cladding) layer and a light emitting layer.
[0003]
In a conventional LED using a group III nitride semiconductor as a light emitting part, the lower barrier layer forming the light emitting part of a pn junction type DH junction structure is generally composed of an n-type group III nitride semiconductor. For example, it is made of n-type gallium nitride. The light emitting layer is made of a group III nitride semiconductor containing indium (In) such as n-type gallium nitride indium (Ga _x In _1-X N: 0 ≦ X ≦ 1). Further, the upper barrier layer provided facing the lower barrier layer with the light emitting layer interposed therebetween is made of p-type aluminum nitride / gallium (Al _x Ga _{1 -X} N: 0 ≦ X ≦ 1) or the like. Yes. Further, since sapphire is usually used as the substrate, an n-type ohmic electrode is disposed on the surface of the n-type lower barrier layer, and a p-type ohmic electrode is disposed on the surface of the p-type upper barrier layer, so that the LED Is configured.
[0004]
[Problems to be solved by the invention]
However, p-type aluminum nitride gallium (Al _x Ga _1-x N: 0 ≦ X ≦ 1) used for the p-type upper barrier layer has a high electric resistance, and thus in the group III nitride semiconductor light emitting device, It has been difficult to reduce the forward voltage (so-called V _f ) of the LED or to reduce the threshold voltage (so-called V _th ) of the laser diode (LD). In order to obtain a low-resistance p-type aluminum nitride / gallium layer suitable for forming the p-type upper barrier layer, a group II impurity is intentionally added and the semiconductor layer is vapor-phase grown. Furthermore, it is necessary to perform heat treatment or electron beam irradiation, which makes it difficult to manufacture a semiconductor element.
[0005]
Therefore, in order to provide a group III nitride semiconductor light-emitting device having sufficiently low V _f and V _{th at} low cost, the p-type upper barrier layer or ohmic contact layer on which the p-type ohmic electrode is disposed has a sufficiently low resistance. In addition, it is necessary to form a p-type semiconductor layer that can be easily formed. The present invention is a semiconductor light emitting device using a group III nitride semiconductor in a light emitting part, and has a sufficiently low resistance and is simply formed in place of the p type aluminum nitride / gallium used for the conventional p type upper barrier layer. An object of the present invention is to provide a group III nitride semiconductor light-emitting device in which a new p-type semiconductor that can be used is used for an upper barrier layer and V _f and V _th are sufficiently lowered at low cost.
[0006]
[Means for Solving the Problems]
That is, the present invention
(1) Consists of a crystal substrate, a lower barrier layer made of an n-type group III nitride semiconductor, a light emitting layer made of a group III nitride semiconductor, and a p-type upper barrier layer sequentially provided on the crystal substrate In a group III nitride semiconductor light emitting device having a light emitting portion of a pn junction type double heterostructure, the upper barrier layer includes p-type phosphorus containing boron (B) and phosphorus (P) as constituent elements A group III nitride semiconductor light emitting device comprising a boron fluoride (BP) based semiconductor.
(2) The group III nitride semiconductor light-emitting device according to (1), wherein the upper barrier layer is made of an undoped p-type boron phosphide-based semiconductor to which impurities are not intentionally added. .
(3) The group III nitride light-emitting device according to (1) or (2), wherein the upper barrier layer is made of an amorphous p-type boron phosphide-based semiconductor.
(4) The group III nitride semiconductor light-emitting device according to (3), wherein the upper barrier layer is made of p-type boron phosphide.
(5) The group III according to any one of (1) to (4), wherein an ohmic contact layer made of a p-type boron phosphide-based semiconductor is provided on the upper barrier layer. Nitride semiconductor light emitting device.
(6) The group III nitride semiconductor device according to (5) above, wherein the ohmic contact layer is made of an amorphous p-type boron phosphide-based semiconductor.
(7) An LED comprising the group III nitride semiconductor device according to any one of (1) to (6) above.
(8) On the crystal substrate, a lower barrier layer made of an n-type group III nitride semiconductor, a light-emitting layer made of a group III nitride semiconductor, and a p-type upper barrier layer are sequentially laminated to form a pn junction double heterostructure In the method of manufacturing a group III nitride semiconductor light emitting device for forming a light emitting portion of the above, the upper barrier layer is made of a p-type boron phosphide-based semiconductor containing boron and phosphorus as constituent elements, and is subjected to organometallic thermal decomposition (MOCVD). ) Method for forming a group III nitride semiconductor light emitting device, wherein the upper barrier layer is formed with a crystal substrate temperature of 1000 to 1200 ° C. and a V / III ratio of less than 150.
(9) The upper barrier layer is made of an amorphous p-type boron phosphide-based semiconductor, and the upper barrier layer is formed with a V / III ratio of less than 50. A method for manufacturing a group III nitride semiconductor light-emitting device.
(10) The method for producing a group III nitride semiconductor light-emitting device according to (8) or (9), wherein the upper barrier layer is made of p-type boron phosphide.
(11) An ohmic contact layer made of an amorphous p-type boron phosphide-based semiconductor is formed on the upper barrier layer by MOCVD with a V / III ratio of less than 50. The manufacturing method of the group III nitride semiconductor light-emitting device of any one of thru | or (10).
It is.
[0007]
DETAILED DESCRIPTION OF THE INVENTION
As a first embodiment of the present invention, the upper barrier layer is made of B _α Al _β Ga _γ In _{1- α - β - γ} P _{1- δ} As _δ containing boron (B) and phosphorus (P) as constituent elements. (0 <α ≦ 1,0 ≦ β <1,0 ≦ γ <1,0 <α + β + γ ≦ 1,0 ≦ δ <1) and _{B α Al β Ga γ In 1-} α - β - γ P 1- δ Examples include boron phosphide-based semiconductors such as N _δ (0 <α ≦ 1, 0 ≦ β <1, 0 ≦ γ <1, 0 <α + β + γ ≦ 1, 0 ≦ δ <1). The p-type boron phosphide-based semiconductor layer is a halogen method using boron trichloride (BCl ₃ ) or phosphorus trichloride (PCl ₃ ) as a raw material, diborane (B ₂ H ₆ ), phosphine (PH ₃ ), or the like as a raw material. Vapor phase growth can be carried out by vapor phase growth means such as hydride method, or metal organic thermal decomposition (MOCVD) method using triethyl boron ((C ₂ H ₅ ) ₃ B) as a raw material. When the boron phosphide-based semiconductor layer is vapor-grown by these means, a p-type boron phosphide-based semiconductor layer can be obtained by intentionally adding a group IV impurity that acts as a group II or amphoteric impurity. . It can also be obtained by implanting p-type impurities depending on the ion implantation means. In monomeric boron phosphide (BP), which is a typical boron phosphide-based semiconductor, zinc (Zn) and beryllium (Be), which have less compounding with boron than magnesium (Mg), are suitable as p-type impurities.
[0008]
The carrier (hole) concentration of the boron phosphide-based semiconductor layer forming the p-type upper barrier layer is preferably in the range of approximately 5 × 10 ¹⁷ cm ⁻³ to 5 × 10 ¹⁹ cm ^−3. . From a boron phosphide-based semiconductor layer having a low hole concentration of less than 5 × 10 ¹⁷ cm ^−3, it is difficult to form a p-type upper barrier layer that can sufficiently contribute to reducing V _f or V _th . The hole concentration of the boron phosphide-based semiconductor layer is adjusted by controlling the amount of p-type impurity added or implanted during vapor phase growth or ion implantation. Increasing the amount of p-type impurity added increases the hole concentration. That is, the resistance tends to be low. However, if a p-type impurity is added excessively in order to obtain a hole concentration exceeding 5 × 10 ¹⁹ cm ⁻³ , the boron phosphide-based semiconductor layer crystal deteriorates and becomes high resistance. It is unlikely to be a good material for forming a p-type upper barrier layer or a p-type ohmic contact layer. The carrier concentration can be measured by ordinary Hall effect measurement or the like.
[0009]
In particular, in the case of monomeric boron phosphide (BP), a p-type semiconductor layer having a preferable low hole concentration and a low resistance can be obtained without intentionally adding p-type or amphoteric impurities (undope). Can do. Therefore, unlike the case of the conventional group III nitride semiconductor, a post-process such as a heat treatment for electrically activating the added p-type impurity is unnecessary. For this reason, boron phosphide is a convenient material for easily constructing the p-type upper barrier layer. In order to form an undoped p-type boron phosphide layer, for example, by vapor phase growth means using a hydride method or MOCVD method, it is suitable that the temperature of the crystal substrate is about 1000 to 1200 ° C. High temperatures exceeding 1200 ° C. are disadvantageous because multimeric boron phosphides such as B ₁₃ P ₂ (see J. Am. Ceramic Soc., 47 (1) (1964), pages 44 to 46) are likely to result. is there. In the MOCVD means using triethylboron ((C ₂ H ₅ ) ₃ B) and phosphine (PH ₃ ) as raw materials, the raw material supply amount of group III element during vapor phase growth (unit is, for example, mol / min) The ratio of the feed amount of the group V element (the unit is expressed, for example, in mol / min), the so-called V / III ratio (= PH ₃ / (C ₂ H ₅ ) ₃ B supply ratio ) Is set to a low ratio of less than about 150, a p-type boron phosphide layer can be formed stably. As a good example of the second embodiment of the present invention, an undoped p-type boron phosphide formed by MOCVD means with a PH ₃ / (C ₂ H ₅ ) ₃ B supply ratio of about 120 at a temperature of 1050 ° C. An example of forming a p-type upper barrier layer from the layers is given.
[0010]
In the third embodiment of the present invention, the p-type upper barrier layer is composed of an amorphous boron phosphide-based semiconductor layer. For example, amorphous boron phosphide / gallium (B _α Ga _γ P: 0 <α ≦ 1, 0 ≦ γ <1, α + γ = 1), or boron nitride phosphide (BP _{1− δ} N _δ : 0 ≦ It is composed of an amorphous layer made of a mixed crystal such as δ <1). Since the amorphous boron phosphide-based semiconductor layer is particularly excellent in surface flatness, it is effective in forming a p-type upper barrier layer having a flat surface. A p-type ohmic electrode having a low contact resistance can be formed on the p-type upper barrier layer having a flat surface because of its excellent adhesion, which is also convenient. For example, for the amorphous p-type boron phosphide layer, the V / III ratio (= PH ₃ / (C ₂ H ₅ ) ₃ B supply ratio) is set to a low ratio of less than about 50 in the MOCVD means described above. Can be formed. The V / III ratio should be at least 0.2 in order to prevent non-planarization of the surface of the amorphous layer due to the generation of spherical boron crystals in a growth environment rich in boron. Is desirable. If an electron diffraction method or an X-ray diffraction method is used, it can be determined whether the material is amorphous.
[0011]
If a p-type semiconductor layer having a higher hole concentration is provided as an ohmic contact layer on the p-type upper barrier layer, it can contribute to forming a p-type ohmic electrode that is effective in reducing V _f or V _th . As described above, in a boron phosphide-based semiconductor, a p-type low-resistance layer can be easily formed without requiring a special post-process. Therefore, if the ohmic contact layer is formed of a p-type boron phosphide-based semiconductor layer instead of the conventional group III nitride semiconductor material, a light emitting device with reduced V _f or V _th can be provided. . In particular, in an LED that emits light from the upper barrier layer side, the ohmic contact layer is preferably composed of a boron phosphide-based semiconductor having a larger forbidden band than that corresponding to the emission wavelength. The p-type ohmic electrode to the boron phosphide-based semiconductor can be formed of, for example, a gold / zinc (Au / Zn) alloy or a gold / beryllium (Au / Be) alloy. As an example of the fourth embodiment of the present invention, there is a case where an ohmic contact layer made of undoped p-type boron phosphide is provided by being joined to an upper barrier layer made of undoped p-type boron phosphide. The ohmic contact layer is preferably composed of a low resistance boron phosphide-based semiconductor layer having a hole concentration of about 5 × 10 ¹⁸ cm ^{−3 to} 5 × 10 ¹⁹ cm ^−3, and the layer thickness is about 100 nm or more. It is desirable that the thickness is about 1000 nm.
[0012]
If the ohmic contact layer is composed of an amorphous boron phosphide-based semiconductor layer, the introduction of strain into the upper barrier layer can be suppressed. Therefore, the crystalline alteration of the p-type upper barrier layer induced by strain can be prevented. Further, when the ohmic contact layer is composed of an amorphous boron phosphide-based semiconductor layer, the mechanical pressure at the time of connection of the p-type ohmic electrode provided on the ohmic contact layer to the pedestal electrode is increased by the p-type upper portion. Propagation to the barrier layer can be mitigated. Therefore, the p-type upper barrier layer can be protected from destruction due to mechanical pressure. In order to vapor-phase an amorphous boron phosphide layer by MOCVD using, for example, triethylboron ((C ₂ H ₅ ) ₃ B) and phosphine (PH ₃ ) as raw materials, a V / III ratio ( = PH ₃ / (C ₂ H ₅ ) ₃ B supply ratio) is suitably 0.2 to 50. The crystal form of the obtained boron phosphide layer can be known from a crystal analysis technique such as a general X-ray diffraction method or electron beam diffraction method.
[0013]
【Example】
(First embodiment)
The contents of the present invention are illustrated by taking as an example a case where a group III nitride semiconductor light-emitting diode (LED) is constructed using a laminated structure including a p-type upper barrier layer made of amorphous boron phosphide. I will explain it. FIG. 1 is a schematic plan view of an LED 1A according to the first embodiment. FIG. 2 schematically shows a cross-sectional structure of the LED 1A along the broken line XX ′ shown in FIG.
In the laminated structure 1B for LED 1A use, a Si single crystal having an n-type (111) plane doped with phosphorus (P) was used as the crystal substrate 101. An amorphous low-temperature buffer layer 102 containing boron and phosphorus was formed on the Si single crystal substrate 101. The low temperature buffer layer 102 was vapor-phase grown at 350 ° C. using triethylboron ((C ₂ H ₅ ) ₃ B) and phosphine (PH ₃ ) as raw materials. The PH ₃ / (C ₂ H ₅ ) ₃ B supply ratio during vapor phase growth of the low temperature buffer layer 102 was set to about 40. From the measurement using a general transmission electron microscope (TEM), the layer thickness of the low-temperature buffer layer 102 was measured to be about 20 nm. The electron diffraction pattern did not show diffraction spots, and was halo.
[0015]
Next, the Si single crystal substrate 101 is heated to 950 ° C. in a hydrogen (H ₂ ) stream containing PH _3, and a high temperature buffer layer 103 made of monomeric boron phosphide is deposited on the low temperature buffer layer 102. did. Similarly to the low temperature buffer layer 102, the high temperature buffer layer 103 was vapor-phase grown by (C ₂ H ₅ ) ₃ B / PH ₃ / H ₂ system atmospheric pressure MOCVD means. The carrier concentration of the undoped n-type boron phosphide layer forming the high temperature buffer layer 103 was about 1 × 10 ¹⁸ cm ⁻³ and the layer thickness was about 100 nm.
[0016]
On the high-temperature buffer layer 103, n-type silicon (Si) is doped at 1050 ° C. according to trimethylgallium ((CH ₃ ) ₃ Ga) / ammonia (NH ₃ ) / nitrogen (N ₂ ) atmospheric pressure MOCVD means. A lower barrier layer 104 made of gallium nitride (GaN) was stacked. The carrier concentration of the lower barrier layer 104 was about 3 × 10 ¹⁸ cm ⁻³ and the layer thickness was about 100 nm. On the lower barrier layer 104, Si-doped n-type gallium nitride is formed at 850 ° C. according to (CH ₃ ) ₃ Ga / trimethylindium ((CH ₃ ) ₃ In) / NH ₃ / N ₂ -based atmospheric pressure MOCVD means. A light emitting layer 105 made of indium mixed crystal (Ga _0.90 In _0.10 N) is provided by bonding. The layer thickness of the light emitting layer 105 was about 50 nm.
[0017]
Next, at 1025 ° C., an undoped p-type boron phosphide layer that forms the p-type upper barrier layer 106 is formed by the above-mentioned (C ₂ H ₅ ) ₃ B / PH ₃ / H ₂ system atmospheric pressure MOCVD means. The light-emitting layer 105 is bonded. The PH ₃ / (C ₂ H ₅ ) ₃ B supply ratio was set to about 16. FIG. 3 shows an X-ray diffraction pattern of the boron phosphide layer forming the p-type upper barrier layer 106. In FIG. 3, although the Si single crystal of the substrate 101 is seen, a diffraction peak derived from the boron phosphide single crystal is not recognized, and therefore, it is determined to be amorphous. The carrier concentration of the upper barrier layer 106 was about 2 × 10 ¹⁹ cm ⁻³ and the layer thickness was about 100 nm. The surface of the p-type upper barrier layer 106 was visually recognized as a mirror surface, and the maximum height difference on the surface of the p-type upper barrier layer 106 measured with a general atomic force microscope was about 2 nm. A light emitting portion of a pn junction type double heterostructure was formed from a laminated structure of the n-type lower barrier layer 104, the n-type light emitting layer 105, and the p-type upper barrier layer 106.
[0018]
In the central portion of the amorphous p-type upper barrier layer 106 that forms the surface layer of the laminated structure 1B, an Au.Zn / nickel having a gold / zinc (Au.Zn) alloy film on the side in contact with the same layer 106 is provided. A p-type ohmic electrode 107 having a three-layer structure of (Ni) / Au was provided. The p-type electrode 107 which also serves as a pedestal (pad) electrode for connection was a circular electrode having a diameter of about 120 μm. Further, an aluminum (Al) n-type ohmic electrode 108 is disposed on substantially the entire back surface of the n-type Si single crystal substrate 101 to constitute the LED 1A.
[0019]
An operating current of 20 milliamperes (mA) was passed in the forward direction through the p-type ohmic electrode 107 and the n-type ohmic electrode 108 to cause the LED 1A to emit light. The obtained luminescence was blue-violet light, and the center wavelength was about 440 nm. Since the upper barrier layer 106 is composed of an amorphous boron phosphide layer, no cracks are observed in the light emitting layer 105 due to mechanical pressure during bonding (connection), and from the entire upper plane of the light emitting portion. A substantially uniform intensity of light emission was produced. The luminance in a chip state measured using a general integrating sphere was 6 millicandelas (mcd), and an LED 1A with high emission intensity was provided. In addition, since the upper barrier layer 106 is composed of an amorphous p-type boron phosphide layer, a pn junction portion having a flat junction interface with the n-type light emitting layer 105 can be formed. As a result, the forward voltage (V _f : when the forward current is 20 mA) is about 3.2 V, and the reverse voltage (V _r : when the reverse current is 10 μA) is 5 V or more. A group III nitride semiconductor LED having a rectifying characteristic has been provided.
[0020]
(Second embodiment)
In the second embodiment, the case where a group III nitride semiconductor LED is configured using a laminated structure including a p-type ohmic contact layer made of amorphous boron phosphide is taken as an example. Will be described in detail. FIG. 4 shows a schematic cross-sectional view of the LED 2A according to the second embodiment. In the LED of FIG. 4, the same components as those of the LED shown in FIGS. 1 and 2 are denoted by the same reference numerals.
[0021]
In the same manner as in the first embodiment, the low temperature buffer layer 102, the high temperature buffer layer 103, the n type lower barrier layer 104, the n type light emitting layer 105, and the p type upper barrier layer 106 are formed on the n type Si single crystal substrate 101. Formed. In the second embodiment, an ohmic contact layer 109 made of amorphous boron phosphide is further provided on the p-type upper barrier layer 106. The undoped p-type boron phosphide layer forming the ohmic contact layer 109 is formed at a temperature of 1000 ° C. depending on the (C ₂ H ₅ ) ₃ B / PH ₃ / H ₂ system atmospheric pressure MOCVD means, and PH ₃ / (C ₂ H _{5 3} ) The ₃ B supply ratio was set to about 10. The ohmic contact layer 109 has a carrier concentration of about 1 × 10 ¹⁹ cm ⁻³ and a layer thickness of about 150 nm.
[0022]
At the center of the amorphous p-type ohmic contact layer 109 that forms the surface layer of the laminated structure 2B, there are three layers of Au.Zn / Ni / Au in which the side in contact with the layer 109 is an Au.Zn alloy film. A p-type ohmic electrode 107 having a multilayer structure was provided. The p-type electrode 107 that also serves as a pedestal electrode for connection was a circular electrode having a diameter of about 130 μm. On the back surface of the n-type Si single crystal substrate 101, an Al n-type ohmic electrode 108 was disposed.
[0023]
Through the p-type ohmic electrode 107 and the n-type ohmic electrode 108, the LED 2A was caused to emit light by passing an operating current of 20 mA in the forward direction. The obtained luminescence was blue-violet light, and the center wavelength was about 440 nm. Since the p-type ohmic contact layer 109 is composed of an amorphous boron phosphide layer, no cracks are observed in the upper barrier layer 106 and the light emitting layer 105 due to mechanical pressure during bonding (connection). Luminescence with substantially uniform intensity was produced from the entire surface of the plane. The brightness in a chip state measured using a general integrating sphere was 9 mcd, and an LED 2A having high emission intensity was provided. Further, since the ohmic contact layer 109 having a high carrier concentration is provided on the upper barrier layer 106, the forward voltage (V _f : when the forward current is 20 mA) is the LED 1A described in the first embodiment. It was reduced to about 3.0 V, which is even lower than that. Further, since the upper barrier layer 106 is composed of an amorphous p-type boron phosphide layer, a pn junction with a flat junction interface with the n-type light emitting layer 105 can be formed, and a reverse voltage (V _r : However, when the reverse current was 10 μA, the breakdown voltage was 5 V or higher.
[0024]
【The invention's effect】
An n-type lower barrier layer made of a group III nitride semiconductor provided on a crystal substrate, a light emitting layer made of a group III nitride semiconductor provided on the lower barrier layer, and a p-type upper portion provided on the light emitting layer In a group III nitride semiconductor light emitting device having a light emitting portion of a pn junction type double heterojunction structure composed of a barrier layer, in the present invention, the p type upper barrier layer is a p type containing boron and phosphorus as constituent elements. Therefore, the p-type upper barrier layer having a low resistance can be formed without requiring a complicated incidental process for reducing the resistance. Further, when the p-type upper barrier layer is made of amorphous boron phosphide, a pn junction light-emitting portion having a flat junction interface between the light-emitting layer and the p-type upper barrier layer can be formed. A semiconductor light emitting device can be easily provided.
[0025]
Further, since the p-type upper barrier layer is composed of an amorphous boron phosphide-based semiconductor layer, particularly an amorphous boron phosphide layer, the mechanical pressure generated by the connection to the pedestal electrode is absorbed. An effect is exhibited and damage to the light emitting layer can be avoided. Therefore, it is possible to provide a high-intensity group III nitride semiconductor light-emitting device that emits light having substantially uniform intensity from the upper plane of the light-emitting portion.
[0026]
Further, since the ohmic contact layer provided on the p-type upper barrier layer made of an amorphous boron phosphide-based semiconductor layer is composed of an amorphous p-type boron phosphide-based semiconductor layer, the resistance is reduced. Therefore, a low-resistance p-type ohmic contact layer can be formed without requiring a complicated incidental process. In addition, the ohmic contact layer made of an amorphous p-type boron phosphide-based semiconductor layer is effective in absorbing mechanical pressure at the time of connection to the pedestal electrode. Therefore, the p-type upper barrier layer and the light emitting layer are effective. Can be avoided, a forward voltage is low, and a Group III nitride semiconductor light-emitting device with high emission intensity can be provided.
[Brief description of the drawings]
FIG. 1 is a schematic plan view of an LED according to a first embodiment.
2 is a schematic cross-sectional view taken along broken line XX ′ of the LED shown in FIG.
FIG. 3 is an X-ray diffraction pattern of a boron phosphide layer forming a p-type upper barrier layer.
FIG. 4 is a schematic sectional view of an LED according to a second embodiment.
[Explanation of symbols]
1A, 2A LED
1B, 2B Laminated structure 101 Crystal substrate 102 Low-temperature buffer layer 103 High-temperature buffer layer 104 n-type lower barrier layer 105 light-emitting layer 106 p-type upper barrier layer 107 p-type ohmic electrode 108 n-type ohmic electrode 109 p-type ohmic contact layer

Claims (11)

A pn comprising a crystal substrate, a lower barrier layer made of an n-type group III nitride semiconductor, a light emitting layer made of a group III nitride semiconductor, and a p-type upper barrier layer, which are sequentially provided on the crystal substrate. In a group III nitride semiconductor light emitting device including a light emitting part having a junction type double heterostructure, a p-type boron phosphide (in which an upper barrier layer contains boron (B) and phosphorus (P) as constituent elements) A group III nitride semiconductor light-emitting device comprising a BP) -based semiconductor. 2. The group III nitride semiconductor light emitting device according to claim 1, wherein the upper barrier layer is made of an undoped p-type boron phosphide-based semiconductor to which impurities are not intentionally added. 3. The group III nitride light-emitting device according to claim 1, wherein the upper barrier layer is made of an amorphous p-type boron phosphide-based semiconductor. 4. The group III nitride semiconductor light emitting device according to claim 3, wherein the upper barrier layer is made of p-type boron phosphide. 5. The group III nitride semiconductor light-emitting device according to claim 1, wherein an ohmic contact layer made of a p-type boron phosphide-based semiconductor is provided on the upper barrier layer. 6. 6. The group III nitride semiconductor device according to claim 5, wherein the ohmic contact layer is made of an amorphous p-type boron phosphide-based semiconductor. An LED comprising the group III nitride semiconductor device according to any one of claims 1 to 6. On a crystal substrate, a lower barrier layer made of an n-type group III nitride semiconductor, a light-emitting layer made of a group III nitride semiconductor, and a p-type upper barrier layer are sequentially laminated, and a light-emitting portion having a pn junction double heterostructure In the method for manufacturing a group III nitride semiconductor light-emitting device, forming an upper barrier layer made of a p-type boron phosphide-based semiconductor containing boron and phosphorus as constituent elements, and by a metal organic thermal decomposition (MOCVD) method A method for producing a group III nitride semiconductor light-emitting device, wherein the upper barrier layer is formed with a crystal substrate temperature of 1000 to 1200 ° C. and a V / III ratio of less than 150. 9. The group III nitride according to claim 8, wherein the upper barrier layer is made of an amorphous p-type boron phosphide-based semiconductor, and the upper barrier layer is formed with a V / III ratio of less than 50. A method for manufacturing a semiconductor light emitting device. 10. The method for manufacturing a group III nitride semiconductor light emitting device according to claim 9, wherein the upper barrier layer is made of p-type boron phosphide. 11. The ohmic contact layer made of an amorphous p-type boron phosphide-based semiconductor is formed on the upper barrier layer with a V / III ratio of less than 50 by MOCVD. A method for producing a group III nitride semiconductor light-emitting device according to claim 1.

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