JP3890189B2 - Ripple filter - Google Patents

Ripple filter Download PDF

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Publication number
JP3890189B2
JP3890189B2 JP2000270089A JP2000270089A JP3890189B2 JP 3890189 B2 JP3890189 B2 JP 3890189B2 JP 2000270089 A JP2000270089 A JP 2000270089A JP 2000270089 A JP2000270089 A JP 2000270089A JP 3890189 B2 JP3890189 B2 JP 3890189B2
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Japan
Prior art keywords
voltage
output
power supply
resistor
ripple filter
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JP2000270089A
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Japanese (ja)
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JP2002084737A (en
Inventor
敬三 田中
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アイコム株式会社
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Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a ripple filter.
[0002]
[Prior art]
A conventional ripple filter will be described with reference to FIG.
This ripple filter is for a DC power supply, and the positive side of the input power supply is connected to the input terminal 101, and a load such as a VCO is connected to the output terminal 102. The resistor R3 and the capacitor C3 constitute a low-pass filter whose time constant is determined. The ripple component on the input power supply side is suppressed in the voltage across the capacitor C3. The emitter follower-connected transistor Q3 is controlled by this voltage, and an output voltage in which the ripple component is suppressed is output from the output terminal 102. .
At the time of start-up, the charging current starts to flow to the capacitor C3 through the resistor R3 at the moment when the input power is turned on. The voltage across the capacitor C3 is the resistance value R of the resistor R3 and the capacitance value C of the capacitor C3. It rises with a time constant determined by.
[0003]
A diode D3 is connected in parallel in the forward direction to the resistor R3 in order to shorten the charging time for the capacitor C3 at the initial stage of the rise of the voltage across the capacitor C3.
Therefore, the output voltage is not yet stable while the forward current flows through the diode D3.
The ripple filter configured as described above is also used to stabilize the power supply voltage of the VCO. In a digital frequency synthesizer (so-called DDS) configured to use such an output voltage of the VCO as a system clock, the VCO must be started in order to send data from the frequency synthesizer. It becomes. Further, a circuit having a gate array configuration such as the digital frequency synthesizer is configured not to accept data unless a system clock is input.
[0004]
Therefore, it is necessary to control the timing so that the output signal from the frequency synthesizer is valid after the power supply voltage of the VCO is stabilized and after the oscillation start time of the VCO has elapsed. For this reason, a circuit for setting the lock voltage of the PLL circuit to a constant voltage at the time of start-up when it is out of the capture range of the PLL circuit due to the setting of the change range of the output voltage of the VCO (commonly called a kick circuit). Circuit).
It is necessary to continue to operate the lock voltage by the kick circuit until the power supply voltage of the VCO is stabilized.
[0005]
[Problems to be solved by the invention]
On the other hand, in the conventional ripple filter, it is not possible to know whether the power supply voltage is stable immediately after the start-up, and a malfunction occurs if the operation time of the lock voltage by the kick circuit is too short. The operation time of the lock voltage by the circuit had to be set longer with a sufficient margin.
Therefore, there is a problem that the time until the output signal from the frequency synthesizer is validated becomes unnecessarily long and the startup time becomes long.
In addition to the VCO example as described above, the low-frequency amplifier and the like also have a problem that a pop noise may be generated in the output until the power supply voltage is stabilized.
[0006]
Therefore, the present invention improves the ripple filter used for the power supply of the VCO and the low-frequency amplifier, and provides a technique that can know the timing when the power supply voltage is stabilized in the state immediately after startup, and uses the VCO. It was made for the purpose of improving the characteristics of the device and the low-frequency amplifier.
[0007]
The ripple filter according to claim 1 of the present invention includes a low-pass filter in which a resistor and a capacitor are connected in series, and the ripple filter is configured to output by removing a ripple component contained in an input power supply. together connected in parallel with the emitter and base of the transistor in the forward direction across the resistor of the low-pass filter, by being configured from the collector of the transistor so as to output the voltage information at the connection point between the capacitor and the resistor It is a feature.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a ripple filter according to the present invention will be described in detail based on the drawings showing embodiments thereof.
[0010]
FIG. 1 is a configuration diagram of a frequency synthesizer that uses a ripple filter according to an embodiment of the present invention for a power supply circuit. A power supply device 1, a ripple filter 2, a VCO 3, and a PLL circuit 4 including the VCO 3, It comprises a digital frequency synthesizer (hereinafter simply referred to as DDS) 5 and a microcomputer (hereinafter simply referred to as CPU) 6 for controlling these circuits.
[0011]
The power supply device 1 rectifies an AC power supply and supplies a DC voltage, but the output DC voltage contains a slight ripple component.
The ripple filter 2 uses a DC voltage output from the power supply device 1 as an input power supply, removes a ripple component and supplies it as a power supply for the VCO 3, and includes a low-pass filter comprising a resistor R1 and a capacitor C1, a collector Is connected to the power input terminal IN, the emitter is connected to the output terminal OUT, the base is connected to the connection point P1 of the resistor R1 and the capacitor C1, and the base is connected via the resistor R2. The second transistor Q2 is connected to the connection point P1 between the resistor R1 and the capacitor C1, the emitter is connected to the power input terminal IN, and the collector is connected to the detection terminal DET. The resistance value of the resistor R2 is set to a value sufficiently smaller than the resistance value of the resistor R1.
Detected voltage or varying the timing is output from the detection terminal DET of the ripple filter 2 is monitored by the CPU 6.
[0012]
VCO 3 is a voltage controlled oscillator that operates when a DC voltage is supplied from the output terminal OUT. The PLL circuit 4 includes the VCO 3 to constitute a PLL oscillation circuit, and outputs the output frequency as a system clock of the DDS 5.
The DDS 5 is configured to access the frequency data memory based on the system clock output from the VCO 3 to directly generate and output a predetermined frequency. The timing at which the output signal of the DDS 5 is validated is controlled by the CPU 6.
In the above configuration, the transistor Q2 has a configuration corresponding to the transistor of claim 1.
[0013]
In the above configuration,
In the state immediately after the start when the DC voltage starts to be output from the power supply device 1,
Since the voltage across the capacitor C1 is approximately 0 volts, the transistor Q2 is turned on and a base current flows. Accordingly, charging of the capacitor C1 is started via the resistor R1, and charging current is also supplied from the transistor Q2 and the resistor R2. At this time, since the resistance value of the resistor R2 is sufficiently smaller than the resistance value of the resistor R1, the charging time is shortened similarly to the diode D3 in FIG.
Since the detection voltage is output to the detection terminal DET through the collector while the transistor Q2 is on, the output voltage of the ripple filter 2 is stabilized by monitoring the detection terminal DET by the CPU 6. You can know when to do. When the output voltage of the ripple filter 2 is stabilized, the power supply voltage of the VCO 3 is also stabilized, so that the oscillation frequency output from the PLL circuit 4 is also stabilized. Therefore, the operation of the DDS 5 that operates using the oscillation frequency output from the PLL circuit 4 as a system clock is also ensured.
[0014]
When the charging of the capacitor C1 reaches a predetermined level, the transistor Q2 is turned off and the detection voltage is not output from the detection terminal DET.
That is, by monitoring the detection terminal DET by the CPU 6, it is possible to know the voltage across the capacitor C1 or the voltage information at the connection point P1 between the resistor R1 and the capacitor C1.
Therefore, by controlling the CPU 6 to invalidate the output signal of the DDS 5 while the detection voltage is output immediately after the start and to enable the output of the DDS 5 at the timing when the detection voltage is not output. The output of the DDS 5 can be validated in a sufficiently short time if necessary without waiting for an unnecessarily long time.
[0015]
Therefore, according to the frequency synthesizer having the configuration shown in FIG. 1, the C / N ratio of the output signal can be improved, and the power supply voltage can be stabilized in a short time after startup to speed up the output signal lockup. Furthermore, a reliable start-up can be realized in order to control the timing at which the output signal is validated by the detection voltage.
In place of the control via the CPU 6, the validity / invalidity of the output signal of the DDS 5 may be directly controlled by the detection voltage of the detection terminal DET.
[0016]
The voltage information at the connection point P1 between the resistor R1 and the capacitor C1 can be monitored by monitoring the voltage across the resistor R1 or the capacitor C1, or by turning on / off the diode or transistor connected in parallel to the resistor R1. It can also be realized by directly or indirectly monitoring the off state.
As the output means described in claim 1, a photocoupler or the like can be used instead of the transistor Q2 shown in FIG.
[0017]
Further, as shown in FIG. 2, the ripple filter 2 according to the present invention is inserted into the power supply line from the power supply device 1 to the low frequency amplifier circuit 7, and the voltage information of the connection point P1 between the resistor R1 and the capacitor C1 is used. By performing control such as muting the output signal of the low-frequency amplifier circuit 7, it is possible to prevent the pop sound included in the output signal at the start-up.
[0018]
【The invention's effect】
According to the ripple filter of the present invention , since a transistor is used to output voltage information at a connection point between a resistor and a capacitor constituting the low-pass filter, the timing at which the output voltage of the ripple filter is stabilized with a simple circuit configuration. I can know.
[Brief description of the drawings]
FIG. 1 is a configuration diagram of a frequency synthesizer in which an embodiment of a ripple filter according to the present invention is used in a power supply circuit.
FIG. 2 is a configuration diagram of a low-frequency amplifier using the ripple filter according to the embodiment of the present invention in a power supply circuit.
FIG. 3 is a configuration diagram of a conventional ripple filter.
[Explanation of symbols]
1 Power supply 2 Ripple filter 3 VCO
4 PLL circuit 5 Digital frequency synthesizer (DDS)
6 Microcomputer (CPU)
R1 Resistor C1 Capacitor P1 Connection point Q1 First transistor Q2 Second transistor, diode, output means

Claims (1)

  1. In a ripple filter that includes a low-pass filter in which a resistor and a capacitor are connected in series, and is configured to output by removing the ripple component contained in the input power supply,
    While connecting the emitter and base of the transistor in parallel in the forward direction to both ends of the resistor of the low-pass filter,
    A ripple filter configured to output voltage information of a connection point between the resistor and the capacitor from a collector of the transistor.
JP2000270089A 2000-09-06 2000-09-06 Ripple filter Active JP3890189B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000270089A JP3890189B2 (en) 2000-09-06 2000-09-06 Ripple filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000270089A JP3890189B2 (en) 2000-09-06 2000-09-06 Ripple filter

Publications (2)

Publication Number Publication Date
JP2002084737A JP2002084737A (en) 2002-03-22
JP3890189B2 true JP3890189B2 (en) 2007-03-07

Family

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Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101330415B1 (en) 2009-04-30 2013-11-20 엘지디스플레이 주식회사 Liquid crystal display and driving method thereof

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