JP3887473B2 - Semiconductor device manufacturing method and etching solution used in this method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates generally to a method for manufacturing a semiconductor device and an etching solution used therefor, and more particularly to selective etching before forming a gate electrode and an etching solution used therefor.
[0002]
[Prior art]
Since GaAs-based materials (InGaAs / InAlAs materials, GaAs / AlGaAs materials, etc.) are semiconductor materials with high carrier mobility, field effect transistors (hereinafter referred to as “FETs”) and high electron mobility transistors (hereinafter referred to as “FETs”). , And may be referred to as “HEMT”).
[0003]
These semiconductor elements have a configuration in which a source electrode, a gate electrode, and a drain electrode are formed on a GaAs substrate.
For example, a general method for manufacturing a HEMT is described. First, an epitaxial layer (hereinafter sometimes referred to as an “epi layer”) is grown on a GaAs substrate, a predetermined patterning is performed using a resist, and then a source / drain region is formed. For ion implantation. Next, a metal film is deposited to form a source electrode and a drain electrode. After performing predetermined patterning with a resist, a recess groove is formed by etching, and a metal film is deposited thereon to form a gate electrode.
[0004]
The depth of the recess etching groove formed at this time greatly affects the device characteristics of the semiconductor element, for example, threshold voltage, drain current, mutual conductance, etc., so that a recess groove having a uniform depth can be formed. Need to control.
As a method for controlling this, the ratio between the etching rate of the contact epilayer (for example, InGaAs layer in InGaAs / InAlAs system) and the etching rate of the barrier epilayer (for example, InAlAs layer in InGaAs / InAlAs system) is infinite. There is a method of performing selective etching using an etchant (the etching rate here is indicated by the depth of an etching groove etched per unit time). If this selective etching is performed, the progress of etching stops on the barrier epi layer (InAlAs layer), and the etching depth can be controlled.
[0005]
As a method for uniformly forming the recess etching groove by selective etching, for example, in a semiconductor substrate having an InGaAs / InAlAs laminated structure, a mixed solution of citric acid and hydrogen peroxide water (pH adjusted with ammonia water as a recess etching solution) A method using a citric acid / ammonia / hydrogen peroxide mixed aqueous solution) has been proposed (N. Yoshida et al., IEEE MTT-S Digest, 1994, WEIE-1, p. 645 to P. 648). According to this method, the progress of etching can be stopped on the InAlAs epilayer, and the depth of the recess groove can be controlled to some extent.
[0006]
[Problems to be solved by the invention]
However, when citric acid / ammonia / hydrogen peroxide mixed aqueous solution is used as an etching solution, the viscosity of citric acid is high, so the viscosity of the etching solution also increases, and the depth of the recess etching groove tends to be non-uniform. As a result, the device characteristics of the semiconductor elements are likely to vary, and there is a problem that a high-quality HEMT cannot be manufactured stably. In addition, since the selection performance of the mixed aqueous solution greatly depends on the pH of the aqueous solution, strict pH adjustment is required when used as an etching solution. Therefore, it is necessary to incorporate a process such as pH monitoring in the manufacturing process of the semiconductor element, and there is a problem that the process becomes longer and complicated. Furthermore, pH adjustment itself is difficult and reproducibility is poor, and there is also a problem that a high-quality semiconductor element cannot be stably manufactured in this respect.
[0007]
Accordingly, an object of the present invention is to provide a method capable of simplifying a method for manufacturing a semiconductor element including a selective recess etching process and stably manufacturing a high-quality semiconductor element.
[0008]
[Means for Solving the Problems]
In order to achieve the above object, the present invention
(1) In a method for manufacturing a semiconductor element using a semiconductor substrate having a structure in which at least an InGaAs layer and an InAlAs layer are stacked,
It includes a step of etching the InGaAs layer stacked on the InAlAs layer, and a mixed solution composed of a mixed solution of boric acid and hydrogen peroxide water is used as an etchant used in the step.
[0009]
Also,
(2) In a method for manufacturing a semiconductor device using a semiconductor substrate having a structure in which at least a GaAs layer and an AlGaAs layer are laminated,
The method includes a step of etching a GaAs layer stacked on an AlGaAs layer, and a mixed solution composed of a mixed solution of boric acid and hydrogen peroxide is used as an etchant used in the step.
[0010]
Furthermore, the present invention provides
(3) It is characterized by an etching solution made of a mixed solution of boric acid and hydrogen peroxide used in a step of etching an InGaAs layer stacked on an InAlAs layer in the step of the method for manufacturing a semiconductor element.
[0011]
The present invention also provides:
(4) It is characterized by an etching solution composed of a mixed solution of boric acid and hydrogen peroxide used in a step of etching a GaAs layer laminated on an AlGaAs layer in the step of the method for manufacturing a semiconductor device.
[0012]
According to the manufacturing method of the present invention, the InGaAs layer stacked on the InAlAs layer or the GaAs layer stacked on the AlGaAs layer can be selectively etched without adjusting the pH of the etching solution. The manufacturing process of the semiconductor element is simplified and the productivity is improved. Further, the etching solution according to the present invention does not require pH adjustment as described above, and also has a low viscosity, so that the recess etching groove formed by selective etching becomes uniform, and a stable and high-quality recess type. A semiconductor element can be manufactured.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, an embodiment of the present invention will be described with reference to FIGS. FIG. 1 to FIG. 6 are diagrams showing manufacturing steps of the first embodiment and Example 1 of the present invention.
[0019]
On the InP substrate 11, an InAlAs buffer layer 12, an InGaAs channel layer 13, an InAlAs spacer layer 14, a chemical vapor deposition method (MOCVD method) using thermal decomposition of an organic metal, or an MBE (Molecular Beam Epitaxy) method. For example, an InAlAs active layer 15 doped with Si and an InAlAs barrier layer 16, for example, an InGaAs contact layer 17 doped with Si are grown in this order (see FIG. 1). Hereinafter, the InP substrate having this laminated structure is referred to as an InP-HEMT substrate. In FIG. 2 and subsequent figures, the InAlAs active layer 15 is omitted from the InAlAs buffer layer 12 in the InP-HEMT substrate.
[0020]
Next, after a resist 18 is applied to the entire surface of the InP-HEMT substrate and predetermined mask patterning is performed, oxygen ions are implanted using an ion implantation apparatus or the like in order to form a source region and a drain region (FIG. 2). reference). After removing the resist 18 with an organic solvent such as oxygen ashing or acetone, a resist 19 is applied to the entire surface of the InP-HEMT substrate, predetermined mask patterning is performed, and an electron beam vapor deposition apparatus (EB vapor deposition apparatus) is used. Then, an ohmic metal (OM metal, such as Au—Pt—Ti eutectic) 20 is deposited (see FIG. 3).
[0021]
Next, after removing the resist 19 and the OM metal film 20 on the resist 19 using an organic solvent such as dimethylformamide (DMF), a resist 21 is applied to the entire surface of the InP-HEMT substrate and predetermined mask patterning is performed. Do. Next, the InGaAs contact layer 17 and the InAlAs barrier layer 16 are selectively etched using an etchant to form a recess groove 22 (see FIG. 4).
[0022]
Next, after applying a resist 23 on the entire surface of the InP-HEMT substrate and performing predetermined mask patterning, a gate metal 24 (Au—Pt—Ti eutectic or the like) is deposited using, for example, an EB apparatus or the like. (See FIG. 5). Thereafter, the resist 21 and the resist 23 are removed using an organic solvent such as DMF. At this time, the gate metal film 24 on the resist 23 is also removed at the same time, and a gate electrode 25 is formed in the recess groove to obtain a semiconductor element (see FIG. 6).
[0023]
As the etching solution, a mixed solution of boric acid and hydrogen peroxide water is used. Since the InGaAs layer stacked on the InAlAs layer or the GaAs layer stacked on the AlGaAs layer is selectively etched without adjusting the pH, the manufacturing process can be simplified.
[0026]
The mixed solution is prepared, for example, by dissolving the acid in ultrapure water and mixing it with hydrogen peroxide . Optimum mixing ratio, the concentration of 30% hydrogen peroxide solution, when mixed with 1/5 or 5/1 or less of the range of the volume ratio for the aqueous solution containing an acid of a predetermined concentration, selective etching performance This is preferable. Furthermore, it is preferable to use a high-purity reagent during preparation in order to prevent contamination of impurities.
[0027]
Below, the example of preparation of the etching liquid in this invention is shown.
30 g of boric acid (purity> 99.5%) is dissolved in 1,000 ml of ultrapure water. The diluted boric acid and the hydrogen peroxide solution having a concentration of 30% are mixed in a volume ratio of 5: 1 to 1: 5 to prepare an etching solution.
[0028]
For the etching, a conventionally known recess etching method can be used. For example, after a semiconductor substrate is subjected to oxygen ashing using an ashing apparatus or the like, the semiconductor substrate is immersed in the etching solution for a predetermined time during which the contact layer is etched, and then the semiconductor substrate is washed with water and dried. Is mentioned.
[0029]
Since the etchant exhibits high selectivity also for etching of a GaAs layer laminated on an AlGaAs layer, it can be applied to a method of manufacturing a semiconductor device having a structure in which a GaAs layer and an AlGaAs layer are laminated. it can. Note that the method of manufacturing the InP-HEMT substrate having a structure in which the GaAs layer and the AlGaAs layer are stacked is the same as the method of manufacturing the InP-HEMT substrate in which the InGaAs layer and the InAlAs layer are stacked.
[0030]
【Example】
Example 1
<Preparation of etching solution>
30 g of boric acid (purity 99.5%) was dissolved in 1000 ml of ultrapure water, and the diluted boric acid and 500 ml of hydrogen peroxide solution having a concentration of 30% were mixed to prepare an etching solution.
[0031]
<Method for Manufacturing Semiconductor Device>
An InAlAs buffer layer 12, an InGaAs channel layer 13, an InAlAs spacer layer 14, and an InAlAs active layer 15 doped with Si on an InP substrate 11 by chemical vapor deposition (MOCVD) using thermal decomposition of an organic metal. InAlAs barrier layer 16 and Si-doped InGaAs contact layer 17 were grown in this order (see FIG. 1). Hereinafter, the InP substrate having this laminated structure is referred to as an InP-HEMT substrate. In FIG. 2 and subsequent figures, the InAlAs active layer 15 is omitted from the InAlAs buffer layer 12 in the InP-HEMT substrate.
[0032]
Next, a resist 18 is applied to the entire surface of the InP-HEMT substrate, and after performing predetermined mask patterning, an ion implantation apparatus (“NH-205”, manufactured by Nissin Electric Co., Ltd.) is used to form a source region and a drain region. ) Was used to implant oxygen ions (see FIG. 2). After the resist 18 is removed by oxygen ashing or acetone, a resist 19 is applied to the entire surface of the InP-HEMT substrate, predetermined mask patterning is performed, and an electron beam deposition apparatus (“EVC-1501”, manufactured by Anerva) Was used to deposit Au—Pt—Ti eutectic as an ohmic metal (see FIG. 3).
[0033]
Next, after removing the resist 19 and the OM metal film 20 on the resist 19 using dimethylformamide (DMF), a resist 21 was applied to the entire surface of the InP-HEMT substrate, and predetermined mask patterning was performed. Next, after oxygen ashing the semiconductor substrate using an ashing apparatus (manufactured by IPC), the semiconductor substrate is immersed in an etching solution containing boric acid obtained by the above preparation method for 10 seconds, and thereafter The semiconductor substrate was washed with water and dried by N ₂ blow. A uniform recess etching groove was formed on the semiconductor substrate.
[0034]
Next, after applying resist 23 on the entire surface of the InP-HEMT substrate and performing predetermined mask patterning, both Au—Pt—Ti are used with an electron beam evaporation apparatus (“EVC-1501”, manufactured by Anelva). Crystals were deposited as gate metal 24 (see FIG. 5). Thereafter, when the resist 21 and the resist 23 were removed using DMF, the gate metal film 24 on the resist 23 was also removed at the same time, a gate electrode was formed in the recess groove portion, and a semiconductor element was obtained (see FIG. 6). The device characteristics of the obtained semiconductor element were good.
[0037]
【The invention's effect】
According to the present invention, an InGaAs layer stacked on an InAlAs layer or a GaAs layer stacked on an AlGaAs layer can be highly selectively etched without adjusting the pH of the etching solution. Can be simplified, and productivity is improved. In addition, since the depth of the recess groove is uniform, the semiconductor device manufactured according to the present invention has an effect of having high device characteristics.
[Brief description of the drawings]
FIG. 1 is a diagram showing a part of a process of a method for manufacturing a semiconductor device of the present invention.
FIG. 2 is a diagram showing another part of the process of the method for manufacturing a semiconductor device of the present invention.
FIG. 3 is a diagram showing another part of the process of the method for manufacturing a semiconductor device of the present invention.
FIG. 4 is a diagram showing another part of the process of the method for manufacturing a semiconductor device of the present invention.
FIG. 5 is a diagram showing another part of the steps of the method of manufacturing a semiconductor device of the present invention.
FIG. 6 is a diagram showing another part of the process of the method for manufacturing a semiconductor device of the present invention.
[Explanation of symbols]
11 InP substrate 12 InAlAs buffer layer 13 InGaAs channel layer 14 InAlAs spacer layer 15 Si-doped InAlAs active layer 16 InAlAs barrier layer 17 InGaAs contact layer 18 resist 19 resist 20 OM metal film 21 resist 22 recess etched groove 23 resist 24 gate metal Film 25 Gate electrode

Claims (4)

In a method for manufacturing a semiconductor element using a semiconductor substrate having a structure in which at least an InGaAs layer and an InAlAs layer are laminated,
A method of manufacturing a semiconductor device, comprising a step of etching an InGaAs layer stacked on an InAlAs layer, and using a mixed solution of boric acid and hydrogen peroxide as an etching solution used in the step. In a method for manufacturing a semiconductor device using a semiconductor substrate having a structure in which at least a GaAs layer and an AlGaAs layer are laminated,
A method of manufacturing a semiconductor device comprising a step of etching a GaAs layer laminated on an AlGaAs layer, and using a mixed solution of boric acid and hydrogen peroxide as an etching solution used in the step. An etching solution comprising a mixed solution of boric acid and hydrogen peroxide used in a step of etching an InGaAs layer stacked on an InAlAs layer in a step of a method for manufacturing a semiconductor element. An etching solution comprising a mixed solution of boric acid and hydrogen peroxide used in a step of etching a GaAs layer laminated on an AlGaAs layer in a step of a method for manufacturing a semiconductor element.

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