JP3877747B1 - A / D converter - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an A / D conversion device capable of accurate calibration.
An A / D converter includes a reference voltage generation unit that generates a plurality of analog reference voltages for each of a plurality of measurement target voltage values, and a plurality of analogs from the reference voltage generation unit. A first analog-to-digital converter 11 that receives a reference voltage and outputs a plurality of corresponding digital signals, and a plurality of digital signals from the first analog-to-digital converter 11, each of a plurality of measurement target voltage values. Based on the first calculation unit 13 that calculates the corresponding measurement target digital signal, the second analog-digital converter 12 that inputs the measurement analog voltage and outputs the corresponding digital measurement value, and the measurement target digital signal, 2 includes a second calculation unit 14 that performs a calculation for a predetermined correction on the digital measurement value output from the analog-digital converter 12.
[Selection] Figure 1

Description

  The present invention relates to an A / D converter, and more particularly, to an A / D converter that can obtain an accurate A / D conversion value in an A / D converter having two A / D (analog-digital) converters. .

A conventional A / D converter is described in, for example, Japanese Patent Laid-Open No. 2004-304738 (Patent Document 1). According to Patent Document 1, the A / D converter includes an analog-to-digital converter for detection that converts a detected analog signal into a detected digital signal, and a reference analog digital that converts a reference analog signal into a reference digital signal. A conversion unit, generating a highly accurate power supply voltage, dividing it using two resistors to generate a reference analog signal, converting it to a reference digital signal, and using this to detect The digital signal to be detected output from the analog-digital conversion unit is corrected.
JP 2004-304738 A

  Conventional A / D converters are configured as described above. Since only a single value is prepared for the reference analog signal, there is a problem that it is unclear whether or not the reference value is correct over a predetermined measurement range.

  Conventionally, the analog-to-digital converter for measurement and the analog-to-digital converter for reference voltage are each dedicated, so it is possible to verify whether the characteristics of both analog-to-digital converters match. There wasn't.

  In addition, since the reference analog signal is generated by dividing by the resistor, when the circuit is realized by LSI, the voltage of the reference analog signal does not become an expected value due to the variation in the resistance value of the resistor. There was a problem that calibration could not be performed accurately.

  The present invention has been made paying attention to the above-described problems, and an object thereof is to provide an A / D conversion device capable of accurate calibration.

An A / D converter according to the present invention includes a reference voltage generating unit that generates a plurality of analog reference voltages approximate to the voltage value for each of a plurality of measurement target voltage values, and a reference voltage generating unit Each of a plurality of measurement target voltage values based on a plurality of digital signals from a first analog-digital converter that receives a plurality of analog reference voltages and outputs a corresponding plurality of digital signals, and a first analog-digital converter Based on the measurement target digital signal, the first calculation means for calculating the measurement target digital signal, the second analog-digital converter for inputting the measurement analog voltage and outputting the corresponding digital measurement value, Second calculating means for performing a calculation for a predetermined correction on the digital measurement value output from the analog-digital converter.

  According to the present invention, a plurality of analog reference voltages are generated for each of a plurality of measurement target voltage values, and a plurality of digital signals corresponding thereto are output by the first analog-digital converter. Based on the digital signal, a measurement target digital signal corresponding to each of the plurality of measurement target voltage values is calculated. On the other hand, the second analog-digital converter outputs a digital measurement value corresponding to the measurement analog voltage, and based on the calculated measurement target digital signal, the second analog-digital converter outputs the digital measurement value, Perform a predetermined correction.

  In order to correct the measured digital measurement value based on the plurality of measurement target digital signals corresponding to each of the plurality of measurement target voltage values, a wide range of correction is possible, and the digital value for each target voltage value is An A / D conversion device that can be accurately calibrated can be provided.

  The reference voltage generating means analogly outputs a plurality of resistors having substantially the same resistance value connected between two different reference potentials, ie, reference potential 1 and reference potential 2, and a resistance division value for each of the plurality of resistors. Each of the plurality of resistors is connected via a connection terminal, and the connection terminal is a reference potential 1, a reference potential 2, another resistor, or a reference It may be connectable to any of the voltage output terminals, and the reference voltage generating means is connected to two different reference potentials, reference potential 1 and reference potential 2, while one electrode is connected to reference potential 1. A plurality of constant current sources having substantially the same current value, and the other electrode of each of the number of constant current sources is coupled together through a switch and then connected to the predetermined reference potential 2 through a resistor May be.

  In one embodiment of the present invention, the first analog-digital converter and the second analog-digital converter convert an analog input voltage into a frequency of a pulse signal, count the number of pulses, and convert it into a digital signal. It is a VF analog-digital converter. The first analog-to-digital converter and the second analog-to-digital converter operate with the same sampling clock, receive an analog voltage with a predetermined time interval as a cycle, and output a corresponding digital signal, respectively. And third calculating means for performing a calculation for correcting variation in a predetermined time interval based on the digital signal output value of the first analog-to-digital converter.

  The first analog-digital converter is used for calibration, the second analog-digital converter is used as a VF analog-digital converter for measurement, each analog-digital converter is operated with the same sampling clock, and a predetermined time interval is set as a period. In response to the analog voltage, each outputs a corresponding digital signal, and the digital measurement value from the second analog-digital converter is corrected based on the digital signal output value of the first analog-digital converter.

  As a result, the error due to the jitter of the sampling clock, which is a drawback of the A / D conversion device of the VF conversion format, can be reduced.

  According to another embodiment of the present invention, the second analog-to-digital converter selectively inputs either one of the plurality of analog reference voltages output from the reference voltage generating means or the measurement analog voltage. The first switching means, the second switching means for selectively inputting either the output of the second analog-digital converter or the output of the first analog-digital converter to the first calculation means, and the calculation by the first calculation means Based on the measurement target digital signal from the first analog-digital converter and the second analog-digital converter corresponding to the measurement target voltage value, the difference in the characteristics of the first analog-digital converter and the second analog-digital converter is corrected. Correction means.

  Since the second analog-digital converter is configured to selectively input one of the plurality of analog reference voltages output from the reference voltage generation means or the measurement analog voltage, the first analog-digital converter and the second analog-digital converter The characteristics of both analog-to-digital converters can be obtained.

  Therefore, when the first analog-digital converter is a calibration converter and the second analog-digital converter is a measurement converter, a correction error due to a difference in characteristics between the calibration converter and the measurement converter. Can be reduced.

  More preferably, third switching means for selectively inputting one of a plurality of analog reference voltages output from the reference voltage generating means or the measurement analog voltage to the first analog-digital converter; Correction means for correcting a difference in characteristics between the first analog-digital converter and the second analog-digital converter based on digital signal output values from the analog-digital converter and the second analog-digital converter.

  The first calculation means may calculate an average value of a plurality of digital signals from the first analog-digital converter for each measurement target voltage value to obtain a measurement target digital signal.

  More preferably, the second calculation means performs linearity correction and offset correction as predetermined corrections based on a plurality of measurement target digital signals corresponding to the plurality of measurement target voltage values calculated by the first calculation means. Calculate the digital measurement value with gain correction or temperature characteristic correction.

  According to the present invention, since the measured digital measurement value is corrected based on a plurality of measurement target digital signals corresponding to each of the plurality of measurement target voltage values, a wide range of correction is possible and each target is corrected. An A / D converter capable of accurately calibrating a digital value with respect to a voltage value can be provided.

(1) First Embodiment An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the overall configuration of an A / D conversion apparatus according to an embodiment of the present invention. Referring to FIG. 1, an A / D converter 10 receives a reference voltage generator 20 that generates a plurality of analog reference voltages c, and a plurality of analog reference voltages c that are output from the reference voltage generator 20. A first A / D converter 11 for calibration that outputs a plurality of digital signals to be output, and a first calculation for calculating a measurement target digital signal by inputting the plurality of digital signals d output from the first A / D converter 11 The analog signal A for measurement, the second A / D converter 12 for measurement that converts the analog signal A for measurement into the corresponding digital signal b, and the digital signal b output from the second A / D converter 12 Then, based on the measurement target digital signal e calculated by the first calculation unit 13, the second calculation unit 14 performs a predetermined calculation and performs a predetermined correction, and the first and second A / D converters 11 and 12. Memory that stores the operation results of And a 18. The second computing unit 14 outputs a digital value f that has been subjected to predetermined correction. The reference voltage generation unit 20, the first calculation unit 13, the second calculation unit 14, and the storage unit 18 are controlled by a control unit 30 including a CPU and the like. The reference voltage generation unit 20, the first calculation unit 13, and the second calculation unit 14 operate as a reference voltage generation unit, a first calculation unit, and a second calculation unit, respectively.

  Next, the reference voltage generator 20 will be described. The reference voltage generator 20 generates a plurality of analog reference voltages that are input to the first A / D converter 11 for calibration. The reference voltage generator 20 generates a plurality of analog reference voltages between a predetermined reference potential VREF and the ground potential. FIG. 2A is a schematic diagram illustrating an example of the reference voltage generation unit 20. Here, the reference voltage generation unit 20 includes n resistors R1 to Rn connected between a predetermined reference potential VREF and a ground potential and having substantially the same resistance value, and a connection portion of the n resistors R1 to Rn. And terminals V (0, 1) to V (n-1, 1) for taking out the potential at that position. Since the reference voltage VREF is divided by n resistors R1 to Rn, VREF × (1 / n) ˜ is selected by selecting the extraction terminals V (0,1) ˜V (n−1,1). A desired voltage of VREF × (n / n) can be taken out.

  Here, the resistors R1 to Rn having substantially the same resistance value do not necessarily have the same resistance value. Therefore, with reference voltages VREF × (1 / n) to VREF × (n / n) from only the extraction terminals V (0,1) to V (n−1,1) shown in FIG. Each value obtained is not necessarily correctly divided into n. Therefore, in this embodiment, the connection order of the plurality of resistors R1 to Rn is changed to n ways in order, and the voltage is taken out from each connection portion. Circuit diagrams corresponding to FIG. 2A in that case are shown in FIGS. Here, FIGS. 2B, 2C, and 2D correspond to the state connected from the second resistor, the state connected from the (n-1) th resistor, and the state connected from the nth resistor, respectively. To do. These analog reference voltages are input to the first A / D converter 11 for calibration. The first A / D converter 11 outputs a digital value corresponding to each value, and based on the digital value, the first arithmetic unit 13 averages them to calculate a measurement target digital value e for calibration.

  In this way, if the connection order of the plurality of resistors R1 to Rn is changed to n in order, the voltage is taken out from each connection portion, and the average value is obtained, the influence of the variation of each reference voltage can be reduced.

  Next, a specific configuration of the reference voltage generator 20 will be described. FIG. 3 is a diagram showing a specific configuration when four resistors are used as the reference voltage generation unit 20. Referring to FIG. 3, in reference voltage generating unit 20, four resistors R1 to R4 are connected via connection terminals T1 to T4, and each connection terminal T1 to T4 has a reference potential VREF, a ground potential, It can be connected to either another resistor or the reference voltage output terminal 21.

  Specifically, for example, the connection terminal T1 is adjacent to the switch SWV (4, 1) for connecting to the reference potential VREF and the switch SWO (4, 1) for connecting to the reference voltage output terminal 21. A switch SWR (4, 1) for connecting to the resistor R4 and a switch SWG (4, 1) for connecting to the ground potential are included. The same applies to the other connection terminals T2 to T4.

  FIG. 4 shows a setting method of each switch in the configuration shown in FIG.

  FIG. 4A is a diagram showing a connection state inside the circuit, and setting of switches for realizing the connection states of (A), (B), (C), and (D) of FIG. 2, respectively. Shows how. For example, in order to realize the connection state of FIG. 2A, the switches SWV (4, 1) and SWG (4, 1) at the connection terminal T1 are turned on to connect to the reference potential VREF and the ground potential. The switches SWR (1, 2), SWR (2, 3), and SWR (3, 4) except SWR (4, 1) are turned on to connect the resistors.

  FIG. 4B shows a switch setting method for selecting a reference voltage output value corresponding to each measurement target voltage value. Each of FIGS. 2A, 2B, 2C, and 2D is used. It shows the connection status. For example, SWO (3,4) is turned on to output a voltage corresponding to the measurement target voltage value (1/4) VREF in the connection state of FIG.

  Next, a method for obtaining the measurement target digital value e used for calibration will be described. Here, the case where the four resistors shown in FIG. 3 are used will be described. FIG. 5 is a diagram illustrating an example of the analog output c from the reference voltage generation unit 20 for each measurement target voltage (1/4) VREF to (4/4) VREF.

  As described above, even though the four resistors have substantially the same characteristics, the voltage values of the analog output c vary depending on the connection order of the resistors. FIG. 5 shows this state. That is, even in the measurement target voltage (1/4) VREF, four values of a1 to a4 can be taken as analog reference voltages by the arrangement of the four resistors. At this time, the ground potential (0V) and (4/4) VREF cannot be a plurality of values because the ground potential or the reference potential VREF itself is output without a resistor. The analog output c thus dispersed is input to the first A / D converter 11 and converted into a digital value, and the average value thereof is calculated by the first calculation unit 13, and each measurement target voltage (1/4) is calculated from 0V. ) VREF to (4/4) A measurement target digital value e corresponding to VREF is obtained.

  Next, an example of the measurement target digital value e calculated by the first calculation unit 13 will be described. FIG. 6A shows the measurement target voltages 0 V, (1/4) VREF, (2/4) VREF, (3/4) VREF, (4/4) VREF, and the measurement target digital value e. It is a figure which shows a relationship. As shown in FIG. 6A, the measurement target digital value e is not necessarily a straight line, but a broken line as shown in the figure, and its end portion does not always pass through the origin.

  Therefore, the second calculation unit 14 assumes that there is no difference in characteristics between the first A / D converter 11 and the second A / D converter 12, and the measurement target digital value as shown in FIG. Using the information of e, the relationship between the measurement analog signal A and the corresponding digital signal f is corrected so as to be a straight line having a predetermined gain through the origin as shown in FIG. 6B. Perform the operation.

  Next, a specific operation example of the first and second arithmetic units 13 and 14 will be described. FIG. 7 is a flowchart showing an operation that the control unit 30 causes the first calculation unit 13 to perform, and FIG. 8 is a diagram for explaining the contents thereof. FIG. 8 is a diagram showing a conversion line 51 indicating the relationship between the measurement target analog voltage and the measurement target digital value converted by the A / D converter 11 based on the measurement target analog voltage, and a predetermined calibration line (f) 52. is there.

  7 and 8, the first calculation unit 13 switches the connection of the four resistors as shown in FIG. 3, and the measurement target digital value D0 corresponding to the measurement target voltage value 0 shown in FIG. , Measurement target digital value D1 corresponding to measurement target voltage value (1/4) VREF, measurement target digital value D2 corresponding to (2/4) VREF, (3/4) measurement target digital value D3 corresponding to VREF, and (4/4) The measurement target digital value D4 corresponding to VREF is obtained in order (steps S11 to S15 in FIG. 7 and the following steps are omitted). For each target voltage value, digital conversion values for four analog reference voltages are obtained, and an average value of the four digital conversion values is set as a measurement target digital value.

  In this way, if four average values are calculated, it is possible to eliminate the influence of variation in the resistance values of the respective components.

Next, the reason will be described. For example, four analog reference voltage values corresponding to the measurement target voltage (1/4) VREF are expressed by the following equations (1) to (4).
V (3,1) = (R4 / (R1 + R2 + R3 + R4)) × VREF (1)
V (3,2) = (R1 / (R1 + R2 + R3 + R4)) × VREF (2)
V (3,3) = (R2 / (R1 + R2 + R3 + R4)) × VREF (3)
V (3,4) = (R3 / (R1 + R2 + R3 + R4)) × VREF (4)

The average value of these four analog reference voltages is expressed by the following equation (1) to equation (4): V (average value) = (V (3,1) + V (3,2) + V (3,3) + V (3 4)) / 4
= ((R1 + R2 + R3 + R4) / (R1 + R2 + R3 + R4)) × VREF × (1/4)
= (1/4) VREF
Thus, it matches the measurement target voltage value (1/4) VREF. Similarly, for other measurement target voltage values, the average value of the corresponding analog reference voltages matches the target value.

  Furthermore, it can be considered that the average value of the digital conversion values for each of the varying voltage values substantially matches the digital conversion value for the measurement target voltage value.

  FIG. 9 is for explaining the contents. A plurality of analog reference voltages a1, a2, a3, and a4 (which are the same as those shown in FIG. 5) output from the reference voltage generator 20 are approximately approximate to the measurement target voltage value aG. Since the variation range is considered to be narrow, the characteristics of the A / D converter can be regarded as a straight line within the variation range. That is, the points P1, P2, P3, P4, and PG on the graph can be regarded as being aligned on a straight line. Since the average value of a1, a2, a3, a4 is equal to aG, and P1, P2, P3, P4, PG are aligned on a straight line, the average value of the digital conversion values d1, d2, d3, d4 is It can be regarded as being equal to the digital conversion value dG corresponding to the measured voltage target value aG. That is, it can be regarded that the average value of the digital conversion values for each of the varying analog voltage values matches the digital conversion value for the measurement target voltage value.

  Next, a conversion line 51 connecting the obtained average values D0 to D4 is obtained, and a difference between this and a predetermined calibration straight line 52 of the A / D conversion device 10 is obtained (FIG. 7, S16). Specifically, Δd0 to Δd4 shown in FIG. 8 are calculated. Data (Δd0 to Δd4) representing the obtained correction data line 53 and data (D0 to D4) of each average value are stored in the storage unit 18. In this embodiment, the storage unit 18 has two data tables A and B, which are sequentially switched to store correction data (FIG. 7, S17 to S19).

  Using the data stored in these storage units 18, the second arithmetic unit 14 corrects the digital value b obtained by the second A / D converter.

  FIG. 10 is a flowchart showing the calculation performed by the second calculation unit 14.

  First, an operation for estimating the voltage of the measurement analog signal A is performed from the digital value obtained by the second A / D converter 12 (S21 in FIG. 10). FIG. 11 is a diagram showing the contents of this calculation. FIG. 11 is a diagram showing characteristics of the A / D converter shown in FIG. As described with reference to FIG. 8, the data of D <b> 0 to D <b> 4 is stored in the storage unit 18. Using this data, it is estimated which range the input analog voltage value is using the digital value converted by the A / D converter 12. Specifically, as shown in FIG. 11, a range in which the corresponding analog voltage Ax exists is estimated based on the converted value Dx converted from the measured voltage A to a digital value. Here, it can be seen that it is between (1/4) VREF and (2/4) VREF.

  Next, in the estimated range where the analog voltage Ax exists, a correction value is calculated so that the value thereof is a value along the output straight line f as the A / D converter 10 in FIG. 11 (S22 in FIG. 10). Here, the correction value Δdx is obtained from Δd1 and Δd2 held in the storage unit 18 by linear interpolation considering the ratio of Dx−D1 and D2−Dx.

  Next, an operation for obtaining a point f (Ax) on the conversion straight line f by subtracting Δdx from Dx is performed (FIG. 10A, S23).

  In this embodiment, an example is shown in which linear interpolation is performed when interpolation is performed. However, when the interval between adjacent measurement target voltage values is sufficiently narrow, the characteristics of the A / D converter are linear. This is because it can be considered. Further, when the characteristics of the A / D converter cannot be regarded as a straight line, a correction considering the characteristics in advance may be performed by a digital circuit or the like.

  In addition, since linear interpolation is performed between a plurality of specific reference points in this way, digital conversion values for all voltages from 0 to (4/4) VREF can be obtained.

  Next, the data table in this embodiment will be described. In this embodiment, the storage unit 18 has two data tables A and B, which are sequentially switched to store correction data. As described above, since two data tables are provided and used by switching, the first A / D converter 11 can create new correction data while measuring with the second A / D converter 12. Therefore, while the first A / D converter 11 is creating new correction data, the second calculation unit 14 performs correction by referring to the data table storing the correction data created before that, and responds accordingly. The digital value f is output.

  As described above, since two correction data tables are provided, a correction table can be created while measuring. Further, since the correction table can be created in a short time, it is hardly affected by temperature changes. That is, it is possible to correct linearity, offset, gain, and temperature at a time in real time.

In this embodiment, in the reference voltage generator, the voltage between the reference potential and the ground potential is divided by the resistor, but the voltage between any two different predetermined potentials is divided by the resistor. May be.
(2) Second Embodiment Next, a second embodiment of the present invention will be described. FIG. 12 is a diagram showing an A / D conversion device 50 according to the second embodiment of the present invention. In this embodiment, both the first A / D converter 16 and the second A / D converter 17 convert the analog input voltage into the frequency of the pulse signal, count the number of pulses, and convert it into a digital signal. , V-F analog-digital converter.

  Here, the first A / D converter 16 and the second A / D converter 17 operate with the same sampling clock, receive an analog voltage at a predetermined time interval, and output a corresponding digital signal, respectively. .

  In this embodiment, the first calculation unit 13 and the second calculation unit 14 perform the same operation as in the first embodiment, but are corrected by the second calculation unit 14 with respect to the first embodiment. A third operation unit 15 is included which performs an operation for correcting the digital measurement value h based on the digital signal output value d of the first A / D converter. Here, the third calculation unit 15 operates as third calculation means.

  Next, the operation in this embodiment will be described. In this embodiment, the analog input voltage to the first A / D converter 16 is fixed to a predetermined voltage value.

  FIG. 13 shows the sampling timing and the pulse count value at that time. In the pulse count value, an average value is also shown. Referring to FIG. 13, it can be seen that the pulse count value of the first A / D converter 16 fluctuates for each sampling because the sampling time interval fluctuates due to jitter of the sampling clock. Since the analog input voltage to the first A / D converter 16 is fixed to a predetermined value, the pulse count value can be considered to be proportional to the sampling time interval. Therefore, the longer the sampling time interval, the larger the pulse count value. For example, in FIG. 13, since the sampling time interval T2 is longer than T6, D2 is larger than D6 for the corresponding pulse count value.

  Therefore, in this embodiment, since the first A / D converter 16 and the second A / D converter 17 perform sampling at the same sampling time interval, the pulse count of the first A / D converter 16 is counted. The increase / decrease rate of the second A / D converter 17 is corrected based on the idea that the second A / D converter 17 also has the same rate of increase / decrease.

  First, when the A / D conversion device 50 does not perform A / D conversion for an analog signal input, such as during startup, the average value of the pulse count values of the first A / D converter 16 is stored as a reference value. For example, if the average value of the pulse count values D0 to D8 shown in FIG. 10 is 10, the storage unit 18 stores this value 10.

Next, when the A / D conversion device 50 performs A / D conversion for an analog signal input, the value is corrected using the average value of the pulse count values stored in the storage unit 18 at each sampling timing. For example, it is assumed that the pulse count value of the first A / D converter 16 is 11 and the digital measurement value h corrected by the second calculation unit 14 is 12 at a certain sampling timing. At this time, the third calculation unit 15 divides the digital measurement value h corrected by the second calculation unit 14 by the average pulse count value 10 stored in the storage unit 18 from the measurement value of the first A / D converter 16. Divide by the value to correct. A value obtained by dividing the measured value 12 by 1.1 obtained by dividing 11 measured by the first A / D converter 16 by the average value 10 is calculated as a correction value. That is, 12 / (11/10) = 10.9 is the digital conversion value.
(3) Third Embodiment Next, a third embodiment of the present invention will be described. FIG. 14 is a block diagram illustrating a configuration of an A / D conversion device 60 according to the third embodiment. In the above embodiment, it is assumed that the first A / D converter and the second A / D converter have the same specifications. However, it could not be confirmed whether they actually have the same specifications. Therefore, in this embodiment, the characteristics of both A / D converters can be compared.

  Therefore, in this embodiment, in order to know the characteristics of not only the first A / D converter 11 but also the second A / D converter 12, the configuration in the first embodiment shown in FIG. A first switching unit 33 for inputting a reference analog signal from the voltage generation unit 20 to the second A / D converter 12 and a digital conversion value of the second A / D converter 12 for inputting to the first arithmetic unit 13. 4th calculation which calculates the difference in order to compare the characteristic of the 1st A / D converter 11 and the characteristic of the 2nd A / D converter 12 which the 2nd switching part 34 of this and the 1st calculating part 13 calculated Part 19 was provided. The control unit 30 performs switching of the switching unit. The characteristic of the first A / D converter 11 and the characteristic data of the second A / D converter 12 for this comparison are stored in the storage unit 18 and are taken out by the fourth arithmetic unit as necessary. To do. Here, the 1st switching part 33, the 2nd switching part 34, and the 4th calculating part 19 operate | move as a 1st switching means, a 2nd switching means, and a correction means, respectively.

  The comparison of the characteristics is preferably performed at start-up before the second A / D converter 12 is used or when measurement is not performed.

In this embodiment, since the components other than the first and second switching units 33 and 34 and the fourth arithmetic unit 19 are the same as those of the previous embodiment, the description thereof is omitted.
(4) Fourth Embodiment Next, a fourth embodiment of the present invention will be described. FIG. 15 is a block diagram illustrating a configuration of an A / D conversion device 70 according to the fourth embodiment. Also in this embodiment, the characteristics of both A / D converters can be compared.

  In this embodiment, unlike the third embodiment, the first A / D converter 11 is provided with a third switching unit for inputting either the measurement analog signal or the analog reference voltage, and the first In order to compare the characteristic of the first A / D converter 11 calculated by the calculation unit 13 and the characteristic of the second A / D converter 12, a fifth calculation unit that calculates the difference is provided. The control unit 30 performs switching of the third switching unit.

  The comparison of the characteristics is performed at the time of A / D conversion for the measurement analog signal.

  Next, an example of calculation performed by the fifth calculation unit will be described. First, the difference between the digital value j from the second A / D converter 12 and the digital value k from the first A / D converter 11 is obtained. Next, a value obtained by subtracting the difference from the digital value 1 from the second calculation unit 14 is output as a digital value m.

  In this embodiment, since the components other than the third switching unit 35 and the fifth arithmetic unit 36 are the same as those of the previous embodiment, the description thereof is omitted.

Here, the third switching unit 35 and the fifth calculation unit 36 operate as a third switching unit and a correcting unit, respectively.
(5) Fifth Embodiment Next, still another embodiment of the present invention will be described. In the above embodiment, as the reference voltage generator, a plurality of resistors having substantially the same resistance value are connected in series, and a predetermined voltage is divided at an arbitrary position to extract a predetermined analog reference voltage. In this embodiment, the reference voltage generator 22 is composed of a plurality of constant current sources having substantially the same current value, with one electrode connected to either a predetermined reference potential or a ground potential. The other electrode of each of the plurality of constant current sources is coupled together through a switch, and then connected to either the predetermined reference potential or the ground potential through a resistor.

  FIG. 16A is a circuit diagram showing a configuration example of the reference voltage generation unit 22 in this embodiment. Referring to FIG. 16A, the reference voltage generating unit 22 according to this embodiment is substantially configured as a plurality of constant current sources connected via a power source between a predetermined reference potential VREF and a ground potential. It includes a p-channel field effect transistor (FET) having the same characteristics.

  Specifically, a p-channel FET F0 connected between a reference potential VREF and a ground potential via a predetermined constant current source, a reference potential VREF, and a p-channel connected in parallel between the output terminal 25, It includes channel FETs F1 to Fn and switching transistors I1 to In for individually turning on and off the n p channel FETs F1 to Fn. The drain electrodes of the n p-channel FETs F1 to Fn are coupled together through switching transistors I1 to In and then connected to the ground potential through a resistor R. The gate electrodes of the p-channel FETs F0 to Fn are connected to each other and connected to the drain electrode of the FET F0.

  In the reference voltage generator 22, the value of the resistor R is set so that the voltage (= maximum value) appearing in the resistor R becomes a predetermined target value (VREF) when all the switching transistors I1 to In are turned on. It has been established.

  In such a configuration, since the characteristics of the transistors FFET0 to FETFn are substantially the same and the voltage applied between the gate and the source is the same, substantially the same current flows through each transistor. Therefore, as described above, if all the transistors are turned on simultaneously, the maximum current flows through the resistor R.

  Similarly, by selectively turning on any one or a predetermined number of n FETs F1 to Fn, different output 1 / n to n / n equally divided currents are output to the output terminal 25. Is obtained.

  That is, in this embodiment, it is possible to generate a plurality of reference voltages using current by using n FETs.

  FIG. 17 is a diagram showing a method for setting on / off of the switching transistors I1 to I4 when four FETs F1 to F4 and four switching transistors I1 to I4 for turning them on / off are used. . (A) shows the case where the measurement target voltage value is (1/4) VREF, (B) shows the case where the measurement target voltage value is (2/4) VREF, and (C) shows that the measurement target voltage value is ( 3/4) shows the case of VREF, and (D) shows the case where the measurement target voltage value is (4/4) VREF.

  In each figure, connections (A) to (D) correspond to the respective connection states of (A), (B), (C), and (D) in FIG.

  In FIG. 16A, when the measurement target voltage value indicating each switch is (1/4) VREF, only one transistor is turned on and sequentially switched. Switching is similarly performed for other measurement target voltage values, thereby eliminating variations in those voltages.

  For a plurality of analog reference voltages for each measurement target voltage value, when the range of variations in these voltages is not so large, the conversion characteristics of the A / D converter are regarded as a straight line within the range of variations, and therefore A / D It can be considered that the average value of the digital values after conversion is substantially equal to the value of the digital value after A / D conversion with respect to the target value.

  Although the case where the current source is configured using a plurality of p-channel FETs has been described in the above embodiment, the present invention is not limited to this, and the current source may be configured using an n-channel FET, or bipolar. You may comprise using a transistor. An example in which a current source is configured using an n-channel FET is shown in FIG.

  Although one embodiment of the present invention has been described with reference to the drawings, the present invention is not limited to the illustrated embodiment. Various modifications can be made to the illustrated embodiment within the same scope or equivalent scope as the present invention.

  The A / D conversion device according to the present invention is advantageously used as an A / D conversion device capable of accurate calibration.

1 is a block diagram showing an A / D conversion device according to a first embodiment of the present invention. It is a schematic diagram which shows an example of a reference voltage generation part. It is a figure which shows the specific structure of the reference voltage generation part using four resistance. It is a figure which shows the connection state of each switch for every reference | standard output voltage in the reference voltage generation | occurrence | production part shown in FIG. It is a figure which shows an example of the analog output from the reference voltage generation part for every reference voltage (1/4) VREF- (4/4) VREF. It is a figure which shows the relationship between each reference voltage and its reference digital value for a calibration. It is a flowchart which shows the operation | movement which a control part performs with respect to a 1st calculating part. It is a figure explaining the operation | movement content which a 1st calculating part performs. It is a figure which shows the reason why it can be considered that the average value of the digital conversion value with respect to each of the variable voltage value substantially corresponds to the digital conversion value with respect to the measurement target voltage value. 5 is a flowchart showing calculations performed by a second calculation unit 14. It is a figure which shows a correction procedure. It is a block diagram which shows the A / D converter which concerns on 2nd Embodiment of this invention. It is a figure which shows the fluctuation | variation of the count value of the pulse by the jitter of a sampling clock. It is a block diagram which shows the A / D converter which concerns on 3rd Embodiment of this invention. It is a block diagram which shows the A / D converter which concerns on 4th Embodiment of this invention. It is a circuit diagram which shows the structure of the reference voltage generation part using a current source. It is a figure which shows the connection state of the switch of the reference voltage generation part using a current source.

Explanation of symbols

10, 50, 60, 70 A / D converter, 11, 16 1st A / D converter, 12, 17 2nd A / D converter, 13 1st operation part, 14 2nd operation part, 15 3rd operation part , 18 Storage unit, 19 Fourth operation unit, 20, 22 Reference voltage generation unit, 21, 25 Reference potential output terminal, 30 Control unit, 33 First switching unit, 34 Second switching unit, 35 Third switching unit, 36 5th calculating part, 51 conversion line, 52 calibration straight line.

Claims (8)

Reference voltage generating means for generating a plurality of analog reference voltages approximate to the voltage value for each of a plurality of measurement target voltage values;
A first analog-to-digital converter that receives a plurality of analog reference voltages from the reference voltage generating means and outputs a plurality of corresponding digital signals;
First calculation means for calculating a measurement target digital signal corresponding to each of the plurality of measurement target voltage values based on the plurality of digital signals from the first analog-digital converter;
A second analog-digital converter for inputting an analog voltage for measurement and outputting a corresponding digital measurement value;
An A / D converter comprising: second arithmetic means for performing a predetermined correction operation on the digital measurement value output from the second analog-digital converter based on the measurement target digital signal. The reference voltage generating means includes a plurality of resistors having substantially the same resistance value connected between a reference potential 1 and a reference potential 2 which are two different reference potentials,
A reference voltage output terminal that outputs a resistance division value for each of the plurality of resistors as an analog reference voltage;
Each of the plurality of resistors is connected via a connection terminal therebetween,
The A / D converter according to claim 1, wherein the connection terminal is connectable to any one of the reference potential 1, the reference potential 2, another resistor, or the reference voltage output terminal. The reference voltage generating means is connected between a reference potential 1 and a reference potential 2 which are two different reference potentials,
A plurality of constant current sources having substantially the same current value, the electrodes of which are connected to the reference potential 1,
2. The A / D conversion device according to claim 1, wherein the other electrode of each of the plurality of constant current sources is coupled to one through a switch and then connected to the predetermined reference potential 2 through a resistor. . The first analog-to-digital converter and the second analog-to-digital converter are VF analog-to-digital converters that convert an analog input voltage into a frequency of a pulse signal, count the number of pulses, and convert it into a digital signal. There,
The first analog-digital converter and the second analog-digital converter operate with the same sampling clock, receive the analog voltage with a predetermined time interval as a period, and respectively output a corresponding digital signal;
And third arithmetic means for performing an operation for correcting a variation in a predetermined time interval based on the digital signal output value of the first analog-digital converter, the digital measurement value corrected by the second arithmetic means, The A / D conversion device according to claim 1. First switching means for selectively inputting either the plurality of analog reference voltages output from the reference voltage generating means or the measurement analog voltage to the second analog-digital converter;
Second switching means for selectively inputting either the output of the second analog-digital converter or the output of the first analog-digital converter to the first calculation means;
Based on the measurement target digital signal from the first analog-digital converter and the second analog-digital converter corresponding to the measurement target voltage value calculated by the first calculation means, the first analog-digital converter and The A / D conversion apparatus according to claim 1, further comprising a correction unit that corrects a difference in characteristics of the second analog-digital converter. Third switching means for selectively inputting either the plurality of analog reference voltages output from the reference voltage generating means or the measurement analog voltage to the first analog-digital converter;
Correction means for correcting a difference in characteristics between the first analog-digital converter and the second analog-digital converter based on digital signal output values from the first analog-digital converter and the second analog-digital converter; The A / D conversion device according to claim 1, comprising: The said 1st calculating means calculates the average value of the some digital signal from a said 1st analog-digital converter for every said measurement target voltage value, It is set as the said measurement target digital signal. A / D converter. The second calculation means is a linearity correction or offset correction as the predetermined correction based on a plurality of measurement target digital signals corresponding to the plurality of measurement target voltage values calculated by the first calculation means. The A / D conversion apparatus according to claim 1, wherein a digital measurement value with a gain correction or a temperature characteristic corrected is calculated.

Images