JP3877700B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a BGA (Ball Grid Array) type semiconductor device having ball-shaped conductive terminals.
[0002]
[Prior art]
In recent years, CSP (Chip Size Package) has attracted attention as a three-dimensional mounting technique and as a new packaging technique. The CSP refers to a small package having an outer dimension substantially the same as the outer dimension of a semiconductor chip.
[0003]
Conventionally, a BGA type semiconductor device is known as a kind of CSP. In this BGA type semiconductor device, a plurality of ball-shaped conductive terminals made of a metal member such as solder are arranged in a lattice pattern on one main surface of a package, and electrically connected to a semiconductor chip mounted on the other surface of the package. Is connected to.
[0004]
When incorporating this BGA type semiconductor device into an electronic device, each conductive terminal is crimped to a wiring pattern on the printed circuit board, thereby electrically connecting the semiconductor chip and the external circuit mounted on the printed circuit board. Connected.
[0005]
Such a BGA type semiconductor device is provided with a larger number of conductive terminals than other CSP type semiconductor devices such as SOP (Small Outline Package) and QFP (Quad Flat Package) having lead pins protruding from the side. It has the advantage that it can be reduced in size. This BGA type semiconductor device has an application as an image sensor chip of a digital camera mounted on a mobile phone, for example.
[0006]
FIG. 22 shows a schematic configuration of a conventional BGA type semiconductor device, and FIG. 22A is a perspective view of the surface side of this BGA type semiconductor device. FIG. 22B is a perspective view of the back side of this BGA type semiconductor device.
[0007]
In this BGA type semiconductor device 101, a semiconductor chip 104 is sealed between first and second glass substrates 102 and 103 via epoxy resins 105 and 105. On one main surface of the second glass substrate 103, that is, on the back surface of the BGA type semiconductor device 101, a plurality of ball-like terminals 106 are arranged in a lattice shape.
[0008]
The conductive terminal 106 is connected to the semiconductor chip 104 via the second wiring 110. Aluminum wires drawn from the inside of the semiconductor chip 104 are connected to the plurality of second wirings 110, and the respective ball terminals 106 and the semiconductor chip 104 are electrically connected.
[0009]
The cross-sectional structure of the BGA type semiconductor device 101 will be described in more detail with reference to FIG. FIG. 21 shows a cross-sectional view of a BGA type semiconductor device 101 divided into individual chips along a dicing line.
[0010]
A first wiring 107 is provided on the insulating film 108 disposed on the surface of the semiconductor chip 104. The semiconductor chip 104 is bonded to the first glass substrate 102 with a resin 105. The back surface of the semiconductor chip 104 is bonded to the second glass substrate 103 with a resin 105.
[0011]
One end of the first wiring 107 is connected to the second wiring 110. The second wiring 110 extends from one end of the first wiring 107 to the surface of the second glass substrate 103. A ball-shaped conductive terminal 106 is formed on the second wiring 110 extending on the second glass substrate 103.
[0012]
Next, the manufacturing process of the semiconductor device 101 will be sequentially described with reference to FIGS.
[0013]
As shown in FIG. 17, a semiconductor wafer having a plurality of semiconductor chips 104 is prepared, and an insulating film 108 formed of an insulator such as SiO2 is formed on the surface thereof. Then, a first wiring 107 is formed on the insulating film 108 so as to straddle a boundary (dicing line) S for cutting the plurality of semiconductor chips 104 into individual chips. This boundary S is a boundary between the plurality of semiconductor chips 104.
[0014]
Subsequently, a first glass substrate 102 for supporting the semiconductor chip 104 is bonded to the surface of the semiconductor chip 104 on which the first wiring 107 is formed, using a transparent epoxy resin 105.
[0015]
Then, after the semiconductor chip 104 is back-ground to reduce the chip thickness, the back surface of the semiconductor chip 104 and the insulating film 108 are etched along the boundary S to expose the first wiring 107.
[0016]
Subsequently, as shown in FIG. 18, the etched semiconductor chip 104, the side surface of the insulating film 108, and the exposed portion of the first wiring 107 are covered with an epoxy resin 105, and the semiconductor chip is used as an adhesive with the resin 105 as an adhesive. A second glass substrate 103 is bonded to the back surface of 104.
[0017]
Next, as shown in FIG. 19, V-shaped notching is performed along the boundary S on the second glass substrate 103 side. This notching is a cutting process using a cutting tool such as a blade. At this time, the depth of the V-shaped groove formed by notching reaches the first substrate 102. As a result, the first wiring 107 is divided into two and the side surfaces thereof are exposed.
[0018]
Subsequently, as shown in FIG. 20, an aluminum layer is formed so as to cover the second glass substrate 103 and the cutting surface formed by notching. As a result, the exposed surface of the first wiring 107 and the aluminum layer are connected. Thereafter, the second wiring 110 is formed by patterning the aluminum wiring so as to have a predetermined wiring pattern.
[0019]
Next, as shown in FIG. 21, a protective film 111 such as a solder mask is formed on the second wiring 110. Thereafter, a ball-shaped conductive terminal 106 made of a metal such as solder is formed on the second wiring 110 through the opening of the protective film 111. Subsequently, dicing is performed along the boundary S. Thus, the conventional BGA type semiconductor device 101 shown in FIG. 22 is completed.
[0020]
The above-described technique is described in, for example, the following patent documents.
[0021]
[Patent Literature]
Patent Publication 2002-512436
[0022]
[Problems to be solved by the invention]
However, the above-described BGA type semiconductor device 101 and its manufacturing process have the following drawbacks.
[0023]
First, the manufacturing process of the conventional BGA type semiconductor device 101 uses two substrates, ie, the first glass substrate 102 and the second glass substrate 103, which complicates the manufacturing process and manufactures it. There was a problem of high cost.
[0024]
Second, since the second glass substrate 103 is bonded to the back surface of the semiconductor chip 104, it is necessary to perform a special cutting process called notching in order to divide the first wiring 107. For this reason, at the end of the first wiring 107, abnormality (for example, generation of foreign matter or generation of contamination (contamination), etc.) has occurred in the notched cutting section.
[0025]
Third, since the length of the contact portion between the side surface of the first wiring 107 and the second wiring 110 is only about 2 μm to 3 μm, the first wiring can be applied when stress or the like is applied from the outside. There is a possibility that the side surface 107 and the second wiring 110 are disconnected. Furthermore, since the side surface of the first wiring 107 becomes a cut surface by notching, the side surface of the first wiring 107 is rough, and the adhesiveness with the second wiring 110 is poor.
[0026]
The present invention has been made in view of the above drawbacks, and provides a low-cost BGA type semiconductor device 101. In addition, the first wiring 107 and the second wiring 110 are well connected, and a highly reliable BGA type semiconductor device 101 is provided.
[0027]
In the semiconductor device of the present invention, the first insulating film is formed on the surface of the semiconductor chip, and the first wiring is formed on the first insulating film. A support is bonded to the front surface of the semiconductor chip, and the side surface and the back surface of the semiconductor chip are covered with the second insulating film. A second wiring connected to the first wiring and extending to the back surface of the semiconductor chip is provided. Further, conductive terminals such as bumps are formed on the second wiring.
[0028]
Moreover, the method for manufacturing a semiconductor device of the present invention prepares a semiconductor wafer having a plurality of semiconductor chips, A support is bonded to the semiconductor wafer on which the first wiring is formed via the first insulating film. Next, the back surface of the semiconductor wafer is etched along the boundaries of the plurality of semiconductor chips. Next, the side surface and the back surface of the semiconductor chip are covered with a second insulating film. Next, the first wiring is etched to divide the first wiring into two. Next, a second wiring connected to the first wiring and extending to the back surface of the semiconductor chip through the second insulating film is formed. Next, a conductive terminal is formed over the second wiring. Then, dicing is performed along the boundaries of a plurality of semiconductor chips.
[0029]
DETAILED DESCRIPTION OF THE INVENTION
Next, embodiments of the present invention will be described with reference to the drawings.
FIG. 1A is a cross-sectional view showing a BGA type semiconductor device 1a according to the first embodiment of the present invention.
[0030]
FIG. 1A shows a state where a plurality of BGA type semiconductor chips 2 formed on one semiconductor wafer are diced along a boundary S. FIG. The individual BGA type semiconductor devices 1a after dicing are all the same. Therefore, the configuration of one BGA type semiconductor device 1a will be described below.
[0031]
An insulating film 6a is formed on the surface of the semiconductor chip 2, and a first wiring 5a is formed on the insulating film 6a. And the glass substrate 3 is adhere | attached on the surface of the semiconductor chip 2 using resin 4 as an adhesive agent. The insulating film 6a is, for example, a silicon oxide film (SiO ₂ ), A silicon nitride film (SiN), an organic insulating film (polyimide or the like), or the like.
[0032]
A plurality of semiconductor chips 2 are formed on a semiconductor wafer by a semiconductor manufacturing process, and are, for example, integrated circuit chips such as CCD image sensor chips. The glass substrate 3 is a transparent glass substrate having a thickness of about 400 μm. The resin 4 is, for example, an epoxy resin that is a thermosetting resin, and is applied to the entire surface of the semiconductor chip 2 as an adhesive mainly for bonding the semiconductor chip 2 and the glass substrate 3. It has an insulating property.
[0033]
The first wiring 5 a is a metal pad made of aluminum or an aluminum alloy, and is electrically connected to the circuit elements in the semiconductor chip 2. Since the first wiring 5 a extends to the boundary S of the plurality of semiconductor chips 2, it is also called an extension pad.
[0034]
The insulating film 16 a is an insulating film that covers the side surface and the back surface of the semiconductor chip 2. ₂ ), A silicon nitride film (SiN), an organic insulating film (polyimide or the like), or the like.
[0035]
A plurality of buffer members 7 are formed at predetermined positions on the insulating film 16 a on the back surface of the semiconductor chip 2. The buffer member 7 is disposed so as to overlap below a conductive terminal 8 to be described later, and alleviates an impact when the conductive terminal 8 is formed on the second wiring 9a. Further, the buffer member 7 Is It also has a function of increasing the height of the conductive terminal 8 to some extent.
[0036]
The second wiring 9a is a metal wiring made of aluminum or an aluminum alloy formed on the surfaces of the insulating film 16a and the buffer member 7, and the second wiring 9a is connected to the side surface of the first wiring 5a. .
[0037]
The length of the contact portion between the side surface of the first wiring 5a and the second wiring 9a is about 2 μm to 3 μm. Since the first wiring 5a is formed wide when viewed in plan, the width of the contact portion can be increased.
[0038]
A protective film 10a is formed on the second wiring 9a, and the ball-shaped conductive terminal 8 is formed through a plated layer made of Ni and Cu (not shown) through the opening of the protective film 10a. 2 on the second wiring 9a.
[0039]
Next, a second embodiment will be described with reference to FIG. The difference between this embodiment and the first embodiment is the structure of the contact portion between the second wiring and the first wiring. That is, according to the first embodiment, the side surface of the first wiring 5a is in electrical contact with the second wiring 9a by being in contact with the second wiring 9a. A part of the back surface of the first wiring 5b is in contact with and electrically connected to the second wiring 9b. Here, the length of the contact portion between the surface of the second wiring 9b and a part of the back surface of the first wiring 5b is about 2 μm to 3 μm.
[0040]
The insulating films 6b and 16b and the protective film 10b in the present embodiment correspond to the insulating films 6a and 16a and the protective film 10a in the first embodiment, respectively.
[0041]
According to the first and second embodiments, the second glass substrate 103 is not provided, and accordingly, a thin semiconductor device can be realized at a lower cost than the conventional example.
[0042]
And since the 2nd glass substrate 103 was deleted, the 1st wiring 5a and 5b can be divided | segmented by an etching process instead of the cutting process using the blade like the past. Therefore, the side surfaces of the first wirings 5a and 5b that are in contact with the second wirings 9a and 9b are in a smooth and clean state, and even if the length of the contact portion is 2 μm to 3 μm, Mechanical connectivity is improved.
[0043]
Next, a third embodiment of the present invention will be described with reference to FIG. In the figure, the same components as those in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted.
[0044]
In the present embodiment, the contact portion between the first wiring 5c and the second wiring 9c is formed wider than in the second embodiment described above. For example, the length of the contact portion is about 4 μm to 6 μm, but may be longer. That is, in order to increase the contact portion with the second wiring 9c on the back surface of the first wiring 5c, a part of the first wiring 5c protrudes outside the semiconductor chip 2 from the insulating film 16c. It has a portion 20c.
[0045]
The second wiring 9c extends from the side surface of the semiconductor chip 2 to the protruding portion 20c, and extends and contacts the protruding portion 20c so as to form an L shape. Here, the length of the bonding portion between the second wiring 9c and the protruding portion 20c is preferably larger than the length of the side surface of the first wiring 5c. For this reason, the electrical and mechanical connectivity between the first wiring 5c and the second wiring 9c can be further improved. Note that the insulating films 6c and 16c and the protective film 10c in the present embodiment correspond to the insulating films 6a and 16a and the protective film 10a in the first embodiment, respectively.
[0046]
Next, a fourth embodiment of the present invention will be described with reference to FIG.
3, the same components as those in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted.
[0047]
In the present embodiment, by providing the protruding portion 20d of the first wiring 5d, in addition to forming a wide contact portion between the first wiring 5d and the second wiring 9d, the side surface of the first wiring 5d Further, by configuring a portion in contact with the second wiring 9d (hereinafter referred to as a contact portion SC), the electrical and mechanical connectivity between the first wiring 5d and the second wiring 9d is further improved. be able to.
[0048]
That is, according to the present embodiment, the length of the contact surface between the part of the back surface of the first wiring 5d and the second wiring 9d is as wide as about 4 μm to 6 μm. In addition to this, the second wiring 9d is in contact with the side surface of the first wiring 5d. The second wiring 9d may be in contact with the entire side surface of the first wiring 5d.
[0049]
In the first and second embodiments, the second wirings 9a and 9b may contact part or all of the side surfaces of the first wirings 5a and 5b.
[0050]
Next, a method for manufacturing a semiconductor device according to the first embodiment of the present invention will be described with reference to FIGS.
[0051]
First, as shown in FIG. 4, a semiconductor wafer having a plurality of semiconductor chips 2 is prepared. The semiconductor chip 2 is, for example, a CCD image sensor chip. Subsequently, the boundary of the semiconductor chip 2 (via the insulating film 6a on the surface of the semiconductor chip 2) Dicing line ) The first wiring 5a is formed so as to straddle S.
[0052]
Subsequently, as shown in FIG. 5, the glass substrate 3 is bonded to the surface of the insulating film 6 a on the semiconductor chip 2 on which the first wiring 5 a is formed using a resin 4 made of a transparent epoxy material. Glass substrate 3 supports semiconductor chip 2 body Function as. Then, the back surface of the semiconductor chip 2 is back-ground to reduce the chip thickness, and the semiconductor chip 2 and the insulating film 6a are etched along the boundary S from the back surface side of the semiconductor chip 2 so that the back surface of the first wiring 5a A part, preferably the central part thereof, is exposed. Note that back grinding is not a necessary process in the present embodiment.
[0053]
Thus, in this process, since it is not the structure which has a glass substrate in the back surface side of the semiconductor chip 2 like the past, cost reduction can be aimed at. In addition, the number of manufacturing steps can be reduced, and the semiconductor device itself can be made thinner.
[0054]
Subsequently, as shown in FIG. 6, an insulating film 16a is formed so as to cover the side surface of the etched semiconductor chip 2 and the exposed portion of the first wiring 5a. The insulating film 16a is a silicon oxide film (SiO2) formed by, for example, CVD (Chemical Vapor Deposition). ₂ ), A silicon nitride film (SiN), an organic insulating film (such as polyimide), or the like. The film thickness is about 2 μm.
[0055]
Next, as shown in FIG. 7A, a resist 11 is applied to the surface of the insulating film 16a, exposure / development processing is performed, and anisotropic etching is performed on the insulating film 16a using the resist 11 as a mask. An opening 12 having a width d1 with the boundary S as the center is provided in the insulating film 16a to expose the central portion of the first wiring 5a.
[0056]
After that, as shown in FIG. 7B, the first wiring 5a is completely etched again by anisotropic etching using the resist 11 and the insulating film 16a as a mask, so that two first wirings 5a are formed. In Split. Thereby, the side surface of the divided first wiring 5a is exposed.
[0057]
Here, the etching is performed twice when the insulating film 16a and the first wiring 5a are etched. However, the present invention is not limited to this, and the insulating film 16a and the first wiring 5a are continuously formed using the same etching gas. Etching may be performed.
[0058]
Subsequently, after removing the resist 11, a plurality of buffer members 7 are formed at desired positions on the insulating film 16 a on the back surface side of the semiconductor chip 2. For explanation, only one buffer member 7 is shown for one semiconductor chip 2. The buffer member 7 is disposed at a position where the conductive terminal 8 is formed.
[0059]
Thereafter, as shown in FIG. 8A, a metal layer is formed by sputtering or the like with aluminum or an aluminum alloy so as to cover the whole from the back surface side of the semiconductor chip 2.
[0060]
Then, as shown in FIG. 8B, a resist (not shown) is formed on the metal layer and subjected to exposure / development processing. Then, using the resist as a mask, the metal layer is etched so that the resin 4 is exposed to form an opening 13 (width d2) that is smaller than the opening 12 (width d1) (d1> d2). . As a result, the second wiring 9a is brought into contact with the side surface of the first wiring 5a, and both are electrically and mechanically connected. Here, the second wiring 9a is formed to have a thickness of about 2 μm to 3 μm. The length of the contact portion between the first wiring 5a and the second wiring 9a is about 2 μm to 3 μm as described above.
[0061]
Then, as shown in FIG. 1A, after Ni, Cu plating is performed on the second wiring 9a, a protective film 10a such as a solder mask is formed, and an opening is formed in the protective film 10a. Through this opening, solder is applied by screen printing or the like, and the conductive terminal 8 is formed on the second wiring 9a. Subsequently, dicing is performed along the boundary S. Thus, the BGA type semiconductor device 1a according to the first embodiment of the present invention shown in FIG. 1A is completed.
[0062]
Next, a method for manufacturing a semiconductor device according to the second embodiment of the present invention will be described with reference to FIGS. Since the steps corresponding to FIGS. 4, 5, and 6 are the same as those in the manufacturing method of the present embodiment, the subsequent steps will be described.
[0063]
As shown in FIG. 9A, a resist 19 is applied to the back surface of the semiconductor chip 2 and subjected to exposure / development processing to form an opening 20 having an opening width d3.
[0064]
Thereafter, as shown in FIG. 9B, the first wiring 5b is etched using the resist 19 as a mask to divide the first wiring 5b into two, and the opening 14 having an opening width d3 is formed. Form. Then, the resist 19 is removed. Here, the width d3 of the opening 14 in FIG. 9B is smaller than the width d1 of the opening 12 in FIG. 7A.
[0065]
Thereafter, as shown in FIG. 10, after the buffer member 7 is formed at a predetermined position on the insulating film 16b, the second wiring 9b is formed on the surface of the insulating film 16b, a part of the back surface and the side surface of the first wiring 5b, And formed on the exposed surface of the resin 4 and the buffer member 7.
[0066]
Then, a resist (not shown) is formed, exposed and developed, and the second wiring 9b is etched so as to form an opening having the same width d3 as the opening 14. As a result, as shown in FIG. 1B, a part of the back surface of the first wiring 5b and the second wiring 9b are brought into contact with each other so that the length of the contact portion is 2 μm to 3 μm. Connected. Here, the thickness of the second wiring 9b was formed to be about 2 μm to 3 μm.
[0067]
Then, after Ni and Cu are plated on the second wiring 9b, a protective film 10b is formed, an opening is formed at a predetermined position of the protective film 10b, and solder is applied to the opening by screen printing or the like. Then, the conductive terminal 8 is formed on the second wiring 9b. Subsequently, dicing is performed along the boundaries S of the plurality of semiconductor chips 2. Thus, the BGA type semiconductor device 1b according to the second embodiment of the present invention shown in FIG. 1B is completed.
[0068]
In each of the manufacturing methods of the first and second embodiments described above, since notching using a blade is not performed as in the conventional example, the end surfaces of the first wirings 5a and 5b are not roughened, and clean. Can be maintained. Therefore, the adhesion between the first wirings 5a and 5b and the second wirings 9a and 9b is improved.
[0069]
In the manufacturing methods of the first and second embodiments, the second wirings 9a and 9b are once formed in a wide range by sputtering, and then etched to divide them into two. As a result, even if the portion where the first wirings 5a and 5b and the second wirings 9a and 9b are in contact is 2 μm to 3 μm, which is similar to the conventional example, both electrical and mechanical connectivity is improved. .
[0070]
In the manufacturing methods of the first and second embodiments described above, the first wirings 5a and 5b are etched and divided into two parts, and then the second wirings 9a and 9b are connected thereto. Even after connecting the first wirings 5a, 5b and the second wirings 9a, 9b, the first wirings 5a, 5b and the second wirings 9a, 9b are both etched and divided. Good.
[0071]
Next, a manufacturing method according to a third embodiment of the semiconductor device of the present invention will be described with reference to FIGS.
[0072]
A semiconductor wafer having a plurality of semiconductor chips 2 is prepared, and the first wirings 5c and 5c are separated by a certain width d11 across the boundary S of the semiconductor chip 2 via the insulating film 6c on the surface of the semiconductor chip 2. To form. The first wirings 5 c and 5 c are, for example, the uppermost layer wirings of the semiconductor chip 2.
[0073]
Subsequently, as shown in FIG. 12, a transparent epoxy resin 4 is applied onto the semiconductor chip 2 via the first wiring 5c and the insulating film 6c. Then, the glass substrate 3 is bonded to the surface of the semiconductor chip 2 using the resin 4 as an adhesive.
[0074]
Then, the semiconductor chip 2 is back-ground to reduce the chip thickness, and the semiconductor chip 2 and the insulating film 6c are etched along the boundary S from the back surface side of the semiconductor chip 2 so that one of the first wirings 5c and 5c is obtained. And a part of the resin 4 are exposed. However, this back grinding is not necessarily a necessary process in the present embodiment.
[0075]
Next, as shown in FIG. 13, the insulating film is formed on the back surface of the semiconductor chip 2, the etched side surface of the semiconductor chip 2, the side surface of the insulating film 6 c, the first wirings 5 c and 5 c, and the exposed resin 4. 16c is formed using a CVD method.
[0076]
Next, as shown in FIG. 14A, a resist 12 is applied to the surface of the insulating film 16c, exposed and developed, and anisotropic etching is performed on the insulating film 16c using the resist 12 as a mask. An opening 15 is provided in the film 16c. Here, the exposed surface of the first wirings 5c and 5c in the opening 15 is referred to as a protruding portion 20c. When the width of the opening 15 is d12, the width d12 is formed to be wider than the distance d11 between the first wirings 5c and 5c. Further, the boundary S is located at the approximate center of the opening 15.
[0077]
Here, FIG. 14B is a view when a part of the resin 4 existing between the first wirings 5c and 5c separated when the insulating film 16c of FIG. 14A is etched is etched. is there. FIG. 14B will be described later.
[0078]
Then, after removing the resist 12, the buffer member 7 is formed on the insulating film 16c as shown in FIG. Thereafter, a metal made of aluminum or aluminum alloy is formed on the surface of the insulating film 16c, the surface of the buffer member 7, the exposed surfaces of the first wirings 5c and 5c, and the exposed surface of the resin 4 by sputtering. Then, a resist 18 is applied on the metal layer, and exposure / development processing is performed.
[0079]
Thereafter, as shown in FIG. 16, the metal film is etched using the resist 18 as a mask to provide an opening 17. Here, if the width of the opening 17 is d13, the width d13 is smaller than the width d12 of the opening 15 shown in FIGS. 14A and 14B, and the width d13 and the distance d11 are the same. That is, the end side surface of the protruding portion 20c matches the end side surface of the second wiring 9c.
[0080]
Thereafter, the semiconductor device 1c of the present embodiment shown in FIG. 2 is completed through the same steps as the method for manufacturing the semiconductor device according to the first embodiment.
[0081]
In the present embodiment, the opening 15 having a width d12 wider than the gap width d11 of the first wirings 5c and 5c is formed, thereby exposing the back surface of the protruding portion 20c of the first wirings 5c and 5c. . The rear surface of the protruding portion 20c and the second wiring 9c have a wide adhesive surface, for example, a length of about 4 to 6 μm. In addition, if the said adhesive surface is 6 micrometers or more, adhesive strength will increase further.
[0082]
Next, a manufacturing method according to a fourth embodiment of the semiconductor device of the present invention will be described with reference to FIG.
[0083]
In the present embodiment, further examination is made on the etching method of FIG. 14A in the third embodiment described above.
[0084]
FIG. 14B is a cross-sectional view illustrating a state in which the insulating film 16d is etched using the resist 12 as a mask. If over-etching is performed during this etching, a part of the resin 4 between the separated first wirings 5d and 5d is also etched. This etching is wet etching or dry etching, and an etchant that does not etch the first wirings 5d and 5d is used.
[0085]
As a result, part or all of the side surfaces of the first wirings 5d and 5d are exposed. Thereafter, the resist 12 is removed, and the same process as in the third embodiment is performed, so that the semiconductor device 1d having a structure in which the second wiring 9d shown in FIG. 3 is in contact with the back and side surfaces of the first wirings 5d and 5d is obtained. Complete.
[0086]
In the first, second, third and fourth embodiments, instead of the glass substrate 3, a plate material made of plastic may be used. However, when the semiconductor chip 2 is a CCD image sensor chip, it is necessary to be a plate material that transmits light.
[0087]
The first wirings 5a, 5b, 5c, 5d and the second wirings 9a, 9b, 9c, 9d are not limited to aluminum and aluminum alloy, but may be copper (Cu).
[0088]
【The invention's effect】
According to the present invention, since the single support substrate for supporting the semiconductor chip is provided, it is possible to obtain a BGA type semiconductor device that is low in cost and requires few manufacturing processes.
[0089]
In addition, it is possible to obtain a good electrical connection between the semiconductor chip and the conductive terminal formed on the support substrate.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a semiconductor device according to first and second embodiments of the present invention.
FIG. 2 is a cross-sectional view showing a semiconductor device according to a third embodiment of the present invention.
FIG. 3 is a cross-sectional view showing a semiconductor device according to a fourth embodiment of the present invention.
FIG. 4 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the first embodiment of the invention.
FIG. 5 is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment of the invention.
6 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the first embodiment of the invention. FIG.
FIG. 7 is a cross-sectional view showing the method of manufacturing the semiconductor device according to the first embodiment of the invention.
FIG. 8 is a cross-sectional view showing the method for manufacturing the semiconductor device according to the first embodiment of the invention.
FIG. 9 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention.
FIG. 10 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a second embodiment of the present invention.
FIG. 11 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a third embodiment of the present invention.
FIG. 12 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a third embodiment of the present invention.
FIG. 13 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a third embodiment of the present invention.
FIG. 14 is a cross-sectional view showing a method of manufacturing a semiconductor device according to third and fourth embodiments of the present invention.
FIG. 15 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a third embodiment of the present invention.
FIG. 16 is a cross-sectional view showing a method for manufacturing a semiconductor device according to a third embodiment of the present invention.
FIG. 17 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device.
FIG. 18 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device.
FIG. 19 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device.
FIG. 20 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device.
FIG. 21 is a cross-sectional view showing a conventional method of manufacturing a semiconductor device.
FIG. 22 is a perspective view showing a conventional semiconductor device.

Claims (20)

A metal pad connected to a circuit element in the semiconductor chip and formed in the vicinity of the side surface on the semiconductor chip;
A support including the metal pad and bonded to cover a surface portion of the semiconductor chip ;
An insulating film formed on the side surface and the back surface of the semiconductor chip,
A semiconductor device comprising: a metal wiring connected to the metal pad and extending from a side surface portion to a back surface portion of the semiconductor chip so as to be in contact with the insulating film. The semiconductor device according to claim 1, wherein the metal wiring is connected to a side surface or a back surface of the metal pad . The semiconductor device according to claim 1, wherein the metal wiring is connected to a side surface and a back surface of the metal pad. 4. The semiconductor device according to claim 2, wherein a length of a connection portion between the back surface of the metal pad and the metal wiring is larger than a length of a side surface of the metal pad. 5. 5. The semiconductor device according to claim 1, wherein the side surface portion of the semiconductor chip has an inclined portion so that a back surface portion is smaller than a front surface portion of the semiconductor chip. . The semiconductor device according to claim 1, wherein the insulating films have substantially the same film thickness. The semiconductor device according to claim 1, wherein the insulating film is made of a CVD film or an organic film. The semiconductor device according to claim 1, wherein the support is a plate made of glass or plastic. The semiconductor device according to claim 1, wherein the semiconductor chip is a CCD image sensor chip. The semiconductor device according to claim 1, further comprising a conductive terminal on the metal wiring. The semiconductor device according to claim 10, wherein a buffer member is provided under the metal wiring below the conductive terminal. Preparing a semiconductor wafer having a plurality of semiconductor chips, and bonding a support to the surface side of the semiconductor wafer on which the first wiring straddling the boundary between adjacent semiconductor chips is formed;
  Etching the boundary portion of the backside of the semiconductor wafer;
  Forming an insulating film on the side and back surfaces of the semiconductor chip exposed by the etching; and
  Etching the first wiring away from the boundary;
  Forming a second wiring connected to the first wiring and extending from a side surface portion of the semiconductor chip so as to be in contact with the insulating film;
  Dividing into individual semiconductor devices along the boundary;
A method for manufacturing a semiconductor device, comprising: Preparing a semiconductor wafer having a plurality of semiconductor chips, and bonding a support to the surface side of the semiconductor wafer on which the first wiring is formed apart from the boundary between adjacent semiconductor chips;
  Etching the boundary portion of the backside of the semiconductor wafer;
  Forming an insulating film on the side and back surfaces of the semiconductor chip exposed by the etching; and
  Forming a second wiring connected to the first wiring and extending from a side surface portion of the semiconductor chip so as to be in contact with the insulating film;
  Dividing into individual semiconductor devices along the boundary;
A method for manufacturing a semiconductor device, comprising: 14. The step of forming the second wiring includes connecting the second wiring to a side surface or a back surface of the first wiring exposed from a side surface portion of the semiconductor chip. 2. A method for manufacturing a semiconductor device according to item 1. 14. The step of forming the second wiring includes connecting the second wiring to a back surface and a side surface of the first wiring exposed from a side surface portion of the semiconductor chip. A method for manufacturing a semiconductor device according to claim 1. 16. The etching process according to claim 12, wherein in the etching step, an inclined portion is formed on a side surface portion of the semiconductor chip so that a back surface portion is smaller than a front surface portion of the semiconductor chip. Semiconductor device manufacturing method. 17. The method of manufacturing a semiconductor device according to claim 12, wherein the step of forming the insulating film is performed such that the film thickness of the insulating film is substantially equal. 18. The method of manufacturing a semiconductor device according to claim 12, wherein the step of forming the insulating film forms an insulating film made of a CVD film or an organic film. The method of manufacturing a semiconductor device according to claim 12, wherein the step of bonding the support includes bonding a plate material made of glass or plastic to the surface side of the semiconductor wafer. The method of manufacturing a semiconductor device according to claim 12, further comprising a step of forming a conductive terminal on the second wiring.

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