JP3870004B2 - Image pickup device and image pickup apparatus including the image pickup device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an imaging device and an imaging device using the imaging device, and more particularly to an imaging device having an analog image signal processing circuit built therein and an imaging device using the imaging device.
[0002]
[Prior art]
A signal read from the image sensor is AD-converted, and the data is usually processed by a camera DSP (Digital Signal Processor). However, when the IMT-2000 communication infrastructure is developed in the future, moving images will be distributed to mobile phones and the like.
[0003]
Mobile phones and the like are particularly required to be small and have low power consumption. CCDs are the mainstream of image pickup devices mounted on mobile phones released in recent years, but there is a possibility that CMOS sensors will become mainstream in the future due to low power consumption and the features of built-in peripheral circuits.
[0004]
[Problems to be solved by the invention]
An object of the present invention is to provide a high-resolution and low-moire image quality by providing a signal readout method optimal for an image sensor.
[0005]
Another object of the present invention is to provide an optimum peripheral circuit configuration for an image sensor.
[0006]
[Means for Solving the Problems]
The imaging device of the present invention includes a pixel unit having a plurality of pixels that are arranged in a two-dimensional shape and that output color signals of a plurality of colors,
Scanning means for sequentially outputting a color signal from a plurality of pixel groups configured by arranging the pixels in one direction for each pixel group in a different direction different from the one direction;
Synchronization means for simultaneously synchronizing color signals of a plurality of colors output from at least two of the pixel groups sequentially output by the scanning means;
Have
The scanning unit shifts a combination of a plurality of pixels to be sequentially output one by one in the one direction for each output, performs scanning so that signals of the same pixel are output repeatedly, and the same pixel to be output later Is read by non-destructive readout,
The non-destructive readout signal is an image sensor in which noise correction is performed using the noise signal of the same pixel read out during the blanking period at the previous readout of the same pixel signal.
[0007]
The above-described present invention will be described with reference to the embodiment of FIG. 2. An image pickup device according to the present invention includes a pixel unit that includes a plurality of pixels 10 that output a color signal of a plurality of colors and that is two-dimensionally arranged. 10 is a pixel group (for example, one pixel group is composed of pixels G11, B21, G31...) 10 arranged in one direction (the row direction in FIG. 2; that is, the arrangement direction of the pixels G11, B21, G31. ) For each pixel group, a plurality of pixels (for example, the pixel G 11 and the pixel B ) are arranged in another direction different from the one direction (the column direction in FIG. 2; that is, the arrangement direction of the pixels G 11, R 12, G 13...). 21 , the pixel R 12 and the pixel G 22 ) are sequentially output by the scanning means 102, 103, and the pixel consisting of at least two pixel groups (for example, pixels G 11, B 21, G 31,... ) Sequentially output by the scanning means 102, 103. It consists of a group and pixels R12, G22, R32 ... A plurality of colors of color signals output from the pixel group) (e.g., a synchronizing means for synchronizing a color signal) from the pixel G22, B21, R12, and scanning means 102 and 103, a plurality of sequentially outputs The pixel combinations are shifted one by one in the one direction for each output (if the previous output is from the pixel G 11 and the pixel B 21 , the subsequent output is the pixel B 21 and the pixel G 31 ). This is an imaging device that performs scanning so that signals are output in duplicate and reads out the signal of the same pixel (pixel B 21 ) that is output later by nondestructive readout.
[0012]
【Example】
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0013]
An overall block diagram of the imaging apparatus of the present invention is shown in FIG.
[0014]
In FIG. 1, reference numeral 100 denotes an analog processing circuit, an AD converter, and the like, for example, an image pickup element integrated on the same semiconductor substrate by a CMOS process or the like. Reference numeral 200 denotes a general-purpose microcomputer that incorporates an MPU, a memory, and an I / F. Reference numeral 300 denotes a display system for monitoring the photographing situation by a signal from the image sensor 100.
[0015]
The imaging device 100 eliminates the need for a camera DSP-IC and can be used in a portable device in combination with a microcomputer.
[0016]
The image pickup device 100 picks up a subject image and reads out a signal generated by the image pickup, and the pixel portion 104 provided in an area, a vertical (V) scanning circuit 103 that drives the pixel portion 104, and pixel variations. And a horizontal (H) scanning circuit 102 for performing horizontal readout control of signals accumulated in the temporary memory 105, a read R (red) signal, G ( An R / G / B signal is provided as a color processing unit having an amplifier / synchronization circuit 106 that performs amplification and synchronization of a green signal and a B (blue) signal, and performs color processing on a signal from the imaging unit. AGC (automatic gain control) circuit 107 that controls gain, white balance (WB) circuit 108 that adjusts white balance of R, G, and B signals, γ compensation The circuit 109 includes a matrix circuit 110 that forms a luminance signal Y by calculation of R, G, and B signals subjected to γ correction and forms color difference signals RY and BY. Further, the luminance signal and the color difference signal are analogized. The AD converter 112 that performs digital conversion, the driver 111 that forms the drive signal of the display device 300 from the output of the matrix circuit 110, the timing pulse in the image sensor 100, the timing generator 101 that adjusts the timing, and the AD converter 112 An output unit 400 for outputting a signal to the outside of the image sensor and an output unit 500 for outputting a signal from the driver 111 to the outside of the image sensor.
[0017]
Next, a circuit block diagram for explaining the pixel portion 104, the temporary memory 105, and the amplifier / synchronization circuit 106 in more detail is shown in FIG. In the pixel portion 104, filters of R, G, and B colors are arranged in a mosaic pattern.
[0018]
Here, a description will be given on the assumption that the pixel rows V1 and V2 of the horizontal line are selectively driven.
[0019]
In the temporary memory 105, there are circuit blocks 20 for storing pixel variation correction for two vertical pixels and a signal after correction for the number of pixels in the horizontal direction.
[0020]
In the circuit block 20-1, a signal in which the pixel variation of the pixel G11 and the pixel B21 is corrected is temporarily accumulated, and in the circuit block 20-2, a signal in which the pixel variation of the pixel R12 and the pixel G22 is corrected is temporarily accumulated. G11 / B21 and G22 / R12 of these signals are sequentially read out to the amplifier 114 in the amplifier / synchronization circuit 106 for each column. In the amplifier 114, four signals G11, B21, G22, and R12 are amplified and input to the switch (SW) circuit 115 and the sample hold (S / H) circuits 116 and 117 in the subsequent stage. A schematic diagram of this signal is shown in FIG.
[0021]
The G11 signal in the V1 row and the G22 signal in the V2 row are switched by the switch circuit 115 for each horizontal clock and converted to a dot sequential signal. Since the R12 signal and the B21 signal exist in each column, the repetition frequency is ½ of the horizontal clock. However, the R12 signal and the B21 signal are sampled and held by one clock by the sample and hold circuits 116 and 117. As a result, as shown in FIG. The G and B signals are synchronized.
[0022]
That is, the G11 and B21 signals are first input to the amplifier / synchronization circuit 106, and then the R12 and G12 signals are input. The B21 signal is sampled and held for one clock by the sample and hold circuit 116, and G22 and B21. , R12 signals are synchronized and output from the amplifier / synchronization circuit 106. Next, the G13 and B23 signals are inputted. The R12 signal is sampled and held by one clock in the sample and hold circuit 117, and the G13, B23 and R12 signals are synchronized and outputted from the amplifier / synchronization circuit 106.
[0023]
In this manner, since the R, G, and B signals for two pixel rows are synchronized, AGC, WB, and γ processing can be performed for each color.
[0024]
Next, FIG. 4 is a circuit diagram showing a specific embodiment of the pixel and the temporary memory, and FIG. 5 is a timing chart of the circuit of FIG. Here, an example is shown in which a pixel is configured by arranging one amplification transistor and one reset transistor for one photodiode. However, for example, as shown in FIG. ) Common circuit portions such as an amplifying transistor and a resetting transistor may be arranged and shared one by one with respect to the photodiode. In this case, the four pixels constitute one unit cell.
[0025]
One pixel includes a photodiode PD serving as a photoelectric conversion element, a transfer transistor M _TX for transferring a signal from the photodiode PD, an amplifying transistor M _SF for amplifying and reading the transferred signal, and selecting and amplifying the pixel. selection transistor M _SEL for reading a signal from the use transistors M _SF, composed of the reset transistor M _RES for resetting an input portion of the amplifying transistor M _SF. Control signals φP, φC, and φS are signals for controlling the transfer transistor M _TX , the reset transistor M _RES , and the selection transistor M _SEL , respectively.
[0026]
The pixels (G11, B21,...) Arranged in one direction are connected to one vertical output line VL, and the vertical output line VL is connected to the circuit block 20 of the temporary memory, and signals from each pixel are sequentially stored in the temporary memory. Are input to the circuit block 20.
[0027]
The circuit block 20 of the temporary memory removes the pixel variation of the signal from each pixel (G11, B21,...) And then holds the signal from which the pixel variation is removed in the storage capacitors CT2 and CT1, and stores the storage capacitors CT2 and CT1. , Two rows of signals (G11 and B21,...) Are simultaneously output to two horizontal output lines HL1 and HL2, respectively.
[0028]
Here, the pixel variation correction circuit of the circuit block 20 is exemplified by the clamp type variation correction method. In this circuit, the pixel variation (N) is transferred to the input end (pixel connection side) of the clamp capacitor CP2 (CP1) while the other end (storage capacitor CT2 connection side) of the clamp capacitor CP2 (CP1) is short-circuited. Then, the other end is opened, and then when the pixel signal (S + N) including the pixel variation component is transferred to the input end of the clamp capacitor, the other end of the photoelectric conversion signal (S) in which the pixel variation component is corrected Only appears, and the photoelectric conversion signal is stored in the storage capacitor CT2. (CT1 ).
[0029]
In FIG. 5, the pixel variation correction and the G11 and R12 signal memories are performed in the φV1 period.
[0030]
First, in the period t1, the control signal [phi] C, .phi.S, .phi.T2, the φCT2 the H level, the reset transistor M _RES, selection transistor M _SEL, the transistors M21, by turning the transistor M22, the other end of the capacitor C _P2 (capacity With the CT2 connection side) at a predetermined potential, a pixel reset signal (pixel variation) is transferred to the input terminal (pixel connection side) of the clamp capacitor CP2. Thereafter, the control signal φCT2 is set to L level, the transistor M22 is turned off, and the other end of the clamp capacitor CP2 (capacitor CT2 connection side) is brought into a floating state.
[0031]
Then, in period t2, and turns on the transfer transistor M _TX control signal φP the H level to transfer signals from the photodiode PD to the input portion of the amplifying transistor M _SF, is amplified by the amplifying transistor M _SF The transferred signal is transferred to the input terminal (pixel connection side) of the clamp capacitor _CP2 . At this time, appeared only photoelectric conversion signals pixel variation is corrected to the other end of the clamp capacitor C _P2 (capacitance CT2 connection side) as described above, the photoelectric conversion signal pixel variation is corrected in the memory CT2 is accumulated The
[0032]
Similarly, pixel variation correction and B21 and G22 signal memory are performed in the next φV2 period.
[0033]
The stored signal is read to the amplifier / synchronization circuit 106 in the next horizontal effective scanning line period.
[0034]
The same operation is performed in the next φV3 and φV4 periods, and the stored signal is similarly read to the amplifier / synchronization circuit 106.
[0035]
The vertical resolution improvement using nondestructive readout of this image sensor will be described with reference to the timing chart of FIG.
[0036]
In the timing chart of FIG. 5, an example in which a combination of vertical scanning is driven for each of V1 and V2, V3 and V4, and two pixel rows.
[0037]
In the timing chart of FIG. 6, the combination of vertical scanning is V1, V2, V2, V3... And the pixel row combination is changed for each row. Since the combination of pixel rows is changed for each row (pixel shift driving), the number of vertical scanning lines is doubled with respect to the driving method of FIG.
[0038]
In the present embodiment, one pixel row needs to use the same signal in two pixel rows. In the timing diagram of FIG. 5, since the reset input of the amplifier transistor M _SF before reading the photoelectric conversion signal from the photodiode, in the next blanking period, it is impossible to read the same signal from the same pixel, It is necessary to store the same signal in another memory. In order to store the same signal in another memory, at least another line of variation correction memory is required, and the output of the circuit needs to be switched in a complicated manner.
[0039]
In the embodiment of FIG. 6, pixel shift driving is made possible by using non-destructive readout of signals by utilizing the variation preservation of the clamp circuit.
[0040]
The φV1 and φV2 scans are performed during the blanking period (HBLK1) of one horizontal scanning period in FIG. 6, and the non-destructive readout of pixel signals and φV3 scanning are performed for the φV2 scanning during the blanking period (HBLK2) of the next horizontal scanning period. Non-destructive reading is performed during the blanking period (HBLK3). That is, in φV2 scanning in the blanking period (HBLK2), the control signal φC is not set to H level, and the signal held in the clamp capacitor without being reset is read as a signal from the pixels B21 and G22 (non-destructive) Read). In the blanking period (HBLK2), φV3 scanning performs signal readout with reset. The same nondestructive reading is performed in the φV3 scan in the next blanking period (HBLK3).
[0041]
This timing makes it possible to drive the pixel shift without adding a temporary memory circuit.
[0042]
FIG. 7 shows a circuit diagram of an embodiment using another variation correction circuit of the present invention.
[0043]
The variation correction circuit of FIG. 7 is called a slice type noise correction circuit and is described in detail in Japanese Patent Application Laid-Open No. 09-247546. The equivalent circuit of FIG. 8 and the timing diagram of FIG. 9 are those described in FIGS. 3 and 5 of the above-mentioned publication.
[0044]
FIG. 7 shows an embodiment in which the variation correction circuit is improved, and the pixel variation of the pixel to be read nondestructively is used twice by the same operation as the timing of FIG.
[0045]
The configuration and operation will be described below with reference to FIG.
[0046]
As shown in FIG. 7, the vertical output line VL is connected to the gate of the transistor M41. The drain side of the transistor M41 is connected to the capacitor CP and the transistor M42, and the source side of the transistor M41 is connected to the capacitors CT1 and CT2 via the transistors M43 and M44, respectively.
[0047]
To correct the variation, the transistor M42 is turned on and the transistors M43, M44, M45, and M46 are turned on and reset during the φV1 period of the blanking period (HBLK1), and then the capacitance is set during the reset noise transfer period from the pixel G11. A negative pulse is applied to CP to transfer the charge exceeding the channel potential φn of the transistor M41 to the capacitor CT1, and this charge is discharged by turning on the transistor M45. Here, reset noise is transferred to the capacitor CP.
[0048]
During the signal output period from the pixel G11, a negative pulse is again applied to the capacitor CP to transfer the charge exceeding the channel potential φs of the transistor M41 to the capacitor CT1. Here, the charge transferred to the capacitor CT1 becomes CP × (φs−φn), which is a signal from which noise is removed (variation is corrected).
[0049]
Similarly, in the φV2 period of the blanking period (HBLK1), a signal from which noise has been removed (corrected for variation) from the pixel B21 is accumulated in the capacitor CT2. Thereafter, a signal from the pixel G11 from which noise has been removed and a signal from the pixel B21 from which noise has been removed are sequentially output from the capacitors CT1 and CT2 to the horizontal output line.
[0050]
In the φV2 period of the blanking period (HBLK2), non-destructive reading is performed by the same operation as the timing shown in FIG.
[0051]
In this embodiment, since the variation voltage is preserved, highly accurate variation correction can be performed even if nondestructive reading is performed. Furthermore, since the storage capacity for storing the variation voltage is also used for reading twice, there is an effect of reducing the circuit scale.
[0052]
The color signal synchronization according to the present invention can also be applied to complementary color signals, that is, Ye (yellow), Cy (cyan), Mg (magenta), and G (green) signals.
[0053]
As described above, even with a color signal separation method using a mosaic filter, analog signal processing can be performed without increasing the circuit scale of a temporary memory or the like.
[0054]
Further, the pixel resolution driving utilizing the vertical correlation of the image can improve the vertical resolution and suppress the occurrence of moire and the like.
[0055]
In addition, since a driver for driving the display device is built in the image sensor, a new display driver is not required.
[0056]
【The invention's effect】
As described above , according to the present invention, an optimum readout signal can be obtained for the subsequent stage of the imaging unit.
[Brief description of the drawings]
FIG. 1 is an overall block diagram of an embodiment of an imaging apparatus of the present invention.
FIG. 2 is a circuit block diagram for explaining a configuration of a pixel portion, a temporary memory, and an amplifier / synchronization circuit.
FIG. 3 is a diagram illustrating a signal synchronization operation of an amplifier / synchronization circuit;
FIG. 4 is a circuit diagram showing a specific example of a pixel and a temporary memory.
FIG. 5 is a timing chart showing the operation of the circuit of FIG. 4;
FIG. 6 is a timing chart showing the operation of the circuit when using nondestructive reading.
FIG. 7 is a circuit diagram of an embodiment using another variation correction circuit of the present invention.
FIG. 8 is an equivalent circuit showing a slice type noise correction circuit described in Japanese Patent Laid-Open No. 09-247546.
FIG. 9 is a diagram illustrating timing of the circuit of FIG.
FIG. 10 is a diagram showing a configuration of another pixel portion used in the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 100 Image pick-up element 101 Timing generator 102 Horizontal scanning circuit 103 Vertical scanning circuit 104 Pixel part 105 Temporary memory 106 Amplifier and simultaneous processing circuit 107 AGC circuit 108 White balance circuit 109 Gamma correction circuit 110 Matrix circuit 111 Driver 112 AD converter 200 General-purpose microcomputer 300 Display system

Claims (8)

A pixel portion having a plurality of pixels that are arranged two-dimensionally and that output color signals of a plurality of colors;
Scanning means for sequentially outputting a color signal from a plurality of pixel groups configured by arranging the pixels in one direction for each pixel group in a different direction different from the one direction;
Synchronization means for simultaneously synchronizing color signals of a plurality of colors output from at least two of the pixel groups sequentially output by the scanning means;
Have
The scanning unit shifts a combination of a plurality of pixels to be sequentially output one by one in the one direction for each output, performs scanning so that signals of the same pixel are output repeatedly, and the same pixel to be output later Is read by non-destructive readout,
The non-destructive readout signal is an image sensor in which noise correction is performed using the noise signal of the same pixel read out during the blanking period at the time of the previous readout of the same pixel signal.   2. The image pickup device according to claim 1, wherein the color signals to be synchronized are a G (green) signal, an R (red) signal, and a B (blue) signal.   The image pickup device according to claim 2, wherein the G (green) signal is a signal output from a plurality of pixel groups, and the R (red) and B (blue) signals are signals output from one pixel group, respectively. An image sensor.   2. The imaging device according to claim 1, wherein the synchronization unit performs synchronization by sample-holding at least one color signal previously output by the scanning unit.   The imaging device according to claim 1, further comprising a storage unit that stores a sensor signal or a noise signal from a pixel of the pixel unit for an arbitrary period.   The image pickup device according to claim 1, wherein the image pickup device outputs an analog output and a digital output of a luminance signal and a color difference signal based on the plurality of synchronized color signals.   The image pickup device according to claim 1, wherein an image display signal output based on the synchronized color signals is output. An imaging apparatus having an imaging device of any one of claims 1 to 7.

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