JP3857140B2 - Manufacturing method of matrix substrate for liquid crystal - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a liquid crystal matrix substrate used in a liquid crystal display device.
[0002]
[Prior art]
As is well known, as a liquid crystal display device, there is an active matrix liquid crystal display device using a thin film transistor abbreviated as TFT as a switching element. In this active matrix liquid crystal display device, a liquid crystal matrix substrate in which a number of TFTs are formed on a transparent glass substrate is used. Since this liquid crystal matrix substrate is manufactured by repeating fine patterning by a photolithography process, a large number of photomasks are required for the manufacturing process. On the other hand, reduction of the number of photomasks, that is, simplification of the photolithography process is desired in order to improve the productivity and manufacturing yield of the liquid crystal display device or reduce the cost.
[0003]
By the way, in order to reduce the power consumption and increase the brightness of the active matrix type liquid crystal display device, it is necessary to improve the light transmittance of the liquid crystal cell, and it is necessary to improve the aperture ratio of the liquid crystal matrix substrate. As a method for improving the aperture ratio, a method is known in which a pixel electrode for applying an electric field to a liquid crystal cell is formed on a flat protective film, and a scanning gate electrode or a thin film transistor is three-dimensionally overlapped with the pixel electrode. Therefore, a high aperture ratio exceeding 80% can be realized by this method.
[0004]
Such a liquid crystal matrix substrate having a high aperture ratio has a GS intersection region, a thin film transistor region, a pixel electrode region, a terminal region of a peripheral circuit, and the like in which a scanning gate electrode and a source electrode for image data transfer intersect. It is manufactured by a manufacturing process as shown in FIGS.
[0005]
First, as shown in FIG. 9A, a gate electrode film 22 is formed on a glass substrate 21. The gate electrode film 22 is formed by a sputtering method or the like, and is a metal film such as chromium (Cr), aluminum (Al), or tantalum (Ta). A photoresist is uniformly applied on the gate electrode film 22, and a resist pattern 23 as shown in FIG. 9B is formed using the first photomask. Then, etching is performed using the resist pattern 23 as a mask, and the gate electrode film 22 is patterned as shown in FIG.
[0006]
Next, as shown in FIG. 10D, three layers of a gate insulating film 24, a first semiconductor layer 25, and a second semiconductor layer 26 are successively stacked by a plasma CVD method or a sputtering method. The gate insulating film 24 is, for example, a silicon nitride (SiNx) film. The first semiconductor layer 25 is an amorphous-silicon (a-Si) film. The second semiconductor layer 26 is made of silicon (n ⁺ -Si) film.
[0007]
Next, a photoresist is applied to the entire surface, and a resist pattern 27 as shown in FIG. 10E is formed using a second photomask. The resist pattern 27 is formed only in the thin film transistor region, and is not formed in the GS intersection region and the terminal region. Etching is performed using the resist pattern 27 as a mask, and the first semiconductor layer 25 and the second semiconductor layer 26 are patterned in an island shape as shown in FIG.
[0008]
Next, the resist pattern 27 is removed, and a source / drain electrode film 28 is formed as shown in FIG. The source / drain electrode film 28 is formed by sputtering or the like, and is a metal film such as chromium, aluminum, or tantalum. Thereafter, a photoresist is uniformly applied on the source / drain electrode film 28, and a resist pattern 29 as shown in FIG. 11H is formed using a third photomask. The resist pattern 29 is formed in the thin film transistor region excluding the channel region and the GS intersection region. Etching is performed using the resist pattern 29 as a mask, and the source / drain electrode film 28 and the second semiconductor layer 26 are removed from the channel region in the thin film transistor region as shown in FIG. To separate. Further, the thickness of the channel region is adjusted by half-etching the first semiconductor layer 25 in the channel region.
[0009]
Next, the resist pattern 29 is removed as shown in FIG. Then, as shown in FIG. 12 (k), a passivation film 30 is formed on the entire surface by a CVD method, a sputtering method, or the like. The passivation film 30 is a protective film such as silicon nitride (SiNx). Further, as shown in FIG. 12L, a photosensitive acrylic resin film 31 is applied to flatten the surface.
[0010]
Next, using the fourth photomask, the photosensitive acrylic resin film 31 is patterned as shown in FIG. Through this patterning, each through hole reaching the passivation film 30 is formed in the photosensitive acrylic resin film 31. Etching is performed using the photosensitive acrylic resin film 31 as a mask to form a contact hole 31a reaching the drain electrode of the thin film transistor from the surface of the photosensitive acrylic resin film 31, as shown in FIG. A contact hole 31b reaching the gate electrode 22 in the terminal region from the surface of the photosensitive acrylic resin film 31 is formed. Although not shown here, a contact hole (not shown) reaching the source electrode of the thin film transistor from the surface of the photosensitive acrylic resin film 31 is also formed at the same time.
[0011]
Next, as shown in FIG. 13 (o), a transparent conductive film 32 is formed on the entire surface by sputtering or the like. The transparent conductive film 32 is made of indium tin oxide (ITO) or tin oxide (SnO). ₂ ) Etc. Using the fifth photomask, the transparent conductive film 32 is patterned to form a pixel electrode 33 as shown in FIG. Since the pixel electrode 33 three-dimensionally overlaps the gate electrode film 22 or the thin film transistor region via the photosensitive acrylic resin film 31, the aperture ratio of the liquid crystal matrix substrate 34 can be increased.
[0012]
When the first semiconductor layer 25 and the second semiconductor layer 26 are patterned in an island shape with the resist pattern 27, the resist pattern 27 is formed not only in the thin film transistor region but also in the GS intersection region. Even when the second semiconductor layer 26 remains in the GS intersection region, a liquid crystal matrix substrate having similar characteristics can be obtained.
[0013]
[Problems to be solved by the invention]
However, in the conventional manufacturing process described above, each photomask is used in each process of FIGS. 9B, 10E, 11H, 13M, and 14P. Therefore, a total of five photomasks are required, and the large number of photomasks causes a long process time and a decrease in manufacturing yield.
[0014]
For this reason, for example, in the technique described in Japanese Patent Laid-Open No. 5-303111, an ITO transparent electrode serving as a base layer of the gate electrode and a pixel electrode is formed on the substrate, and the gate electrode is formed by performing electroplating on the base layer. As a result, the gate electrode is patterned without using a photo process, and the number of photo masks is reduced. However, it still requires five photomasks, and process time and manufacturing yield cannot be improved. Further, since the gate electrode and the pixel electrode are formed in the same layer, they cannot be three-dimensionally overlapped, and an improvement in aperture ratio cannot be expected. Furthermore, when the gate electrode is formed by electroplating, the film thickness is likely to be non-uniform due to the potential drop, and the uniformity of the film thickness, that is, the uniformity of the gate electrode thickness cannot be maintained particularly on a large substrate. It was.
[0015]
In the technique described in Japanese Patent Laid-Open No. 2000-206571, a resist pattern having a non-uniform thickness is formed using a single photomask, and each of the patterns corresponding to FIGS. 10 (e) to 11 (i). It is possible to perform the process with the single photomask. The resist pattern having a non-uniform thickness can be formed by making the exposure amount of the resist pattern non-uniform as disclosed in, for example, Japanese Patent Application Laid-Open No. 61-181130.
[0016]
Alternatively, in the technique described in Japanese Patent Application Laid-Open No. 2000-206571, a resist pattern having a non-uniform thickness is formed using a single photomask, and then two-step etching is performed. The number of sheets used is reduced by one. Similar technologies include “A Novel Four-Mask-Count Process Architecture for TFT-LCD” on pages 1006 to 1009 of Sid2000Digest by CWKim et al. "Sangoku Denshi IPS TFT-LCD manufacturing process with 2PEP-TFT channel part half-tone exposure" is reported.
[0017]
However, these techniques only reduce the number of photomasks used by one. Also, only the application of the IPS (In Plane Switching) mode active matrix liquid crystal display device to the manufacturing process is mainly described, and the gate electrode or thin film transistor and the pixel electrode are three-dimensionally overlapped to form an opening. No mention is made of the possibility of applying the liquid crystal matrix substrate with an increased rate to the manufacturing process.
[0018]
Therefore, the present invention has been made in view of the above-described conventional problems, and can be applied to a manufacturing process of a liquid crystal matrix substrate in which a gate electrode or a thin film transistor and a pixel electrode are three-dimensionally overlapped, An object of the present invention is to provide a liquid crystal matrix substrate manufacturing method capable of further reducing the number of photomasks used.
[0019]
[Means for Solving the Problems]
In order to solve the above problems, the present invention provides a liquid crystal matrix substrate manufacturing method in which a matrix circuit for driving a plurality of liquid crystal cells is formed on an electrically insulating substrate. Contacting the resist in the pixel electrode area of each liquid crystal cell by applying an insulating film to the insulating film, and applying half-tone exposure after adjusting the exposure amount. A resist forming step in which the resist is cured in a range excluding the hole region, the resist in the partition region partitioning the pixel electrode region of each liquid crystal cell is half-cured, and the resist in each contact hole region is uncured; By patterning, the resist and the electrical insulating film disappear in each contact hole region, and each contact reaching the matrix circuit is obtained. A patterning step of forming holes in the electrical insulating film, erasing the resist in the partition regions partitioning the pixel electrode regions of each liquid crystal cell, and exposing the electrical insulating film in the partition regions, and the electrical insulating film exposed in the partition regions And a pixel electrode forming step of forming a pixel electrode in the pixel electrode region by removing the remaining resist, applying a conductive agent to the patterned electric insulation film, and forming a pixel electrode in the pixel electrode region. Contains.
[0020]
According to such a manufacturing method of the present invention, the resist and the electrical insulating film are patterned after halftone exposure is performed on the resist. As a result, the resist and the electrical insulating film disappear in each contact hole region, each contact hole reaching the matrix circuit is formed in the electrical insulating film, and the resist disappears in the partition region that partitions the pixel electrode region of each liquid crystal cell. Thus, the electrical insulating film is exposed. Then, the surface of the electrical insulating film exposed in the partition region is subjected to a flooding treatment, and after further removing the resist, a conductive agent is applied to the electrical insulating film. At this time, the conductive agent is repelled on the surface of the electrical insulating film in the partition region that has been subjected to the flooding treatment and is not applied here, but the conductive agent is applied to the pixel electrode region to become a pixel electrode, and the conductive agent is applied The contact hole region is filled. Thereby, a pixel electrode is formed and the contact hole is filled. Accordingly, the pixel electrode, the contact hole, and the contact hole can be filled only by using one photomask.
[0021]
In the present invention, the matrix circuit is a TFT active matrix circuit including a plurality of thin film transistors, and the manufacturing process of the TFT active matrix circuit includes a gate electrode film formed on an electrically insulating substrate and patterned. The film patterning step, the gate insulating film, the first semiconductor layer serving as the channel region of each thin film transistor, the second semiconductor layer serving as the ohmic contact layer, and the metal layer serving as the source / drain electrode are sequentially stacked, and the exposure amount is adjusted. The first and second semiconductor layers are formed in an island shape by halftone exposure and patterning, the source / drain electrodes are formed, the channel region is formed, and the passivation process is performed to form a passivation film. It is out.
[0022]
In the manufacturing process of such a TFT active matrix circuit, one photomask is used for patterning of the gate electrode film, and one photomask is used for forming the first and second semiconductor layers, the source / drain electrodes, and the channel region. This photomask is used. Further, as described above, one photomask is used for forming the pixel electrode, forming the contact hole, and filling the contact hole. Therefore, in order to manufacture a liquid crystal matrix substrate including this TFT active matrix circuit, it is only necessary to use a total of three photomasks.
[0023]
Furthermore, in the present invention, the electrical insulating film laminated on the matrix circuit is formed by application of acrylic resin, and the surface of the electrical insulating film exposed in the partition region is subjected to water irrigation treatment by fluorinated plasma irradiation, and the pixel electrode The conductive agent is a coating type transparent conductive material.
[0024]
Through such a process, the conductive agent is repelled on the surface of the acrylic resin in the partition region that has been subjected to the water proofing treatment, and is not applied here, but the conductive agent is applied to the acrylic resin in the pixel electrode region. The contact hole region is filled with a conductive agent as an electrode. Therefore, the pixel electrode and the contact hole can be formed with high accuracy without using a photomask.
[0025]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
[0026]
1 to 6 show an embodiment of a method for manufacturing a liquid crystal matrix substrate of the present invention. The matrix substrate for liquid crystal shown here includes a GS intersection region where a scanning gate electrode and a source electrode for image data transfer intersect, a thin film transistor region, a region of a pixel electrode that applies an electric field to a liquid crystal cell, and the periphery. It includes the terminal area of the circuit.
[0027]
First, as shown in FIG. 1A, a gate electrode film 2 is formed on a glass substrate 1. The gate electrode film 2 is formed by sputtering or the like, and is a metal film such as chromium (Cr), aluminum (Al), or tantalum (Ta). A photoresist is uniformly applied on the gate electrode film 2, and a resist pattern 3 as shown in FIG. 1B is formed using the first photomask. Then, etching is performed using the resist pattern 3 to pattern the gate electrode film 2 as shown in FIG.
[0028]
Next, as shown in FIG. 2D, three layers of the gate insulating film 4, the first semiconductor layer 5, and the second semiconductor layer 6 are successively stacked by a plasma CVD method or a sputtering method, Further, the source / drain electrode film 7 is deposited by plasma CVD or sputtering. The gate insulating film 4 is, for example, a silicon nitride (SiNx) film. The first semiconductor layer 5 is an amorphous-silicon (a-Si) film. The second semiconductor layer 6 is made of silicon (n ⁺ -Si) film. The source / drain electrode film 7 is a metal film such as chromium, aluminum, or tantalum.
[0029]
Next, a photoresist is applied once on the entire surface, halftone exposure is performed using a mask whose exposure amount is adjusted by a slit or the like as a second photomask, and further development is performed, whereby FIG. A resist pattern 8 having a non-uniform thickness as shown in e) is formed. The resist pattern 8 is not formed in the terminal region, but is formed in the GS intersection region and the thin film transistor region, and is thinned only in the channel region 5a in the thin film transistor region to form a thin portion 8a. Then, etching is performed using the resist pattern 8, and the gate insulating film 4 and the first and second semiconductor layers 5 and 6 are formed in a region not covered with the resist pattern 8 as shown in FIG. The two layers and the source / drain electrode film 7 in the region are removed.
[0030]
Next, as shown in FIG. 3G, the thickness of the entire resist pattern 8 is reduced by ashing to remove the thin portion 8a of the resist pattern 8 shown in FIG. 2F, and the channel region 5a in the thin film transistor region is removed. Then, the source / drain electrode film 7 is exposed. Then, etching is performed using the resist pattern 8 as a mask, and the source / drain electrode film 7 and the second semiconductor layer 6 are removed from the channel region in the thin film transistor region as shown in FIG. Separate the electrodes. Further, the thickness of the channel region is adjusted by half-etching the first semiconductor layer 5 in the channel region.
[0031]
Next, the resist pattern 8 is removed as shown in FIG. 3I, and a passivation film 9 is formed on the entire surface by CVD or sputtering as shown in FIG. 4J. The passivation film 9 is a protective film such as silicon nitride (SiNx). Further, as shown in FIG. 4 (k), a photosensitive acrylic resin film 10 is applied, the surface thereof is flattened, and the photosensitive acrylic resin film 10 is pre-baked at 80 to 100 ° C. A resist layer 11 is applied as shown in (l).
[0032]
Next, as a third photomask, halftone exposure is performed using a mask whose exposure amount is adjusted by a slit or the like, and further development is performed, whereby the resist layer 11 is formed as shown in FIG. Patterning is performed to form a resist pattern 11P having a non-uniform thickness. By this halftone exposure, the resist layer 11 is not cured in each contact hole region, the resist layer 11 is cured in the pixel electrode region excluding the contact hole region, and the resist layer 11 is half cured in the partition region that partitions the pixel electrode region. To do. Then, by development, a resist pattern 11P that disappears in each contact hole region, has a sufficient thickness in the pixel electrode region excluding the contact hole region, and becomes thin in a partition region that partitions the pixel electrode region is formed.
[0033]
Next, dry etching is performed using the resist pattern 11P as a mask. Thereby, as shown in FIG. 5 (n), in one contact hole region in the pixel electrode region, the photosensitive acrylic resin film 10 and the passivation film 9 are removed, and the contact hole 11c reaching the drain electrode of the thin film transistor is formed. In the other contact hole region, the photosensitive acrylic resin film 10, the passivation film 9, and the gate insulating film 4 are removed, and a contact hole 11d reaching the gate electrode film 2 is formed. Although not shown here, a contact hole (not shown) that reaches the source electrode of the thin film transistor through the photosensitive acrylic resin film 10 and the passivation film 9 is also formed at the same time.
[0034]
At the same time, in the partition region that partitions the pixel electrode region, the thin resist pattern 11P is removed, the hole 11e is formed, and the surface of the photosensitive acrylic resin film 10 is exposed. In the pixel electrode region, the resist pattern 11P remains, and the surface of the photosensitive acrylic resin film 10 is covered with the resist pattern 11P.
[0035]
Next, when fluorine plasma irradiation is performed and water repellent treatment is performed, water repellency is imparted to the surface of the photosensitive acrylic resin film 10 at the hole 11e as shown in FIG. A water portion 12 is formed. At this time, in each of the contact holes 11c and 11d and the resist pattern 11P, the surface of the photosensitive acrylic resin film 10 is not exposed, so that a water repellent portion is not formed. Then, as shown in FIG. 6 (p), the entire resist pattern 11P is removed.
[0036]
Finally, as shown in FIG. 6 (q), a coating type transparent conductive material 13 such as indium tin oxide (ITO) is applied by spin coating or the like. At this time, the coating-type transparent conductive material 13 is repelled by the water repellent portion 12, so that it is applied to other portions except the water repellent portion 12. Accordingly, the coating-type transparent conductive material 13 adheres to the surface of the photosensitive acrylic resin film 10 in the pixel electrode region and fills the contact holes 11c and 11d. Further, when the coating-type transparent conductive material 13 is baked at 200 to 250 ° C., the coating-type transparent conductive material 13 attached to the pixel electrode region becomes a pixel electrode, and the coating-type transparent conductive material 13 filled in each contact hole 11c, 11d. Becomes a conductive pattern.
[0037]
The liquid crystal matrix substrate 14 shown in FIG. 6 (q) thus manufactured has a high aperture ratio because the gate electrode film or thin film transistor and the pixel electrode are three-dimensionally overlapped.
[0038]
Further, in the manufacturing process of this embodiment, since each photomask is used in the three steps of FIGS. 1B, 2E, and 5M, a total of three photo A matrix substrate for liquid crystal can be manufactured using the mask. FIG. 7 is a chart showing the role of three photomasks in the manufacturing process of this embodiment in comparison with the role of five photomasks in the conventional manufacturing process. As is apparent from the chart of FIG. 7, in the manufacturing process of this embodiment, the number of photomasks is reduced by applying the second and third photomasks for halftone exposure.
[0039]
Therefore, according to this embodiment, a liquid crystal matrix substrate with a high aperture ratio can be manufactured by three-dimensionally overlapping the gate electrode film or thin film transistor and the pixel electrode, and the number of photomasks can be reduced. be able to.
[0040]
In addition, since the pixel electrode is formed by applying a coating-type transparent conductive material such as indium tin oxide (ITO), the manufacturing cost is lower than when the pixel electrode is formed by a vacuum film forming method such as a plasma CVD method or a sputtering method. It can be kept low.
[0041]
FIG. 8 exemplifies the structure of a photomask that performs halftone exposure in this embodiment, the amount of light transmitted through the photomask, and the thickness of a resist formed by the photomask. The photomask 15 includes a transmissive portion 15A that transmits 100% of light, a light shielding portion 15B that blocks light, and a mesh portion 15C that has light transmittance set appropriately and transmits light halfway.
[0042]
A general photomask has only a transmission part 15A and a light shielding part 15B. In contrast, the photomask 15 further has a mesh portion 15C. The mesh portion 15C is formed of, for example, a mesh pattern or a slit pattern having an interval smaller than the resolution of light used. For example, when the photomask 15 is used as a positive resist, the thickness of the resist portion corresponding to the transmissive portion 15A becomes zero, that is, the resist portion disappears, and the thickness of the resist portion corresponding to the light shielding portion 15B is maximum. Thus, the thickness of the resist portion corresponding to the mesh portion 15C is proportional to the amount of transmitted light of the mesh portion 15C.
[0043]
A method of using a water-repellent resin is disclosed in, for example, JP-A-8-179113 and JP-A-8-292313 in connection with the production of a color filter.
[0044]
In the present embodiment, a pixel electrode is generated by combining a mask for performing halftone exposure and water repellent treatment by fluorine plasma irradiation. Such pixel electrode formation can also be applied to a matrix substrate of a simple matrix type liquid crystal display device.
[0045]
【The invention's effect】
As described above, according to the present invention, the resist and the electrical insulating film are patterned after halftone exposure is performed on the resist. As a result, the resist and the electrical insulating film disappear in each contact hole region, each contact hole reaching the matrix circuit is formed in the electrical insulating film, and the resist disappears in the partition region that partitions the pixel electrode region of each liquid crystal cell. Thus, the electrical insulating film is exposed. Then, the surface of the electrical insulating film exposed in the partition region is subjected to a flooding treatment, and after further removing the resist, a conductive agent is applied to the electrical insulating film. At this time, the conductive agent is repelled on the surface of the electrical insulating film in the partition region that has been subjected to the flooding treatment and is not applied here, but the conductive agent is applied to the pixel electrode region to become a pixel electrode, and the conductive agent is applied The contact hole region is filled. Thereby, a pixel electrode is formed and the contact hole is filled. Accordingly, the pixel electrode, the contact hole, and the contact hole can be filled only by using one photomask.
[0046]
Further, according to the present invention, one photomask is used for patterning the gate electrode film, and one photomask is used for forming the first and second semiconductor layers, the source / drain electrodes, and the channel region. ing. Further, as described above, one photomask is used for forming the pixel electrode, forming the contact hole, and filling the contact hole. Therefore, in order to manufacture a liquid crystal matrix substrate including this TFT active matrix circuit, it is only necessary to use a total of three photomasks.
[0047]
Further, according to the present invention, the electrical insulating film laminated on the matrix circuit is formed by application of acrylic resin, and the surface of the electrical insulating film exposed in the partition region is subjected to water irrigation treatment by fluorine-based plasma irradiation. A conductive agent serving as an electrode is a coating-type transparent conductive material. By such a process, the conductive agent is repelled on the surface of the acrylic resin in the partition area that has been subjected to the water proofing treatment and is not applied here, but the conductive agent is applied to the acrylic resin in the pixel electrode area and the pixel is applied. The contact hole region is filled with a conductive agent as an electrode. Therefore, the pixel electrode and the contact hole can be formed with high accuracy without using a photomask.
[Brief description of the drawings]
FIGS. 1A to 1C are diagrams showing respective steps in an embodiment of a method for producing a liquid crystal matrix substrate of the present invention. FIGS.
FIGS. 2D to 2F are diagrams illustrating each process subsequent to FIG.
3 (g) to (i) are diagrams showing respective steps subsequent to FIG.
4 (j) to (l) are diagrams illustrating each process subsequent to FIG. 3. FIG.
FIGS. 5 (m) and (n) are diagrams showing each step subsequent to FIG.
6 (o) to (q) are diagrams illustrating each process subsequent to FIG.
FIG. 7 is a chart showing the roles of three photomasks in the manufacturing process of the present embodiment and the roles of five photomasks in a conventional manufacturing process in comparison.
FIG. 8 is a diagram illustrating the structure of a photomask that performs halftone exposure, the amount of light transmitted through the photomask, and the thickness of a resist formed by the photomask in this embodiment.
FIGS. 9A to 9C are diagrams showing respective steps in a conventional manufacturing method of a liquid crystal matrix substrate. FIGS.
FIGS. 10D to 10F are diagrams illustrating each process subsequent to FIG.
11 (g) to (i) are diagrams illustrating each process subsequent to FIG.
12 (j) to (l) are diagrams illustrating each process subsequent to FIG.
FIGS. 13 (m) to (o) are views showing each step subsequent to FIG.
14 (p) is a diagram showing a step subsequent to FIG. 13. FIG.
[Explanation of symbols]
1 Glass substrate
2 Gate electrode film
3,8 resist pattern
4 Gate insulation film
5 First semiconductor layer
6 Second semiconductor layer
7 Source / drain electrode film
9 Passivation film
10 Photosensitive acrylic resin film
11 resist layer
12 Water repellent part
13 Coating type transparent conductive material
14 Liquid crystal matrix substrate

Claims (3)

In a method for manufacturing a liquid crystal matrix substrate, a matrix circuit for driving a plurality of liquid crystal cells is formed on an electrically insulating substrate.
An electric insulating film forming step of laminating an electric insulating film on a matrix circuit on the electric insulating substrate;
Resist is applied to the electrical insulating film, and then the resist in the pixel electrode area of each liquid crystal cell is cured in a range excluding the contact hole area in each pixel electrode area by halftone exposure with an adjusted exposure amount. A resist forming step of half-curing the resist in the partition region partitioning the pixel electrode region, and uncuring the resist in each contact hole region;
By partitioning the resist and the electrical insulating film, the resist and the electrical insulating film disappear in each contact hole region, each contact hole reaching the matrix circuit is formed in the electrical insulating film, and the pixel electrode region of each liquid crystal cell is partitioned. A patterning step of removing the resist in the region and exposing the electrical insulating film in the partition region;
A submerged water treatment step of subjecting the surface of the electrical insulating film exposed in the partition region to a submerged water treatment;
And a pixel electrode formation step of forming a pixel electrode in a pixel electrode region by removing the remaining resist, applying a conductive agent to the patterned electrical insulating film, and a method for manufacturing a matrix substrate for liquid crystal. The matrix circuit is a TFT active matrix circuit including a plurality of thin film transistors,
The manufacturing process of TFT active matrix circuit is
A gate electrode film patterning step of forming and patterning a gate electrode film on an electrically insulating substrate; and
A stacking step of sequentially stacking a gate insulating film, a first semiconductor layer serving as a channel region of each thin film transistor, a second semiconductor layer serving as an ohmic contact layer, and a metal layer serving as a source / drain electrode;
A separation patterning step of forming first and second semiconductor layers in an island shape by forming halftone exposure and patterning with adjusted exposure, forming source / drain electrodes, and forming a channel region;
A method for manufacturing a liquid crystal matrix substrate according to claim 1, further comprising a passivation step of forming a passivation film. An electrical insulation film to be laminated on the matrix circuit is formed by application of acrylic resin, and the surface of the electrical insulation film exposed in the partition region is subjected to water irrigation treatment by fluorine plasma irradiation, and a conductive agent that becomes a pixel electrode is applied. 3. The method for producing a liquid crystal matrix substrate according to claim 1, wherein the transparent conductive material is used.

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