JP3846377B2 - Manufacturing method of semiconductor device - Google Patents

Description

【００３６】
要するに、本実施例による半導体装置の製造方法は、以下に述べるような特徴を有するものである。
単結晶シリコン層２１Ｃに対してディープトレンチ構造の絶縁分離トレンチ２３及び浅部トレンチ２４の双方を形成するに当たって、絶縁分離トレンチ２３を形成するための第１のエッチング工程と、浅部トレンチ２４を形成するための第２のエッチング工程とを、同一の反応性イオンエッチング装置を利用して実行できる。具体的には、第１及び第２のエッチング工程は、ワーク（ＳＯＩ基板２１）を反応性イオンエッチング装置のエッチング室内に設置したままの状態で、反応性ガスを、単結晶シリコン及び酸化シリコン間のエッチング選択比が高いものから低いものへ切り替えることにより連続して実行できる。また、絶縁分離トレンチ２３及び浅部トレンチ２４を形成する際に、トレンチエッチングマスク３２のための成膜工程（図１（ａ））及び開口部形成工程（図１（ｂ））、ディープトレンチ２３ａ及びトレンチ２４ａを酸化シリコン膜３４により埋め戻すためのトレンチ埋め戻し工程（図２（ｇ））、その酸化シリコン膜３４及び酸化シリコン膜２９を化学的機械的研磨法などにより除去する平坦化工程（図２（ｈ））、トレンチエッチングマスク３２を構成する窒化シリコン膜２８及び酸化シリコン膜２７を除去するための除去工程（図２（ｉ）、（ｊ））、単結晶シリコン層２１Ｃの表面に熱酸化膜２６を形成するための熱酸化工程（図２（ｋ））を互いに兼用できるようになる。この結果、単結晶シリコン層２１Ｃに対しディープトレンチ構造の絶縁分離トレンチ２３及びＳＴＩ技術による浅部トレンチ２４の双方を形成する場合、それら絶縁分離トレンチ２３及び浅部トレンチ２４の製造工程を個別に行う場合に比べて、必要となる製造工程が格段に減ることになり、従って、プロセスコストの大幅な抑制が可能になる。
【００３７】
（他の実施の形態）
その他、本発明は上記した実施例に限定されるものではなく、以下に述べるような変形或いは拡張が可能である。
単結晶シリコン基板２１Ａを支持基板としたＳＯＩ基板２１を利用する例で説明したが、支持基板の材料としては、単結晶シリコン基板に限らず、他の半導体基板或いは絶縁性を有するセラミック基板やガラス基板などを用いることができ、特に、絶縁性を有する基板を用いる場合には絶縁分離層（上記した各実施例の場合、酸化シリコン膜より成る絶縁分離層２１Ｂ）が不要になる（例えば、ＳＯＳ（Silicon On Sapphire ）基板を用いる場合が該当する）。
【図面の簡単な説明】
【図１】本発明の一実施例による製造工程の流れを示す模式的断面図その１
【図２】製造工程の流れを示す模式的断面図その２
【図３】製造対象の半導体装置の模式的断面図
【図４】従来例による製造工程の流れを示す模式的断面図その１
【図５】従来例による製造工程の流れを示す模式的断面図その２
【図６】従来例による製造工程の流れを示す模式的断面図その３
【図７】従来例による製造工程の流れを示す模式的断面図その４
【符号の説明】
２１はＳＯＩ基板、２１Ａは単結晶シリコン基板（支持基板）、２１Ｂは絶縁分離層、２１Ｃは単結晶シリコン層（半導体層）、２３は絶縁分離トレンチ、２３ａはディープトレンチ、２４は浅部トレンチ、２４ａはトレンチ、２６は熱酸化膜、２７は酸化シリコン膜（絶縁膜）、２８は窒化シリコン膜（ストッパ膜）、２９は酸化シリコン膜（マスク膜）、３０は絶縁分離トレンチ用開口部、３１は浅部トレンチ用開口部、３２はトレンチエッチングマスク、３３は熱酸化膜、３４は酸化シリコン膜を示す。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a semiconductor device including an insulating isolation trench having a deep trench structure and a shallow trench by STI (Shallow Trench Isolation) technology.
[0002]
[Prior art]
In recent years, there is an increasing demand for semiconductor devices using bipolar CMOS technology for applications such as communication LSIs. In such a semiconductor device, an SOI substrate useful for a low-power device is used, and an isolation trench having a deep trench structure is formed in order to improve insulation of the bipolar transistor region, while an element in a CMOS element portion is formed. In order to reduce the isolation width and increase the degree of integration, it is considered to form shallow trenches by the STI technique instead of the conventional LOCOS film. In the case of manufacturing such a semiconductor device, a manufacturing method in which a process for forming an isolation trench and a process for forming a shallow trench are separately performed has been conventionally employed.
[0003]
Specifically, the insulating isolation trench is formed through a manufacturing process schematically shown in FIGS. 4 and 5, and the shallow trench is formed through a manufacturing process schematically shown in FIGS. 6 and 7. Hereinafter, the contents of each process will be described individually. However, the dimensional ratios in FIGS. 4 to 7 are not accurate.
[0004]
(1) Manufacturing Process of Insulation Isolation Trench (1) Film Formation Process First, as shown in FIG. 4A, a single crystal silicon is formed on a single crystal silicon substrate 1A via an insulation isolation layer 1B made of a silicon oxide film. An SOI substrate 1 on which a layer 1C is formed is prepared, and a silicon oxide film 2 serving as an insulating film is formed on the single crystal silicon layer 1C by thermal oxidation, and then a silicon nitride film 3 serving as a stopper film and a mask film are formed. The silicon oxide films 4 to be formed are sequentially formed by the CVD method or the like.
[0005]
(2) Opening formation step After this, as shown in FIG. 4 (b), the three-layer structure film of the silicon oxide film 2, the silicon nitride film 3, and the silicon oxide film 4 is patterned by a photoetching technique. A trench etching mask (no symbol) having a layer structure having an opening 5 at a position is formed.
[0006]
(3) Trench etching process After the mask formation process as described above, the anisotropic dry etching with the silicon oxide film 4 as a mask is performed on the single crystal silicon layer 1C, as shown in FIG. As shown, a deep deep trench 6 reaching the insulating isolation layer 1B is formed.
[0007]
(4) Side Wall Oxidation Step After the trench etching step is performed, the side wall oxide film 7 is formed by thermally oxidizing the side walls of the deep trench 6 (see FIG. 4D).
[0008]
(5) Trench backfilling process By depositing polysilicon on the entire surface of the silicon oxide film 4 by CVD, a polysilicon film 8 in a state where the deep trench 6 is backfilled is formed (see FIG. 4E). ).
[0009]
{Circle around (6)} First Etchback Process The polysilicon film 8 is etched back to the surface of the silicon oxide film 4 by performing a CMP (chemical mechanical polishing) process using the silicon oxide film 4 as a stopper or anisotropic etching. (See FIG. 5 (f)).
[0010]
(7) Mask removal process The silicon oxide film 4 used as a trench etching mask is removed by wet etching using the silicon nitride film 3 as a stopper (see FIG. 5G).
[0011]
(8) Second etch back step The polysilicon film 8 protruding above the deep trench 6 is removed to the surface of the silicon oxide film 2 by dry etching using the silicon nitride film 3 as a mask (FIG. 5H). reference).
[0012]
(9) Mask removal and oxidation process After the silicon nitride film 3 and the silicon oxide film 2 are sequentially removed by wet etching, the surface of the single crystal silicon layer 1C is thermally oxidized to form an oxide film 9 (FIG. 5 (i)). reference).
[0013]
(2) Shallow Trench Manufacturing Process (1) Film Forming Process Similar to the above-described insulating isolation trench manufacturing process, silicon oxide film 2, silicon nitride film 3 and silicon oxide film 4 as shown in FIG. Are sequentially formed on the single crystal silicon layer 1C.
[0014]
(2) Opening formation step After that, as shown in FIG. 6B, the three-layer structure film is patterned by a photoetching technique to form a layer structure trench etching mask having openings 10 at predetermined positions. (Unsigned) is formed.
[0015]
(3) Trench Etching Step After the mask forming step as described above, anisotropic dry etching with the silicon oxide film 4 as a mask is performed on the single crystal silicon layer 1C to obtain FIG. 6 (c). A trench 11 as shown is formed.
[0016]
(4) Trench backfilling process Silicon oxide is deposited on the entire surface of the silicon oxide film 4 by the CVD method to form a silicon oxide film 12 in a state where the trench 11 is backfilled (see FIG. 6D). .
[0017]
{Circle around (5)} Etch-back process By performing a CMP process using the silicon nitride film 3 as a stopper, the silicon oxide films 12 and 4 are etched back to the surface of the silicon nitride film 3 (see FIG. 7E).
[0018]
(6) Mask removal and oxidation process After the silicon nitride film 3 and the silicon oxide film 2 are sequentially removed by wet etching, the surface of the single crystal silicon layer 1C is thermally oxidized to form an oxide film 13 (FIG. 7F). reference).
[0019]
[Problems to be solved by the invention]
The process of forming an isolation trench having a deep trench structure is very complicated, and the process of forming a shallow trench is also complicated accordingly. Therefore, the isolation trench and the shallow trench are individually separated. However, the conventional method for manufacturing a semiconductor device has a problem in that the process cost increases and it is difficult to reduce the product cost.
[0020]
The present invention has been made in view of the above circumstances, and an object of the present invention is to suppress the process cost when forming both an isolation trench having a deep trench structure and a shallow trench by STI technology on a semiconductor layer. An object of the present invention is to provide a method for manufacturing a semiconductor device.
[0021]
[Means for Solving the Problems]
According to the method for manufacturing a semiconductor device according to claim 1, the first etching step for forming the isolation trench in forming both the isolation trench and the shallow trench having the deep trench structure in the semiconductor layer. And the second etching step for forming the shallow trench can be performed using the same reactive ion etching apparatus. Specifically, the first and second etching steps can be executed continuously by switching the reactive gas while the workpiece is still installed in the etching chamber of the reactive ion etching apparatus. Further, when forming the insulating isolation trench and the shallow trench, a film forming step and an opening forming step for the trench etching mask, a removal step for removing the stopper film and the insulating film constituting the trench etching mask, In addition to a thermal oxidation process for forming a thermal oxide film on the surface of the semiconductor layer, a shallow trench backfill and an etch back (planarization) process using a deep trench / STI technique can be used together. As a result, in forming both the isolation trench having a deep trench structure and the shallow trench by the STI technique on the semiconductor layer, it is necessary as compared with the case where the manufacturing steps of the isolation trench and the shallow trench are individually performed. As a result, the number of manufacturing steps can be greatly reduced, and thus the process cost can be greatly reduced.
[0022]
According to the method of manufacturing a semiconductor device according to claim 2, the oxide semiconductor film in a state where the region facing the opening for the shallow trench in the semiconductor layer is covered with the opening for the isolation trench and the shallow portion in the semiconductor layer. A thermal oxidation step for forming a thermal oxide film in a region facing the trench opening and an oxide film removal step for removing a portion of the thermal oxide film corresponding to the insulating isolation trench opening are ensured. Can be formed.
[0023]
DETAILED DESCRIPTION OF THE INVENTION
An embodiment of the present invention will be described below with reference to FIGS.
FIG. 3 schematically shows a partial cross-sectional structure of a semiconductor device manufactured by the manufacturing method of this embodiment (the dimensional ratio is not accurate). In FIG. 3, a semiconductor device to be manufactured is, for example, a bipolar CMOS, and a single crystal is formed on a single crystal silicon substrate 21A (corresponding to a support substrate in the present invention) via an insulating isolation layer 21B made of a silicon oxide film. It is formed using an SOI substrate 21 on which a silicon layer 21C (corresponding to a semiconductor layer) is formed. In this case, the single crystal silicon layer 21C includes an element formation region 22a for forming a bipolar transistor which is a circuit element for large current driving and high speed operation, and a CMOS which is a circuit element having high integration and low power consumption. An element forming region 22b for forming is formed, and an insulating isolation trench 23 having a deep trench structure reaching the insulating isolation layer 21B is formed in order to electrically isolate the element forming regions 22a and 22b. The A shallow trench 24 is formed in the CMOS element formation region 22b by STI (Shallow Trench Isolation) technology. The insulating isolation trench 23 and the shallow trench 24 are filled with silicon oxide 25, and a thermal oxide film 26 is formed on the single crystal silicon layer 21C.
[0024]
1 and 2 each show a process for manufacturing the semiconductor device as described above with a schematic cross-sectional view (the dimensional ratio is not accurate). Hereinafter, the contents of each process will be individually described. explain.
[0025]
(1) Film formation process As shown in FIG. 1A, after a silicon oxide film 27 (corresponding to an insulating film) is formed on the single crystal silicon layer 21C of the SOI substrate 21 by thermal oxidation, a silicon nitride film is formed. 28 (corresponding to a stopper film) and a silicon oxide film 29 (corresponding to a mask film) are sequentially formed in a laminated form. Here, the silicon oxide film 29 functions as an etching mask when the single crystal silicon layer 21C is anisotropically etched to form a trench. The silicon nitride film 28 functions as a stopper when the silicon oxide film 29 is removed, and the silicon oxide film 27 serves to relieve stress when the silicon nitride film 28 is formed. Is.
[0026]
(2) Opening formation step As shown in FIG. 1 (b), the three-layered laminated film formed by the above-described film forming step corresponds to the formation position of the insulating isolation trench 23 and the shallow trench 24, respectively. By forming the insulating isolation trench opening 30 and the shallow trench opening 31, a trench etching mask 32 having a layer structure is formed.
[0027]
(3) Oxide film formation process This process is constituted by sequentially performing a thermal oxidation step and an oxide film removal step. In the thermal oxidation step, by performing an oxidation process using a thermal oxidation apparatus, as shown in FIG. 1C, the insulating trench opening 30 and the shallow trench opening 31 in the single crystal silicon layer 21C. A thermal oxide film 33 is formed in the region facing the surface. Further, in the oxide film removal step, for example, dry etching is performed in a state where a mask in which only a portion corresponding to the insulating isolation trench opening 30 is open is formed, so that the insulating isolation trench opening 30 in the thermal oxide film 33 is formed. The portion corresponding to is removed, and then the mask is also removed by etching (see FIG. 1D). Therefore, the portion of the thermal oxide film 33 corresponding to the shallow trench opening 31 is left as it is.
[0028]
(4) First etching step Reactive ion etching (RIE) using the trench etching mask 32 is performed based on a reactive gas (for example, bromine (Br)) having a high etching selectivity between single crystal silicon and silicon oxide. The single crystal silicon layer 21 </ b> C corresponding to the insulating isolation trench opening 30 is anisotropically etched to form a deep trench 23 a corresponding to the insulating isolation trench 23. (See FIG. 1 (e)). In this case, as shown in the drawing, the bottom of the deep trench 23a does not need to reach the insulating separation layer 21B, and the bottom is only the thickness determined according to the etching amount in the second etching step described later. It is desirable to leave the single crystal silicon layer 21C.
[0029]
(5) Second etching process Reactive ion etching using the trench etching mask 32 is changed to a reactive gas (for example, a chemical gas based on fluorine) having a low etching selectivity between single crystal silicon and silicon oxide. By performing switching, the thermal oxide film 33 and the single crystal silicon layer 21C corresponding to the shallow trench opening 31 are anisotropically etched, thereby forming the trench 24a corresponding to the shallow trench 24 (FIG. 1 (f)). Note that the bottom of the deep trench 23a reaches the insulating isolation layer 21B in accordance with the execution of the second etching step.
[0030]
{Circle around (6)} Trench backfilling process The deep trench 23a and the trench 24a are backfilled by depositing the silicon oxide film 34 by chemical vapor deposition (CVD) (see FIG. 2G).
[0031]
(7) Planarization process The silicon oxide film 34 and the silicon oxide film 29 deposited in the trench backfilling process are removed by a chemical mechanical polishing (CMP) method using the silicon nitride film 28 as a stopper to obtain a processed surface. Is flattened (see FIG. 2H). In accordance with this planarization, the silicon oxide film 34 becomes the buried silicon oxide 25 shown in FIG.
[0032]
(8) Removal Step First, the silicon nitride film 28 is removed by performing wet etching with a phosphoric acid-based etchant (see FIG. 2 (i)). Next, the silicon oxide film 27 is removed by performing wet etching with a hydrofluoric acid-based etching solution (see FIG. 2J).
[0033]
{Circle around (9)} Thermal Oxidation Process A thermal oxide film 26 is formed on the surface of the single crystal silicon layer 21C by executing an oxidation process using a thermal oxidation apparatus (see FIG. 2 (k)). Such a semiconductor device is completed.
[0034]
The reactive gas and flow rate used for reactive ion etching can be determined in consideration of the characteristics shown in the table below.
[0035]
[Table 1]

[0036]
In short, the semiconductor device manufacturing method according to the present embodiment has the following characteristics.
In forming both the isolation trench 23 and the shallow trench 24 having a deep trench structure with respect to the single crystal silicon layer 21 </ b> C, a first etching step for forming the isolation trench 23 and the shallow trench 24 are formed. The second etching step for performing can be performed using the same reactive ion etching apparatus. Specifically, in the first and second etching steps, the reactive gas is changed between the single crystal silicon and the silicon oxide while the work (SOI substrate 21) is kept in the etching chamber of the reactive ion etching apparatus. This can be performed continuously by switching from a high etching selectivity to a low etching selectivity. Further, when forming the insulating isolation trench 23 and the shallow trench 24, a film forming process (FIG. 1A) and an opening forming process (FIG. 1B) for the trench etching mask 32, a deep trench 23a. And a trench backfilling step (FIG. 2G) for backfilling the trench 24a with the silicon oxide film 34, and a planarizing step (FIG. 2G) for removing the silicon oxide film 34 and the silicon oxide film 29 by a chemical mechanical polishing method or the like. 2 (h)), a removal step (FIGS. 2 (i) and (j)) for removing the silicon nitride film 28 and the silicon oxide film 27 constituting the trench etching mask 32, the surface of the single crystal silicon layer 21C is removed. The thermal oxidation process (FIG. 2 (k)) for forming the thermal oxide film 26 can be used together. As a result, when both the isolation trench 23 having the deep trench structure and the shallow trench 24 by the STI technique are formed on the single crystal silicon layer 21C, the manufacturing process of the isolation trench 23 and the shallow trench 24 is individually performed. Compared to the case, the required manufacturing process is remarkably reduced, and thus the process cost can be greatly reduced.
[0037]
(Other embodiments)
In addition, the present invention is not limited to the above-described embodiments, and can be modified or expanded as described below.
Although the example using the SOI substrate 21 using the single crystal silicon substrate 21A as the support substrate has been described, the material of the support substrate is not limited to the single crystal silicon substrate, and other semiconductor substrates or ceramic substrates or glass having insulating properties. A substrate or the like can be used. In particular, when an insulating substrate is used, the insulating isolation layer (the insulating isolation layer 21B made of a silicon oxide film in each of the above embodiments) becomes unnecessary (for example, SOS). (Silicon On Sapphire) This applies when using a substrate).
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view showing the flow of a manufacturing process according to an embodiment of the present invention, part 1
FIG. 2 is a schematic cross-sectional view showing the flow of a manufacturing process, part 2
FIG. 3 is a schematic cross-sectional view of a semiconductor device to be manufactured. FIG. 4 is a schematic cross-sectional view showing a flow of a manufacturing process according to a conventional example.
FIG. 5 is a schematic cross-sectional view showing the flow of the manufacturing process according to the conventional example 2
FIG. 6 is a schematic cross-sectional view showing the flow of the manufacturing process according to the conventional example 3
FIG. 7 is a schematic cross-sectional view showing the flow of the manufacturing process according to the conventional example 4
[Explanation of symbols]
21 is an SOI substrate, 21A is a single crystal silicon substrate (support substrate), 21B is an insulating isolation layer, 21C is a single crystal silicon layer (semiconductor layer), 23 is an insulating isolation trench, 23a is a deep trench, 24 is a shallow trench, 24a is a trench, 26 is a thermal oxide film, 27 is a silicon oxide film (insulating film), 28 is a silicon nitride film (stopper film), 29 is a silicon oxide film (mask film), 30 is an opening for insulating isolation trenches, 31 Is a shallow trench opening, 32 is a trench etching mask, 33 is a thermal oxide film, and 34 is a silicon oxide film.

Claims (2)

Both a semiconductor trench formed on a supporting substrate in a state of being electrically insulated from the supporting substrate, both an insulating isolation trench having a deep trench structure reaching the insulating function portion and a shallow trench by STI (Shallow Trench Isolation) technology In the manufacturing method of the semiconductor device formed by forming
A film forming step of sequentially forming an insulating film, a stopper film made of a material having etching selectivity with respect to an oxide semiconductor, and a mask film made of an oxide semiconductor on the semiconductor layer,
A trench etching mask having a layer structure is formed by forming an insulating isolation trench opening and a shallow trench opening corresponding to the formation position of the insulating isolation trench and the shallow trench in the laminated film formed by the film forming step, respectively. Forming an opening, and
An oxide film forming step in which a region facing the opening for the shallow trench in the semiconductor layer is covered with an oxide semiconductor film;
Opening the insulating isolation trench by anisotropically etching the semiconductor layer by performing reactive ion etching using the trench etching mask using a reactive gas having a high etching selectivity between a semiconductor and an oxide semiconductor. A first etching step of forming a deep trench at a position corresponding to the portion;
Reactive ion etching using the trench etching mask is performed using a reactive gas having a low etching selectivity between the semiconductor and the oxide semiconductor, whereby the oxide semiconductor film and the semiconductor layer are anisotropically etched to perform the shallow etching. A second etching step of forming a trench at a position corresponding to the opening for the partial trench;
A trench backfilling step of backfilling the deep trench and the trench by depositing an oxide semiconductor film by chemical vapor deposition;
A planarization step of planarizing a processing surface by removing the oxide semiconductor film and the mask film deposited in the trench backfilling step by a chemical mechanical polishing method using the stopper film as a stopper;
A removing step of removing the stopper film and the insulating film;
A method of manufacturing a semiconductor device, comprising performing a thermal oxidation step of forming a thermal oxide film on a surface of the semiconductor layer. The oxide film forming step includes
A thermal oxidation step of forming a thermal oxide film in a region facing the insulating isolation trench opening and the shallow trench opening in the semiconductor layer;
2. The method of manufacturing a semiconductor device according to claim 1, wherein the thermal oxide film is combined with an oxide film removing step of removing a portion corresponding to the insulating isolation trench opening.

Images