JP3838998B2 - Automatic test program generation system - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to a system for testing an information processing apparatus, and more particularly to a test program automatic generation system that automatically generates a test program.
[0002]
[Prior art]
In a conventional test program automatic generation system, a test program is automatically generated as follows.
(1) Test generation by function specification
In the automatic generation of a test program, a test program is generated for each function to be tested such as a register interference test, an operand interference test, and an exceptional event test.
[0003]
When generating a test program for each function as described above, the conventional test program automatic generation system divides the generation means for each function under test into independent control program units, and the instruction under test is also a load instruction. Instead of controlling separately for each instruction type (instruction format) such as a store instruction, a branch instruction, and an operation instruction, the control is performed by a single appearance frequency setting table.
[0004]
FIG. 16 is a diagram illustrating automatic generation of a test program by specifying a test function as an example of a conventional independent control program unit.
In the figure, 11 is a screen control unit, 13 is a screen information file, 15 is an initial setting unit, 18 is an instruction generation mechanism unit, 22 is a test instruction sequence, and 24 is an execution control unit.
[0005]
Information arbitrarily set for the function A is stored in the test function A designated value 14 of the screen information file 13 by the manual operation 12 of the test function A from the screen control unit 11 including a keyboard and a display.
The initial setting unit 15 includes a random number generator 16 and an appearance frequency operation unit 17, and the appearance frequency operation unit 17 executes an instruction described in the appearance frequency setting unit 19 based on the test function A designated value 14. Change the appearance frequency.
[0006]
The instruction generation mechanism unit 18 includes an instruction generation table 20 that stores instructions and a generation instruction setting unit 21. Then, an instruction is generated from the instruction generation table 20 based on the random number value from the random number generator 16 and the contents of the appearance frequency setting unit 19, and the test instruction sequence 22 is set by the generation instruction setting unit 21.
The execution control unit 24 includes a generation instruction incorporation control unit 25, a generation instruction execution control unit 26, a software simulator 27, correct answer information collection / incorporation control unit 28, and a test program area 29.
[0007]
The generation instruction incorporation control unit 25 incorporates the test instruction sequence 22 in the test program area 29, and the test instruction sequence in the test program area 29 is executed by the generation instruction execution control unit 26 using the software simulator 27. Then, the execution result is incorporated into the test program area 29 as correct information by the correct information collection / embedding control unit 28.
(2) Instruction generation for each test item
In the conventional test program automatic generation system, when the instruction generation unit is changed for each function to be tested, it is divided into control program units, the generation unit is configured independently, and special control processing is supported. .
(3) Setting the program name
In the conventional test program automatic generation system, an arbitrarily designated program number is used as the program name. Further, when a plurality of test program names (specified by numbers) are specified, the program numbers are set in order from an arbitrarily specified program number.
[0008]
FIG. 17 is a diagram for explaining setting of a conventional program name. In the figure, 31 is a screen control unit, 35 is a screen information file, 40 is a test item control unit, 41 is an appearance frequency control unit, 43 is a command generation control unit, 44 is a test command sequence, 52 is a number control unit, 45 Indicates an execution control unit.
Information arbitrarily set by the manual operation 32 of the test function A of the screen control unit 31 is stored in the test function A designated value 36 of the screen information file 35.
[0009]
Further, the test program number 37 and the test program name 38 (for example, the upper three digits of the test program number) are set in the screen information file 35 by the manual operation 33 of the number of test programs and the manual operation 34 of the test program name.
The number control unit 52 includes an end counter 53, a register 54, a program number setting unit 55, and a next generation repetition control unit 56.
[0010]
The first test program is set in the register 54 by setting the test program name 38 in the register 54 and setting the number of test programs 37 in the end counter 53.
Further, a test instruction sequence 44 is generated by the test item control unit 40, the appearance frequency control unit 41, and the instruction generation control unit 43, and is set in the register 54 for one test program 50 generated by the execution control unit 45. The test program name is given by the program number setting unit 55.
[0011]
The next generation repetition control unit 56 repeats the generation of the test program from the instruction generation control unit 43 until the end counter 53 becomes zero.
Thereby, for example, a program name having upper three digits set manually and a lower three digits number determined according to the number of programs is set.
(4) Initial value (seed value) setting
In the conventional test program automatic generation system, the seed value is automatically set. FIG. 18 is a diagram for explaining setting of a conventional initial value (seed value).
[0012]
In the figure, 60 is a timer, 61 is a screen information file, 63 is a pseudo-random number generator, 64 is a test item control unit, 65 is an appearance frequency control unit, 67 is a command generation control unit, 70 is a test command sequence, and 77 is a test command sequence. Each execution control unit is shown.
Data obtained from the timer 60 is set as an initial value (seed value) 62 and used as an initial value of the pseudorandom number generator 63.
[0013]
Based on the random number value of the pseudo random number generator 63, the test item control unit 64, the appearance frequency control unit 65, and the instruction generation control unit 67 obtain the test instruction sequence 70, and the execution control unit 75 executes the obtained test instruction sequence 70. And generate a test program.
(5) Program generation based on instruction ID
In the conventional test program automatic generation system, (1) instruction ID setting, (2) number of instructions to be tested, (3) setting of program under test, (4) operand setting of access instruction, (5) branch instruction Operand setting, (6) Operand range setting, (7) Execution result (correct answer information) storage, (8) Check point instruction setting, and (9) Initial setting were performed as follows.
(1) Instruction ID setting
The instruction ID is a number (for example, 00, 01, 02...) Assigned to each instruction such as load and store in a one-to-one correspondence, and the appearance frequency control unit outputs the instruction ID, and the instruction generation table The operand part is added to output an instruction corresponding to the instruction ID.
[0014]
The instruction ID for generating the instruction under test has always been set by obtaining random data from a random data generator.
(2) Number of instructions to be tested
Since the set area is fixed, the number of instructions under test is targeted for instructions under test that can be set within a fixed range.
(3) Setting the program configuration to be tested
A fixed area is set and used for the initial address of the initial processing section, interrupt table, and address space table in the test program area. Also, the start address and area range of the access area, instruction generation area, and execution result (hereinafter referred to as correct answer information) storage area of the generated instruction sequence are used in a fixed area.
(4) Operand setting of access instruction
Since the access data area is fixed, an access instruction is generated based on the start address and area range.
(5) Operand setting of branch instruction
As an operand (logical address) for branching, a branch instruction is generated based on a branch range calculated from a value based on an address space table.
(6) Operand range setting
All operand ranges of access instructions and branch instructions were set at random. (7) Storing correct answer information (execution results)
For storing the correct answer information (execution results) of the generated instruction sequence, various correct answer information (execution results) are stored in a designated fixed storage area.
(8) Check point instruction setting
The number of check point instructions such as an instruction that generates an interrupt (for example, SVC) is set to a fixed value. The set number was determined by the size of the fixed instruction area under test.
(9) Initial setting section
In the conventional test program generation system, the control of all the functions to be tested is performed by one initial setting unit.
[0015]
FIG. 19 is a diagram for explaining program generation based on an instruction ID.
In the figure, 81 is a pseudo-random number generator, 82 is an appearance frequency control unit, 86 is an instruction generation control unit, 89 is a test instruction sequence, and 98 is an execution control unit.
The appearance frequency control unit 82 includes a test 11 to nn dedicated appearance frequency table 83, a determination unit 84, and test items 11 to nn control unit 85.
[0016]
The determination unit 84 determines the random number value from the pseudo random number generator 81 and the setting instruction of the test items 11 to nn control unit 85, and generates the test items 11 to nn according to the test items 11 to nn. Take out the target instruction ID.
The instruction generation control unit 86 includes an instruction generation table 87, a generation instruction setting unit 88, a check point control unit 96, and a generation instruction number counter 97.
[0017]
Based on the instruction ID to be generated, an instruction to be tested is generated from the random value from the pseudo random number generator 81 and the instruction generation table 87, and set in the test instruction sequence 89 by the generation instruction setting unit 88.
In the generated instruction setting unit 88, the check point control unit 96 inserts the check point instruction between the instruction sequences to be tested, and the generated instruction number counter 97 in which a fixed value is set, the instruction to be tested up to the maximum value. Is generated.
[0018]
The instruction generation table 87 is set to access only the range of the access data area defined in the fixed address E of the test program area 95.
The execution control unit 98 includes a generation instruction incorporation control unit 91, a generation instruction execution control unit 92, a software simulator 93, and correct information collection / embedding control unit 94.
[0019]
The instructions under test 1 to n in the test instruction sequence 89 are set to the fixed address F of the test program area 95 by the generation instruction incorporation control unit 91.
The initial processing unit, interrupt table, and address conversion table of the test program area 95 are set at predetermined addresses.
In the correct answer area of the test program area 95, the result executed by the generated instruction execution control unit 92 and the software simulator 93 is set to the solid address D by the correct answer information collection / embedding control part 94.
(6) Designation operation
In the conventional test program automatic generation system, the designation operation is performed only on the generation screen. That is, as shown in FIG. 17, when a manual operation is performed by the screen control unit 31, a specified value is set in the screen information file, and a test is generated based on the specified value.
[0020]
[Problems to be solved by the invention]
As described above, the conventional automatic test program generation system has the following problems.
(1) The instruction type could not be specified because the command to be tested was not controlled separately for each instruction type, and the appearance frequency setting table was controlled by one.
(2) Since the generation means is different for each function to be tested, the structure is divided for each function, and the control is complicated and the scale is large.
(3) The test program name is the program name specified arbitrarily, and in the case of multiple designations, the test program name is set in order from the arbitrarily designated program number, so the test program name is self-managed It was necessary and complicated.
(4) The seed value, which is the initial data for generating the test program, was automatically set as a random value, so it was difficult to regenerate.
(5) Since the number of instructions to be tested is targeted for the number of instructions that can be set in the designated instruction area (fixed), it is not easy to cope with the test program execution time (longer or shorter).
(6) Since the instruction ID for generating the instruction under test has always been set by obtaining random data from a pseudo random number generator, it is difficult to set the intended instruction ID.
(7) As the configuration of the common control unit of the program under test, the initial address of the initial processing unit, the interrupt table, and the address space table uses a fixed area. If you want to move, you have to change the common control unit.
(8) Since the start address and area range of the access area, instruction generation area, and correct information (execution result) storage area are fixed, it is not easy to cope with the test program execution time (longer or shorter). However, there is a drawback that it is difficult to generate large and small test programs.
(9) Since the operand area of the access instruction has a fixed access area, it is only possible to generate an access instruction based on the head address and the area range. Moreover, the branch operand (logical address) can only generate a branch instruction based on the branch range calculated from the value based on the address space table. Furthermore, if all the operand ranges of the access instruction and the branch instruction are set at random, there is a drawback that the hit rate for the TLB (address translation buffer) becomes very bad when the instruction under test is executed.
(10) The correct answer information (execution result) of the instruction under test is stored in the specified fixed storage area because various correct answer information (execution result) is stored. There were drawbacks.
(11) Since the number of check point instructions set is a fixed value and is determined by the size of the fixed instruction area under test, the check point instruction setting can be easily changed. could not.
(12) Since the test program to be tested controls all the functions of the test target with one initial setting unit, the initial setting unit tends to become enormous due to the addition of the function to be tested. There were drawbacks.
(13) The designation operation is performed only on the generation screen. When a plurality of generation screens are used, all setting operations are required, which causes a problem that the operation becomes complicated and difficult.
[0021]
The present invention has been made to remedy the above-mentioned drawbacks of the prior art, and the first object of the present invention is to provide an initial processing section in the test program area, an interrupt table, a head address of an address space table, and an access. A test program automatic generation system that can easily change the start address and area range of the area, instruction generation area, correct answer information (execution result) storage area, and can respond to the test program execution time (longer or shorter) It is to provide.
[0022]
A second object of the present invention is to enable generation of an instruction corresponding to an operand address of an access instruction and an operand (logical address) address for branching, and hit a TLB (address translation buffer) when executing the instruction under test. An object is to provide an automatic test program generation system that improves the rate.
A third object of the present invention is to provide an automatic test program generation system that does not exceed a special correct answer information storage area in storing correct answer information (execution results) of a command under test.
[0023]
A fourth object of the present invention is to provide an automatic test program generation system in which the setting can be easily changed with respect to the set number of check point instructions in the instruction under test.
A fifth object of the present invention is to provide an automatic test program generation system capable of handling each function even if the function of the initial setting unit becomes enormous due to the addition of the function to be tested.
[0024]
[Means for Solving the Problems]
FIGS. 1 to 3 are principle diagrams of the present invention. FIG. 1 shows a schematic configuration of a test program automatic generation system capable of controlling an object to be tested according to an instruction type and a function in the present invention. 2 shows a configuration of claims 1 to 8 of the present invention, and FIG. 3 shows a schematic configuration of a test program automatic generation system that does not complicate the operation even if a plurality of designated operation generation screens are provided.
In FIG. 1 to FIG. 3, 1 is a connection control means for generating an output for selecting the appearance frequency by combining the test function designated by the operation means 6 and the instruction type, and 2 is the appearance of an instruction for testing the object under test. Appearance frequency setting means for setting the frequency, 3 is an instruction generating means for generating an instruction to be tested, 4 is to execute the instruction under test generated by the instruction generating means 3, and correct information is incorporated into the program to be tested Instruction execution / execution result incorporation means 5 is a generated test program.
[0025]
In FIG. 1, a test program is automatically generated as follows.
(1) As shown in FIG. 1, function specifying means for specifying a function to be tested, instruction type specifying means for specifying an instruction type to be tested, a specified function and a specified instruction type A combination control means to be combined, an appearance frequency setting means for setting the appearance frequency of the instruction so that the instruction of the designated instruction type can be selected based on the output of the control means, and an operand for each function under test Special control means for setting the value of the register number to a specific value, the instruction set by the appearance frequency setting means, the value of the operand selected by the specialization control means, and the value of the register number Based on the instruction generation means for generating the instruction to be tested, the instruction execution / execution connection for executing the instruction sequence to be tested generated by the instruction generation means and incorporating the correct information into the program to be tested. A built-in means is provided, for automatically generating a test program for testing of the test object.
[0026]
(2) As shown in FIG. 1, a program for assigning a program name to a program under test based on a number assigned corresponding to the function under test and a number assigned corresponding to an instruction type Name setting means, instruction generation means for generating an instruction to be tested based on the commanded function and instruction type, and an instruction string to be tested generated by the generation means to execute correct information. An instruction execution / execution result incorporation means incorporated in the program is provided, and a test program for performing a test on the test object is automatically generated.
[0027]
(3) As shown in FIG. 1, program number setting means for setting the number of test target programs to be generated, and a program number to be tested are automatically assigned to each test target program according to the set number. Program name setting means for setting is provided.
(4) As shown in FIG. 1, in a system for automatically generating a test program, automatic setting means for automatically setting an initial value, manual operation instruction means for setting an initial value to an arbitrary value, and the above automatic A switching means for switching the output of the setting means and the manual operation instruction means, an instruction generation means for generating an instruction to be tested based on the designated function, the designated instruction type, and an initial value output by the switching means And a command execution / execution result incorporating means for executing the instruction sequence under test generated by the instruction generation means and incorporating correct information into the program under test, and automatically executing a test program for testing the test target To generate.
[0028]
(5) As shown in FIG. 1, the first command ID setting means for setting the command ID determined corresponding to the command to be tested to a random value, and the command ID set to the specified value Second instruction ID setting means to be set, switching means for switching the outputs of the first and second setting means, the designated function, the designated instruction type, and the instruction ID output by the switching means There is provided an instruction generating means for generating an instruction to be tested, and an instruction execution / execution result incorporating means for executing the instruction under test generated by the generating means and incorporating correct answer information into the program to be tested. Automatically generate a test program to test the subject.
[0029]
(6) As shown in FIG. 1, in a system for automatically generating a test program, instruction number setting means for specifying the number of instructions to be tested, the specified function, a specified instruction type, Based on the specified number of instructions, an instruction generation unit that generates an instruction to be tested, an instruction execution / instruction that causes execution of the instruction sequence to be tested generated by the instruction generation unit and incorporates correct information into the program to be tested / An execution result incorporating means is provided to automatically generate a test program for performing a test on the test object.
[0030]
FIG. 2 is a diagram showing the principle of the present invention. The invention according to claim 1 of the present invention is the start address of the initial processing section of the program under test in the system for automatically generating the test program as shown in FIG. First setting means for arbitrarily setting, a second setting means for arbitrarily setting the head address of the interrupt table, a third setting means for arbitrarily setting the head of the address space table, A third setting means for arbitrarily setting the start address; An appearance frequency that sets the appearance frequency of an instruction so that an instruction of the specified instruction type can be selected based on an output of the connection control means that combines the specified function and the specified instruction type, and the output of the connection control means And a command to be tested in accordance with the instruction set by the appearance frequency setting unit, the value of the operand corresponding to the command, the value of the register number, and the designation of the first, second, and third setting units. Instruction generation means for generating a target instruction; The instruction sequence under test generated by the instruction generation means is For soft simulator Let it run Execution result as correct answer information Incorporate into the program under test, The first, second and third Initial processing unit, table, etc. according to the setting means In the program under test An instruction execution / execution result embedded control means to be incorporated is provided to automatically generate a test program for performing a test on the test object.
[0031]
The invention of claim 2 of the present invention, as shown in FIG. 2, in a system for automatically generating a test program, a first setting means for setting the start address of the access data area of the program under test, Second setting means for setting the range of the access data area, third setting means for setting the start address of the instruction generation area, fourth setting means for setting the range of the instruction generation area, and correct information storage Fifth setting means for setting the start address of the area, and sixth setting means for setting the range of the correct answer information storage area; With , The instruction generation means includes In accordance with the setting positions of the first, second, third, fourth, fifth, and sixth setting means, a command to be tested is generated, The instruction execution / execution result embedded control means includes: order And said The correct information etc. 1st, 2nd, 3rd, 4th, 5th, 6th Are incorporated into the program under test according to the setting position of the setting means.
[0032]
According to claim 3 of the present invention, as shown in FIG. 2, in a system for automatically generating a test program, first setting means for arbitrarily setting an access data area of a program under test, Second setting means for setting an access range for a target access command Provided , The instruction generation means includes An access instruction to be tested is generated based on the designated function and the designated instruction type within the range designated by the first and second setting means.
[0033]
According to claim 4 of the present invention, as shown in FIG. 2, in a system for automatically generating a test program, branch range designating means for designating a branch range for a branch instruction of an instruction under test is provided. Preparation , The instruction generation means includes Based on the specified function and the specified instruction type in the specified branch range by the branch range specifying means, a branch instruction to be tested is generated.
[0034]
Claim 5 of the present invention of As shown in FIG. 2, in the system for automatically generating a test program, the invention provides a first setting means for arbitrarily setting an access data area of a program under test, and an access range for the access instruction under test. Second setting means for designating, third setting means for designating a branch range for the branch instruction of the instruction under test, Fourth setting means for setting the range designation to a random value for the instruction to be tested, fifth setting means for setting the range designation to a fixed value, and the fourth and fifth settings Switching means of the means, the instruction generation means, The access / branch instruction to be tested is generated within the range specified by the first, second and third setting means, and the switching means To switch the fourth and fifth setting means, The instruction access range / branch range is set to a random or fixed range.
[0035]
The invention of claim 6 of the present invention is a system for automatically generating a test program as shown in FIG. Correct answer information obtained as a result of execution Control means for automatically changing the setting position incorporated in the program under test according to the size of the program to be tested.
[0036]
According to the seventh aspect of the present invention, as shown in FIG. 2, in a system for automatically generating a test program, setting means for setting a numerical value of a check point instruction to be inserted into an instruction sequence to be tested; A setting location acquisition means for obtaining a setting location of a check point instruction from the number of check points and the number of instructions under test; The instruction generation means includes: An instruction to be tested is generated based on the specified function, the specified instruction type, and the setting location of the check point instruction obtained by the setting location acquisition means.
[0037]
The invention according to claim 8 of the present invention is a setting for setting and storing an initial processing section of a program under test for each function under test in a system for automatically generating a test program as shown in FIG. Control means The instruction execution / execution result built-in control means includes the The initial control unit stored by the setting control means is automatically read out according to the function to be tested designated by the function designating means and incorporated in the program to be tested.
[0038]
Further, as shown in FIG. 3, in a system for automatically generating a test program, function specifying means for specifying a function to be tested, command type specifying means for specifying a command type to be tested, and the above function A screen control unit for displaying a first designation operation for designating an instruction type and a second designation operation for designating the configuration of the program under test, and a storage for storing a designation format by the second designation operation Means, a call setting control means for reading a designation format by the second designation operation from the storage means based on the function designated by the first designation operation and the instruction type, and the designated function and the designated instruction. Based on the type and the designation format read from the storage means, an instruction generation means for generating an instruction to be tested, and an instruction string to be tested generated by the instruction generation means Is the line, the correct answer information instruction execution / execution result incorporated into the test target program provided a built-in unit, it is also possible to automatically generate a test program for testing of the test object.
[0039]
[Action]
1 to 3, the test program is generated as follows.
{Circle around (1)} In FIG. 1, the combination control unit 1 combines the function to be tested specified by the operation unit 6 and the command type, and gives an output for selecting the appearance frequency to the appearance frequency setting unit 2. The appearance frequency setting means 2 sets the appearance frequency of the instruction in the test program based on the above function and instruction type, and supplies it to the instruction generation means 3.
[0040]
The instruction generation means 3 generates an instruction for testing the object under test based on the number of instructions given from the operation means 6, initial value, instruction ID setting, and the like. The initial value and instruction ID can be switched to automatic / arbitrary value and random value / specified value by the switching means 6a and 6b, respectively.
The instruction sequence generated by the instruction generation means 3 is given to the instruction execution / execution result incorporation means 4, and the instruction execution / execution result incorporation means 4 executes the instruction sequence by the simulator to obtain correct answer information (execution result). A test program 5 is generated by being incorporated in the test program.
[0041]
The program name automatic setting unit 5a gives a program number to the generated test program based on the test function set by the operation unit 6, the instruction type, the number of test programs set by the operation unit 6, and the like.
By generating a test program as described above, it is possible to generate a test program according to the specified function and instruction type without complicating control or increasing the scale. The test program name corresponding to the instruction type can be given.
[0042]
In addition, it is possible to specify the number of instructions, initial value, instruction ID, etc., facilitating the response to the execution time of the test program, regenerating the test program, and setting the intended instruction ID to the test program Become.
(2) As shown in FIG. 2, the access means / branch range in the test program is designated by the operation means 6, and an instruction in the designated access range / branch range is generated, or the check point instruction is designated by the operation means 6. The check point instruction can be inserted at the position designated by the check point instruction insertion position control means 3a.
[0043]
It is also possible to provide a switching means 6c to switch and set the access / branch range to a random value or a fixed value.
Further, the operation means 6 is used to start the initial processing section start position, interrupt table start position, address space table start position, access data area start position and range, instruction generation area start position and range, correct information storage position start position and It is also possible to specify the range and the like, and specify the position and / or range of the initial processing unit, interrupt table, address space table, access data area head position, etc. in the test program.
[0044]
As described above, the access range / branch range can be specified arbitrarily, and the initial processing block start position, interrupt table start position, and address space table start position can be set to generate a test program according to the test conditions can do. Further, since the access range of the access instruction can be set to a fixed value, the hit rate for the TLB (address translation buffer) can be improved.
[0045]
Further, by making it possible to control the setting position of the check point instruction, it is possible to generate a test program for performing a rough check or a detailed check, and it is possible to easily generate a test program according to the purpose.
(3) As shown in FIG. 2, a means 4a for changing the correct position information setting position is provided to change the position where the correct information is incorporated in the test program according to the size of the correct information (execution result). As a result, the position where the correct answer information is incorporated can be automatically changed according to the magnitude of the execution result, and the correct answer information can be set without exceeding the area even when the correct answer information is large.
[0046]
Further, an initial processing unit setting means 5b is provided, and initial processing units A to Z prepared in advance are selected according to the function designation value and incorporated in the test program 5. As a result, it is possible to automatically generate the test program 5 having the initial processing unit corresponding to the function designation value.
(4) As shown in FIG. 3, a first specifying operation 6-1 for specifying the test function, instruction type and other conditions for generating the program under test, and the start positions of the processing unit and table in the program under test, The operation means 6 for dividing and displaying the second designation operations 6-2, 6-3,... For designating the configuration of the program under test such as the range, and the designation format by the second designation operation are stored. Storage means 6e is provided.
[0047]
Then, the read control means 6d automatically reads the specified value by the second specifying operation from the storage means 6a based on the specified value by the first specifying operation, and automatically generates a test program.
As described above, the operability of the test program automatic generation system can be improved by automatically reading the specified value by the second specifying operation based on the specified value by the first specifying operation.
[0048]
【Example】
Examples of the present invention will be described below.
(1) Test program generation using function designation and instruction type designation control
4 and 5 are diagrams for explaining generation of a test program by function designation and instruction type designation.
[0049]
4 and 5, 211 is a screen control unit, 220 is a screen information file, 230 is a test item control unit, 240 is an appearance frequency control unit, 250 is a command generation control unit, 260 is a test command sequence, and 270 is execution control. Each part is shown.
In FIG. 4, the information set by the manual operation 211 of the test functions 1 to n of the screen control unit 210 and the manual operation 212 of the command types 1 to n is changed to the test functions 1 to n specified value 221 and the command type of the screen information file 220. 1 to n are stored in the designated value 222.
[0050]
The test item control unit 230 includes a test function 231, an instruction type 232, a combination processing unit 233, and a combination table 234.
The combination processing unit 233 selects the combination table 234 according to the values selected from the test function 231 and the instruction type 232 determined based on the test function 1 to n specified value 221 and the instruction type 1 to n specified value 222. For example, when the function is 1 and the instruction type is 2, the second row of the join table 234 is selected.
[0051]
Then, the appearance frequency table 241 of the appearance frequency control unit 240 is selected (appearance 11 control to appearance nn control) by the selected combination table 234, and the instruction ID is set. For example, in the appearance frequency table (appearance 11 control to appearance nn control), instruction IDs are stored at a ratio corresponding to the appearance frequency. The instruction ID is output at an appearance frequency determined accordingly.
[0052]
In FIG. 5, the instruction generation control unit 250 includes an instruction generation table 251 and a generation instruction setting unit 252. The instruction generation table 251 stores data for setting the value of the operand part of the instruction corresponding to the instruction ID, as will be described below. The instruction generation control unit 250 stores the selected instruction ID and pseudo data. An instruction is generated from the instruction generation table 251 in accordance with a pseudo random number generated by a random number generator (not shown). Then, the generated instruction setting unit 252 sequentially sets the tested instructions 1 to n261 in the test instruction sequence 260.
[0053]
FIG. 6 is a diagram illustrating instruction generation in the instruction generation control unit 250 described above.
As shown in FIG. 5A, the instruction generation table stores data for AND operation and OR operation (1101 1111,0000 1000 in the figure) for each instruction ID. An AND operation and an OR operation of the data for use and a pseudorandom number given from a pseudorandom number generator (not shown) are performed to generate the value of the operand part of the instruction.
[0054]
For example, as shown in FIG. 5B, when the instruction code is register addition, the register numbers (values n and m in add GRm and GRn in the figure) are obtained as follows.
First, an AND operation is performed on the pseudo random number generated by the pseudo random number generator (1011 0011 in the case of the figure) and the data for AND operation (1101 1111 in the case of the figure), and the result is used for the OR operation. OR operation with data (0000 1000 in the case of the figure) is performed.
[0055]
As a result, as shown in the figure, 0011 1011 (decimal numbers 3 and 11) is obtained, and the registers of the addition instruction become GR3 and GR11.
As described above, data for AND operation and data for OR operation are appropriately selected, and by performing AND operation and OR operation of those values and pseudo-random numbers, appropriate ranges of values such as operands and register numbers are set. The range can be selected (in the figure, the data for AND operation and the data for OR operation are determined so that the register numbers are in the range of 0 to 7 and 8 to 15).
[0056]
As described above, when the operand part corresponding to the instruction ID is generated from the instruction generation table, the generated instruction setting unit 252 adds the operand part to the instruction code corresponding to the instruction ID to generate an instruction.
Returning to FIG. 5, the execution control unit 270 includes a generation instruction incorporation control unit 271, a generation instruction execution control unit 272, a software simulator 273, correct answer information collection / incorporation control unit 274, and a test program area 275.
[0057]
The generated instruction incorporation control unit 271 incorporates the test instruction sequence 260 into the test program area 275, and the generated instruction execution control unit 272 executes the test instruction sequence using the software simulator 273, and obtains an execution result.
The correct information collection / embedding control unit 274 incorporates the execution result in the test program area 275 as correct information.
(2) Instruction generation for each test item
FIG. 7 is a diagram for explaining specialized control for a generated instruction, and shows a case where an operand part of a generated instruction is specialized (such as approximation of an operand part) when performing a register interference test, an operand interference test, or the like. .
[0058]
In the figure, reference numeral 311 denotes a pseudo-random number generator, 320 denotes an appearance frequency control unit, 330 denotes a specialization control unit, and 340 denotes an instruction generation control unit. A pseudo-random number generator 311, an appearance frequency control unit 320, an instruction The configuration / operation of the generation control unit 340 is basically the same as that described with reference to FIGS.
As described above, the specialization control unit 330 sets the operand value and the register number value to a specific value, for example, by approximating the operand value when performing the register interference test and the operand interference test. The generation specialization control unit 331 performs special control according to each test item output from the test item 11 to nn control unit 321 with respect to the random number from the pseudo-random number generator 311. , Generate specialized random numbers. For example, when performing an operand interference test, a random number within a predetermined range is generated so that the operand part becomes an approximate value, and an instruction operand part is generated by the random number.
[0059]
The appearance frequency control unit 320 includes a test 11 to nn dedicated appearance frequency table 323, a determination unit 322, and test items 11 to nn control unit 321. As described above, the appearance frequency control unit 320 Then, the setting instruction of the test items 11 to nn control unit 321 is determined by the determination unit 322, and the instruction ID to be generated is extracted from the test 11 to nn dedicated appearance frequency table 323.
[0060]
The instruction generation control unit 340 includes a decoder 341, generation data 343 of a to z instructions, and a generation instruction setting unit 344. As described above, the instruction generation control unit 340 uses the decoder 341 based on the extracted instruction ID to be generated. , A to z instruction generation data 343 is selected, and an operand part of the instruction is generated in accordance with a specialized random number. The generated instruction is set in a predetermined area by the generation instruction setting unit 344.
[0061]
Further, details of randomization specialization control will be described with reference to FIG.
The test item 11 to nn control unit 421 selects the instruction-specific AND data 433 and the instruction-specific OR data 434 as special data along each test item.
AND the random number value 431 from the pseudo-random number generator 411 and the command-specific AND data 433 (deleting unnecessary information), and further control the OR (addition of necessary information) by the command-specific OR data 434. Used as a random number for instruction generation.
[0062]
That is, as in the case of the generation of the operand part in the instruction generation control unit described above, the instruction-specific AND data 433 and the instruction-specific OR data 434 are set in accordance with the test item, whereby the random number that is the instruction generation target is specified. (Set the random number to a specific value). Thereby, the value of the operand part of the instruction generated in the instruction generation control unit 340 can be set to a specific value, for example, by approximating the value.
(3) Setting the program name
FIG. 9 is a diagram for explaining setting of a program name, and shows a case where a program name is automatically set according to a test function, an instruction type, an instruction ID mode (described later) and the number of programs.
[0063]
In the figure, 510 is a screen control unit, 520 is a screen information file, 531 is a test item control unit, 532 is an appearance frequency control unit, 534 is a command generation control unit, 535 is a test command sequence, 540 is a program name setting control unit. Reference numeral 550 denotes an execution control unit, which includes a screen control unit 510, a screen information file 520, a test item control unit 531, an appearance frequency control unit 532, an instruction generation control unit 534, a test instruction sequence 535, and an execution control unit 550. The configuration / operation is basically the same as that shown in FIGS. 4 to 8 except for information input from the screen control unit 510 and information stored in the screen information file 520.
[0064]
Information set by the manual operation 511 of the test functions 1 to n of the screen control unit 510, the manual operation 512 of the command types 1 to n, the manual operation 513 of the command ID mode, and the manual operation 514 of the number of test programs is stored in the screen information file 520. The test functions 1 to n specified value 521, the instruction type 1 to n specified value 522, the instruction ID mode 523, and the number of test programs 524 are stored.
[0065]
The program name setting control unit 540 includes a number setting unit 541, a tail counter 543, a register 544, a program number setting unit 545, and a next generation repetition control unit 546.
In the number setting unit 541 of the program name setting control unit 540, the upper program name from the test function 1 to n specified value 521, instruction type 1 to n specified value 522, and instruction ID mode 523 of the screen information file 520 3 digits) is determined and set in the register 544.
[0066]
Furthermore, the test program name (number) is set in the register 544 by setting the number of test programs 524 in the end counter 543.
On the other hand, the test instruction sequence 535 obtained by the test item control unit 531, the appearance frequency control unit 532, and the instruction generation control unit 534 is given to the execution control unit 550, and 1 to n test programs 557 are generated in the execution control unit 550. The
[0067]
Then, the program number setting unit 545 assigns the test program name set in the register 544 to the generated 1 to n test programs 557.
The next generation repetition control unit 546 repeats the generation of the test instruction by the instruction generation control unit 534 until the end counter 543 becomes zero, and the upper three digits of the generated test program correspond to the test function, instruction type, and instruction ID mode. And a test program name having the last three digits of the tail counter value.
(4) Initial value (seed value) setting
FIG. 10 is a diagram for explaining setting of the initial value (seed value), and shows a case where the initial value (seed value) can be set by switching to manual setting or automatic setting.
[0068]
In the figure, 610 is a screen control unit, 620 is a screen information file, 631 is a pseudo-random number generator, 632 is a test item control unit, 633 is an appearance frequency control unit, 640 is a command generation control unit, 650 is a test command sequence, Reference numerals 660 denote execution control units, and the configurations / operations of the pseudo random number generator 631, the test item control unit 632, the appearance frequency control unit 633, the instruction generation control unit 640, the test instruction sequence 650, and the execution control unit 660 are as follows. Except for the information stored in the screen information file 620, it is basically the same as that shown in FIGS.
[0069]
The screen control unit 610 includes an initial value (seed value) manual operation 611, a switching control unit 612, an automatic setting instruction 614, a timer 613, and a manual operation instruction 615. Usually, the automatic setting instruction 614 has priority, the initial value (seed) from the timer 613 is displayed on the screen control unit 610, and the switching control unit 612 sets an arbitrary initial value (seed) 621 according to the manual operation instruction 615. Set up.
[0070]
That is, the switching control unit 612 can switch and set an initial value (seed) manually set by the manual operation instruction 615 and an initial value (seed) automatic setting by the timer 613.
The initial value (seed) 621 of the screen information file 620 is used as the initial value of the pseudo random number generator 631, and based on the sequentially generated random value, as described above, the test item control unit 632, the appearance frequency control unit 633, The test instruction sequence 650 obtained by the instruction generation control unit 640 is executed by the execution control unit 660, and a test program 665 is generated.
(5) Instruction ID mode setting control
FIG. 11 is a diagram for explaining the setting control of the instruction ID mode, and shows a case where the instruction ID can be set to a random value or set to an intended value (for example, a serial value).
[0071]
In the figure, 710 is a screen control unit, 720 is a screen information file, 731 is a mode switching unit, 741 is a serial ID setting control unit for setting a command ID serially, 742 is a command ID area, and 744 is a command ID fetch. The control unit 743 is a pseudo-random number generator, 750 is an appearance frequency control unit, 760 is an instruction generation control unit, 770 is a test instruction sequence, and 780 is an execution control unit. The screen control unit 710 and the screen information file 720 The configurations / operations of the pseudo random number generator 743, the appearance frequency control unit 750, the instruction generation control unit 760, the test instruction sequence 770, and the execution control unit 780 are stored in the information input from the screen control unit 710 and the screen information file 720. The information is basically the same as that shown in FIGS.
[0072]
A value is set to the command ID mode value 721 of the screen information file 720 by the manual operation 711 in the command ID setting mode of the screen control unit 710.
With respect to the set instruction ID mode value 721, the mode switching unit 731 performs code discrimination of “R” (random) or “S” (serial). If “R”, the pseudo random number generator 743 is generated. If “S”, the serial ID setting control unit 741 sets the instruction ID in the instruction ID area 742 serially. The set command ID is transferred to the command generation control unit 760 by the command ID extraction control unit 744, and test generation is performed in the same manner as the generation processing based on a normal random number.
(6) Test program generation by specifying program configuration input
FIG. 12 and FIG. 13 are diagrams showing an embodiment of the present invention for generating a test program by designating input of a program configuration. This embodiment shows an initial processing section address, an interrupt table address of the generated test program area, An embodiment is shown in which an address such as an address space table address and its range value, the number of check points, the number of generated instructions, etc. can be set.
[0073]
In the figure, 810 is a screen control unit, 820 is a screen information file, 831 is a pseudo-random number generator, 832 is a test item control unit, 833 is an appearance frequency control unit, 834 is a generation instruction counter, 835 is a checkpoint counter, 841 is a start address setting control unit, 842 is an access range change unit, 843 is a branch range change unit, 844 is a random number setting register, 860 is an instruction generation control unit, 870 is a test instruction sequence, and 880 is an execution control unit. Configuration / Operation of Screen Control Unit 810, Screen Information File 820, Pseudo Random Number Generator 831, Test Item Control Unit 832, Appearance Frequency Control Unit 833, Command Generation Control Unit 860, Test Command Sequence 870, Execution Control Unit 880 Except for the information input from the screen control unit 810 and the information stored in the screen information file 820. Shows is basically the same.
[0074]
An arbitrarily designated value of the manual operation 811 of the command generation condition of the screen control unit 810 is set as the generation condition value of the screen information file 820.
Further, a manual operation 812 at the initial processing section address, a manual operation 813 at the interrupt table address, a manual operation 814 at the address space table address, a manual operation 815 at the correct information address, a manual operation 816 at the access data address, and a manual operation at the test instruction setting address The information set by the operation 817, the check point number setting manual operation 818, the generation instruction number setting manual operation 819, the initial processing section address 822, the interrupt table address 823, the address space table address 824 of the screen information file 820, The correct information address and range value 825, the access data address and range value 826, the test instruction setting address and range value 827, the number of check points 828, and the number of generated instructions 829 are stored.
[0075]
The start address setting control unit 841 sets data of each content at each address specified by the initial processing unit address 822 to the test command setting address and the range value 827.
The access range changing unit 842 and the branch range changing unit 843 change the random number of the pseudo random number generator 831 and set it in the random number setting register 844 based on the initial processing unit address 822 to the test instruction setting address and the range value 827. Note that a switching control unit (not shown) can be provided, and the switching control unit can perform switching control of the branch range and the access range to random values or fixed values.
[0076]
The instruction generation control unit 860 generates an instruction under test using the value of the random number setting register 844.
The generated instruction number counter 834 is a counter that variably generates the instructions under test 1 to n of the test instruction sequence 870 according to a specified value, and the generated instruction number is determined by the counter value.
[0077]
The checkpoint counter 835 is a counter that variably sets checkpoint instructions set between generated instructions according to a specified number, and the number of checkpoints set between generated instructions is determined by the counter value.
The address automatic setting unit 851 is a setting unit that embeds correct information by filling the area in accordance with the size of various interrupt information with respect to the correct information collection / embedding control unit 884 of the execution control unit 880. That is, normally, an area of a predetermined size is secured as the correct answer area, and correct answer information is written. However, when there is a space in the area, the address automatic setting unit 851 closes the area and incorporates the correct answer information.
(7) Setting of initial processing unit for test function unit
FIG. 14 is a diagram for explaining the setting of the initial processing unit for each test function unit. In this embodiment, a test program area is selected by selecting and automatically reading out an initial processing unit prepared in advance corresponding to the test function. An embodiment in which the initial processing unit is automatically performed is shown.
[0078]
In the figure, 910 is a screen control unit, 920 is a screen information file, 932 is a test item control unit, 933 is an appearance frequency control unit, 934 is a command generation control unit, 940 is a setting control unit, 935 is a test command sequence, and 950 Denotes an execution control unit, and the configuration / configuration of the screen control unit 910, the screen information file 920, the test item control unit 932, the appearance frequency control unit 933, the command generation control unit 934, the test command sequence 935, and the execution control unit 950 The operation is basically the same as that shown in FIGS.
[0079]
Values specified by the manual operation 911 specified by the test functions 1 to n of the screen control unit 910
Are set to the test function 1 to n designated value 921 of the screen information file 920.
Based on the set test function 1 to n designation value 921, the setting control unit 940 selects the initial processing units A to Z corresponding to the test function from the processing program 941, and the initial processing of the test program 956 of the execution control unit 950 Store in the department.
(8) Automatic call of screen information file
FIG. 15 is a diagram for explaining automatic calling of the screen information file. In this embodiment, the setting address, the address range, etc. It shows a case where data specifying the configuration of the test program is automatically read.
[0080]
In the figure, reference numeral 110 denotes a screen control unit, 120 denotes a screen information file, and 130 denotes an automatic call control unit. Although the other configurations of the test program automatic generation system are not shown in FIG. The configuration / operation of the control unit 110, the screen information file 120, and other parts are basically the same as those shown in FIGS.
[0081]
The test functions 1 to n specified manual operation 111 of the screen control unit 110, the command types 1 to n, and the values specified by the n specified manual operation 112 are used as the test functions 1 to n specified value 121 and the command types 1 to 1 of the screen information file 120. n is set to the specified value 122.
The automatic call control unit 130 selects and calls the screen information files A, B,... 132 by the determination unit 131 based on the set test functions 1 to n specified value 121 and the instruction types 1 to n specified value 122. Then, the screen information file call setting control unit 133 registers and displays the screen information file in a predetermined area.
[0082]
A test program is automatically generated using the selected information as described with reference to FIGS.
[0083]
【The invention's effect】
As described above, the present invention can obtain the following effects.
(1) By specifying the function to be tested and the instruction type, setting the appearance frequency according to the specified function and instruction type, and generating the instruction, the special instruction type and the specified function are targeted. It is possible to generate a command to be tested.
[0084]
Further, by analyzing correct answer information for each function and incorporating it into the test program, a test program corresponding to the function can be automatically generated.
In addition, since a control means specializing instruction generation for each function is provided, it is possible to generate special instructions such as approximating the operand part, and automatic test programs for register interference tests, operand interference tests, etc. Generation is possible.
(2) The name of the program under test can be assigned from the number assigned to the function and the number assigned to the instruction type, and by setting the number of programs to be tested to be generated, Program name setting can be automated.
(3) Since the initial value (seed value) can be set to an automatically set value or an arbitrary value, the test program generated from the automatically set seed value can be set to the initial value (seed value). ) Can be regenerated by setting it to an arbitrary value, and the test efficiency can be improved.
(4) The setting of the instruction ID (number associated with the instruction to be tested) can be set to a random value or a specified value, and the intended instruction ID can be set in addition to random generation. Improvements can be made.
(5) Since the number of instructions to be tested can be specified, if the test time is short, the number of instructions to be tested should be reduced, and if the test time is long, the number of instructions to be tested should be set to It is possible to generate an instruction to be tested corresponding to a test condition such as enlarging, thereby improving test efficiency.
(6) Set the initial address and area range of the initial processing section, interrupt table, address space table, access data area, instruction generation area, correct information area (execution result storage area) constituting the program under test, Since the access range for the operand address of the access instruction or branch instruction can be specified, it is possible to change the configuration of the generated program under test and automatically generate a test program corresponding to the test conditions. It becomes possible.
(7) An access / branch instruction having an instruction access range / branch range as a random or fixed range can be generated. Therefore, it is possible to generate a test program according to the test conditions, and by setting the access range of the access instruction to be fixed, it is possible to set the operand address of the instruction under test to a fixed address, When executing the instruction under test, it is possible to perform a test for improving the hit rate for the TLB (address translation buffer).
(8) Since the setting position to be incorporated in the program under test can be automatically changed according to the size of the correct answer information (execution result), even in the case of special execution result information, the setting can be made without exceeding the area. This makes it possible to improve the development efficiency of the test program.
(9) Since it is possible to control the number of check point instructions to be inserted into the instruction sequence to be tested and the setting location of the check point instructions, it is possible to generate a test program that performs rough checks and detailed checks. Tests with improved test accuracy are possible.
(10) The initial processing unit of the program to be tested can be automatically read for each function, and a test program corresponding to the function can be automatically generated.
(11) The program under test such as the start position of the processing unit, table, instruction generation area, and / or their ranges, etc., by specifying the operation screen for specifying the test function, instruction type, etc. It is possible to automatically read out the operation screen in which the data that defines the configuration of data is set and automatically generate a test program corresponding to those specified values, thus improving the operability of the test program automatic generation system Can do.
[Brief description of the drawings]
FIG. 1 is a diagram (part 1) illustrating the principle of the present invention.
FIG. 2 is a principle diagram (part 2) of the present invention.
FIG. 3 is a principle diagram (part 3) of the present invention.
FIG. 4 is a diagram for explaining test generation by function designation and instruction type designation;
FIG. 5 is a diagram for explaining test generation by function designation and instruction type designation;
FIG. 6 is a diagram illustrating instruction generation in an instruction generation control unit.
FIG. 7 is a diagram for explaining specialized control of a generation instruction.
FIG. 8 is a diagram illustrating details of a specialization control unit.
FIG. 9 is a diagram for explaining setting of a program name.
FIG. 10 is a diagram illustrating setting of an initial value (seed value).
FIG. 11 is a diagram illustrating instruction ID switching control.
FIG. 12 is a diagram for explaining test generation based on input designation of a program configuration;
FIG. 13 is a diagram for explaining test generation by input designation of a program configuration;
FIG. 14 is a diagram for explaining automatic setting of an initial processing unit for each functional unit;
FIG. 15 is a diagram illustrating automatic calling of a screen information file.
FIG. 16 is a diagram illustrating test generation by specifying a conventional test function.
FIG. 17 is a diagram illustrating setting of a conventional test program name.
FIG. 18 is a diagram illustrating setting of a conventional initial value (seed value).
FIG. 19 is a diagram illustrating program generation based on a conventional instruction ID.
[Explanation of symbols]
110, 210, 510, 610, 710, 810, 910
Screen controller
120, 220, 520, 620, 720, 820, 920
Screen information file
121 221 521 921 Test function 1 to n specified value
122 222 522 Instruction type 1 to n specified value
130 Automatic call controller
131 322 determination unit
132 Screen information files A, B, ...
133 Screen information file call setting control unit
230 531 632 832 932 Test item control unit
231 Test function
232 instruction type
233 Join processing unit
234 Join table
240 320 532 633 750 833 933
Appearance frequency controller
241 Appearance frequency table
250 340 534 640 760 860 934
Instruction generation control unit
251 Instruction generation table
252 344 Generation command setting part
260 535 650 770 870 935 Test instruction sequence
261 Instructions 1 to n
270 550 660 880 780 950 Execution control unit
271 551 661 781 881 951 Generated instruction embedded control unit 272 552 662 782 882 952 Generated instruction execution control unit
273 553 663 783 883 953 Soft simulator
274 554 884 784 884 Correct information collection / embedding control unit
275 557 665 785 885 956 test program
311 411 631 743 831 Pseudorandom number generator
330 Specialized Control Unit
321 Test items 11 to nn control unit
323 Appearance frequency table for tests 11 to nn
341 decoder
343 Generated data of az instructions
421 Test items 11 to nn control unit
433 Instruction-specific AND data
434 Instruction-specific OR data
431 random number
523 Instruction ID mode
524 Number of test programs
540 Program name setting control unit
541 Number setting part
543 End counter
544 registers
545 Program number setting part
546 Next Generation Repeat Control Unit
612 switching control unit
613 timer
621 Initial value (seed)
721 Instruction ID mode value
731 Mode switching unit
741 Serial ID setting controller
742 Instruction ID area
744 Instruction ID fetch control unit
834 Generated instruction counter
835 Checkpoint counter
841 Start address setting control section
842 Access range change section
843 Branch range change part
844 Random number setting register
822 Initial processing part address
823 Interrupt table address
824 Address space table address
825 Correct information address and range value
826 Access data address and range value
827 Test command setting address and range value
828 Number of check points
829 Number of generated instructions
Address 851 automatic setting section
940 Setting control unit

Claims (8)

A function specifying means for specifying the function under test; an instruction type specifying means for specifying the instruction type under test;
First setting means for arbitrarily setting the start address of the initial processing section of the program under test;
A second setting means for arbitrarily setting the start address of the interrupt table;
A third setting means for arbitrarily setting the head address of the address space table;
An appearance frequency that sets the appearance frequency of an instruction so that an instruction of the specified instruction type can be selected based on an output of the connection control means that combines the specified function and the specified instruction type, and the output of the connection control means And a command to be tested in accordance with the instruction set by the appearance frequency setting unit, the value of the operand corresponding to the command, the value of the register number, and the designation of the first, second, and third setting units. Instruction generation means for generating a target instruction;
The instruction sequence generated by the instruction generation unit is caused to be executed by a software simulator, and the execution result is incorporated into the program under test as correct answer information and is initialized according to the designation of the first, second, and third setting units. Automatic test program generation characterized by having a command execution / execution result built-in control means for incorporating a processing unit, table, etc. into the program under test, and automatically generating a test program for performing the test of the test target system. First setting means for setting the start address of the access data area of the program under test, second setting means for setting the range of the access data area, and third setting means for setting the start address of the instruction generation area Setting means; fourth setting means for setting the range of the instruction generation area; fifth setting means for setting the start address of the correct information storage area; and sixth setting means for setting the range of the correct information storage area. equipped with a door,
The command generating means generates a command to be tested according to the setting positions of the first, second, third, fourth, fifth, and sixth setting means,
The instruction execution / execution result built-in control means incorporates the instruction and the correct answer information into the program under test according to the setting positions of the first, second, third, fourth, fifth, and sixth setting means. The test program automatic generation system according to claim 1. First setting means for arbitrarily setting an access data area of the program under test;
And a second setting means for setting the access range to the access instruction under test, the instruction generating means, the first, in the range specified by the second setting means, designated as the specified functions 2. The test program automatic generation system according to claim 1, wherein an access instruction to be tested is generated based on the instruction type. Comprising a branching range designating means for designating a branch range for the branch instruction under test instruction,
The instruction generation unit generates the branch instruction to be tested based on the specified function and the specified instruction type in the branch range specified by the branch range specifying unit. Automatic test program generation system. First setting means for arbitrarily setting an access data area of the program under test;
Second setting means for setting an access range for an access instruction to be tested;
A third setting means for designating a branch range for the branch instruction of the instruction under test;
A fourth setting means for setting the range designation to a random value for the generated instruction to be tested;
A fifth setting means for setting the range designation to a fixed value;
Switching means for the fourth and fifth setting means,
The instruction generation means generates an access / branch instruction to be tested within a range specified by the first, second, and third setting means, and the switching means changes the fourth and fifth setting means. 2. The test program automatic generation system according to claim 1, wherein the switching and instruction access range / branch range is set to a random or fixed range. 2. The test program automatic generation system according to claim 1, further comprising control means for automatically changing a setting position to be incorporated in the program under test according to the size of correct answer information obtained as a result of execution . Setting means for setting the numerical value of the check point instruction to be inserted into the instruction sequence to be tested, and setting position obtaining means for obtaining the setting position of the check point instruction from the number of check points and the number of instructions to be tested With
2. The test program automatic generation system according to claim 1, wherein the instruction generation unit generates an instruction to be tested based on a set point of the check point instruction obtained by the set point acquisition unit . A setting control means for setting and storing an initial processing unit of a program under test for each function under test ;
The instruction execution / execution result incorporation control means automatically reads the initial processing unit stored by the setting control means in accordance with the function to be tested designated by the function designation means and incorporates it into the program to be tested. The test program automatic generation system according to claim 1.

Images