JP2005115619A - Program debugger - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a program debugger which allows check routines to be added, modified, or deleted without recompiling a source program. <P>SOLUTION: In response to an assembly command code read out from a storage device 2, a test routine embedding-in part 14 embeds a check routine generated by a check routine generation part 12, in an free space of a target memory 3 on the basis of memory management table information owened by a target memory management part 13. A program code selection part 15 selects one of an assembly command code generated by the check routine embedding part 14 and the assembly command code stored in the storage device 2. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a debugger used for program operation verification.

  When creating a computer program, a debugging operation is required to verify whether the program operates normally. Therefore, a debugging program in which an inspection routine is incorporated in the description portion to be inspected is created and this program is executed by the debugger.

  In accordance with a debug execution instruction from the user, the debugger executes debugging based on the inspection routine incorporated in the debugging program and returns the debug result to the user.

  Usually, as the above-described debugging program, a debugging source program in which an inspection routine is incorporated in the source program is often used.

  However, if it is attempted to manually incorporate the inspection routine into the source program, it is necessary to search the inspection target portion on the program, which increases the burden on the operator.

  In view of this, various automation proposals have conventionally been made for incorporating inspection routines (see, for example, Patent Document 1).

In this patent document 1, it is proposed that a means for incorporating a check routine is provided in a compiler, and an object module incorporating the check routine is automatically obtained by executing compilation of the source program.
JP-A-5-224908 (3rd page, FIG. 1)

  However, in debugging using a debugging source program as described above, or debugging using an object module in which an inspection routine is incorporated by a compiler, the source program must be recompiled every time an inspection routine is added or changed. was there.

  Further, after the debugging is completed, there is a problem that a completed version source program in which all the inspection routines are deleted must be created, and the completed version source program must be compiled again.

  SUMMARY OF THE INVENTION An object of the present invention is to provide a debugger that can automatically generate and incorporate a check routine and does not require recompilation of a source program when adding, changing, or deleting a check routine.

  According to one aspect of the present invention, a target memory management unit that manages a use area of a target memory in which an assembly instruction code sequence obtained by compiling a source program is written, and an inspection for an arbitrary program description line of the source program A test routine generation unit that generates a test routine including an assembly instruction code sequence in accordance with a routine insertion instruction; and a test routine installation unit that incorporates the test routine into the assembly command code sequence. The inspection routine is incorporated into the assembly instruction code string so that the inspection routine is written into an empty area of the target memory based on information on the target memory use area output from the target memory management unit. When That program debugger is provided.

  According to another aspect of the present invention, a target memory management unit that manages a use area of a target memory in which an assembly instruction code sequence obtained by compiling a source program is written, and an arbitrary program of the source program A test routine generation unit that generates a test routine including an assembly instruction code sequence according to a test routine insertion instruction for a description line, and a test routine that stores a plurality of the test routines generated by the test routine generation unit according to a plurality of test routine insertion instructions A storage unit; and a test routine built-in unit that incorporates a test routine selected from the plurality of test routines into the assembly instruction code string, and the test routine built-in unit is output from the target memory management unit. Target memory usage Based on the information about the test routine to be written in the empty area of the target memory, the debugger program characterized by incorporating the test routine to the assembly instruction code sequence is provided.

  According to the present invention, for an assembly instruction code string obtained by compiling a source program, an inspection routine described by an assembly instruction is automatically generated in a debugger and inserted into a specified inspection target location. Thus, an assembly instruction code sequence in which an inspection routine is incorporated can be obtained without recompiling the source program.

  Further, an assembly instruction code sequence in which the inspection routine is changed or not used can be generated without recompiling.

  Furthermore, since it is possible to select an assembly instruction code sequence in which no inspection routine is incorporated, an assembly instruction code sequence from which the inspection routine has been deleted can be obtained without recompilation.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 is a block diagram showing a configuration of a debugger according to Embodiment 1 of the present invention.

  The debugger 1 reads the assembly instruction code generated by compiling the source code from the storage device 2 and writes it in the target memory 3 for debugging the source program. Further, the debugger 1 is connected with a display device 4 for displaying a debugging status and the like, and an input device 5 for inputting a command relating to execution of debugging. The storage device 2 also stores libraries such as source codes and standard functions, which are read into the debugger 1 as necessary.

  The debugger 1 generates a test routine for debugging, incorporates it into the assembly instruction code sequence read from the storage device 2, and writes it into the target memory 3. For this purpose, the debugger 1 includes a command analysis unit 11, an inspection routine generation unit 12, a target memory management unit 13, an inspection routine incorporation unit 14, a program code selection unit 15, and a target memory control unit 16.

  The command analysis unit 11 analyzes the contents of the command input from the input device, and instructs the inspection routine generation unit 12, the inspection routine incorporation unit 14, and the program code selection unit 15 to execute each operation. In addition, the command analysis unit 11 outputs information such as the inspection location address, the variable type, and the variable address to the inspection routine generation unit 12 and the inspection routine incorporation unit 14.

  The inspection routine generation unit 12 receives an instruction and information from the command analysis unit 11 and generates an inspection routine necessary for debugging.

  The target memory management unit 13 creates a memory management table and manages the usage status of the target memory 3. Further, based on this memory management table, information on the usage status of the target memory 3 is output.

  The inspection routine incorporation unit 14 receives the instruction and information from the command analysis unit 11 and incorporates the inspection routine generated by the inspection routine generation unit 12 into the assembly instruction code string. At this time, the inspection routine incorporation unit 14 incorporates the inspection routine so that the inspection routine is written in an empty area of the target memory 3 based on the information on the usage state of the target memory 3 obtained from the target memory management unit 13.

  At this time, the inspection routine incorporation unit 14 can also incorporate one inspection routine so as to be distributed and written in a plurality of empty areas.

  In addition, when a command to turn off the use of the inspection routine is input to the assembly instruction code sequence in which the inspection routine is incorporated, the inspection routine incorporation unit 14 newly creates an assembly instruction code sequence that invalidates the execution of the inspection routine. To generate.

  In response to an instruction from the command analysis unit 11, the program code selection unit 15 changes an assembly instruction code sequence to be written to the target memory 3 to an assembly instruction code sequence incorporating a test routine, or does not incorporate a test routine (that is, The original instruction code sequence is selected. As a result, the original program can be executed immediately even after the inspection routine is incorporated.

  The target memory control unit 16 controls writing and reading of the target memory 3.

  Next, the generation of a debugging inspection routine and the operation of incorporating the inspection routine into the assembly instruction code string in the debugger 1 will be described with reference to FIGS.

  FIG. 2 is a diagram showing a correspondence between an example of a source program written in C language to be debugged and an assembly instruction code string obtained by compiling the source program.

  FIG. 2A shows an extracted part of the source program describing the use of the function func1 using the variables a, b and c.

  FIG. 2B is a diagram illustrating an example of an assembly instruction code string obtained by compiling the above source program.

  Here, the source program shown in FIG. 2A is converted into a push instruction for storing the variables a, b, and c in the stack and a call instruction for calling the function func1, respectively. And the address of the memory in which these instructions are written is designated. Here, it is specified that the above instructions are written to addresses 100, 102, 104, and 106, respectively.

  In the example of FIG. 2B, the addresses 109 to 299 of the memory are areas used by other instructions, and the addresses after the address 300 are free areas of the memory.

  FIG. 3 is a diagram illustrating a generation example of the inspection routine in the present embodiment. Here, a case where an inspection routine is set in the source program line shown in FIG.

  To set the inspection routine, first, as shown in FIG. 3A, the source program line of the inspection portion is displayed on the display device 4.

  Next, as shown in FIG. 3B, an inspection routine to be set is input from the input device 5. Here, the checking routine shown in FIG. 3B is to execute the debugging function dbgfunc when the arguments a and b of the function func1 are equal.

  In response to this input, the command analysis unit 11 instructs the inspection routine generation unit 12 to generate an inspection routine, and outputs information regarding the types of the variables a and b.

  FIG. 3C is a diagram illustrating an example of an inspection routine generated by the inspection routine generation unit 12.

  In FIG. 3C, corresponding to the inspection routine set in FIG. 3B, an ld instruction for loading variables a and b into a register, a cmp instruction for comparing variables a and b, and variables a and b A test routine has been generated consisting of a jr instruction that jumps if they are not equal and a call instruction that calls the function dbgfunc.

  Nnn and mmm written in the ld instruction of the variables a and b indicate storage destination addresses of the respective variables, and xxx written in the call instruction indicates an address where the function dbgfunc is written.

  When the function dbgfunc is already used in the program, the dbgfunc linked in the program can be used. However, when the function dbgfunc is not yet used in the program, the function dbgfunc can be used from the library stored in the storage device 2. It is necessary to obtain the dbgfunc code.

  FIG. 4 shows an example of generation of an assembly instruction code string in which a test routine is incorporated in this embodiment.

  Here, an example is shown in which the inspection routine shown in FIG. 3C is incorporated into the free memory area shown in FIG.

  The inspection routine incorporation unit 14 receives the instruction from the command analysis unit 11 and information on the inspection location address, rewrites the content of the address 100 of the inspection location address into a jp instruction that jumps to the inspection routine, and also in FIG. The indicated inspection routine is incorporated into an empty area after address 300 in the target memory 3.

  However, in order to incorporate the inspection routine, it is necessary to perform processing so as not to affect the original program operation. For this reason, in the example of FIG. 4, a register save instruction is added as preprocessing, and a register return instruction is added as postprocessing.

  Moreover, it is necessary to add an instruction that complements an instruction that is destroyed by the addition of the inspection routine. In the example of FIG. 4, the instructions at addresses 100 and 102 destroyed by the jp instruction to address 100 are complemented at addresses 318 and 320.

  Here, it is assumed that variables a and b are stored at addresses 200 and 202, respectively. The variable address information is output from the command analysis unit 11, and based on this information, the address values represented as nnn and mmm in FIG. 3C are 200 and 202, respectively.

  As a result, as shown in FIG. 4, an assembly instruction code string is generated in which a series of instructions related to the inspection routine and its incorporation are written in an empty area of the target memory 3.

  Next, an example will be described in which the inspection routine incorporation unit 14 incorporates one inspection routine in a distributed manner in a plurality of empty areas.

  As shown in FIG. 5A, the free area of the target memory 3 may exist in a plurality of areas. Moreover, the size of one free area may be so small that all of the inspection routines cannot be incorporated into one free area, such as the free areas at addresses 300 to 308 in the example of FIG.

  In such a case, the inspection routine incorporation unit 14 divides the inspection routine according to the size of the free area and distributes the inspection routine into a plurality of free areas to incorporate the inspection routine into the assembly instruction code string.

  FIG. 5B shows an example in which inspection routines are distributed in a plurality of empty areas and incorporated in an assembly instruction code string. This example is an example when the inspection routine of FIG. 3C is incorporated into two free areas shown in FIG.

  As shown in this example, when using a plurality of free areas, a jump (jp) instruction to the start address of the free area to be used next is inserted at the last address of the free area to be used first. In this way, one inspection routine can be distributed and arranged in a plurality of empty areas.

  Next, the operation when a command for turning off the use of the inspection routine is input will be described with reference to FIG. This command is input when it is desired to invalidate the execution of the inspection routine in order to measure the processing speed of the program.

  When a command for turning off the use of the inspection routine is input, the command analysis unit 11 instructs the inspection routine incorporation unit to write back the instruction at the inspection location address. In response to this, the inspection routine incorporation unit 14 restores the instruction content only to the inspection portion address portion of the assembly instruction code string in which the inspection routine is incorporated. As a result, even if the inspection routine is incorporated in the assembly instruction code string, since there is no jump instruction to the inspection routine, the inspection routine is not executed.

  FIG. 6 shows an example of an assembly instruction code string generated when the inspection routine use OFF command is input. Here, an example is shown in which an inspection routine use OFF command is input to the assembly instruction code string shown in FIG.

  As shown in FIG. 6A, a command for turning off the use of the inspection routine is input from the input device 5. Then, in response to an instruction from the command analysis unit 11, the inspection routine incorporation unit 14 restores the instruction content of the inspection location address part.

  As a result, as shown in FIG. 6B, an assembly instruction code string is generated in which the inspection routine is incorporated, but the instruction content at the inspection location address part is restored.

  That is, the contents of the instructions at addresses 100 and 102 rewritten according to the setting of the inspection routine are rewritten to the original assembly instruction code string shown in FIG.

  As a result, there is no jp instruction for jumping to address 300, which was written at address 100 in FIG. Therefore, the jump to the inspection routine written after address 300 is not performed, and the inspection routine is not executed.

  Next, the operation of the program selection unit 15 will be described with reference to FIG. Here, it is assumed that the assembly instruction code string before incorporating the inspection routine is stored under the name name0, and the assembly instruction code string after incorporating the inspection routine is stored under the name name1.

  As shown in FIG. 7A, when an assembly instruction code string name name1 is input from the input device 5 by a program selection command, the command analysis unit 11 sends an assembly instruction with the name name1 to the program code selection unit 15. Indicates selection of code string.

  In response to this, the program code selection unit 15 outputs an assembly instruction code string in which the inspection routine is incorporated, as shown in FIG.

  On the other hand, when the assembly instruction code string name name0 is input from the input device 5 as shown in FIG. 7C, the program code selection unit 15 incorporates an inspection routine as shown in FIG. 7D. The previous, that is, the original assembly instruction code string is output.

  According to the present embodiment, an assembly instruction code string that incorporates a test routine in an empty area of the target memory 3 can be generated without recompiling the source program. Further, it is possible to generate an assembly instruction code string in which one inspection routine is incorporated in a plurality of empty areas of the target memory 3. Furthermore, even if a test routine is incorporated, an assembly instruction code string that can be invalidated can be generated.

  Further, according to the present embodiment, an assembly instruction code sequence incorporating a test routine and an assembly instruction code sequence not incorporating a test routine can be easily switched and output.

  FIG. 8 is a block diagram illustrating a configuration of a debugger according to the second embodiment of the present invention.

  The debugger 100 of the present embodiment is obtained by adding an inspection routine storage unit 117 to the debugger 1 of the first embodiment. Further, the command analysis unit is changed to the command analysis unit 111 in accordance with the addition of the command input to the inspection routine storage unit 117.

  Others are blocks having the same functions as those in the first embodiment, and these blocks are denoted by the same reference numerals as those in FIG. 1, and detailed description thereof is omitted here.

  The inspection routine storage unit 117 added in the present embodiment stores the inspection routine generated by the inspection routine generation unit 12. That is, when the inspection routine generation unit 12 generates N inspection routines for N inspection locations, the inspection routine storage unit 117 assigns names to the inspection routines (for example, inspection routine 1 to inspection routine N). ) And store.

  Further, when an inspection routine selection command is input, the command analysis unit 111 instructs the inspection routine storage unit 117 to output the specified inspection routine. In response to this, the inspection routine storage unit 117 outputs the specified inspection routine to the inspection routine incorporation unit 14.

  The inspection routine incorporation unit 14 incorporates the input designated inspection routine into the free area of the target memory 3.

  Thereafter, when another inspection routine is selected by the inspection routine selection command, the inspection routine storage unit 117 outputs the newly specified inspection routine to the inspection routine incorporation unit 14.

  Now, assume that this newly selected inspection routine is an inspection routine that does not need to be used simultaneously with the previously selected inspection routine.

  At this time, if the inspection routine storage unit 117 newly reads and uses the original assembly instruction code string from the storage device 2, the inspection routine storage unit 117 sets the newly specified inspection routine as the front of the target memory 3. Can be incorporated into the same free space.

  FIG. 9 is an example of an assembly instruction code string generated by such an operation of selecting the inspection routine. Here, it is assumed that there is an empty area after address 300 of the target memory 3.

  As shown in FIG. 9A, when the inspection routine 1 is selected by the inspection routine selection command, the inspection routine storage unit 117 outputs the inspection routine 1 to the inspection routine incorporation unit 14.

  In response to this, the inspection routine incorporation unit 14 generates an assembly instruction code string in which the inspection routine 1 is incorporated at address 300 and subsequent addresses of the target memory 3 as shown in FIG. 9B.

  Next, as shown in FIG. 9C, when the inspection routine 2 is selected by the inspection routine selection command, the inspection routine storage unit 117 outputs the inspection routine 2 to the inspection routine incorporation unit 14. However, the inspection routine 2 is an inspection routine that does not need to be used simultaneously with the inspection routine 1.

  At this time, the inspection routine incorporation unit 14 reads the original assembly instruction code sequence from the storage device 2 again. Then, as shown in FIG. 9D, another assembly instruction code string in which the inspection routine 2 is incorporated at the address 300 and subsequent addresses of the target memory 3 is generated.

  As described above, the inspection routine incorporation unit 14 can generate different assembly instruction code sequences in which different inspection routines are incorporated in the same empty area.

  According to the present embodiment, inspection routines that do not need to be executed at the same time are incorporated in the same empty area of the target memory 3 by being replaced. That is, there is no need for a free area in which all inspection routines are incorporated in the target memory 3. Therefore, the target memory 3 can be used efficiently.

1 is a block diagram showing a configuration of a debugger according to Embodiment 1 of the present invention. The figure for demonstrating the correspondence of a source program and an assembly instruction code sequence. The figure which shows the example of the test | inspection routine production | generation in the Example of this invention. The figure which shows the example of the assembly instruction code sequence generation in which the test | inspection routine was integrated in the Example of this invention. The figure which shows another example of the assembly instruction code sequence generation in which the test | inspection routine was integrated in the Example of this invention. The figure which shows the example of a production | generation of the assembly instruction code sequence at the time of test routine use OFF command input in the Example of this invention. The figure for demonstrating the example of the program selection in the Example of this invention. FIG. 6 is a block diagram showing a configuration of a debugger according to Embodiment 2 of the present invention. The figure for demonstrating the test | inspection routine selection operation | movement in Example 2 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,100 Debugger 2 Memory | storage device 3 Target memory 4 Display apparatus 5 Input device 11, 111 Command analysis part 12 Inspection routine production | generation part 13 Target memory management part 14 Inspection routine incorporation part 15 Program code selection part 16 Target memory control part 117 Inspection routine Storage department

Claims (5)

A target memory management unit for managing a target memory use area in which an assembly instruction code sequence obtained by compiling a source program is written;
A test routine generator for generating a test routine consisting of assembly instruction code strings in accordance with a test routine insertion instruction for an arbitrary program description line of the source program;
An inspection routine incorporation section for incorporating the inspection routine into the assembly instruction code sequence;
Comprising
The inspection routine is incorporated into the assembly so that the inspection routine is written into a free area of the target memory based on information on the target memory use area output from the target memory management section. A program debugger characterized by being incorporated into an instruction code string. A target memory management unit for managing a target memory use area in which an assembly instruction code sequence obtained by compiling a source program is written;
A test routine generator for generating a test routine consisting of assembly instruction code strings in accordance with a test routine insertion instruction for an arbitrary program description line of the source program;
A test routine storage unit that stores the plurality of test routines generated by the test routine generation unit according to a plurality of test routine insertion instructions;
A test routine built-in unit that incorporates a test routine selected from the plurality of test routines into the assembly instruction code string;
Comprising
The inspection routine is incorporated into the assembly so that the inspection routine is written into a free area of the target memory based on information on the target memory use area output from the target memory management section. A program debugger characterized by being incorporated into an instruction code string.   Of the plurality of inspection routines stored in the inspection routine storage unit, inspection routines that do not need to be executed simultaneously are sequentially selected, and the same empty area of the target memory is sequentially rewritten and used. A debugger for the program according to claim 2.   4. The program debugger according to claim 1, wherein ON / OFF of use of the inspection routine incorporated in the assembly instruction code string can be controlled. 5.   5. An assembly instruction code string in which the inspection routine is incorporated and an assembly instruction code string before the inspection routine is incorporated can be selected and output. The debugger of the program described in the section.

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