JP3833923B2 - Variable gain amplifier circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a variable gain amplifier circuit, and more particularly to a circuit that improves distortion characteristics, input impedance characteristics, and the like when a large signal is input.
[0002]
[Prior art]
Conventionally, as this type of amplifier circuit, for example, a variable gain amplifier circuit having a configuration as shown in FIG. 7 is publicly known.
That is, in the following, the conventional circuit will be schematically described with reference to the same drawing. First, the variable gain amplifier circuit includes npn-type first and second transistors 51 and 52. The first and second transistors 51 and 52 have an emitter connected to each other and a current source 54 and an input terminal 58 connected to each other.
The collector of the first transistor 51 is connected to the DC power supply 55 through the first load element 53 and is also connected to the output terminal 59. On the other hand, the collector of the second transistor 52 is directly connected to the DC power supply 55.
Further, the bases of the first and second transistors 51 and 52 are connected to the voltage control circuit 56 while being grounded in an alternating manner, and the output voltage of the gain control voltage source 57 connected to the voltage control circuit 56. By adjusting this, the base voltages of the first and second transistors 51 and 52 are respectively controlled.
[0003]
In such a configuration, when the input signal at the input terminal 58 is small, the collector current Ic1 of the first transistor 51 flows by the gain control voltage applied from the gain control voltage source 57 to the voltage control circuit 56. Yes.
On the other hand, when the input signal increases, the collector current of the first transistor 51 decreases due to the adjustment of the gain control voltage applied to the voltage control circuit 56, while an appropriate collector current Ic2 flows through the second transistor 52. Thus, the gain with respect to the input signal is lowered.
As described above, the amplification gain can be controlled by controlling the collector current of the first transistor 51 in accordance with the level change of the input signal.
[0004]
[Problems to be solved by the invention]
However, in the above-described conventional circuit configuration, since the current source 54 is a constant current and the input impedance does not fluctuate, the isolation between the input terminal 58 and the output terminal 59 is more than the isolation characteristic of the transistor. There was a problem that the amount of attenuation was not obtained.
In addition, since the conventional circuit is a grounded base amplifier circuit, signal input is performed with current, while signal output is performed with voltage, so that the circuit current at the time of large signal input is less than the AC current component of the input signal. Therefore, there has been a problem that the distortion characteristics are deteriorated.
Thus, as an improvement measure that can increase the attenuation while improving the distortion characteristics, for example, increasing the current of the current source 54 can be considered. However, the input impedance Zi of the above-described variable gain amplifier circuit is given as Zi = α ₀ / g _m = {β ₀ / (1 + β ₀ )} / (Ic / V _T ) as known and well known. As will be understood from the above, there is a problem that an increase in the collector current Ic causes a decrease in the input impedance Zi.
[0005]
The present invention has been made in view of such a situation, and provides a variable gain amplifier circuit capable of increasing a circuit current when a large signal is input and having improved distortion characteristics.
Another object of the present invention is to provide a variable gain amplifier circuit that can obtain a large attenuation when a large signal is input and can suppress a decrease in input impedance due to an increase in circuit current.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, a variable gain amplifier circuit according to the present invention includes:
The collectors of the first and second transistors are connected to each other and connected to the DC power source via the first load element, while the respective emitters are connected to each other via the second load element, The emitter of the second transistor is connected to a current source;
An input signal can be applied to the first emitter, while an output signal can be output from a connection point between the collectors of the first and second transistors.
A collector of a third transistor is directly connected to the DC power supply, while an emitter is connected to the current source together with an emitter of the second transistor;
The bases of the first to third transistors are grounded in an alternating manner, and the bases of the first to third transistors and the current source are in accordance with an external gain control voltage. The output stages of the voltage control circuit for outputting the voltages are respectively connected so that the voltage control circuit can control the base voltages of the first to third transistors and the current of the current source.
[0007]
In such a configuration, when the input signal is small, the voltage control circuit controls the collector current of the first transistor to flow as appropriate, and controls the current source current to match the input impedance. On the other hand, when the input signal increases, the voltage control circuit controls the collector current of the first transistor to decrease and the collector current of the second transistor to increase, and the current source current increases to cause distortion. The deterioration of characteristics is suppressed. In addition, since a part of the input signal is supplied to the second and third transistors via the second load element, a decrease in input impedance caused by an increase in current of the current source is suppressed. .
Further, when the input signal becomes larger, the collector current of the first transistor is cut off by the voltage control circuit, while the collector current of the second and third transistors is controlled to flow, and the current of the current source is changed. Due to the increase in the current of the current source, a part of the input signal is supplied to the second and third transistors through the second load element together with prevention of deterioration of the distortion characteristics. The decrease in input impedance is suppressed.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to FIGS. 1 to 6.
The members and arrangements described below do not limit the present invention and can be variously modified within the scope of the gist of the present invention.
First, a first configuration example will be described with reference to FIG.
First, the variable gain amplifier circuit 100 according to the first configuration example includes npn-type first to third transistors 1 to 3, and the first to third transistors 1 to 3 are described later by the three transistors 1 to 3. The third grounded base amplifier circuits 91 to 93 are configured, and the voltage control circuit 32 for controlling the base voltages of the first to third transistors 1 to 3 and the current of a current source 31 described later is provided. It has become.
That is, first, the emitter of the first transistor 1 is connected to the input terminal 41 and connected to the current source 31 via the second load element 12, while the collector is connected to the output terminal 42. At the same time, it is connected to the DC power supply 34 via the first load element 11. The base of the first transistor 1 is connected to the ground via the first capacitor 21 and is grounded in an alternating current manner, and the output stage of the voltage control circuit 32 is connected. Thus, a first grounded base amplifier circuit 91 is configured.
[0009]
The emitters of the second and third transistors 2 and 3 are connected to each other, and the connection point is connected to the connection point between the second load element 12 and the current source 31. Yes.
Here, the current source 31 is controlled by the output voltage of the voltage control circuit 32 as described later.
The collector of the second transistor 2 is connected to the output terminal 42 and is connected to the DC power supply 34 via the first load element 11. Further, the base of the second transistor 2 is connected to the ground via the second capacitor 22 and is grounded in an alternating current manner, and the output stage of the voltage control circuit 32 is connected thereto. Thus, a second base ground amplification circuit 92 is configured.
[0010]
The collector of the third transistor 3 is directly connected to the DC power supply 34, while the base is connected to the ground via the third capacitor 23 to be AC-grounded, and voltage control is performed. The output stage of the circuit 32 is connected, and a third grounded base amplifier circuit 93 is configured.
The voltage control circuit 32 outputs a base voltage applied to the bases of the first to third transistors 1 to 3, and the magnitude of the output voltage is connected to the input stage so that the voltage can be adjusted. The variable gain control voltage source 33 changes in accordance with the magnitude of the gain control voltage applied.
Therefore, the collector currents of the first to third transistors 1 to 3 are controlled as the base voltage of the first to third transistors 1 to 3 is changed by the voltage control circuit 32.
[0011]
Next, the operation in this configuration will be described.
First, when the input signal at the input terminal 41 is small, the gain control voltage applied to the voltage control circuit 32 is set high. Thus, in the first transistor 1, the first transistor 1 is controlled by the output voltage of the voltage control circuit 32 so that the collector current Ic1 flows, and the current Iref of the current source 31 is changed to the gain variable amplifier circuit 100. It is controlled by the voltage control circuit 32 so as to have a magnitude matched to the input impedance Zi.
In this case, the third transistor 3 is controlled by the voltage control circuit 32 so that the collector current Ic3 does not flow.
[0012]
On the other hand, when the input signal at the input terminal 41 becomes large, the gain control voltage applied to the voltage control circuit 32 is set to an appropriate voltage lower than that when the input signal is small. Instead of the transistor 1, the voltage control circuit 32 controls the collector current Ic2 of the second transistor 2 to increase, and controls the collector current Ic1 of the first transistor 1 to decrease. In this case, since the alternating current component of the input signal increases as compared with the case where the input signal is small, the distortion characteristic tends to deteriorate, but the voltage control circuit 32 applied with the gain control voltage adjusted is applied. As a result, the current Iref of the current source 31 is slightly increased, thereby suppressing the deterioration of the distortion characteristics.
At this time, the input impedance Zi tends to be slightly reduced by a slight increase in the current Iref of the current source 31. However, in the embodiment of the present invention, a part of the input signal passes through the second load element 12. Therefore, the impedance component of the second load element 12 is inserted into the input impedance Zi, and the input impedance Zi is increased accordingly. As a result, a decrease in the input impedance Zi is suppressed.
In this case, the third transistor 3 is controlled so that the collector current Ic3 does not continuously flow, as in the case where the input signal is small.
[0013]
When the input signal at the input terminal 41 is further increased, the gain control voltage applied to the voltage control circuit 32 is set to be lower than before, whereby the first transistor 1 is controlled by the control of the voltage control circuit 32. While the collector current Ic1 is cut off and inactivated, the collector currents Ic2 and Ic3 of the second and third transistors 2 and 3 flow.
At this time, since the alternating current component of the input signal further increases from before, the distortion characteristic tends to deteriorate, but the voltage control circuit 32 causes the current Iref of the current source 31 to increase further than before. Since it is controlled, the deterioration of the distortion characteristic is further suppressed. The input impedance Zi tends to decrease as the current Iref of the current source 31 further increases, but the input signal is supplied to the second and third transistors 2 and 3 only through the second load element 12. As a result, the impedance component of the second load element 12 is inserted into the input impedance Zi. In order to increase the input impedance Zi accordingly, the input impedance Zi decreases as a result. It will be suppressed.
[0014]
If the input signal is still larger, the input signal is attenuated at the second load element 12 and then the second and second input impedances are reduced due to a further increase in the current Iref of the current source 31. This is supplied to the emitters of the third transistors 2 and 3, and as a result, a higher attenuation can be obtained.
[0015]
Next, gain characteristics of the variable gain amplifier circuit according to the embodiment of the present invention having the above-described operation characteristics will be described with reference to FIGS. 2 and 8 while comparing with the gain characteristics of the conventional circuit.
2 and 8, the horizontal axis represents the change in the gain control voltage applied to the voltage control circuit 32 (voltage control circuit 56 in the conventional circuit shown in FIG. 7), and the vertical axis represents the input terminal. The output signal level obtained at the output terminal 42 (output terminal 59 in the conventional circuit shown in FIG. 7) with respect to the input signal level applied to 41 (input terminal 58 in the conventional circuit shown in FIG. 7). The gains are respectively expressed.
Then, comparing the maximum attenuation obtained when the operating conditions are set so that the maximum gain is the same in both the variable gain amplifier circuit in the embodiment of the present invention and the conventional circuit, the gain in the embodiment of the present invention is compared. The variable amplifier circuit has a maximum attenuation of approximately −50 dB (see FIG. 2), whereas the conventional circuit has a maximum attenuation of −30 dB (see FIG. 8). In other words, it can be confirmed that the variable gain amplifier circuit according to the embodiment of the present invention has an attenuation of approximately 20 dB higher than that of the conventional circuit (see FIGS. 2 and 8). It can be understood that the variable gain amplifier circuit is effective in increasing the attenuation.
[0016]
Next, a change in the collector current with respect to the gain control voltage will be described with reference to FIGS. 3 and 9 for the variable gain amplifier circuit and the conventional circuit in the embodiment of the present invention.
3 and 9, the change of the gain control voltage applied to the voltage control circuit 32 (voltage control circuit 56 in the conventional circuit shown in FIG. 7) is shown, and the vertical axis represents each of the transistors 1-3. (In the conventional circuit shown in FIG. 7, the change in the collector current of the transistors 51 and 52) is shown.
First, regarding the conventional circuit, in the conventional circuit, when the input signal is small (in other words, when the gain control voltage is large), a large amount of collector current Ic1 flows and the input signal becomes large (in other words, As the gain control voltage decreases, the collector current Ic1 decreases while the collector current Ic2 increases (see FIG. 9). In the conventional circuit, the output current Iref of the current source 54 is constant.
[0017]
On the other hand, in the variable gain amplifier circuit according to the embodiment of the present invention, when the input signal is small, the gain control voltage is set to a large value so that a large amount of collector current Ic1 flows, and the collector current Ic3 Is cut off (see the portion labeled “input signal: small period” in FIG. 3).
When the input signal is increased and the gain control voltage is decreased, the collector current Ic1 is reduced, while the collector current Ic2 is increased (in FIG. 3, “input signal: large period” is described). Part reference). In this state, the collector current Ic3 is still cut off.
[0018]
Thereafter, when the input signal is further increased, the gain control voltage is set to be further reduced, whereby the collector current Ic1 is completely cut off, the collector current Ic3 starts to flow, and the collector current Ic2 gradually decreases. (Refer to the part labeled “input signal: longer period” in FIG. 3).
Further, the current Iref of the current source 31 is controlled so as to increase when the gain control voltage is small, thereby ensuring a large amount of attenuation.
[0019]
Next, a second configuration example will be described with reference to FIG. The same components as those of the first configuration example shown in FIG. 1 are denoted by the same reference numerals, detailed description thereof is omitted, and different points are mainly described below. And
The variable gain amplifier circuit 100A in the second configuration example is characterized in that it has a configuration in which a common base amplifier circuit is connected in multiple stages (cascode connection).
Specifically, in the following, the npn-type fourth transistor 4 between the collector of the first transistor 1 and the first load element 11 will be described. The load element 11 is provided with an emitter connected to the collector of the first transistor 1.
Further, between the collector of the second transistor 2 and the first load element 11, the npn-type fifth transistor 5 is connected to the output terminal 42 and the first load element 11, and the emitter is connected to the second load element 11. Are respectively connected to the collector of the transistor 2.
[0020]
Further, the bases of the fourth and fifth transistors 4 and 5 are connected to each other, and a fourth capacitor 24 and a constant voltage source 35 are connected between each base and ground, respectively. The bases of the fourth and fifth transistors 4 and 5 are in an AC grounded state. The sizes of the fourth and fifth transistors 4 and 5 are set smaller than the sizes of the first and second transistors 1 and 2.
The fourth transistor 4 constitutes a fourth grounded base amplifier circuit 94, and the fifth transistor 5 constitutes a fifth grounded base amplifier circuit 95.
In this configuration, the fourth and fifth transistors 4 and 5 are connected to the output terminal 42, and the size of both the transistors 4 and 5 is set smaller than that of the first and second transistors 1 and 2. Therefore, the output frequency characteristics are improved as compared with the case where the first and second transistors 1 and 2 are connected to the output terminal 42.
Except for this point, the output operation of the output signal with respect to the input signal is basically the same as that of the first configuration example described above with reference to FIG. Is omitted.
[0021]
Next, a third configuration example will be described with reference to FIG. The same components as those of the first configuration example shown in FIG. 1 are denoted by the same reference numerals, detailed description thereof is omitted, and different points are mainly described below. And
The variable gain amplifying circuit 100B in the third configuration example is different from the second configuration example in that the grounded base amplification circuit is connected in multiple stages as in the second configuration example shown in FIG. Although the same, as described below, the specific configuration of the multistage connection is different from the configuration example shown in FIG.
That is, in the third configuration example, in addition to the first to third transistors 1 to 3, the npn-type fourth transistor 4 has a collector whose one end is the first load element 11 (the first load element). On the other hand, the emitter of the element 11 is connected to the collectors of the first and second transistors 1 and 2. A fourth capacitor 24 and a constant voltage source 35 are connected between the base of the fourth transistor 4 and the ground, and the base of the fourth transistor 4 is grounded in an alternating manner. It is assumed that the
[0022]
The fourth transistor 4 constitutes the fourth grounded base amplifier circuit 94 and is cascode-connected (multistage connection) with the first grounded base amplifier circuit 91 of the first transistor 1. At the same time, the second base ground amplification circuit 92 by the second transistor 2 is also cascode-connected (multistage connection).
In such a configuration, the output frequency characteristics can be improved by setting the size of the fourth transistor 4 connected to the output terminal 42 smaller than that of the first and second transistors 1 and 2. This is the same as the case of the second configuration example.
Except for this point, the output operation of the output signal with respect to the input signal is basically the same as that of the first configuration example described above with reference to FIG. Is omitted.
[0023]
Next, a fourth configuration example will be described with reference to FIG. The same components as those of the first configuration example shown in FIG. 1 are denoted by the same reference numerals, detailed description thereof is omitted, and different points are mainly described below. And
The variable gain amplifier circuit 100C in the fourth configuration example has a configuration in which the third load element 13 is used instead of the current source 31 in the first configuration example shown in FIG. Is.
That is, the third load element 13 has one end connected to one end of the second load element 12, the emitters of the second and third transistors 2 and 3, and the other end connected to the ground. It has become. More specifically, the third load element 13 is preferably a resistance element.
Even in such a configuration, the basic operation and characteristics are basically the same as those of the first configuration example described above with reference to FIG. 1, and thus detailed description thereof is omitted here.
[0024]
The current source 31 in the second configuration example shown in FIG. 4 and the third configuration example shown in FIG. 5 may be replaced with the third load element 13 as in the fourth configuration example. Even in this case, the basic operation and characteristics are the same as those in the first configuration example.
In the embodiment of the present invention, an npn transistor is used. However, other types of transistors may be used as a matter of course.
[0025]
【The invention's effect】
As described above, according to the present invention, the emitter of the first transistor is connected to the emitters of the second and third transistors via the load element, and the emitters of the second and third transistors are connected. Is connected to a current source, and the current source current can be controlled, gain control with good distortion characteristics can be achieved up to a higher input signal level than before, and the input impedance can be controlled. There is an effect that it is possible to provide a variable gain amplifying circuit that can obtain a large amount of attenuation when a large signal is input with little fluctuation.
[Brief description of the drawings]
FIG. 1 is a circuit diagram illustrating a first configuration example of a variable gain amplifier circuit according to an embodiment of the present invention;
FIG. 2 is a characteristic diagram showing a gain change with respect to a gain control voltage change of the variable gain amplifier circuit according to the embodiment of the present invention.
FIG. 3 is a characteristic diagram showing a collector current change with respect to a gain control voltage change of the variable gain amplifier circuit according to the embodiment of the present invention.
FIG. 4 is a circuit diagram showing a second configuration example of the variable gain amplifier circuit according to the embodiment of the present invention.
FIG. 5 is a circuit diagram showing a third configuration example of the variable gain amplifier circuit according to the embodiment of the present invention.
FIG. 6 is a circuit diagram showing a fourth configuration example of the variable gain amplifier circuit according to the embodiment of the present invention.
FIG. 7 is a circuit diagram showing a configuration example of a conventional circuit.
FIG. 8 is a characteristic diagram showing a gain change with respect to a gain control voltage change of a conventional circuit.
FIG. 9 is a characteristic diagram showing a change in collector current with respect to a change in gain control voltage in a conventional circuit.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... 1st transistor 2 ... 2nd transistor 3 ... 3rd transistor 4 ... 4th transistor 5 ... 5th transistor 31 ... Current source 32 ... Voltage control circuit 33 ... Variable gain control voltage source 34 ... DC power supply 35 ... Constant voltage source 41 ... Input terminal 42 ... Output terminal

Claims (5)

The collectors of the first and second transistors are connected to each other and connected to the DC power source via the first load element, while the respective emitters are connected to each other via the second load element, The emitter of the second transistor is connected to a current source;
An input signal can be applied to the first emitter, while an output signal can be output from a connection point between the collectors of the first and second transistors.
A collector of a third transistor is directly connected to the DC power supply, while an emitter is connected to the current source together with an emitter of the second transistor;
The bases of the first to third transistors are grounded in an alternating manner, and the bases of the first to third transistors and the current source are in accordance with an external gain control voltage. The output stage of the voltage control circuit for outputting the voltage is connected to each other, and the base voltage of the first to third transistors and the current of the current source can be controlled by the voltage control circuit. A variable gain amplifier circuit. 2. The variable gain amplifier circuit according to claim 1, wherein a grounded base amplifier circuit is cascode-connected between the collectors of the first and second transistors and the first load element. . Between the collector of the first transistor and the first load element, the fourth transistor is connected to the first load element and the emitter is connected to the collector of the first transistor. While
Between the collector of the second transistor and the first load element, the fifth transistor has its collector connected to the first load element and its emitter connected to the collector of the second transistor. Provided,
2. The variable gain amplifier circuit according to claim 1, wherein the fourth and fifth transistors are configured such that a base is grounded in an alternating manner and an output signal can be output from a collector. Between the collectors of the first and second transistors and the first load element, a fourth transistor has its collector as the first load element and its emitter as the first and second transistors. Each connected to the collector,
2. The variable gain amplifier circuit according to claim 1, wherein the fourth transistor is configured such that an output signal can be output from a collector while a base is grounded in an alternating manner. 5. The variable gain amplifier circuit according to claim 1, wherein a resistance element is provided instead of the current source.

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