JP3809405B2 - Image display device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an image display device including a plurality of image forming elements.
[0002]
[Prior art]
Conventionally, two types of electron-emitting devices, a hot cathode device and a cold cathode device, are known. Among these, as the cold cathode device, for example, a field emission type device (hereinafter referred to as FE type), a metal / insulating layer / metal type emission device (hereinafter referred to as MIM type), a surface conduction type emission device, and the like are known. .
[0003]
Since the surface conduction electron-emitting device has a simple structure and is easy to manufacture, there is an advantage that a large number of devices can be formed over a large area. Therefore, for example, as disclosed in Japanese Patent Application Laid-Open No. 64-31332, a method for arranging and driving a large number of elements has been studied. As for the application of surface conduction electron-emitting devices, for example, image forming apparatuses such as image display apparatuses and image recording apparatuses, charged beam sources, and the like have been studied.
[0004]
In particular, as an application to an image display device, for example, as disclosed in US Pat. No. 5,066,883 and JP-A-2-257551, a surface conduction electron-emitting device and a phosphor that emits light when irradiated with an electron beam are used. Image display devices used in combination have been studied. An image display device using a combination of a surface conduction electron-emitting device and a phosphor is expected to have characteristics superior to those of other conventional image display devices. For example, it can be said that it is superior in that it does not require a backlight and has a wide viewing angle as compared with a liquid crystal display device that has been widespread in recent years.
[0005]
FIG. 14 shows a multi-electron source by an electrical wiring method. That is, this is a multi-electron source in which a large number of two-dimensional surface conduction type emitting elements as image forming elements are two-dimensionally arranged and these elements are wired in a matrix as shown in the figure. In the drawing, reference numeral 4001 schematically shows a surface conduction electron-emitting device, 1003 a row wiring (scanning wiring), and 1004 a column wiring (modulation wiring). The row wiring 1003 and the column wiring 1004 actually have a finite electrical resistance, but are shown as wiring resistances 4004 and 4005 in the drawing. The wiring method as described above is called simple matrix wiring.
[0006]
The surface conduction electron-emitting devices 4001 used here are roughly classified into a planar type and a vertical type. The planar type has a configuration in which a pair of device electrodes including a cathode electrode and a gate electrode are arranged substantially horizontally, and the electron emission direction is a direction substantially perpendicular to the horizontal plane. The vertical type has a configuration in which a cathode electrode and a gate electrode are arranged substantially vertically, and an electron emission direction is a direction substantially parallel to the vertical plane.
[0007]
In addition, a conductive thin film is formed between the cathode electrode and the gate electrode, and when an element current flows between the pair of electrodes, electrons are emitted from the electron emission portion which is a minute crack formed in the thin film. Released. The conductive thin film is made of, for example, metals such as Pd, Pt, Ru, Ag, Au, Ti, In, Cu, Cr, Fe, Zn, Sn, Ta, W, and Pb, PdO, SnO, and the like. ₂ , In ₂ O ₃ , PbO, Sb ₂ O ₃ Oxides such as HfB ₂ , ZrB ₂ , LaB ₆ , CeB ₆ , YB ₄ , GdB ₄ Borides such as TiC, ZrC, HfC, TaC, SiC, WC, etc., nitrides such as TiN, ZrN, HfN, etc., Si, Ge, etc. A semiconductor, carbon, etc. are mentioned, It selects suitably from these.
[0008]
For convenience of illustration, the matrix is shown as a 6 × 6 matrix. However, the scale of the matrix is not limited to this. For example, in the case of a multi-electron source for an image display device, a desired image display is performed. Elements that are sufficient for this are arranged and wired. In a multi-electron source in which surface conduction electron-emitting devices are wired in a simple matrix, appropriate electric signals are applied to the row wiring 1003 and the column wiring 1004 in order to output a desired electron beam. For example, FIG. 15 shows an example of a driving waveform for driving a surface conduction electron-emitting device in a matrix.
[0009]
(A) is a voltage waveform of a selection potential applied to a selected row wiring, (b) is a voltage waveform of a modulation signal applied to a column wiring, (c) is a voltage waveform applied to the selection element, and (d) is a voltage waveform applied to the selection element. The voltage waveform applied to a non-selection element is shown.
[0010]
In FIG. 14, the selection potential Vs is applied to the row wiring 1003 of the selected row, and at the same time, the non-selection potential Vns is applied to the row wiring 1003 of the non-selected row. In synchronization with this, a modulation signal Ve for outputting an electron beam is applied to the column wiring 1004. According to this method, if the voltage drop due to the wiring resistors 4004 and 4005 is ignored, a voltage of Ve−Vs that is a potential difference between the selection potential and the potential of the modulation signal is applied to the surface conduction electron-emitting devices in the selected row. In addition, a voltage of Ve−Vns, which is a potential difference between the non-selection potential and the potential of the modulation signal, is applied to the surface conduction electron-emitting devices in the non-selection row.
[0011]
The surface conduction electron-emitting device emits electrons for the first time when the device applied voltage exceeds a certain threshold, device current (current flowing between both electrodes of the device), and electron emission current (electron beam output intensity). Is an element having a characteristic of monotonically increasing with respect to the applied voltage of the element.
[0012]
Therefore, if Ve, Vs, and Vns are set to appropriate potentials, an electron beam having a desired intensity should be output only from the surface conduction electron-emitting devices in the selected row, and different potentials are applied to the column wirings. Thus, an electron beam having a different intensity should be output from each element in the selected row. Further, since the response speed of the surface conduction electron-emitting device is high, if the length of time for applying the modulation signal is changed, the length of time for which the electron beam is output should be able to be changed.
[0013]
Taking advantage of these characteristics, a multi-electron source in which surface conduction electron-emitting devices are simply matrix-wired is considered to have various uses. For example, if a voltage signal corresponding to image information is applied as appropriate, image display It is expected to be applicable as an electron source for equipment.
[0014]
FIG. 16 is a plan view showing a schematic configuration of an image display device in which surface conduction electron-emitting devices are wired in a simple matrix.
[0015]
As shown in the figure, the image display device includes a substrate 7, an image display unit 1 in which a plurality of surface conduction electron-emitting devices 2 are connected in a matrix by a plurality of row wirings 6 and a plurality of column wirings 5; A scanning circuit 4 serving as a scanning unit that scans by applying a selection potential to one of the plurality of row wirings 6 and sequentially switching the selected row wiring, and a plurality of constant voltage power sources according to an input image signal And a modulation circuit 3 as modulation means for applying a modulation signal modulated by controlling the output from each of the plurality of column wirings 5 to each other.
[0016]
FIG. 17 is a perspective view showing a schematic configuration of a main part of the image display apparatus of FIG.
[0017]
In the figure, 8 is a metal back, 9 is a phosphor screen, and 10 is a substrate. As described above, by applying the modulation signal Ve to the column wiring 5 and the selection potential Vs to the row wiring 6, electrons are emitted from the surface conduction electron-emitting device 2. An acceleration voltage Va is applied to the metal back 8 disposed above the surface conduction electron-emitting device 2, and a part of the electrons emitted from the surface conduction electron-emitting device 2 are accelerated by the acceleration voltage Va, and the phosphor screen 9. To reach. Thereby, the fluorescent screen 9 emits light and an image can be obtained.
[0018]
Further, not only the surface conduction type, but also a field emission device using an emitter cone and an MIM type electron emission device are known. A configuration using an electroluminescence element as an image forming element is also known.
[0019]
Matrix driving is known as a configuration for driving an image display device using such an image forming element. A plurality of scanning signal wirings and a plurality of modulation signal wirings form a matrix wiring, and a plurality of modulation signal wirings are applied to an image forming element to which a selection potential is applied by a scanning wiring to which a scanning signal (selection potential) is applied. The image forming element is driven by applying a modulation signal all at once or sequentially through the.
[0020]
Some configurations for providing a scanning signal and a modulation signal are also known. For example, a configuration in which a modulation signal is given by a constant current (a configuration in which a desired value of current flows) and a configuration in which a modulation signal is given by a constant voltage are known. As an example, Japanese Patent Laid-Open No. 9-319327 discloses a configuration in which a current source and a voltage source are used in combination. As modulation methods, a configuration for modulating the peak value of a modulation signal, a configuration for modulating the pulse width of the modulation signal, and a configuration using a combination of peak value modulation and pulse width modulation are known.
[0021]
Japanese Laid-open Patent Publication No. 2000-310966 is known as a technology that is the background of the present invention. Here, in the image display device, a configuration is disclosed in which two transistors are first turned on at the time of signal fall and the signal is suddenly lowered, and then one transistor is turned off and gently lowered.
[0022]
Japanese Patent Application Laid-Open No. 5-232907 discloses a reset circuit that can be used in an image display device. A configuration is disclosed in which the reset circuit is changed from an impedance value during operation to an impedance value lower than the impedance value to reduce the peak current value.
[0023]
Japanese Patent Laid-Open No. 8-190878 discloses a configuration that suppresses a voltage exceeding the rated value by adding a termination circuit using resistors, a voltage dividing circuit, and a clamp circuit using diodes to the input terminal and termination terminal of the wiring. ing.
[0024]
[Problems to be solved by the invention]
The present application includes an invention whose one object is to realize a configuration capable of suppressing undesirable fluctuations in the potential of a signal when a signal is applied to a wiring in an image display device. In addition, the present application includes an invention whose one object is to realize a configuration in which the operation condition of a circuit to which a signal is applied can be changed to an optimum one.
[0025]
An example in which undesirable potential fluctuations occur will be described in detail by taking an image display device in which surface conduction electron-emitting devices are wired in a simple matrix as an example.
[0026]
When the voltage level output from the modulation circuit is switched, the voltage of the nearby wiring fluctuates. This phenomenon will be described with reference to FIG. 16 and FIG.
[0027]
FIG. 18 shows the output waveform of the modulation signal output from the modulation circuits 3 and 3A. FIG. 18A shows the output waveform of the modulation circuit 3, and FIG. 18B shows the output waveform of the modulation circuit 3A. .
[0028]
In the figure, first, the output potential of the modulation circuits 3 and 3A transitions from Vne to Ve at time T0, and then only the output potential of the modulation circuit 3 transitions from Ve to Vne at time T1. The situation is shown.
[0029]
At this time (when the output potential of the modulation circuit 3 is switched), an unintended spike noise ΔVe is generated in the output waveform of the modulation circuit 3A, as shown in FIG. The main cause of this noise is that a steep current flows through the wiring during voltage switching, and this current causes an induced current due to mutual capacitance and mutual inductance with other wiring, causing unintended voltage fluctuations. is there.
[0030]
When such spiked noise is large, a voltage exceeding the rated voltage is applied to the electron-emitting device and the drive circuit. Therefore, the characteristics of the electron-emitting device are deteriorated and destroyed, the drive circuit is latched up, and further to the outside. Problems such as electromagnetic radiation will occur.
[0031]
The surface conduction electron-emitting device has been described above as an image forming device, and the case where the timings of falling of the plurality of modulation signals are different has been described as an example. I want to suppress unwanted fluctuations. It is also desirable to suppress undesirable (particularly high frequency) fluctuations in potential when transitioning to a desired potential not only at the falling edge of the modulation signal but also at the rising edge of the modulation signal. The same applies to the scanning signal.
[0032]
[Means for Solving the Problems]
In order to achieve the above object, in the image display device of the present invention,
Wiring and
A circuit that applies a predetermined potential as a potential of a signal supplied to the wiring;
An image forming element that is driven by applying a voltage when the signal is supplied to the wiring;
Have
At least one of the circuit when the predetermined potential is applied or when the application of the predetermined potential is terminated, a predetermined potential between a constant potential supply path for supplying a constant potential to the circuit and the wiring is predetermined. A state in which the constant potential supply path and the wiring are connected via a resistor lower than the predetermined resistance is set.
[0033]
Here, various types of image forming elements that are driven by a signal supplied to the wiring can be employed. For example, an electron-emitting device can be adopted. In addition to the electron-emitting device, an electroluminescent device or a liquid crystal device can be used. In the case of using an electron-emitting device, an image can be displayed by arranging a light-emitting body (for example, a phosphor) that emits light by electrons emitted from the electron-emitting device together with the electron-emitting device.
[0034]
Further, as the constant potential supply path, wiring connected to a power source can be adopted.
[0035]
According to the present invention, since the high-frequency fluctuation of the potential applied to the wiring is suppressed, a cold cathode type electron-emitting device that is sensitive to the potential fluctuation, in particular, a surface conduction electron-emitting device, or electroluminescence The present invention can be particularly preferably applied to a configuration using elements. An image forming element that is driven by applying a voltage (potential difference) may be used.
[0036]
Note that here, a signal is supplied to the wiring when the potential applied to the wiring changes. In other words, the image forming element driven by applying a voltage has the other potential (for example, a plurality of potentials) for applying the voltage as a potential difference between the predetermined potential of the signal here and the predetermined potential of the signal here. In a configuration in which matrix driving is performed to drive a plurality of image forming elements using a scanning wiring and a plurality of modulation wirings (the plurality of scanning wirings and the plurality of modulation wirings constitute a matrix wiring), the signal referred to here is The other potential can be applied as the potential of the scanning signal when the modulation signal is in the matrix drive, and the other potential can be applied as the potential of the modulation signal when the signal here is the scanning signal in the matrix driving. It is driven by the application of a voltage given as a potential difference. The predetermined potential may be composed of a plurality of potentials.
[0037]
When this circuit applies the predetermined potential, a constant potential supply path for supplying a constant potential to the circuit and the wiring are connected via a predetermined resistor, and then the constant potential If the supply path and the wiring are connected via a resistance lower than the predetermined resistance, the predetermined potential and the potential supplied by the constant potential supply path are low. Different voltage drop due to resistance. When this circuit finishes applying the predetermined potential, a constant potential supply path for supplying a constant potential to the circuit and the wiring are connected via a predetermined resistor, and then If the constant potential supply path and the wiring are connected via a resistance lower than the predetermined resistance, the constant potential supply path is applied to the wiring after the application of the predetermined potential is completed. The potential and the potential supplied by the constant potential supply path differ from each other by the voltage drop due to the low resistance. When this circuit applies the predetermined potential and ends the application of the predetermined potential, the constant potential supply path for supplying a constant potential to the circuit and the wiring are connected via a predetermined resistor. If the constant potential supply path and the wiring are connected via a resistance lower than the predetermined resistance, then the predetermined potential is set. Constant potential supply path (path for supplying a constant potential at which the potential difference from the predetermined potential is equal to the voltage drop), and a constant potential for the potential applied to the wiring after finishing the application of the predetermined potential It is preferable to provide a supply path (a path for supplying a constant potential at which the potential difference from the potential applied to the wiring after the application of the predetermined potential is equal to the voltage drop).
[0038]
The circuit has a plurality of parallel connection paths provided between a constant potential supply path and the wiring, and realizes the plurality of states by switching a connection state of the plurality of connection paths. It is good to be.
[0039]
The resistance value of one connection path of the plurality of connection paths in a state where the constant potential supply path and the wiring are connected is the constant value of the other connection path of the plurality of connection paths. It may be different from a resistance value in a state where the potential supply path and the wiring are connected.
[0040]
When three or more connection paths are provided, all the resistance values (in the connection state) may be different.
[0041]
By using a plurality of connection paths with different resistance values in the connected state, the resistance value at the start of operation is sufficiently large when trying to reach a predetermined potential or when the application of the predetermined potential is to be terminated. Easy to do. The resistance value in a state where the constant potential supply path and the wiring are connected via a predetermined resistance is lower than the predetermined resistance between the constant potential supply path and the wiring thereafter. Undesirable fluctuations in potential can be suppressed particularly preferably by setting the resistance value to be larger than twice (2.1 times or more) the resistance value in a state connected via a resistor. By using a plurality of connection paths having different values, this condition can be easily satisfied.
[0042]
Each of the plurality of connection paths has a switch, and the connection state of each connection path may be switched by the switch.
[0043]
A configuration using a transistor as the switch can be suitably employed. Note that by making the on-resistances of the transistors different from each other, the resistance values in the connection states of the connection paths can be made different.
[0044]
At least one of the plurality of connection paths may include an N-channel transistor and a P-channel transistor arranged in parallel between the constant potential supply path and the wiring.
[0045]
In this case, one connection path includes a path connecting the constant potential supply path and the wiring using an N-channel transistor as a switch, and a path connecting the constant potential supply path and the wiring using a P-channel transistor as a switch. Will be composed.
[0046]
In the circuit, a resistance value in a state in which the constant potential supply path and the wiring are connected via the predetermined resistor, and a subsequent resistance value between the constant potential supply path and the wiring is the predetermined value. It is good that it is 2.1 times or more of the resistance value in the state where it is connected through a resistance lower than the resistance.
[0047]
A plurality of the wirings may be provided, and a plurality of the circuits may be provided corresponding to the plurality of wirings.
[0048]
The plurality of wirings may be modulation signal wirings for applying the signals as modulation signals to the image forming elements, respectively, and may further include a plurality of scanning signal wirings for applying scanning signals for matrix driving.
[0049]
In the image display device of the present invention,
Wiring and
A circuit that applies a predetermined potential as a potential of a signal supplied to the wiring;
An image forming element that is driven by applying a voltage when the signal is supplied to the wiring;
Have
The circuit has a plurality of elements for controlling a connection state between a constant potential supply path for supplying a constant potential to the circuit and the wiring in parallel between the constant potential supply path and the wiring.
A state in which some of the plurality of elements connect the constant potential supply path and the wiring at least one of applying the predetermined potential or ending application of the predetermined potential After that, the part of the plurality of elements and another element are connected to the constant potential supply path and the wiring.
[0050]
In the image display device of the present invention,
Wiring and
A circuit that applies a predetermined potential as a potential of a signal supplied to the wiring;
An image forming element that is driven by applying a voltage when the signal is supplied to the wiring;
Have
The circuit is
A final output unit for outputting the signal to the wiring;
A pre-stage output unit connected to a pre-stage of the final output unit and outputting a control signal for controlling on / off of the final output unit;
A power source for supplying a potential to the front-stage output unit;
Including
The final output unit has a characteristic that an on-resistance is determined according to an amplitude value of a control signal input from the preceding-stage output unit,
The pre-stage output unit includes a final output unit control circuit that changes an amplitude value of the control signal in accordance with a potential supplied from the power source.
[0051]
As the power source, a variable power source that can change the potential to be supplied, and a constant power source that supplies a predetermined potential,
The final output unit control circuit may include a power supply switching circuit that switches and outputs a potential supplied from the variable power supply and the constant power supply.
[0052]
The final output unit includes a first MOSFET connected in parallel between the power supply for supplying the signal and the wiring, and a second MOSFET having a different channel characteristic from the first MOSFET,
The power source includes first and second variable power sources that can change a potential to be supplied, and first and second constant power sources that supply a predetermined potential,
The pre-stage output unit switches a potential supplied from the first variable power source and the first constant power source and outputs the first power source switching circuit that outputs the potential to the gate terminal of the first MOSFET, and the second variable power source. A second power source switching circuit for switching the potential supplied from the power source and the second constant power source and outputting it to the gate terminal of the second MOSFET; and a front stage output for controlling the front stage output unit inputted from the outside And a control signal inverting circuit for branching a part control signal and inputting a signal inverted to the signal input to the first power supply switching circuit to the second power supply switching circuit.
[0053]
At least one of the first and second power supply switching circuits may be constituted by a MOSFET.
[0054]
The final output unit includes a first MOSFET connected in parallel between the first power supply for supplying the signal and the wiring, and a second MOSFET having a channel characteristic different from that of the first MOSFET. The third MOSFET connected in parallel between the wiring and the second power source for supplying the signal and the wiring, and the third MOSFET having different channel characteristics. A second final output unit comprising four MOSFETs,
The pre-stage output unit includes a first pre-stage output unit that outputs a first control signal to the first final output unit, and a second pre-stage that outputs a second control signal to the second final output unit. An output unit,
As the power source, first and second variable power sources that are connected to the first pre-stage output unit and can change a potential to be supplied, first and second constant power sources that supply a predetermined potential, and the first The third and fourth variable power supplies connected to the two previous output units and capable of changing the supplied potential, and the third and fourth constant power supplies for supplying a predetermined potential,
The first front-stage output unit switches a potential supplied from the first variable power source and the first constant power source and outputs the first power source switching circuit to the gate terminal of the first MOSFET, and the first power source switching circuit. A second power source switching circuit for switching the potential supplied from the two variable power sources and the second constant power source and outputting the same to the gate terminal of the second MOSFET, and the first pre-stage output unit inputted from the outside. First control for branching a first front-stage output unit control signal for control and inputting a signal inverted with respect to a signal input to the first power supply switching circuit to the second power supply switching circuit A second inversion output unit for switching the potential supplied from the third variable power source and the third constant power source to output to the gate terminal of the third MOSFET. Power supply switching circuit, and the fourth Controls a fourth power supply switching circuit that switches the potential supplied from the variable power supply and the fourth constant power supply and outputs the same to the gate terminal of the fourth MOSFET, and the second previous-stage output unit that is input from the outside. Second control signal inversion for branching the second previous stage output unit control signal for input to the fourth power supply switching circuit and for inverting the signal input to the third power supply switching circuit And a circuit.
[0055]
At least one of the first to fourth power supply switching circuits may be constituted by a MOSFET.
[0056]
A plurality of scanning lines arranged in one direction of the row and the column;
A plurality of modulation wirings arranged in the other direction of the rows and columns, and
The circuit may apply a predetermined potential to either the scanning wiring or the modulation wiring.
[0057]
A scanning device for selecting any of the scanning wirings may be provided.
[0058]
DETAILED DESCRIPTION OF THE INVENTION
Exemplary embodiments of the present invention will be described in detail below with reference to the drawings. However, the dimensions, materials, shapes, relative arrangements, and the like of the components described in this embodiment are not intended to limit the scope of the present invention only to those unless otherwise specified. Absent.
[0059]
Here, the configuration and operation of the modulation circuit according to the embodiment of the present invention will be mainly described. This modulation circuit is an image display device having a configuration in which a plurality of image forming elements are simply matrix-wired by a plurality of row wirings (scanning wirings) and a plurality of column wirings (modulation wirings), and the plurality of constants are determined according to input image signals. It is suitable for use in means for generating a modulation signal to be output to the column wiring by switching the voltage power source. The configuration of the entire image display apparatus can be suitably employed the configuration described in the above prior art and other known configurations, and thus detailed description thereof is omitted here.
[0060]
(First embodiment)
A first embodiment of the present invention will be described with reference to FIG.
[0061]
FIG. 1 is a circuit diagram showing a schematic configuration of a main part of a modulation circuit included in the image display apparatus according to the present embodiment.
[0062]
The output circuit 11 shown in the figure is a circuit for controlling outputs from a plurality of constant voltage power sources V1 and V0 according to an input image signal and outputting a modulation signal to the column wiring. Are provided with an output section 13 as switch means for controlling on / off of the output and an output section 14 as switch means for controlling on / off of the output of the constant voltage power supply V0.
[0063]
The output unit 13 of the constant voltage power supply V1 is composed of two switching elements. A transistor can be preferably used as the switching element. In this embodiment, an example in which a P-channel MOSFET (MOS field effect transistor) is employed is shown.
[0064]
Two MOSFETs 13A and 13B having different on-resistances are selected. Specifically, if the on-resistance of the MOSFET 13A is R13A and the on-resistance of the MOSFET 13B is R13B,
R13A <R13B
Choose to satisfy the relationship.
[0065]
The two MOSFETs 13A and 13B are connected in parallel, the constant voltage power supply V1 is supplied to each source terminal, and the drain terminal is connected to the column wiring terminal OUT. The bag gate terminals of the two MOSFETs 13A and 13B are connected to the highest potential in the circuit. The gate terminal of the MOSFET 13A is connected to the control power supply 12 (voltage Vs1), and the gate terminal of the MOSFET 13B is connected to the control power supply 12 (voltage Vw1).
[0066]
That is, when a predetermined voltage Vs1 (Vw1) is applied from the control power supply 12 to the gate terminal of the MOSFET 13A (13B), the switch is turned on, a current flows between the drain and source, and the potential V1 is applied to the column wiring. The
[0067]
Since the MOSFETs 13A and 13B are connected in parallel, a current flows into the column wiring when one of the switches is turned on. However, the amount of current (or potential) does not change instantaneously, and a certain transition time is required for the potential of the column wiring to reach V1. This transition time depends on various characteristics such as the on-resistance of the MOSFET. This point will be described later.
[0068]
On the other hand, the output unit 14 of the constant voltage power supply V0 is also composed of two switching elements. A transistor can be preferably used as the switching element. In this embodiment, an N-channel MOSFET (MOS field effect transistor) is employed.
[0069]
Two MOSFETs 14C and 14D having different on-resistances are selected. Specifically, when the on-resistance of the MOSFET 14C is R14C and the on-resistance of the MOSFET 14D is R14D,
R14C <R14D
Choose to satisfy the relationship.
[0070]
The two MOSFETs 14C and 14D are connected in parallel, the constant voltage power supply V0 is supplied to each source terminal, and the drain terminal is connected to the column wiring terminal OUT. The bag gate terminals of the two MOSFETs 14C and 14D are connected to the lowest potential in the circuit. The gate terminal of the MOSFET 14C is connected to the control power supply 12 (voltage Vs0), and the gate terminal of the MOSFET 14C is connected to the control power supply 12 (voltage Vw0).
[0071]
That is, when a predetermined voltage Vs0 (Vw0) is applied from the control power supply 12 to the gate terminal of the MOSFET 14C (14D), the switch is turned on, a current flows between the drain and source, and the potential V0 is applied to the column wiring. The
[0072]
Since the MOSFETs 14C and 14D are connected in parallel, a current flows into the column wiring when one of the switches is turned on. However, the amount of current (or potential) does not change instantaneously, and a certain transition time is required for the potential of the column wiring to reach V0. This transition time depends on various characteristics such as the on-resistance of the MOSFET.
[0073]
Next, the output waveform of the output circuit will be described with reference to FIG.
[0074]
FIG. 2 shows the output waveform of the output circuit, that is, the potential waveform of the modulation signal applied from the modulation circuit. The solid line in FIG. 2 shows the output waveform according to this embodiment, and the dotted line shows the output waveform according to the conventional example. However, the voltage drop due to on-resistance is small and ignored.
[0075]
First, an operation when the potential of the modulation signal is changed from the potential V0 to the potential V1 will be described.
[0076]
In the initial state, the MOSFETs 13A and 13B of the output unit 13 are both off, the MOSFETs 14C and 14D of the output unit 14 are both on, and the potential V0 is output from the constant voltage power supply V0.
[0077]
When transitioning from V0 to V1, the MOSFETs 14C and 14D of the output unit 14 are turned off, and then the MOSFET 13B having a high on-resistance among the MOSFETs of the output unit 13 is first turned on. Thereafter, the MOSFET 13A having a small on-resistance is turned on. This state is maintained when V1 is continuously output.
[0078]
The greater the on-resistance of the MOSFET, the smaller the amount of change in current flowing between the drain and source. That is, the transition time from the potential V0 to the potential V1 becomes longer when a switching element having a large on-resistance is used.
[0079]
Therefore, by sequentially turning on the switching elements having a large on-resistance as described above, as shown in FIG. 2, the output from the constant voltage power supply transitions stepwise and reaches the steady potential V1.
[0080]
Next, an operation when the potential of the modulation signal is changed from the potential V1 to the potential V0 will be described.
[0081]
When transitioning from V1 to V0, after the MOSFETs 13A and 13B of the output unit 13 are turned off, the MOSFET 14D having a large on-resistance is first turned on among the MOSFETs of the output unit 14. Thereafter, at time t3, the MOSFET 14C having a small on-resistance is turned on.
[0082]
Also in this case, as in the case of the transition from the potential V0 to the potential V1, the output from the constant voltage power supply is changed stepwise to reach the steady potential V0 by sequentially turning on the switching elements having large on-resistance. Become.
[0083]
In the modulation circuit, the pulse width of the modulation signal is changed by controlling the on / off timing of each switching element according to the value of the input image signal, and the amount of electron emission from the electron emission element, that is, the brightness of the display image is adjusted. can do.
[0084]
The main cause of the “unintentional spike noise” described in the problem of the prior art is that a steep current flows through the column wiring during voltage switching.
[0085]
In the present embodiment, the current is limited by driving the MOSFET with a high on-resistance during the period in which the steep current flows, and after a certain time, the steep current is applied to the wiring by driving with the MOSFET with a low on-resistance. It is possible to suppress the flow and reduce the generation of electrical noise.
[0086]
This prevents over-rated voltage from being applied to the electron-emitting device and drive circuit, and solves various problems such as characteristic deterioration and destruction of the electron-emitting device, breakdown due to latch-up of the drive circuit, and external electromagnetic radiation. Therefore, the reliability and display performance of the image display device can be improved, and the lifetime can be extended.
[0087]
Here, the on-resistance of the switching element during a period in which a steep current flows is larger than twice the resistance value thereafter (more preferably 2.1 times or more), thereby suitably suppressing undesirable fluctuations in potential. can do.
[0088]
One of the two switching elements in parallel is set to have a higher on-resistance than the other, and the switching element having the higher on-resistance is turned on first (the switching element having the lower on-resistance is turned off), and then the switching element having the lower on-resistance. By turning on together with a switching element having a large on-resistance, the resistance value in the former state can be made larger than twice the resistance value in a state where two parallel switching elements are simultaneously turned on. .
[0089]
(Second Embodiment)
FIG. 3 shows a second embodiment of the present invention.
[0090]
In this embodiment mode, the switching element is formed by connecting an N-channel transistor and a P-channel transistor in parallel.
[0091]
Since other configurations and operations are substantially the same as those of the first embodiment, the same components are denoted by the same reference numerals, description thereof is omitted, and description will be made focusing on portions different from those of the first embodiment. .
[0092]
FIG. 3 is a circuit diagram illustrating a schematic configuration of a main part of the modulation circuit included in the image display apparatus according to the present embodiment.
[0093]
The output circuit 21 shown in the figure is a circuit for controlling outputs from a plurality of constant voltage power supplies V1 and V0 in accordance with an input image signal and outputting a modulation signal to the column wiring. The output circuit 21 outputs the constant voltage power supply V1. The output unit 23 is a switch unit that performs on / off control of the output, and the output unit 24 is a switch unit that performs on / off control of the output of the constant voltage power source V0.
[0094]
The output unit 23 of the constant voltage power supply V1 is composed of four switching elements. A transistor can be preferably used as the switching element. In this embodiment, P-channel MOSFETs 13A and 13B and N-channel MOSFETs 13C and 13D are used in combination.
[0095]
Two P-channel MOSFETs 13A and 13B are selected having different on-resistances. Also, two N-channel MOSFETs 13C and 13D are selected having different on-resistances.
[0096]
Specifically, when the on-resistances of the MOSFETs 13A, 13B, 13C, and 13D are R13A, R13B, R13C, and R13D, respectively,
R13A <R13B
R13C <R13D
Choose to satisfy the relationship.
[0097]
The four MOSFETs 13A, 13B, 13C, and 13D are connected in parallel, the constant voltage power supply V1 is supplied to each source terminal, and the drain terminal is connected to the column wiring terminal OUT.
[0098]
The bag gate terminals of the two P-channel MOSFETs 13A and 13B are connected to the highest potential in the circuit, while the bag gate terminals of the two N-channel MOSFETs 13C and 13D are connected to the lowest potential in the circuit. .
[0099]
The P-channel MOSFET 13A and the N-channel MOSFET 13C are connected in parallel with a common control power supply 12 (voltage Vs1). However, although the gate terminal of the MOSFET 13A is directly connected to the control power supply 12, the gate terminal of the MOSFET 13C is connected to the control power supply 12 via an inverter 15 for inverting the voltage level of the control power supply 12.
[0100]
The P-channel type MOSFET 13B and the N-channel type MOSFET 13D are connected in parallel with the common control power supply 12 (voltage Vw1). However, similarly to the above, the gate terminal of the N-channel MOSFET 13D is connected to the control power supply via the inverter 15.
[0101]
On the other hand, the output unit 24 of the constant voltage power supply V0 is also composed of four switching elements. Transistors can be preferably used as the switching elements. In this embodiment, P-channel MOSFETs 14A and 14B and N-channel MOSFETs 14C and 14D are used in combination.
[0102]
The two P-channel MOSFETs 14A and 14B are selected to have different on-resistances. The two N-channel MOSFETs 14C and 14D are selected to have different on-resistances.
[0103]
Specifically, when the on-resistances of the MOSFETs 14A, 14B, 14C, and 14D are R14A, R14B, R14C, and R14D, respectively,
R14A <R14B
R14C <R14D
Choose to satisfy the relationship.
[0104]
The four MOSFETs 14A, 14B, 14C, and 14D are connected in parallel. A constant voltage power supply V0 is supplied to each source terminal, and a drain terminal is connected to the column wiring terminal OUT.
[0105]
The bag gate terminals of the two P-channel MOSFETs 14A and 14B are connected to the highest potential in the circuit, while the bag gate terminals of the two N-channel MOSFETs 14C and 14D are connected to the lowest potential in the circuit. .
[0106]
The P-channel MOSFET 14A and the N-channel MOSFET 14C are connected in parallel with a common control power supply 12 (voltage Vs0). However, although the gate terminal of the MOSFET 14A is directly connected to the control power supply 12, the gate terminal of the MOSFET 14C is connected to the control power supply 12 via an inverter 15 for inverting the voltage level of the control power supply 12.
[0107]
The P-channel MOSFET 14B and the N-channel MOSFET 14D are connected in parallel with the common control power supply 12 (voltage Vw0). However, similarly to the above, the gate terminal of the N-channel MOSFET 14D is connected to the control power supply via the inverter 15.
[0108]
In the above-described configuration, when switching the potential of the modulation signal, the output from the constant voltage power supply is changed stepwise to reach a steady potential by sequentially turning on the switching elements having large on-resistance. Therefore, also in the configuration of the present embodiment, the same effect as in the first embodiment can be obtained.
[0109]
Furthermore, in this embodiment mode, by using a P-channel transistor and an N-channel transistor together, a change in the on-resistance of the MOSFET due to the back gate effect can be canceled, and more strict gradation control is possible. .
[0110]
(Third embodiment)
FIG. 4 shows a third embodiment of the present invention.
[0111]
In the first and second embodiments, the voltage level is set to two levels, V0 and V1, but in this embodiment, a configuration in which the voltage level is set to three levels is shown.
[0112]
Since other configurations and operations are the same as those of the above-described embodiment, the same components are denoted by the same reference numerals, description thereof will be omitted, and portions different from those of the above-described embodiment will be mainly described.
[0113]
FIG. 4 is a circuit diagram showing a schematic configuration of a main part of the modulation circuit included in the image display apparatus according to the present embodiment.
[0114]
The output circuit 31 shown in the figure is a circuit for controlling outputs from a plurality of constant voltage power supplies V2, V1, and V0 in accordance with an input image signal and outputting a modulation signal to the column wiring. The output circuit 31 is a constant voltage power supply V2. Output section 26 as switch means for on / off control of the output of the output, output section 23 as switch means for on / off control of the output of the constant voltage power supply V1, and output section as switch means for on / off control of the output of the constant voltage power supply V0 24.
[0115]
Since the configuration and operation of the output units 23 and 24 are the same as those of the second embodiment, description thereof is omitted.
[0116]
The output unit 26 of the constant voltage power supply V2 is composed of four switching elements. As the switching element, a transistor can be preferably used. In this embodiment, P-channel MOSFETs 16A and 16B and N-channel MOSFETs 16C and 16D are used in combination.
[0117]
Two P-channel MOSFETs 16A and 16B are selected having different on-resistances. Also, the two N-channel MOSFETs 16C and 16D are selected to have different on-resistances.
[0118]
Specifically, if the on-resistances of the MOSFETs 16A, 16B, 16C, and 16D are R16A, R16B, R16C, and R16D, respectively,
R16A <R16B
R16C <R16D
Choose to satisfy the relationship.
[0119]
The four MOSFETs 16A, 16B, 16C, and 16D are connected in parallel. A constant voltage power supply V2 is supplied to each source terminal, and a drain terminal is connected to the column wiring terminal OUT.
[0120]
The bag gate terminals of the two P-channel MOSFETs 16A and 16B are connected to the highest potential in the circuit, while the bag gate terminals of the two N-channel MOSFETs 16C and 16D are connected to the lowest potential in the circuit. .
[0121]
The P-channel type MOSFET 16A and the N-channel type MOSFET 16C are connected in parallel with the common control power supply 12 (voltage Vs2). However, although the gate terminal of the MOSFET 16A is directly connected to the control power supply 12, the gate terminal of the MOSFET 16C is connected to the control power supply 12 via an inverter 15 for inverting the voltage level of the control power supply 12.
[0122]
The P-channel type MOSFET 16B and the N-channel type MOSFET 16D are connected in parallel with the common control power supply 12 (voltage Vw2). However, as described above, the gate terminal of the N-channel MOSFET 16D is connected to the control power supply via the inverter 15.
[0123]
FIG. 5 shows the output waveform of the output circuit, that is, the potential waveform of the modulation signal applied from the modulation circuit. In addition, the continuous line of FIG. 5 has shown the output waveform by this Embodiment, and the dotted line has shown the output waveform by a prior art example.
[0124]
In the left output waveform in the figure, the modulation signal potential is changed from V0 → V1 → V2 → V1 → V0, and in the right output waveform, the modulation signal potential is changed from V0 → V2 → V0. . In any case, the output from the constant voltage power supply is changed stepwise to reach the steady potential by sequentially turning on each of the output units 23, 24, and 26 from the switching element having a large on-resistance.
[0125]
Therefore, even when the voltage level is increased as in the configuration of the present embodiment, by applying the switch means of the present invention to each output unit of each constant voltage power supply, the same as the above embodiment An effect can be obtained. Needless to say, the present invention can also be applied when the voltage level is 4 or more.
[0126]
In addition, since the P-channel and N-channel transistors are also used in this embodiment, the change in the on-resistance of the MOSFET due to the back gate effect can be canceled, and more strict gradation control is possible. .
[0127]
Further, when the voltage level is set to three or more as in the present embodiment, the modulation circuit controls the on-off timing of each switching element in accordance with the value of the input image signal, so that the pulse width of the modulation signal. In addition, the amount of electron emission from the electron-emitting device, that is, the brightness of the display image can be adjusted by changing the amplitude.
[0128]
(Fourth embodiment)
FIG. 6 shows the configuration of the modulation device according to the fourth embodiment of the present invention.
[0129]
The modulation device 111a is mainly output from the final output unit 112, the pre-stage output unit 113, the control signal generation unit 114, the voltage source (modulation signal power supply) 115 for supplying the modulation signal voltage, and the pre-stage output unit 113 to the final output unit 112. A voltage source (variable power source) 116 for supplying a high level voltage, and a voltage source (constant power source) 117 for supplying a low level voltage output from the pre-stage output unit 113 to the final output unit 112.
[0130]
The final output unit 112 is configured by a MOSFET or the like, and a power source 115 is connected to the source terminal Vn, and a column electrode is connected to the drain terminal out. The gate terminal Vinn receives the output from the previous stage output unit 113.
[0131]
The pre-stage output unit 113 is a pre-stage of the final output unit 112 and connects the variable power source 116 to the high level voltage terminal Vgh and connects the power source 117 to the low level voltage terminal Vgl. The signal output from the control signal generation unit 114 is input to the control terminal Vcont for controlling the operation of the upstream output unit 113.
[0132]
A feature of the present embodiment is that by controlling the voltage value V0gh of the voltage source 116, the high-level voltage value output from the pre-stage output unit 113 can be varied, and the on-resistance of the final output unit 112 can be varied. This is a possible point.
[0133]
The operating principle and effects of the fourth embodiment of the present invention will be described with reference to FIGS.
[0134]
FIG. 7 shows the MOSFET at the final output stage shown in the first embodiment of the present invention.
[0135]
FIG. 8 shows the relationship between the drain-source current (Ids) and the gate-source voltage with respect to the drain-source voltage (Vds) of the MOSFET.
[0136]
The Nch MOSFET is turned off when the gate voltage Vgs is equal to or lower than the threshold voltage Vth (low level), and is turned on when the gate voltage Vgs is equal to or higher than Vth (high level). As shown in FIG. 8, it can be seen that Ids increases as Vgs increases. This means that as the gate voltage increases, the on-resistance of the MOSFET decreases, and as the gate voltage decreases, the on-resistance of the MOSFET increases.
[0137]
The present embodiment is characterized in that the on-resistance of the modulation circuit is varied by controlling the voltage level applied to the gate terminal of the MOSFET of the final output unit by using the above characteristics, by the output unit of the previous stage. Therefore, the configuration of the front output unit can be realized by a configuration in which the output voltage varies depending on the voltage value of the power supply voltage, for example, an inverter configuration as shown in FIG.
[0138]
Note that the configuration of the front-stage output unit is not limited to this, and any circuit configuration that can vary the output voltage according to the above-described condition, that is, the voltage value of the power supply voltage may be used.
[0139]
The effect of this plan will be described with reference to FIG.
[0140]
FIG. 10 shows voltage waveforms at the terminal Vinn and the terminal out when the power supply 116 is varied. However, the voltage drop due to the on-resistance is neglected because it is small in this embodiment.
[0141]
Here, the GND potential is output to the terminal out by a final output unit (not shown). A case where the GND potential is changed to the voltage V0 will be described as an example.
[0142]
The voltage of the power supply 116 is set to V0gh1, and a control signal for outputting a high level from a low level is input from the control signal generation unit 114 to the pre-stage output unit 113. The voltage waveform output to the terminal Vinn at that time is as shown in (a) of FIG. When this voltage waveform is input to the gate terminal of the MOSFET of the final output unit, the voltage waveform shown in FIG. 10B is output to the terminal out.
[0143]
Next, voltage waveforms when the voltage of the power supply 116 is V0gh2 will be described.
[0144]
A control signal for outputting a high level from a low level is input from the control signal generation unit 114 to the pre-stage output unit 113. At this time, the voltage waveform output to the terminal Vinn is as shown in FIG. When this voltage waveform is input to the gate terminal of the MOSFET of the final output section, the voltage waveform shown in FIG. 10B (b) is output to the terminal out. That is, when the voltage value input to the MOSFET decreases from V0gh1 to V0gh2, the Vgs applied to the MOSFET decreases and the on-resistance increases. As a result, the voltage waveform output to the terminal out becomes a somewhat distorted waveform.
[0145]
Next, voltage waveforms when the voltage of the power supply 116 is set to V0gh3 will be described.
[0146]
A control signal for outputting a high level from a low level is input from the control signal generation unit 114 to the pre-stage output unit 113. The voltage waveform output to the terminal Vinn at that time is as shown in (c) of FIG. When this voltage waveform is input to the gate terminal of the MOSFET of the final output section, the voltage waveform shown in (c) of FIG. 10B is output to the terminal out. That is, when the voltage value input to the MOSFET is lowered to V0gh3, Vgs applied to the MOSFET is further reduced and the on-resistance is increased. As a result, the voltage waveform output to the terminal out becomes a more distorted waveform.
[0147]
As can be seen from the above, according to the embodiment of the present invention, even if the driving load fluctuates, the on-resistance of the modulation circuit can be varied by varying the power supply voltage. As a result, the driving capability of the modulation circuit can always be optimized, so that the above problem can be solved.
[0148]
(Fifth embodiment)
FIG. 11 shows a fifth embodiment of the present invention.
[0149]
The modulation device 111b according to the present embodiment includes final output units 112a and 112b, pre-stage output units 113a and 113b, a control signal generation unit 114a, a voltage source (modulation signal power supply) 115a that supplies a modulation signal voltage, and a pre-stage output unit 113a. From a voltage source (first variable power supply) 116a for supplying a high level voltage to be output, a voltage source (second constant power supply) 116b for supplying a high level voltage output from the front stage output unit 113b, and from a front stage output unit 113a A voltage source (first constant power supply) 117a for supplying a low level voltage to be output, a voltage source (second variable power supply) 117b for supplying a low level voltage output from the preceding stage output unit 113b, and a control signal are inverted. An inverter (control signal inverting circuit) 118a is provided.
[0150]
The difference from the fourth embodiment is that the final output unit for outputting the voltage V0 is composed of Pch and Nch, which are connected in parallel, and for operating this Pch MOSFET. The former output unit 113b and the inverter 118a are newly installed.
[0151]
Further, the power supplies supplied to the terminals Vgh and Vgl of the pre-stage output units 113a and 113b are different, and in particular, the power supply 116a and the power supply 117b can be varied.
[0152]
Further, the control signal sent from the control signal generation unit 114a is directly input to the front stage output unit 113a, and is input to the front stage output unit 113b after being inverted by the inverter 118a.
[0153]
The effect of this embodiment will be described.
[0154]
Since the effects on the Nch side are the same as those in the fourth embodiment of the present invention, the effects on the Pch side will be described with reference to FIG.
[0155]
FIG. 12 shows voltage waveforms at the terminal Vinp and the terminal out when the power source 117b is varied.
[0156]
Here, the GND potential is output to the terminal out by a final output unit (not shown). A case where the GND potential is changed to the voltage V0 will be described as an example.
[0157]
The voltage of the power supply 117b is set to V0gl1, and a control signal for outputting a low level from a high level is input from the control signal generation unit 114a to the pre-stage output unit 113b via the inverter 118a. The voltage waveform output to the terminal Vinp at that time is as shown in (a) of FIG. When this voltage waveform is input to the gate terminal of the MOSFET of the final output section, the voltage waveform shown in FIG. 9B (a) is output to the terminal out.
[0158]
Next, voltage waveforms when the voltage of the power supply 117b is set to V0gl2 will be described.
[0159]
A control signal for outputting a low level from a high level is input from the control signal generation unit 114a to the pre-stage output unit 113b via the inverter 118a. The voltage waveform output to the terminal Vinp at that time is as shown in (b) of FIG. When this voltage waveform is input to the gate terminal of the MOSFET of the final output section, the voltage waveform shown in FIG. 12B (b) is output to the terminal out. That is, when the voltage value input to the MOSFET increases from V0gl1 to V0ghl2, the Vgs applied to the MOSFET decreases and the on-resistance increases. As a result, the voltage waveform output to the terminal out becomes a somewhat distorted waveform.
[0160]
Next, voltage waveforms when the voltage of the power supply 117b is set to V0gl3 will be described.
[0161]
A control signal for outputting a low level from a high level is input from the control signal generation unit 114a to the pre-stage output unit 113b via the inverter 118a. The voltage waveform output to the terminal Vinp at that time is as shown in (c) of FIG. When this voltage waveform is input to the gate terminal of the MOSFET of the final output section, the voltage waveform shown in FIG. 12B (c) is output to the terminal out. That is, when the voltage value input to the MOSFET rises to V0gl3, Vgs applied to the MOSFET is further reduced and the on-resistance is increased.
[0162]
As a result, the voltage waveform output to the terminal out becomes a more distorted waveform.
[0163]
As can be seen from the above, by applying this embodiment, the on-resistance of the modulation circuit can be varied by varying the power supply voltage even if the driving load varies. As a result, the driving capability of the modulation circuit can always be optimized, so that the above problem can be solved. Further, by using Pch and Nch together in each output unit, it is possible to cancel the change in the on-resistance of the MOSFET due to the back gate effect, and more strict gradation control is possible.
[0164]
(Sixth embodiment)
FIG. 13 shows the configuration of the modulation apparatus according to the sixth embodiment of the present invention.
[0165]
The modulation device 111c includes first final output units 112a and 112b, second final output units 112c and 112d, pre-stage output units (first and second power supply switching circuits) 113a and 113b, pre-stage output units (third and third). (Fourth power supply switching circuit) 113c, 113d, control signal generator 114a for generating control signals for the preceding output units 113a, 113b, control signal generating unit 114b for generating control signals for the preceding output units 113c, 113d, modulation signal voltage A voltage source (first modulation signal power supply) 115a for supplying the voltage, a voltage source (second modulation signal power supply) 115b for supplying the modulation signal voltage, and a voltage source (high voltage) supplied from the previous output unit 113a A first variable power source) 116a, a voltage source (second constant power source) 116b for supplying a high-level voltage output from the front-stage output unit 113b, A voltage source (third variable voltage power source) 116c that supplies a high level voltage output from the stage output unit 113c, and a voltage source (fourth constant power source) 116d that supplies a high level voltage output from the previous stage output unit 113d. A voltage source (first constant power supply) 117a for supplying a low level voltage output from the front stage output unit 113a, and a voltage source (second variable power supply) 117b for supplying a low level voltage output from the front stage output unit 113b. , A voltage source (third constant power source) 117c that supplies a low level voltage output from the front stage output unit 113c, and a voltage source (fourth variable power source) 117d that supplies a low level voltage output from the front stage output unit 113d. An inverter (first control signal inverting circuit) 118a for inverting the control signal, and an inverter (second control signal inverting circuit) 118b for inverting the control signal Obtain.
[0166]
The present embodiment is different from the fourth and fifth embodiments showing the configuration when the output voltage level is set to two levels. The circuit for outputting the voltage V0 and the voltage V1 are output. In this embodiment, the control signal generators 114a and 114b can perform independent operations.
[0167]
Note that the configuration and operation principle of the present embodiment are the same as those of the fifth embodiment, and thus description thereof is omitted.
[0168]
The effect of this embodiment will be described.
[0169]
By applying this embodiment, even if the driving load fluctuates, the on-resistance of the modulation circuit can be varied by varying the power supply voltage. As a result, the driving capability of the modulation circuit can always be optimized, so that the above problem can be solved. Further, by using Pch and Nch together in each output unit, it is possible to cancel the change in the on-resistance of the MOSFET due to the back gate effect, and more strict gradation control is possible.
[0170]
In the present embodiment, the case where the output voltage level is two levels has been described. Needless to say, the present invention can be applied to three or more levels.
[0171]
(Other embodiments)
In each of the above-described embodiments, the configuration for suppressing undesirable fluctuations in the potential of the signal at the time of application in the modulation signal has been described. However, the potential of the signal at the time of application is also applied to the scanning signal by the same configuration. Undesirable fluctuations can be suppressed.
[0172]
【The invention's effect】
As described above, according to the present invention, it is possible to suppress undesired fluctuations in the potential of a signal when a signal is applied to a wiring in an image display device.
[0173]
In addition, it was possible to realize a configuration in which the operating conditions of the circuit to which the signal is applied can be changed to an optimum one.
[Brief description of the drawings]
FIG. 1 is a circuit diagram showing a schematic configuration of a main part of a modulation circuit according to a first embodiment of the present invention.
FIG. 2 is a diagram showing an example of an output waveform of the output circuit of the modulation circuit according to the first embodiment of the present invention.
FIG. 3 is a circuit diagram showing a schematic configuration of a main part of a modulation circuit according to a second embodiment of the present invention.
FIG. 4 is a circuit diagram showing a schematic configuration of a main part of a modulation circuit according to a third embodiment of the present invention.
FIG. 5 is a diagram illustrating an example of an output waveform of an output circuit of a modulation circuit according to a third embodiment of the present invention.
FIG. 6 is a block diagram showing a schematic configuration of a modulation apparatus according to a fourth embodiment of the present invention.
FIG. 7 is a diagram for explaining the operation of a MOSFET.
FIG. 8 is a diagram illustrating an IV characteristic of a MOSFET.
FIG. 9 is a diagram illustrating an inverter that constitutes a pre-stage output unit.
10A is a voltage waveform at a terminal Vinn according to the first embodiment of the present invention, and FIG. 10B is a diagram showing a voltage waveform at the terminal out.
FIG. 11 is a block diagram showing a schematic configuration of a modulation apparatus according to a fifth embodiment of the present invention.
FIG. 12A is a voltage waveform at a terminal Vinp in the fifth embodiment of the present invention, and FIG. 12B is a diagram showing a voltage waveform at the terminal out.
FIG. 13 is a block diagram showing a schematic configuration of a modulation apparatus according to a sixth embodiment of the present invention.
FIG. 14 is a schematic diagram of a multi-electron source.
FIG. 15 is a diagram illustrating an example of a driving waveform for driving a surface conduction electron-emitting device.
FIG. 16 is a plan view showing a schematic configuration of an image display device in which surface conduction electron-emitting devices are wired in a simple matrix.
FIG. 17 is a perspective view illustrating a schematic configuration of a main part of the image display device.
FIG. 18 is a diagram for explaining electrical noise generated during voltage switching.
[Explanation of symbols]
1 Image display
2 Surface conduction electron-emitting devices
3,3A modulation circuit
4 Scanning circuit
5 rows wiring
6 lines wiring
7 Substrate
8 Metal back
9 Phosphor screen
10 Substrate
11 Output circuit
12 Control power supply
13 Output section
13A, 13B, 13C, 13D MOSFET
14 Output section
14A, 14B, 14C, 14D MOSFET
15 Inverter
16A, 16B, 16C, 16D MOSFET
21 Output circuit
23, 24, 26 Output section
31 Output circuit
111a-c modulator
112, 112a-d Final output section
113, 113a-d Pre-stage output section
114a, 114b Control signal generator
115a, 115b Modulation signal power supply
116, 116a to d High-level voltage power supply for the previous stage output section
117, 117a-d Low-level voltage power supply for the pre-stage output section
118a, 118b inverter

Claims (7)

Wiring and
A circuit that applies a predetermined potential as a potential of a signal supplied to the wiring;
An image forming element that is driven by applying a voltage when the signal is supplied to the wiring;
Have
The circuit is
A final output unit for outputting the signal to the wiring;
A pre-stage output unit connected to a pre-stage of the final output unit and outputting a control signal for controlling on / off of the final output unit;
A power source for supplying a potential to the front-stage output unit;
Including
The final output unit has a characteristic that an on-resistance is determined according to an amplitude value of a control signal input from the preceding-stage output unit,
The pre-stage output unit includes a final output unit control circuit that changes an amplitude value of the control signal according to a potential supplied from the power source,
As the power source, a variable power source that can change the potential to be supplied, and a constant power source that supplies a predetermined potential,
The final display control circuit includes a power supply switching circuit that selectively outputs a potential supplied from the variable power supply or a potential supplied from the constant power supply. The final output unit includes a first MOSFET connected in parallel between the power supply for supplying the signal and the wiring, and a second MOSFET having a different channel characteristic from the first MOSFET,
The power source includes first and second variable power sources that can change a potential to be supplied, and first and second constant power sources that supply a predetermined potential,
The pre-stage output unit selectively outputs a potential supplied from the first variable power supply or a potential supplied from the first constant power supply to the gate terminal of the first MOSFET. A second power supply switching circuit that selectively outputs a potential supplied from the second variable power supply or a potential supplied from the second constant power supply to the gate terminal of the second MOSFET;
A front-stage output unit control signal for controlling the front-stage output unit input from the outside is branched, and a signal inverted with respect to a signal input to the first power supply switching circuit is branched to the second power supply switching circuit. The image display apparatus according to claim 1, further comprising: a control signal inverting circuit that inputs the signal to the control signal inverting circuit. The image display apparatus according to claim 1, characterized by being configured by MOSFET at least one of said first or second power supply switching circuit. The final output unit includes a first MOSFET connected in parallel between the first power supply for supplying the signal and the wiring, and a second MOSFET having a channel characteristic different from that of the first MOSFET. The third MOSFET connected in parallel between the wiring and the second power source for supplying the signal and the wiring, and the third MOSFET having different channel characteristics. A second final output unit comprising four MOSFETs,
The pre-stage output unit includes a first pre-stage output unit that outputs a first control signal to the first final output unit, and a second pre-stage that outputs a second control signal to the second final output unit. An output unit,
As the power source, first and second variable power sources that are connected to the first pre-stage output unit and can change a potential to be supplied, first and second constant power sources that supply a predetermined potential, and the first The third and fourth variable power supplies connected to the two previous output units and capable of changing the supplied potential, and the third and fourth constant power supplies for supplying a predetermined potential,
The first pre-stage output unit selectively outputs a potential supplied from the first variable power supply or a potential supplied from the first constant power supply to the gate terminal of the first MOSFET. A power supply switching circuit; a second power supply switching circuit that selectively outputs a potential supplied from the second variable power supply or a potential supplied from the second constant power supply to a gate terminal of the second MOSFET; The first front-stage output unit control signal for controlling the first front-stage output unit input from the outside is branched, and the signal inverted with respect to the signal input to the first power supply switching circuit is A first control signal inverting circuit that inputs to the second power supply switching circuit, and the second pre-stage output unit is supplied from the potential supplied from the third variable power supply or from the third constant power supply. select the potential supplied to the third MOS Third power switching circuit and the gate terminal of the fourth potential is supplied or from the variable power supply of the fourth selectively said fourth MOSFET a potential supplied from the constant power supply output to the gate terminal of the ET A fourth power supply switching circuit that outputs to the second power supply circuit and a second front-stage output unit control signal for controlling the second front-stage output unit that is input from the outside are branched and input to the third power supply switching circuit. The image display apparatus according to claim 1, further comprising: a second control signal inverting circuit that inputs a signal inverted with respect to the signal to the fourth power supply switching circuit.   The image display apparatus according to claim 4, wherein at least one of the first to fourth power supply switching circuits is configured by a MOSFET. And scanning wiring number of multiple,
And a modulation wiring of multiple,
The image display apparatus according to claim 1, wherein the circuit applies a predetermined potential to one of the scanning wiring and the modulation wiring.   The image display device according to claim 6, further comprising a scanning device that selects any one of the scanning wirings.

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