JP3808814B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to reduce or prevent oxidation of a region made of silicon such as a silicon substrate or a polysilicon film during the process of the semiconductor device.
[0002]
[Prior art]
Conventionally, an unnecessary silicon oxidation phenomenon in a semiconductor process has been a factor of deteriorating the electrical characteristics of a device.
[0003]
Hereinafter, a few oxidation phenomena of silicon during the semiconductor process will be described. First, the oxidation phenomenon of silicon during the manufacturing process of the MOS transistor will be described with reference to FIG. FIG. 6 is a manufacturing process cross-sectional view sequentially showing a MOS transistor manufacturing method. In this figure, 1 is a silicon substrate made of, for example, a P-type semiconductor, 2 is a source / drain region made of an N-type impurity diffusion layer formed on the silicon substrate 1, and 3 is formed on the silicon substrate 1. An isolation oxide film having a thickness of about 500 nm made of an oxide film is formed on a region sandwiched between adjacent source / drain regions 2, for example, a SiO 2 film having a thickness of about 10 nm.₂A gate oxide film 5 made of an oxide film such as 5 is formed on the gate oxide film 4, for example, a gate electrode made of a phosphorus-doped polysilicon film having a film thickness of about 50 to 200 nm, and 6 is formed on the gate electrode 5. A resist pattern formed so that the portion to be the source / drain region 2 becomes an opening, and 7 is an unnecessary oxide film generated on the source / drain region 2 and the gate electrode 5. Further, in this drawing, an arrow 8 indicates ion implantation of an N-type impurity element such as phosphorus for forming the source / drain region 2.
[0004]
The manufacturing method of the MOS transistor will be sequentially described with reference to FIG. First, the element isolation oxide film 3 is formed on the silicon substrate 1 by the LOCOS oxidation method (described later with reference to FIG. 7), and then the silicon substrate 1 is thermally oxidized to form the gate oxide film 4. Thereafter, for example, a phosphorus-doped polysilicon film into which phosphorus ions are implanted, for example, is deposited by the CVD method, and then a resist pattern is formed by the lithography technique so that a portion to become the gate electrode 5 remains, and by anisotropic dry etching. A gate electrode 5 is formed. Thereafter, the resist pattern is removed.
[0005]
Next, as shown in FIG. 6A, a resist pattern 6 is formed by lithography so that the region to be the source / drain region 2 becomes an opening, and an N-type impurity is formed using this resist pattern 6 as a mask. After ion implantation 8 of phosphorus ions, which are elements, as shown in FIG. 6B, the resist pattern 6 is removed and, for example, a heat treatment at about 800 ° C. is performed to diffuse the phosphorus ions to form source / drain regions. 2 is formed.
[0006]
However, in the manufacturing process of such a MOS transistor, the surface of the source / drain region 2 is oxidized in the atmospheric exposure or heat treatment process, and an unnecessary oxide film 7 is formed on the surface of the source / drain region 2. Will be formed. Accordingly, even though a predetermined amount of phosphorus ions are implanted in these source / drain regions 2, some of the phosphorus present in the surface layer becomes electrically inactive, and these source / drain regions 2 There is a problem that the resistance of the semiconductor device increases and the performance as a semiconductor device decreases.
[0007]
Similarly, in the gate electrode 5 made of a phosphorus-doped polysilicon film, a thin unnecessary oxide film 7 is formed on the surface of the gate electrode 5 by exposure to the atmosphere or heat treatment during the manufacturing process, and the polysilicon film is preliminarily formed. There has been a problem that a part of phosphorus that has been electrically activated becomes electrically inactive, and the resistance of the gate electrode 5 increases.
[0008]
Further, although not shown, the same phenomenon can be seen in the storage node constituting the capacitor electrode made of the phosphorus-doped polysilicon film. Therefore, an unnecessary oxide film is also formed on the surface of the storage node, the sheet resistance value of the storage node is increased, and the oxide film on the surface is formed on the storage node in a later process. There has been a problem that the reliability of the thin film silicon nitride film for dielectrics is lowered.
[0009]
Next, the oxidation of the active region during the formation of the element isolation oxide film 3 will be described with reference to FIG. The element isolation oxide film 3 is formed using a conventionally known LOCOS oxidation method. FIG. 7 is a sectional view of manufacturing steps sequentially shown for the LOCOS oxidation method. In FIG. 7, 10 is an underlying oxide film made of an oxide film having a thickness of about 30 nm formed on the silicon substrate 1, and 11 is this underlying oxide film. An undoped polysilicon film having a thickness of about 100 nm formed on 10, and a silicon nitride film 12 having a thickness of about 200 nm formed on this undoped polysilicon film 11.
[0010]
First, as shown in FIG. 7A, the silicon substrate 1 is subjected to a heat treatment of about 900 ° C., for example, to form an underlying oxide film 10 on the silicon substrate 1. Subsequently, after depositing an undoped polysilicon film 11 on the underlying oxide film 10 by the CVD method, as shown in FIG. 7B, a heat treatment at about 900 to 1000 ° C. is performed in a nitriding gas atmosphere. Then, a silicon nitride film 12 is formed. Here, an unnecessary oxide film 7 is formed on the surface of the undoped polysilicon film 11 by exposure of the wafer to the atmosphere and heat treatment.
[0011]
Next, a resist pattern is formed using a lithography technique so as to cover a portion to be an active region and a portion to be an element isolation oxide film 3 to be an opening, and then anisotropically dry as shown in FIG. The silicon nitride film 12 in the opening of the resist pattern is removed by etching. Next, after removing the resist pattern, as shown in FIG. 7D, heat treatment at about 900 to 1000 ° C. is performed to form the element isolation oxide film 3 in the opening of the silicon nitride film. Thereafter, the silicon nitride film 12 is removed.
[0012]
However, even in the above-described process, undoped polysilicon is exposed to the atmosphere up to the process of forming the silicon nitride film 12 formed for oxidation resistance or inserted into a high-temperature furnace when the silicon nitride film 12 is deposited. The surface of the film 11 is oxidized, and an unnecessary oxide film 7 is formed at the interface between the silicon nitride film 12 and the undoped polysilicon film 11.
[0013]
When heat treatment is performed to form the element isolation oxide film 3 in the state where the unnecessary oxide film 7 exists at the interface between the silicon nitride film 12 and the undoped polysilicon film 11, the opening of the silicon nitride film 12 is formed. Will be oxidized from the surface of the undoped polysilicon film opposite to the silicon oxide film, and will soon be oxidized from the side just below the edge of the opening of the silicon nitride film 12, but the unnecessary oxide film 7 and underlying oxide film 10 In FIG. 2, since the diffusion rate of oxygen atoms is large, oxidation to the undoped polysilicon film proceeds along these routes. Therefore, there is a problem that the tip of the bird's beak becomes long and the leakage current from the periphery of the active region to the silicon substrate 1 increases.
[0014]
[Problems to be solved by the invention]
As described above, in the conventional method of manufacturing a semiconductor device, the source / drain region 2, the gate electrode 5, the storage node of the capacitor electrode, the element isolation oxide film, etc. are formed by exposure to the atmosphere or heat treatment in the formation process. An unnecessary oxide film 7 is formed on the surface, which causes a problem that the electrical characteristics of the device deteriorate.
[0015]
SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and can prevent an unnecessary oxide film from being formed on the surface of silicon during the process of the semiconductor device and improve the electrical characteristics of the device. It aims at providing the manufacturing method of.
[0016]
[Means for Solving the Problems]
In the method of manufacturing a semiconductor device according to claim 1 of the present invention, a step of forming an underlying oxide film made of an oxide film on a silicon substrate, and forming a polysilicon film or an amorphous silicon film on the underlying oxide film And an impurity element of nitrogen (N), argon (Ar), xenon (Xe), or carbon (C) is added to the polysilicon film or the amorphous silicon film at a surface density of 1 × 10¹³~ 2x10¹⁵cm^-2After the ion implantation, the impurity element is ion-implanted into the surface layer of the polysilicon film or amorphous silicon film and the interface layer with the underlying oxide film by performing a heat treatment within a temperature range of 700 ° C. to 900 ° C. Is 1 × 10²⁰~ 1x10²²cm^-3Forming a high-concentration impurity element-containing layer contained in a high concentration, forming a silicon nitride film on the high-concentration impurity element-containing layer, etching the silicon nitride film, and forming the silicon nitride film The method includes a step of forming an opening and a step of performing heat treatment in an oxidizing gas atmosphere to grow and form an element isolation oxide film in the opening of the silicon nitride film.
[0017]
DETAILED DESCRIPTION OF THE INVENTION
Embodiment 1 FIG.
A method for manufacturing the MOS transistor according to the first embodiment of the present invention will be described below. FIG. 1 is a manufacturing process cross-sectional view sequentially showing a MOS transistor manufacturing method. In this figure, the same parts as those in the conventional example are designated by the same reference numerals, and detailed description thereof is omitted. An arrow 15 indicates an impurity element such as a nitrogen atom (N⁺) Ion implantation. Reference numeral 16 denotes a nitrogen-containing layer formed in a region where the source / drain region 2 is formed on the silicon substrate 1, and nitrogen atoms are ion-implanted. Reference numeral 17 denotes a source / drain region 2 for ion-implanting nitrogen atoms. The resist pattern 18 formed so as to cover the other region is formed on the surface layer of the nitrogen-containing layer 16, and nitrogen atoms as impurity elements are 1 × 10²⁰~ 1x10²²cm^-3This is a high-concentration nitrogen-containing layer that is a high-concentration impurity element-containing layer contained in a high concentration.
[0018]
Next, as shown in FIG. 1A, after the gate electrode 5 is formed by the same method as the conventional example, the region where the source / drain region 2 is formed becomes an opening. A resist pattern 17 is formed by a lithography technique, and nitrogen atoms have an area density of 1 × 10¹³~ 2x10¹⁵cm^-2Ion implantation 15 is performed under the following conditions. At this time, the ion implantation energy may be arbitrary. However, the nitrogen implantation range distance is, for example, closer to the surface of the substrate than the phosphorus implantation range distance used for forming the source / drain region 2 in the subsequent step. It is better to set to.
[0019]
Next, after removing the resist pattern 17, a heat treatment at 700 ° C. to 900 ° C. is performed in a nitrogen atmosphere by a method such as furnace annealing or rapid thermal annealing (RTA) as shown in FIG. At this time, the nitrogen introduced into the silicon substrate 1 is redistributed to form the nitrogen-containing layer 16 and a large amount of nitrogen is localized in a very narrow region of the surface portion of the silicon substrate 1 to 1 × 10.²⁰~ 1x10²²cm^-3Thus, a high-concentration nitrogen-containing layer 18 having a film thickness of about 10 to 15 nm in which high-concentration nitrogen exists is formed.
[0020]
Next, as shown in FIG. 1 (c), a resist pattern 6 is formed by exactly the same method as described in the conventional example, phosphorus ions are implanted 8, and then shown in FIG. 1 (d). Thus, the resist pattern is removed and heat treatment at about 800 ° C. is performed, whereby the source / drain region 2 is formed.
[0021]
In the MOS transistor manufacturing method described above, before the source / drain region 2 is formed, nitrogen atoms are introduced into the region of the silicon substrate 1 where the source / drain region 2 is to be formed at a surface density of 1 × 10.¹³~ 2x10¹⁵cm^-2After ion implantation at a low concentration of 1 × 10 10, the surface layer of the silicon substrate 1 is heat-treated at 700 ° C. to 900 ° C.²⁰~ 1x10²²cm^-3The high-concentration nitrogen-containing layer 18 is formed. FIG. 2 is a view showing the nitrogen distribution after ion implantation and heat treatment after the nitrogen distribution in the depth direction, where the vertical axis indicates the nitrogen concentration and the horizontal axis indicates the depth. FIG. 2A shows a state immediately after ion implantation, and FIG. 2B shows a state after heat treatment. That is, as shown in this figure, nitrogen existing in a low concentration in the film after ion implantation is localized in a very narrow region on the surface of the silicon substrate 1 after heat treatment, and becomes 1 × 10 6.²⁰~ 1x10²²cm^-3Thus, a high concentration nitrogen-containing layer 18 is formed.
[0022]
Therefore, since the oxidation rate of the silicon substrate 1 containing nitrogen is low, the formation of a high-concentration nitrogen-containing layer 18 on the surface layer of the silicon substrate 1 forms a resist pattern forming step and source / drain region formation in a later step. Therefore, it is possible to prevent or reduce oxidation of the wafer due to atmospheric exposure and heat treatment between processes such as ion implantation.
[0023]
That is, after forming the high-concentration nitrogen-containing layer 18, ions are implanted to form the source / drain region 2, thereby reducing the oxidation of the surface layer of the source / drain region 2. This prevents the phosphorus ions from becoming inactive, thereby preventing an increase in the sheet resistance of the source / drain region 2 and improving the electrical characteristics of the semiconductor device.
[0024]
Further, as described above, by reducing the nitrogen implantation amount, the nitrogen implantation layer does not become an amorphous layer. Therefore, in the vicinity of the bonding surface between the silicon substrate 1 and the nitrogen-containing layer 16 even after the heat treatment. Generation of secondary defects can be suppressed, and defects generated by nitrogen implantation are recovered by a heat treatment in a subsequent process. Therefore, nitrogen implantation does not increase the leakage current value as compared with a conventional transistor.
[0025]
Further, the surface layer of the silicon substrate 1 is 1 × 10²⁰~ 1x10²²cm^-3The lower limit of the nitrogen injection amount that can form the high-concentration nitrogen-containing layer 18 is 1 × 10¹³cm^-2The upper limit of the nitrogen implantation amount at which secondary defects generated by heat treatment do not occur is 2 × 10¹⁵cm^-2Therefore, the nitrogen injection amount is 1 × 10¹³~ 2x10¹⁵cm^-2Must be done within the range of
[0026]
Further, by performing high-concentration nitrogen implantation, a high-concentration nitrogen-containing layer 16 can be formed without heat treatment, but in this nitrogen-containing layer 16, the carrier concentration is lowered and the resistance is increased. Therefore, there arises a problem that the performance as a semiconductor device is deteriorated.
[0027]
Furthermore, in the heat treatment for forming the high-concentration nitrogen-containing layer 18, the lower limit temperature at which the high-concentration nitrogen-containing layer 18 can be formed on the surface layer of the silicon substrate 1 is 700 ° C., and the allowable heat treatment temperature for the device is Since it is 900 degreeC, it is necessary to perform heat processing within the range of about 700-900 degreeC.
[0028]
Further, 1 × 10 10 depending on the nitrogen injection amount and the setting conditions of the heat treatment.²²cm^-3If a very thin silicon nitride film of about 1 nm is further formed on the surface layer of the high-concentration nitrogen-containing layer 18, the oxidation resistance effect will be further increased.
[0029]
Moreover, although the form of the nitrogen ion implanted in the above-described embodiment has been described with respect to the nitrogen atom, the nitrogen molecule (N₂ ⁺).
[0030]
Embodiment 2. FIG.
In the second embodiment of the present invention, the high-concentration nitrogen-containing layer 18 formed in the source / drain region 2 in the first embodiment is formed on the gate electrode 5 made of a phosphorus-doped polysilicon film. In the same manner as in the first embodiment, the gate electrode 5 is formed, and after the resist pattern is removed, a resist pattern in which the gate electrode 5 serves as an opening is formed. 10¹³~ 2x10¹⁵cm^-2Then, heat treatment is performed in a nitrogen atmosphere within a range of 700 ° C. to 900 ° C. to form a high concentration nitrogen-containing layer 18 on the surface layer of the gate electrode 5. In addition, the upper limit of the energy at the time of ion implantation at this time must be set so that 3σ of the nitrogen implantation distribution in the phosphorus-doped polysilicon film forming the gate electrode 5 does not exceed the film thickness of the gate electrode 5. Don't be.
[0031]
Thus, also in the gate electrode 5 made of the phosphorus-doped polysilicon film, the nitrogen exhibits a behavior similar to that in the single crystal of the first embodiment by performing heat treatment after implanting nitrogen. Since the high concentration nitrogen-containing layer 18 is formed on the surface layer 5, the gate electrode 5 having a low oxidation rate or oxidation resistance can be formed, and phosphorus is prevented from being electrically inactive. In order to prevent the resistance from increasing, the performance of the device can be improved.
[0032]
In this embodiment, the gate electrode 5 made of a phosphorus-doped polysilicon film has been described. However, the same effect can be obtained by using an undoped polysilicon film. That is, in the undoped polysilicon film, an N-type or P-type impurity element is ion-implanted and heat-treated, but in the previous step, nitrogen atoms are ion-implanted and heat-treated. Thus, the same effect as that of the phosphorus-doped polysilicon film can be obtained.
[0033]
In this embodiment, the case where the high-concentration nitrogen-containing layer 18 formed in the gate electrode 5 and the source / drain region 2 is individually formed has been described. Furthermore, in this embodiment, nitrogen is implanted after patterning into the gate electrode 5, but it goes without saying that the same effect can be obtained even if nitrogen is implanted in the state of the polysilicon film and heat treatment is performed.
[0034]
Embodiment 3 FIG.
In the method of manufacturing a semiconductor device according to the third embodiment of the present invention, a storage node for a capacitor electrode composed of a phosphorus-doped polysilicon film having a low oxidation rate or oxidation resistance is provided. After forming a capacitor electrode made of phosphorus-doped polysilicon by anisotropic etching, 1 × 10 nitrogen atoms are added as in the first and second embodiments.¹³~ 2x10¹⁵cm^-2By implanting ions with a surface density implantation amount and heat-treating in a nitrogen atmosphere at 700 to 900 ° C., nitrogen is 1 × 10 6 on the surface of the capacitor electrode.²⁰~ 1x10²²cm^-3Therefore, the storage node of the capacitor electrode having a low oxidation rate or oxidation resistance can be formed.
[0035]
Therefore, an increase in the sheet resistance of the storage node is prevented, and an oxide film is not formed on the surface layer of the storage node, so that the reliability of the dielectric silicon nitride film deposited on the storage node in a later process is also prevented. be able to.
[0036]
Moreover, since nitrogen can be uniformly introduced into the surface of this electrode by performing rotational implantation at an arbitrary implantation angle or using step implantation as a nitrogen implantation condition, the surface of the electrode contains a high concentration of nitrogen. The layer can be formed uniformly, and oxidation can be reduced and prevented more effectively.
[0037]
Embodiment 4 FIG.
Embodiment 4 of the present invention is an example used in a method for forming an element isolation oxide film. FIG. 3 is a manufacturing process cross-sectional view sequentially showing a method for forming an element isolation oxide film. In this figure, the same reference numerals are assigned to the same parts as those of the conventional example and the above-described embodiment, and detailed description thereof is omitted. . FIG. 4 is a diagram showing the nitrogen distribution in the depth direction, FIG. 5 is an enlarged view of the edge portion of the element isolation oxide film 3, FIG. 5 (a) is a conventional example, and FIG. The arrow in the figure indicates the oxidation direction.
A method for forming the element isolation oxide film 3 will be described with reference to FIGS.
[0038]
First, an underlayer oxide film 10 having a film thickness of about 30 nm and an undoped polysilicon film 11 having a film thickness of about 100 nm are formed in the same manner as in the conventional example, and then the same conditions as in the first embodiment as shown in FIG. That is, the nitrogen atom has an areal density of 1 × 10¹³~ 2x10¹⁵cm^-2Ion implantation is performed on the undoped polysilicon film 11 with an implantation amount of. However, the upper limit of the ion implantation energy is set so that 3σ of the nitrogen implantation distribution does not exceed the total thickness of the undoped polysilicon film 11 and the underlying oxide film 10 so as not to affect the silicon substrate 1. Next, heat treatment is performed at 700 to 900 ° C. under exactly the same conditions as in the first embodiment, that is, in a nitrogen atmosphere.
[0039]
As a result, as shown in FIG. 4, the surface layer of the undoped polysilicon film 11 is 1 × 10 nm having a film thickness of about 10 to 15 nm as in the first embodiment.²⁰~ 1x10²²cm^-3Thus, a high concentration nitrogen-containing layer 18 containing a high concentration of nitrogen is formed. At the same time, a similar high-concentration nitrogen-containing layer 18 is also formed on the interface layer between the underlying oxide film 10 and the undoped polysilicon film 11. The high-concentration nitrogen-containing layer 18 formed on the surface layer of the undoped polysilicon film 11 is undoped when exposed to the atmosphere during each subsequent process and when inserted into a furnace for forming the silicon nitride film 12. Oxidation of the polysilicon film 11 is prevented and reduced.
[0040]
Next, as shown in FIG. 3B, similarly to the conventional example, a heat treatment is performed at about 900 to 1000 ° C. in a nitriding gas atmosphere to form a silicon nitride film 12.
[0041]
Next, a resist pattern is formed so as to cover a portion to be an active region and a portion to be an element isolation oxide film 3 to be an opening, and as shown in FIG. 3C, the resist pattern is formed by anisotropic dry etching. After the silicon nitride film 12 in the opening is removed by etching, the resist pattern is removed. Next, as shown in FIG. 3D, a heat treatment at about 900 to 1000 ° C. is performed to form an element isolation oxide film 3 by thermal oxidation in the opening of the silicon nitride film 12.
[0042]
In the element isolation oxide film 3 of this embodiment formed as described above, the tip of the bird's beak penetrating into the active region is shorter as compared with the conventional example as shown in FIG. This has the effect of reducing the leakage current.
[0043]
In other words, in the method of forming the element isolation oxide film 3, it is unnecessary at the interface between the undoped polysilicon film 11 and the silicon nitride film 12 due to the high concentration nitrogen-containing layer 18 formed on the surface layer of the undoped polysilicon film 11. Since the generation of the oxide film 7 is suppressed, the oxidation does not proceed as an unnecessary oxide film 7 and a path as in the conventional example, so that the undoped polysilicon film immediately below the edge of the opening of the silicon nitride film 12 11, that is, the oxidation from the lateral direction is reduced. At this time, depending on the conditions of nitrogen implantation, the effect of oxidation resistance is small, and an unnecessary oxide film 7 may be generated at the interface between the undoped polysilicon film 11 and the silicon nitride film 12. Since the thickness is very thin, the same effect as described above can be obtained.
[0044]
Further, a combination of nitrogen in the high-concentration nitrogen-containing layer 18 at the interface between the undoped polysilicon film 11 and the underlying oxide film 10 and silicon at the interface serves as a barrier to suppress intrusion of oxygen atoms from the underlying oxide film 10. Thus, upward oxidation from the underlying oxide film 10 to the undoped polysilicon film 11 can be reduced. Therefore, at the end portion of the element isolation oxide film 3, the oxidation from the side surface and the lower surface is suppressed as described above, so that the tip of the bird's beak becomes shorter.
[0045]
In the fourth embodiment described above, nitrogen is implanted into the entire surface of the substrate immediately after the undoped polysilicon film 11 is deposited. However, after the undoped polysilicon film 11 is deposited and the silicon nitride film 12 is deposited. Then, a resist pattern is formed in which the portion to be the element isolation oxide film 3 becomes an opening by lithography, and the silicon nitride film 12 is removed from the opening, and the undoped polysilicon film 11 is exposed to form nitrogen. By injecting and further heat treatment, the same effect as described above can be obtained.
[0046]
However, in the nitrogen implantation in this case, since nitrogen atoms are uniformly implanted even into the undoped polysilicon film 11 immediately below the edge of the opening formed in the silicon nitride film 12 as described above, a high angle (45 Rotation injection or step injection at °) must be used.
[0047]
In the above-described second to fourth embodiments, the method for reducing and preventing the oxidation of the surface when a polysilicon film is used has been described. However, this is not limited to the polysilicon film, and an amorphous silicon film is used. The same effect can be obtained.
[0048]
In the embodiment described above, nitrogen atoms (N⁺), An example of carbon (C⁺The same effects as those of the above-described embodiment can be obtained even if ions of (1) are implanted. Argon (Ar⁺), Xenon (Xe⁺), A layer such as a silicon nitride film or a silicon carbide film like carbon or nitrogen is not formed on the surface layer, but a high-concentration impurity element-containing layer is formed, and the above-described embodiment is used. The same effect can be obtained.
[0049]
【The invention's effect】
In the method for manufacturing a semiconductor device according to claim 1 of the present invention, the high concentration impurity element-containing layer is formed in the interface layer between the surface layer of the polysilicon film or the amorphous silicon film and the underlying oxide film. Since the unnecessary oxidation can be reduced and prevented by the impurity element-containing layer, the tip of the bird's beak of the element isolation oxide film can be shortened, and the occurrence of leakage current can be suppressed, so that the electrical characteristics as a semiconductor device are improved. .
[Brief description of the drawings]
FIG. 1 is a manufacturing step sectional view showing a method for manufacturing a semiconductor device in a first embodiment of the invention;
FIG. 2 is a diagram showing a nitrogen distribution in the depth direction in a silicon substrate after ion implantation and heat treatment in the method for manufacturing a semiconductor device according to the first embodiment of the present invention;
3 is a manufacturing process sectional view showing the method of manufacturing the semiconductor device according to the fourth embodiment of the present invention; FIG.
FIG. 4 is a diagram showing a nitrogen distribution in the depth direction in an element isolation oxide film formed by the method for manufacturing a semiconductor device according to a fourth embodiment of the present invention.
5 is a partially enlarged view showing an element isolation oxide film formed by a conventional semiconductor device manufacturing method and an element isolation oxide film formed by a semiconductor device manufacturing method according to a fourth embodiment of the present invention; FIG. .
FIG. 6 is a manufacturing step sectional view showing a conventional method of manufacturing a semiconductor device.
FIG. 7 is a manufacturing step sectional view showing a conventional method of manufacturing a semiconductor device.
[Explanation of symbols]
1 silicon substrate, 2 source / drain regions, 3 element isolation oxide film,
5 Gate electrode, 8 Phosphorus ion implantation, 10 Underlay oxide film,
11 undoped polysilicon film, 12 silicon nitride film,
15 Ion implantation of nitrogen atoms, 18 High-concentration nitrogen-containing layer.

Claims (1)

A step of forming an underlying oxide film made of an oxide film on a silicon substrate; a step of forming a polysilicon film or an amorphous silicon film on the underlying oxide film; and nitrogen (N) in the polysilicon film or amorphous silicon film. , Argon (Ar), xenon (Xe), or carbon (C) is ion-implanted at an area density of 1 × 10 ¹³ to 2 × 10 ¹⁵ cm ⁻² and then within a temperature range of 700 ° C. to 900 ° C. By performing the heat treatment in step 1, the impurity element ion-implanted into the surface layer of the polysilicon film or the amorphous silicon film and the interface layer with the underlying oxide film has a high density of 1 × 10 ²⁰ to 1 × 10 ²² cm ⁻³ . A step of forming a high-concentration impurity element-containing layer included in the concentration, a step of forming a silicon nitride film on the high-concentration impurity element-containing layer, and the silicon nitride A step of forming an opening in the silicon nitride film, and a step of performing a heat treatment in an oxidizing gas atmosphere to grow and form an element isolation oxide film in the opening of the silicon nitride film. A method of manufacturing a semiconductor device.

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