JP3807036B2 - Digital data processing apparatus and method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a digital data processing apparatus and method for controlling the level in the amplitude direction of 1-bit data obtained by subjecting an original audio signal to digital modulation processing.
[0002]
[Prior art]
1-bit data obtained by subjecting an original analog audio signal to delta-sigma (ΔΣ) modulation processing is, for example, compared with conventional digital audio data in a format such as a sampling frequency of 44.1 kHz and a data word length of 16 bits. It has a very high sampling frequency and a short data word length such that the frequency is 64 times that of 44.1 kHz and the data word length is 1 bit, and features a wide transmittable frequency band. Further, even with 1-bit data by the ΔΣ modulation process, a high dynamic range can be secured in an audio band that is low with respect to an oversampling frequency of 64 times. This feature can be applied to high-quality recorders and data transmission.
[0003]
The delta-sigma modulation circuit itself that performs the delta-sigma modulation processing on the analog audio signal is not particularly a new technology, the circuit configuration is suitable for integration, and the accuracy of A / D conversion can be obtained relatively easily. Therefore, it is a circuit that has been conventionally used in an A / D converter.
[0004]
The 1-bit data obtained by the ΔΣ modulation process can be returned to an analog audio signal by passing through a simple analog low-pass filter.
[0005]
On the other hand, it is difficult to perform level control processing for effecting effects such as a limiter by nonlinear processing used in digital audio mastering or the like for the 1-bit data. For example, after performing the level control process such as the nonlinear process on the analog signal obtained by performing the analog conversion process on the 1-bit data, it is necessary to convert the 1-bit data into the 1-bit data again.
[0006]
[Problems to be solved by the invention]
By the way, in the method of performing level control processing such as the nonlinear processing on the analog signal obtained by subjecting the 1-bit data to analog conversion processing once, the analog nonlinear device again converts to the 1-bit data. In addition to the necessity, since the signal that has already been converted to 1-bit data is processed, it must be converted to an analog audio signal and subjected to nonlinear processing, followed by ΔΣ modulation, which reduces the complexity of the configuration and the signal quality Accompanied.
[0007]
The present invention has been made in view of the above circumstances, and in accordance with the instantaneous peak value level of the amplitude of the low-frequency audio signal component of 1-bit data, the level of the 1-bit data is simplified and the sound quality is improved. An object of the present invention is to provide a digital data processing device that can be controlled without damage.
[0008]
In addition, the present invention has been made in view of the above circumstances, and the level of the 1-bit data has a simple configuration and the sound quality according to the average energy level of the amplitude of the low-frequency audio signal component of the 1-bit data. It is an object of the present invention to provide a digital data processing apparatus that can be controlled without impairing the above.
[0009]
In addition, the present invention has been made in view of the above situation, and according to the amplitude level information of the low-frequency audio signal component of 1-bit data, the level of the 1-bit data is simplified and the sound quality is improved. It is an object of the present invention to provide a digital data processing method that can be controlled without damage.
[0010]
[Means for Solving the Problems]
In order to solve the above problems, a digital data processing apparatus according to the present invention controls digital data obtained by subjecting an audio signal to delta-sigma modulation processing to vary the gain of the audio signal. An instantaneous peak value level detecting means for extracting only the low frequency component of the audio signal from the 1-bit digital data and detecting the instantaneous peak value level of the low frequency component of the audio signal; A gain coefficient of the instantaneous peak value level by inputting the instantaneous peak value level obtained by the instantaneous peak value level detection means to the input / output characteristics stored in the storage means; And a gain generation means for generating the gain coefficient output from the gain generation means. Multiplies the digital data, and a level control means for controlling the 1-bit digital data based on the input characteristics by performing a delta-sigma modulation.
[0011]
In order to solve the above problems, a digital data processing apparatus according to the present invention controls digital data obtained by subjecting an audio signal to delta-sigma modulation processing to vary the gain of the audio signal. An apparatus for extracting only a low frequency component of the audio signal from the 1-bit digital data and detecting an average energy level of the low frequency component of the audio signal; Storage means having output characteristics and gain generation for generating a gain coefficient of the average energy level by inputting the average energy level obtained by the average energy level detection means to the input / output characteristics stored in the storage means And the gain output from the gain generating means The number was multiplied by the 1-bit digital data, and a level control means for controlling the 1-bit digital data based on the input characteristics by performing a delta-sigma modulation.
[0012]
In order to solve the above problems, a digital data processing method according to the present invention controls digital data obtained by subjecting an audio signal to delta-sigma modulation processing to vary the gain of the audio signal. A method of detecting an instantaneous peak value level detecting step of extracting only a low frequency component of the audio signal from the 1-bit digital data and detecting an instantaneous peak value level of the low frequency component of the audio signal; Storing the input / output characteristics in the storage means, and inputting the instantaneous peak value level obtained by the instantaneous peak value level detection step into the input / output characteristics stored in the storage means by the storage step. Gain generation step for generating peak value level gain coefficient and the above gain generation The gain coefficient output from the step by multiplying the above 1-bit digital data, and a level control step of controlling the 1-bit digital data based on the input characteristics by performing a delta-sigma modulation.
Further, in order to solve the above problems, the digital data processing method according to the present invention controls a 1-bit digital data obtained by subjecting an audio signal to delta-sigma modulation processing to change the gain of the audio signal. An average energy level detecting step for extracting only a low frequency component of the audio signal from the 1-bit digital data and detecting an average energy level of the low frequency component of the audio signal, the data processing method, The average energy level obtained by inputting the average energy level obtained by the average energy level detection step to the input / output characteristic stored in the storage means by the storage step; Gain generation to generate a gain factor for And a level control step for controlling the 1-bit digital data based on the input characteristics by multiplying the 1-bit digital data by the gain coefficient output from the gain generation step and performing delta-sigma modulation. Prepare.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, several embodiments of a digital data processing apparatus and method according to the present invention will be described.
[0021]
First, in the first embodiment, non-linear limiter processing is performed on 1-bit data obtained by subjecting an original analog audio signal to delta-sigma (ΔΣ) modulation processing, the level is controlled, and the limiter processing is performed. 1-bit data processing device such as an effect device for outputting an audio signal. This 1-bit data processing apparatus detects the level information of the amplitude of the low frequency component of 1-bit data according to the digital data processing method of the present invention, and the above 1 based on the gain coefficient generated according to this amplitude level information. By applying a digital data processing method characterized by controlling the level of bit data, the level of the 1-bit data can be set with a simple configuration in accordance with the amplitude level information of the low-frequency audio signal component of the 1-bit data. In addition, the sound quality can be controlled without deteriorating.
[0022]
The 1-bit data processing apparatus shown in FIG. 1 is an instantaneous wave of the amplitude of the low-frequency component of the 1-bit data input X from the ΔΣ modulator 2 that performs ΔΣ modulation processing on the original analog audio signal supplied from the input terminal 1. Instantaneous peak value level detector 3 such as a digital FIR filter that detects the peak value A, and a gain generator that generates a gain coefficient K according to the instantaneous peak value level A detected by the instantaneous peak level detector 3 4 and a level controller 7 that controls the level of the 1-bit data based on the gain coefficient K generated by the gain generator 4 and outputs a 1-bit data output Y subjected to nonlinear limiter processing. Prepare.
[0023]
The 1-bit data processing apparatus includes a delay line 6 that delays the 1-bit data by a time corresponding to the processing time of the instantaneous peak value level detector 3 and the gain generator 4. The level controller 7 controls the level of the delayed 1-bit data.
[0024]
The level controller 7 multiplies the delayed 1-bit data from the delay line 6 by the gain coefficient K from the gain generator 4 and outputs a multiplication output Z, and the multiplication output Z from the multiplier 8 And a ΔΣ modulator 9 for performing ΔΣ modulation processing again.
[0025]
The gain generator 4 reads the gain coefficient K corresponding to the instantaneous peak value level A from the ROM table 5 storing the input / output characteristics obtained by a nonlinear limiter function described later, and obtains the gain coefficient K. This is supplied to the multiplier 8 of the level controller 7.
[0026]
Here, detailed configurations of the ΔΣ modulator 2 and the ΔΣ modulator 9 are shown in FIG. For example, the ΔΣ modulator 2 includes an adder 16, an integrator 17, a quantizer 18, and a delay device 20. The addition output of the adder 16 is supplied to the integrator 17, and the integration output from the integrator 17 is supplied to the quantizer 18. The quantized output of the quantizer 18 is derived from the output terminal 19, converted to a negative sign via the delay device 20, fed back to the adder 16, and supplied from the input terminal 15 (input terminal 1 in FIG. 1). Added to the analog audio signal. The added output from the adder 16 is integrated by an integrator 17, and the integrated output from the integrator 17 is quantized by a quantizer 18 into 1-bit data every sample period.
[0027]
Note that the ΔΣ modulators 2 and 9 use, for example, a clock of 64 fs, which is 64 times the sampling frequency fs (= 44.1 KHz) used in normal PCM processing, as the sampling clock. In addition, each part shown in FIG. 1 uses the 64 fs as a system clock, that is, an operating frequency.
[0028]
In this 1-bit data processing apparatus, as described above, nonlinear limiter processing is performed on 1-bit data. This nonlinear limiter processing characteristic is shown in FIG.
[0029]
The non-linear limiter processing characteristics shown in FIG.
y = f (x) (1)
Conventionally, it has been made possible only by a multi-bit PCM device having a configuration as shown in FIG. In FIG. 4, a PCM signal input x from an input terminal 25 is converted into an output signal y subjected to nonlinear limiter processing according to the input signal level by a converter 26 that performs level conversion by an input / output function f (x). The The converted output y is derived from the output terminal 27. As described above, in the multi-bit PCM, since the input signal x itself represents the amplitude value of the signal, the processing output value can be directly determined by the input / output function.
[0030]
On the other hand, in the case of the 1-bit data, the data itself has only two maximum and minimum amplitude values consisting of “0” and “1”, and a processing signal can be obtained directly from the 1-bit data input by an input / output function. There wasn't.
[0031]
Therefore, in the 1-bit data processing apparatus shown in FIG. 1, the instantaneous peak value level detector 3 detects the instantaneous peak value level of the low-frequency audio signal component from the one-bit data input, and the instantaneous peak value level is detected. The gain generator 4 generates a conversion gain coefficient. Based on this gain coefficient, the level controller 7 obtains level-controlled 1-bit data, here, 1-bit data output subjected to nonlinear limit processing.
[0032]
The operation of this 1-bit data processing apparatus will be described in detail with reference to the timing chart of FIG. First, the original analog audio signal (FIG. 5A) input from the input terminal 1 is converted into a 1-bit data input X shown in FIG. 5B by the ΔΣ modulator 2 shown in FIG. The This 1-bit data input X is supplied to the instantaneous peak value level detector 3 and the delay line 6.
[0033]
The instantaneous peak value level detector 3 is composed of a digital FIR filter having an audio band as a cutoff frequency, and detects the instantaneous peak value level A ((c) of FIG. 5) of the 1-bit data input X. The instantaneous peak value level A is digital data and is an output having amplitude information.
[0034]
When the instantaneous peak value level A is supplied, the gain generator 4 reads the gain coefficient K corresponding to the predetermined instantaneous peak value level A with reference to the ROM table 4 and supplies the gain coefficient K to the multiplier 8 of the level controller 7. Output.
[0035]
The multiplier 8 is a digital multiplier, and the multiplier output Z is
Z = K * X (2)
Is output as shown in FIG.
[0036]
The gain coefficient K at this time is expressed by the above equation (1) indicating the input / output conversion function.
K = f (X) / X (3)
It becomes.
[0037]
In the case of 1-bit data, the instantaneous peak value level of the low-frequency component signal is obtained as A by the instantaneous peak value level detector 3. As a result, the gain generator 4
K = f (A) / A (4)
Thus, a gain coefficient K as shown in FIG. 5D corresponding to the level is generated. The expressions (3) and (4) correspond to the transfer function of the converter 26 according to the expression (1).
[0038]
FIG. 6 shows an example of conversion characteristics stored in the ROM table 4. This is the transfer characteristic derived by the equation (4) from the input / output conversion function of the nonlinear limiter shown in FIG. 3 and the equation (1). Here, as shown in FIG. 5, the gain coefficient K when a sine wave is actually input is around 2.0 when the level A is around 0.0, and the absolute value of the level A is 1.0. When near, it indicates around 1.0.
[0039]
On the other hand, the 1-bit data input X is subjected to a delay operation for the delay time by the instantaneous peak level detector 3 and the gain generator 4 through the delay line 6, and the delay line output as shown in FIG. After the timing is adjusted, the gain coefficient (K) is multiplied by the multiplier 8 in the gain controller 7. The multiplication output Z multiplied by K and obtained as shown in FIG. 5 (f) is converted again into 1-bit data by the ΔΣ modulator 9 having the configuration shown in FIG. 2, and as shown in FIG. 5 (g). Is obtained as a 1-bit data output Y level-controlled.
[0040]
The 1-bit gain controller including the level controller 7 and the gain generator 4 is disclosed in Japanese Patent Application Laid-Open No. 8-274646 by the present applicant.
[0041]
That is, the 1-bit data input to the multiplication means is multiplied by, for example, a 16-bit multibit multiplication coefficient generated by the coefficient generation means. Then, the ΔΣ modulation means performs ΔΣ modulation processing on the multiplication output of the multiplication means and converts it into 1-bit data.
[0042]
In FIG. 1, the 1-bit data output Y from the level controller 7 is supplied to the analog FIR filter 10, and finally an audio signal component as shown in (h) of FIG. 5 is obtained from the output terminal 11.
[0043]
The analog FIR filter 10 has a configuration as shown in FIG. 7, for example. As shown in FIG. 7, the analog FIR filter 10 includes four cascaded D flip-flops D-FF1, D-FF2, D-FF3, and D-FF4, and D flip-flops D-FF1, D- Four resistors R1, R2, R3, and R4 connected to FF2, D-FF3, and D-FF4, respectively, are provided. By adding the currents from the four resistors R1, R2, R3, and R4, an analog FIR filter is formed, and the output of the FIR filter is smoothed by the capacitor C and derived from the output terminal 33.
[0044]
The input terminal 31 to which 1-bit data is supplied is connected to the data input terminal D of the D flip-flop D-FF1, and the output terminal Q of the D flip-flop D-FF1 is connected to the data input terminal D of the D flip-flop D-FF2. The output terminal Q of the D flip-flop D-FF2 is connected to the data input terminal D of the D flip-flop D-FF3, and the output terminal Q of the D flip-flop D-FF3 is connected to the data of the D flip-flop D-FF4. It is connected to the input terminal D.
[0045]
A clock input terminal 32 to which a clock CK is supplied is connected to each clock terminal of each D flip-flop D-FF1, D-FF2, D-FF3, and D-FF4.
[0046]
One end of resistor R1 is connected to output terminal Q of D flip-flop D-FF1, one end of resistor R2 is connected to output terminal Q of D flip-flop D-FF2, and output terminal Q of D flip-flop D-FF3. One end of the resistor R3 is connected to the output terminal Q, and one end of the resistor R4 is connected to the output terminal Q of the D flip-flop D-FF4.
[0047]
The other ends of these resistors R1, R2, R3, and R4 are connected to form an output terminal 33 from the connection point, and the analog output is smoothed using a capacitor C inserted between the connection point and the ground. .
[0048]
The analog signal from the analog FIR filter 10 is converted into an audible analog audio signal ((h) in FIG. 5) by passing through an analog LPF (not shown).
[0049]
The audio signal component shown in (h) of FIG. 5 has a gain close to 2.0 times at a low level with respect to the original audio signal shown in (a) of FIG. As it becomes, the limiter effect is gradually obtained.
[0050]
As described above, according to the 1-bit data processing apparatus, the 1-bit data is used as it is without changing it back to the analog signal once as in the prior art, and the gain operation according to the low frequency component level is performed. Non-linear limiter processing is realized. That is, the level can be controlled with a simpler configuration and without losing the sound quality.
[0051]
The signal shown in (h) of FIG. 5 was obtained when the input / output function used in the nonlinear limiter shown in FIG. 3 was used. However, similar nonlinear processing can be performed by using other characteristics. It is possible and various effects can be realized.
[0052]
Next, a second embodiment will be described. This second embodiment is also a 1-bit data processing device for controlling the level of 1-bit data obtained by subjecting an original analog audio signal to ΔΣ modulation processing. A level change process that changes over a long time, for example, an expand process is performed.
[0053]
This 1-bit data processing apparatus is configured as shown in FIG. 1 differs from the configuration shown in FIG. 1 in that an average energy level detector 35 is provided in place of the instantaneous peak value level detector 3, and therefore a new gain generator 38 and ROM 39 are used. is there.
[0054]
The average energy level detector 35 detects the average energy level A of the low frequency component of 1-bit data. The average energy level detector 35 includes a digital FIR filter 36 and a square sum average calculator 37.
[0055]
The average energy level A from the average energy level detector 35 is supplied to the gain generator 38.
[0056]
The gain generator 38 reads the gain coefficient K corresponding to the average energy level A from the ROM table 39 storing the input / output characteristics obtained by the function for performing the expansion process, and sets the gain coefficient K to the level. This is supplied to the multiplier 8 of the controller 7.
[0057]
As a function for performing the above expanding process, for example, as shown in FIG.
y = f (x) (1 ′)
There is. This is a characteristic that the output level y increases nonlinearly as the input level x increases.
[0058]
In order to realize such input / output characteristics, conventionally, it has been necessary to use a multi-bit PCM device similar to that shown in FIG.
[0059]
In the case of the 1-bit data, the data itself has only two maximum and minimum amplitude values consisting of “0” and “1”, and a processing signal could not be obtained directly from the 1-bit data input by the input / output function. .
[0060]
Therefore, in the 1-bit data processing apparatus shown in FIG. 8, the average energy level detector 35 detects the average energy level of the low-frequency audio signal component from the 1-bit data input, and generates a gain according to the average energy level. A conversion gain coefficient is generated by the unit 38. Based on the gain coefficient, the level controller 7 obtains level-controlled 1-bit data, here, 1-bit data output subjected to nonlinear expansion processing.
[0061]
The operation of this 1-bit data processing apparatus will be described in detail with reference to the timing chart of FIG. First, the original analog audio signal ((a) in FIG. 10) input from the input terminal 1 becomes the 1-bit data input X shown in (b) of FIG. 10 by the ΔΣ modulator 2 shown in FIG. . Here, the amplitude level of the original analog audio signal gradually increases in a longer time than the instant. The 1-bit data input X is supplied to the average energy level detector 35 and the delay line 6.
[0062]
The average energy level detector 3 includes a digital FIR filter 36 having an audio band as a cutoff frequency, and a square sum average calculator 37 for calculating a square sum average of the filter output. The average energy level A shown in c) is detected. This average energy level A is digital data and is an output having amplitude information.
[0063]
When the average energy level A is supplied, the gain generator 38 reads the gain coefficient K as shown in FIG. 10 (d) corresponding to the predetermined average energy level A with reference to the ROM table 39, Output to the multiplier 8 of the level controller 7.
[0064]
The multiplier 8 is a digital multiplier, and calculates and outputs the multiplier output Z as shown in the above equation (2).
[0065]
The gain K at this time is expressed by the above equation (3) from the above equation (1 ′) indicating the input / output conversion function.
[0066]
Here, in the case of 1-bit data, the average energy level is obtained as A by the average energy level detector 35. Accordingly, the gain generator 38 generates a gain coefficient K corresponding to the level by the above equation (4). The expressions (3) and (4) correspond to the transfer function of the converter 26 according to the expression (1 ′).
[0067]
FIG. 11 shows an example of conversion characteristics stored in the ROM table 39. This is a transfer characteristic derived by the equation (4) from the input / output conversion function shown in FIG. 9 and the equation (1 ′).
[0068]
Here, when an audio signal as shown in FIG. 10A is input, the gain coefficient K is 0.0 when the level A is around 0.0, and is 2.0 when the level A is 1.0. Yes, the change is linear.
[0069]
On the other hand, the 1-bit data input X is subjected to a delay operation corresponding to the delay time by the average energy level detector 35 and the gain generator 38 by the delay line 6, and after the timing is adjusted, by the multiplier 8 in the gain controller 7. The gain coefficient is multiplied by K. The multiplication output Z shown in (e) of FIG. 10 obtained by multiplying by K is converted again to 1-bit data by the ΔΣ modulator 9 having the configuration shown in FIG. 2, and the level-controlled 1-bit data output Y ( It is obtained as (f) in FIG.
[0070]
This 1-bit data output Y is converted into an analog signal by the Allogro FIR filter 10 shown in FIG. 7 and passed through an analog LPF (not shown) to be an audible analog audio signal ((g) in FIG. 10). The
The amplitude level of the audio signal component shown in (g) of FIG. 10 is gradually expanded in a longer time than the instant, like the original audio signal shown in (a) of FIG.
[0071]
As described above, according to the 1-bit data processing apparatus, the 1-bit data is used as it is without changing it back to the analog signal once as in the prior art, and the gain operation according to the low frequency component level is performed. Expand processing is realized. That is, the level can be controlled with a simpler configuration and without losing the sound quality.
[0072]
The signal shown in (g) of FIG. 10 is the case where the input / output function used in the expansion process is used, but by using other characteristics, the same nonlinear process can be performed, and various effects can be obtained. The effect can be realized.
[0073]
In the past, both the 1-bit data processing device shown in FIG. 1 of the first embodiment and the 1-bit data processing device shown in FIG. 8 of the second embodiment both have low-frequency signal components. The instantaneous peak value level detector 3, the average energy level detector 35, the gain generator 4, and the gain generator 38 are operated in synchronism with the sampling period unit used for the ΔΣ modulation processing. These processing loads may be reduced by performing the processing at an integer multiple of the sampling period.
[0074]
In FIG. 12, the system clock of the instantaneous peak value level detector 3 and the gain generator 4 of the 1-bit data processing device of the first embodiment is divided by 1/64 into the sampling frequency 64fs used in the ΔΣ modulation processing. A configuration in the case where the system clock fs is divided by the unit 42 is shown.
[0075]
The sampling frequency 64 fs used for the ΔΣ modulation processing in the ΔΣ modulator 2 from the clock input terminal 41 is supplied to the delay line 6 and the level controller 7 as a system clock. The instantaneous peak value level detector 3 and the gain generator 4 are supplied with a system clock having a frequency fs divided by 1/64 by the frequency divider 42.
[0076]
As a result, a series of operation processing for gain control is reduced to 1/64, and the scale when configuring hardware to be executed in real time can be reduced.
[0077]
Similarly, as shown in FIG. 13, the system clock to the average energy level detector 35 and the gain generator 38 of the 1-bit data processing apparatus of the second embodiment is 1/64 by the frequency divider 42. By using a clock with a frequency fs divided by 1, the series of operation processing for gain control can be reduced to 1/64, and the scale when configuring hardware to be executed in real time can be reduced.
[0078]
Further, the digital data processing method according to the present invention, that is, the level information of the amplitude of the low frequency component of the 1-bit data is detected, and the level of the 1-bit data is determined based on the gain coefficient generated according to the amplitude level information. If a digital data processing method characterized by control is programmed as software and stored in a recording medium such as a ROM, for example, 1-bit data subjected to effect processing in the amplitude direction can be easily obtained.
[0079]
【The invention's effect】
According to the digital data processing apparatus of the present invention, the level of the 1-bit data can be set with a simple configuration and the sound quality is not impaired in accordance with the instantaneous peak value level of the amplitude of the low-frequency audio signal component of the 1-bit data. Can be controlled.
[0080]
Further, according to the digital data processing apparatus of the present invention, the level of the 1-bit data can be set with a simple configuration and the sound quality is not impaired in accordance with the average energy level of the amplitude of the low-frequency audio signal component of the 1-bit data. Can be controlled.
[0081]
Further, according to the digital data processing method of the present invention, the level of the 1-bit data can be set with a simple configuration and the sound quality is not impaired in accordance with the amplitude level information of the low-frequency audio signal component of the 1-bit data. Can be controlled.
[Brief description of the drawings]
FIG. 1 is a block diagram of a 1-bit data processing apparatus according to a first embodiment of a digital data processing apparatus and method according to the present invention.
2 is a block diagram showing a detailed configuration of a ΔΣ modulator used in the 1-bit data processing apparatus shown in FIG. 1; FIG.
FIG. 3 is a characteristic diagram showing input / output characteristics of nonlinear limiter processing;
4 is a block diagram showing a configuration of a conventional multi-bit PCM device that executes the input / output characteristics shown in FIG. 3; FIG.
5 is a timing chart for explaining the operation of the 1-bit data processing apparatus shown in FIG.
6 is a characteristic diagram showing an example of conversion characteristics of a gain generator used in the 1-bit data processing apparatus shown in FIG. 1; FIG.
7 is a circuit diagram showing a configuration of an analog FIR filter used in the 1-bit data processing apparatus shown in FIG. 1; FIG.
FIG. 8 is a block diagram showing a configuration of a 1-bit data processing apparatus according to a second embodiment of the digital data processing apparatus and method according to the present invention.
9 is a characteristic diagram showing input / output characteristics of an expansion process performed by the 1-bit data processing apparatus shown in FIG. 8; FIG.
10 is a timing chart for explaining the operation of the 1-bit data processing apparatus shown in FIG. 8; FIG.
11 is a characteristic diagram showing an example of a conversion characteristic of a gain generator used in the 1-bit data processing apparatus shown in FIG.
12 is a block diagram of a modification of the 1-bit data processing apparatus according to the first embodiment shown in FIG. 1; FIG.
FIG. 13 is a block diagram of a modification of the 1-bit data processing apparatus according to the second embodiment shown in FIG. 8;
[Explanation of symbols]
2 ΔΣ modulator, 3 instantaneous peak value level detector, 4 gain generator, 5 ROM table, 6 delay line, 7 level controller, 8 multiplier, 9 ΔΣ modulator

Claims (6)

A digital data processing apparatus for controlling 1-bit digital data obtained by subjecting an audio signal to delta-sigma modulation processing to vary the gain of the audio signal ,
Instantaneous peak value level detecting means for extracting only the low frequency component of the audio signal from the 1-bit digital data and detecting the instantaneous peak value level of the low frequency component of the audio signal ;
Storage means with predetermined input / output characteristics;
Gain generating means for generating a gain coefficient of the instantaneous peak value level by inputting the instantaneous peak value level obtained by the instantaneous peak value level detecting means to the input / output characteristics stored in the storage means ;
Level control means for controlling the 1-bit digital data based on the input characteristics by multiplying the 1-bit digital data by the gain coefficient output from the gain generation means and performing delta-sigma modulation. A digital data processing device.   2. The digital data processing apparatus according to claim 1, wherein a system clock frequency of said instantaneous peak value level detecting means and said gain generating means is made lower than a clock frequency used in said delta-sigma modulation processing. A digital data processing apparatus for controlling 1-bit digital data obtained by subjecting an audio signal to delta-sigma modulation processing to vary the gain of the audio signal ,
Average energy level detection means for extracting only the low frequency component of the audio signal from the 1-bit digital data and detecting the average energy level of the low frequency component of the audio signal ;
Storage means with predetermined input / output characteristics;
Gain generation means for generating a gain coefficient of the average energy level by inputting the average energy level obtained by the average energy level detection means to the input / output characteristics stored in the storage means ;
Level control means for controlling the 1-bit digital data based on the input characteristics by multiplying the 1-bit digital data by the gain coefficient output from the gain generation means and performing delta-sigma modulation. A digital data processing device. 4. The digital data processing apparatus according to claim 3, wherein a system clock frequency of the average energy level detecting means and the gain generating means is made lower than a clock frequency used in the delta-sigma modulation processing. A digital data processing method for controlling 1-bit digital data obtained by subjecting an audio signal to delta-sigma modulation processing to vary the gain of the audio signal ,
An instantaneous peak value level detecting step for extracting only a low frequency component of the audio signal from the 1-bit digital data and detecting an instantaneous peak value level of the low frequency component of the audio signal;
A storage step of storing predetermined input / output characteristics in the storage means;
A gain generating step for generating a gain coefficient of the instantaneous peak value level by inputting the instantaneous peak value level obtained by the instantaneous peak value level detecting step into the input / output characteristics stored in the storage means by the storing step;
A level control step of controlling the 1-bit digital data based on the input characteristics by multiplying the 1-bit digital data by the gain coefficient output from the gain generation step and performing delta-sigma modulation ;
Digital data processing method, characterized in that it comprises a. A digital data processing method for varying the gain of the audio signal by controlling one Bittodi digital data obtained by performing a delta sigma modulation process in the audio signal,
An average energy level detecting step for extracting only a low frequency component of the audio signal from the 1-bit digital data and detecting an average energy level of the low frequency component of the audio signal;
A storage step of storing predetermined input / output characteristics in the storage means ;
A gain generation step of generating a gain coefficient of the average energy level by inputting the average energy level obtained by the average energy level detection step to the input / output characteristics stored in the storage means by the storage step;
A level control step of controlling the 1-bit digital data based on the input characteristics by multiplying the 1-bit digital data by the gain coefficient output from the gain generation step and performing delta-sigma modulation;
A digital data processing method comprising:

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