JP3796593B2 - Multi-layer substrate CAD system - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a multilayer substrate CAD system that optimizes a ground arrangement such as a filter for filtering a high-frequency component of an electric circuit that generates interference in the multilayer substrate CAD system in a pattern arrangement of the multilayer substrate CAD system.
[0002]
[Prior art]
In a conventional multi-layer substrate CAD system, components, ground, applied voltage, and the like are managed by nodes, and if connected, the length of the pattern is not detected no matter how it is arranged. FIG. 4 is a flowchart showing an outline of the operation of the conventional multilayer substrate CAD system.
[0003]
4, (1) shows the respective processing steps S1 to S4 of the multilayer substrate CAD system, and (2) is a schematic diagram of wiring arrangement or automatic wiring arrangement by the operator in each processing step. Step S1 is (21) a condenser C ₁ connected in parallel to the series-connected resistors R _1, R ₂ Toko resistor R ₂ as illustrated in, the resistors R _2, one end of the capacitor C ₁ is ground (conventional The circuit diagram (21) marked with the ground symbol A) indicated by reference numeral 1 is input to the multilayer substrate CAD system.
[0004]
In step S2, the net list is expanded, and the connection points ( ₁ ), (2) and the ground point 0 relating to the resistors R ₁ and R ₂ and the capacitor C ₁ are determined as illustrated in (22). That is, the resistor R ₁ is (1) and (2), the resistor R ₂ is (2) and 0, and the capacitor C ₁ is (2) and 0.
[0005]
Next, in step S3, component land patterns are arranged, and component connection lands 3a to 3f are arranged as illustrated in (23). Here, the land 3a and 3b of the parts connected resistors R _1, 3c and 3d resistor R _2, 3e and 3f are for capacitors C _1, 3d and 3f is a land of parts ground connection.
[0006]
In the final step S4, pattern placement (including through holes) is performed based on the net list, and the component connection lands 3b, 3c, and 3e are commonly connected by the component connection land 3g as illustrated in (24). The This corresponds to the connection point ( ₂₎ between the resistors R ₁ and R ₂ and the capacitor C ₁ shown in (22). The component connecting lands 3d and 3f are connected by a through hole 4 and a ground pattern 5 connected to an inner layer ground pattern (not shown).
[0007]
FIG. 5 is a diagram for explaining deterioration of high frequency characteristics of a capacitor based on a pattern arrangement of a circuit diagram of a conventional multilayer substrate CAD system. In FIG. 5, (1) shows an internal equivalent circuit (shown on the right side) of the capacitor C ₂ (shown on the left side), the capacitor C ₂ includes a resistance component r ₂ and an inductance component L ₂ , and (2) shows a multilayer substrate CAD system. (1) shows a pattern arrangement diagram of the circuit diagram, wherein a capacitor C ₂ is connected between the lands 3 h and 3 i for connecting components, and a ground pattern 5 is arranged between the through hole 4. (3) is a cross-sectional view taken along line bb ′ of (2), and 6 is an insulating layer of a four-layer substrate exemplified as a multilayer substrate, and an inner layer ground pattern 7 and an inner layer power supply pattern 8 are formed between the insulating layers. The through hole 4 is connected to the inner layer ground pattern 7.
[0008]
In the pattern arrangement shown in FIGS. 5 (2) and 5 (3), the stray inductance (Lp) 9 is inserted in series with the capacitor C ₂ as shown on the left side of (4) due to the ground pattern 5. Therefore, the internal equivalent circuit of the capacitor changes from the right side display of (1) to the right side display of (4). As a result, the high frequency characteristic inherent to the capacitor C ₂ is as shown in FIG. 5 (5) (horizontal axis: frequency, vertical axis: gain) from a (single capacitor characteristic) to b (effect of the stray inductance Lp). It deteriorates instead.
[0009]
[Problems to be solved by the invention]
In such a pattern arrangement such as a capacitor in the configuration of the multilayer substrate as shown in FIG. 5 described above, the stray inductance Lp component is generated in the ground pattern 5 so that the high-frequency component does not return to the ground, and the high-frequency characteristics possessed by the components. There was a problem that (a of FIG. 5 (5)) could not be fully utilized.
[0010]
The present invention solves the above-described problems of the conventional example. A new ground symbol different from the conventional one is introduced on the circuit diagram, and the ground pattern of the ground of a component connected to the new ground symbol on the circuit diagram is displayed. The purpose is to make use of the characteristics of the parts by arranging the through holes connected to the inner ground at the same time as the parts placement.
[0011]
[Means for Solving the Problems]
In order to solve the above problems, the multilayer circuit board CAD system of the present invention includes a first processing step of performing an operation of inputting the data of the part, ground and applied voltage or the like, shown as a symbol in the circuit diagram, the input A second processing step for performing an operation of expanding a net list in accordance with the data of the circuit diagram, a third processing step for performing an operation of arranging a component land for component connection according to the net list, and the net list. And a fourth processing step of performing an operation of arranging a ground pattern connected to the component ground and a ground pattern connected to the component ground, and an operation of arranging a through hole. In a multilayer substrate CAD system for creating a substrate pattern of a multilayer substrate based on arrangement data in a step, A first ground symbol indicating the ground pattern disposed in the fourth processing step, and a component land disposed in the vicinity of the component connection component land in the third processing step. And a second ground symbol indicating a ground pattern of a component land in which a through-hole connected to the inner layer ground is disposed , and the ground of each component created by the multi-layer substrate CAD system The pattern length is shortened to eliminate the effect of stray inductance.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Data according the invention in claim 1 includes a first processing step of performing an operation of inputting the data of the part, ground and applied voltage or the like, shown as a symbol in the circuit diagram, the input circuit diagram of the present invention A second processing step for performing an operation of expanding a net list according to the above , a third processing step for performing an operation of arranging a component land for component connection according to the net list, and between the component lands based on the net list. The fourth processing step includes an operation of arranging a connection pattern to be connected and a ground pattern connected to the component ground and an operation of arranging a through hole, and is based on the arrangement data in the third and fourth processing steps. In the multilayer substrate CAD system for creating the substrate pattern of the multilayer substrate, the fourth pattern is used as the symbol of the ground pattern. A first ground symbol indicating the ground pattern disposed in the processing step, and a through hole disposed in the vicinity of the component land for component connection in the third processing step and connected to the inner layer ground of the multilayer substrate. And a second ground symbol indicating the ground pattern of the component land to be arranged. By introducing the second ground symbol, the length of the ground pattern of each component is provided. of the Being not become long, it has an action that would have the suppress occurrence of the stray inductance.
[0014]
The invention of claim 2, wherein the present invention is the invention of claim 1, wherein the second ground symbols within a distance from the center of the constant granted parts Shinara command, the unit Shinara command and the inner layer a said multilayer board CAD system characterized in that the through-holes are placed to connect the ground, the pattern design, have a ground pattern does not increase above a certain length when moving the through hole Has the effect of
[0015]
Invention according to claim 3 of the present invention, the in the invention according to the first aspect, the second ground symbol is within a predetermined distance from the outer periphery of the parts Shinara command granted, and the portion Shinara command a said multilayer board CAD system characterized in that the through-holes are placed to connect the inner layer ground, the pattern design, the ground pattern does not increase above a certain length when moving the through hole It has the effect that would have.
[0016]
(Embodiment 1)
FIG. 1 shows a ground symbol mark (1), a land pattern (2) for connecting components of a multilayer board, and a sectional view (3) of the multilayer board in Embodiment 1 of the present invention. In FIG. 1 (1), 1 is a symbol mark A (first ground symbol) indicating a conventional ground, and 2 is a symbol mark B (second ground symbol) indicating a new ground, both of which are capacitors C _3. Shows the ground. The new symbol mark B is displayed by a thick black arrow as an example, but any shape can be used as long as it can be easily distinguished from the conventional symbol mark A.
[0017]
FIG. 1 (2) shows a case of four layers as a multilayer substrate, and FIG. 1 (3) shows a cross-sectional view taken along line aa ′ of (2). 1 (2) and (3), 3 is a land pattern for connecting components in the case of a four-layer board, 4 is a through hole, 6 is an insulating layer of the four-layer board, 7 is an inner ground pattern, and 8 is an inner power supply. Pattern.
[0018]
First, as described in the flowchart of the conventional example (FIG. 4), when a circuit diagram is input in step S1, a net list is expanded in step S2 and work by the board CAD system is started, the parts are conventionally soldered. The component connecting land pattern 3 for attaching is arranged, and then the pattern is connected according to the net list. However, as shown in FIG. 5 (2) of the conventional example, the ground pattern 5 becomes long and insertion of the stray inductance Lp is permitted. Therefore, in this embodiment, when the new ground symbol mark B newly introduced at the time of component placement described above is in the circuit diagram, the component is placed and at the same time the through hole 4 for ground connection is placed on the board CAD system. Thus, the ground pattern 5 is eliminated to prevent the stray inductance Lp9 from being mixed.
[0019]
(Embodiment 2)
FIG. 2 is a layout diagram of land patterns and through holes for connecting components of a four-layer board according to Embodiment 2 of the present invention. In this embodiment, in the board CAD system in which the through-holes 4 cannot be arranged at the same time when the component connecting land patterns 3 are arranged, as shown in FIG. A routine for checking whether a through hole 4 for ground connection is arranged at a distance d within the range d after the pattern arrangement according to the net list is incorporated in the substrate CAD system. Thereby, mixing of stray inductance equivalent to that in the first embodiment can be prevented.
[0020]
(Embodiment 3)
FIG. 3 is a layout diagram of land patterns and through holes for connecting components of a four-layer board according to Embodiment 3 of the present invention. In this embodiment, a routine for checking whether or not the through hole 4 for ground connection is disposed at a distance d within a certain distance from the center of the land pattern 3 for component connection after the pattern placement according to the net list is performed. It is incorporated in a substrate CAD system. Thereby, mixing of stray inductance equivalent to that in the first embodiment can be prevented.
[0021]
【The invention's effect】
As described above, the multilayer substrate CAD system of the present invention checks the difference between high frequency characteristics between the original circuit diagram and the actual circuit, that is, the influence of the stray inductance generated when the substrate is formed at the original circuit diagram level. This makes it possible to eliminate the waste of checking as described above after the substrate pattern is completed, thereby shortening the substrate design time.
[Brief description of the drawings]
FIG. 1 shows a ground symbol mark, a land pattern for connecting components of a multilayer board, and a sectional view of the multilayer board in Embodiment 1 of the present invention.
FIG. 2 is a layout diagram of land patterns and through holes for connecting components of a four-layer board in a second embodiment of the present invention.
FIG. 3 is a layout diagram of land patterns and through holes for connecting components of a four-layer board in a third embodiment of the present invention.
FIG. 4 is a flowchart showing an outline of operation of a conventional multilayer substrate CAD system.
FIG. 5 is a diagram for explaining deterioration of high frequency characteristics of a capacitor based on a circuit diagram pattern arrangement of a conventional multilayer substrate CAD system.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... Symbol mark A which shows the conventional ground, 2 ... Symbol mark B which shows the novel ground of this invention, 3 ... Land pattern for component connection, 4 ... Through hole for component ground connection, 5 ... Ground pattern, 6 ... 4 layer substrate insulating layer, 7 ... inner layer ground pattern, 8 ... inner layer power supply pattern, 9 ... stray inductance Lp.

Claims (3)

Performing a first processing step of performing components shown in the circuit diagram as a symbol, an operation of inputting data such as ground and applying a voltage, the operation to expand the netlist in accordance with the data of the inputted circuit diagram A second processing step, a third processing step for performing an operation of arranging component lands for component connection according to the net list, and a connection pattern for connecting between component lands based on the net list and a component ground. And a fourth processing step for performing the operation of arranging a through hole, and creating a substrate pattern of the multilayer substrate based on the arrangement data in the third and fourth processing steps In the CAD system,
As a ground pattern symbol, a first ground symbol indicating the ground pattern disposed in the fourth processing step, and a multilayer land disposed in the vicinity of the component land for component connection in the third processing step, A multilayer board CAD system comprising: a second ground symbol indicating a ground pattern of a component land in which a through hole connected to an inner layer ground of the board is disposed . Said second ground symbol in constant distance from the center parts Shinara command granted, claim 1, characterized in that it has placed the through hole for connecting the inner layer ground and the part lands The multilayer substrate CAD system described . Said second ground symbol is within a predetermined distance from the outer periphery of the parts Shinara command granted, and characterized in that the through-holes are placed to be connected to the front Symbol part Shinara command and said inner layer ground The multilayer substrate CAD system according to claim 1 .

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